[PATCH v4 0/5] drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs

[PATCH v4 0/5] drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs

[Gustavo Sousa]

Some of the parameters of used in display bandwidth calculations are
tied to the platform and are orthogonal to the display IP.  After talking
with the hardware team, we now have the information (and Bspec has been
updated) that the members deprogbwlimit and derating of struct
intel_sa_info are such platform-specific ones.

With that, we are now able to make the driver code more aligned with the
hardware by splitting structs intel_sa_info into two different structs:
one that is platform-specific and another that is display-IP-specific.

That change also allows us to simplify how we select the parameters for
the calculation.

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
Changes in v4:
- Minor updates to fix issues captured by CI; see changelog in
  individual patches for details.
- Link to v3: https://patch.msgid.link/20260514-separate-platform-from-diplay-ip-specific-bw-params-v3-0-68727d6fe3ec@intel.com

Changes in v3:
- Incorporated review feedback; see each individual patch for details.
- Link to v2: https://patch.msgid.link/20260511-separate-platform-from-diplay-ip-specific-bw-params-v2-0-e762cb8662da@intel.com

Changes in v2:
- Incorporated review feedback; see each individual patch for details.
- Link to v1: https://patch.msgid.link/20260408-separate-platform-from-diplay-ip-specific-bw-params-v1-0-23c53afa7db0@intel.com

---
Gustavo Sousa (5):
      drm/i915/bw: Don't call intel_dram_info() too early
      drm/i915/bw: Extract platform-specific parameters
      drm/i915/bw: Deduplicate intel_sa_info instances
      drm/i915/bw: Rename struct intel_sa_info to intel_display_bw_params
      drm/i915/bw: Extract get_display_bw_params()

 drivers/gpu/drm/i915/display/intel_bw.c | 205 ++++++++++++++++++++------------
 1 file changed, 128 insertions(+), 77 deletions(-)
---
base-commit: f05be6b9858836632ce6b4839e1bda3a470278b9
change-id: 20260408-separate-platform-from-diplay-ip-specific-bw-params-65bfba0603be

Best regards,
--  
Gustavo Sousa <gustavo.sousa@intel.com>

[PATCH v4 1/5] drm/i915/bw: Don't call intel_dram_info() too early

[Gustavo Sousa]

If we end-up bailing early from intel_bw_init_hw() due to
!HAS_DISPLAY(display), the call to intel_dram_info() to initialize
dram_info will be meaningless.  Move the call to be done after that
check.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 9c3a9bbb49f6..7eef693b51ad 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -791,11 +791,13 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
 
 void intel_bw_init_hw(struct intel_display *display)
 {
-	const struct dram_info *dram_info = intel_dram_info(display);
+	const struct dram_info *dram_info;
 
 	if (!HAS_DISPLAY(display))
 		return;
 
+	dram_info = intel_dram_info(display);
+
 	/*
 	 * Starting with Xe3p_LPD, the hardware tells us whether memory has ECC
 	 * enabled that would impact display bandwidth.  However, so far there

-- 
2.53.0

[PATCH v4 2/5] drm/i915/bw: Extract platform-specific parameters

[Gustavo Sousa]

We got confirmation from the hardware team that the bandwidth parameters
deprogbwlimit and derating are platform-specific and not tied to the
display IP.  As such, let's make sure that we use platform checks for
those.

The rest of the members of struct intel_sa_info are tied to the display
IP and we will deal with them as a follow-up.

v2:
  - Use good old if-ladder instead of weird-looking pattern "assign ret,
    check platform, then return ret". (Jani, Matt)
  - Have a single call site for get_platform_bw_params() and pass the
    result as parameter to the *_get_bw_info() functions. (Jani)
  - Avoid using "plat" as abbreviation for "platform". (Jani)
  - s/_plat_bw_params/_bw_params/, since all of the instances are
    prefixed with platform names. (Jani)
  - s/struct intel_platform_bw_params/struct intel_soc_bw_params/.
    (Matt)
  - Do not return a default value; prefer to return NULL and
    intentionally cause a NULL pointer dereference if a platform is
    missing. (Gustavo)

v3:
  - Call get_soc_bw_params() only after the check on
    HAS_DISPLAY(display). (Jani)
  - Combine if-ladder branches for adl_s_bw_params into a single one.
    (Matt)
  - Flatten if-ladder by checking for WCL before PTL (as opposed to
    checking for WCL inside the brace for PTL). (Matt)
  - Bail out of intel_bw_init_hw() if display version is below 11.
    (Gustavo)

v4:
  - Drop drm_WARN() when no platform was matched to avoid
    special-casing DG2 and any other platform that doesn't use
    SoC-specific parameters. (Jani)
  - Pass dram_info to get_soc_bw_params() to keep a single call to
    intel_dram_info(). (Jani)
  - Don't use 2 separate if-ladders (one for client and another for
    discrete platforms) and keep a single one for simplicity. (Gustavo)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 151 ++++++++++++++++++++++----------
 1 file changed, 103 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 7eef693b51ad..f5a0a3e009c1 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -372,81 +372,136 @@ static int icl_sagv_max_dclk(const struct intel_qgv_info *qi)
 	return dclk;
 }
 
+struct intel_soc_bw_params {
+	u8 deprogbwlimit;
+	u8 derating;
+};
+
+static const struct intel_soc_bw_params icl_bw_params = {
+	.deprogbwlimit = 25,
+	.derating = 10,
+};
+
+static const struct intel_soc_bw_params tgl_bw_params = {
+	.deprogbwlimit = 34,
+	.derating = 10,
+};
+
+static const struct intel_soc_bw_params rkl_bw_params = {
+	.deprogbwlimit = 20,
+	.derating = 10,
+};
+
+static const struct intel_soc_bw_params adl_s_bw_params = {
+	.deprogbwlimit = 38,
+	.derating = 10,
+};
+
+static const struct intel_soc_bw_params adl_p_bw_params = {
+	.deprogbwlimit = 38,
+	.derating = 20,
+};
+
+static const struct intel_soc_bw_params bmg_bw_params = {
+	.deprogbwlimit = 53,
+	.derating = 30,
+};
+
+static const struct intel_soc_bw_params bmg_ecc_bw_params = {
+	.deprogbwlimit = 53,
+	.derating = 45,
+};
+
+static const struct intel_soc_bw_params ptl_bw_params = {
+	.deprogbwlimit = 65,
+	.derating = 10,
+};
+
+static const struct intel_soc_bw_params wcl_bw_params = {
+	.deprogbwlimit = 22,
+	.derating = 10,
+};
+
+static const struct intel_soc_bw_params *get_soc_bw_params(struct intel_display *display,
+							   const struct dram_info *dram_info)
+{
+	if (display->platform.icelake ||
+	    display->platform.jasperlake ||
+	    display->platform.elkhartlake)
+		return &icl_bw_params;
+	else if (display->platform.tigerlake ||
+		 display->platform.dg1)
+		return &tgl_bw_params;
+	else if (display->platform.rocketlake)
+		return &rkl_bw_params;
+	else if (display->platform.alderlake_s ||
+		 display->platform.meteorlake ||
+		 display->platform.lunarlake)
+		return &adl_s_bw_params;
+	else if (display->platform.alderlake_p)
+		return &adl_p_bw_params;
+	else if (display->platform.battlemage &&
+		 dram_info->type == INTEL_DRAM_GDDR_ECC)
+		return &bmg_ecc_bw_params;
+	else if (display->platform.battlemage)
+		return &bmg_bw_params;
+	else if (display->platform.pantherlake_wildcatlake)
+		return &wcl_bw_params;
+	else if (display->platform.pantherlake ||
+		 display->platform.novalake)
+		return &ptl_bw_params;
+
+	return NULL;
+}
+
 struct intel_sa_info {
 	u16 displayrtids;
-	u8 deburst, deprogbwlimit, derating;
+	u8 deburst;
 };
 
 static const struct intel_sa_info icl_sa_info = {
 	.deburst = 8,
-	.deprogbwlimit = 25, /* GB/s */
 	.displayrtids = 128,
-	.derating = 10,
 };
 
 static const struct intel_sa_info tgl_sa_info = {
 	.deburst = 16,
-	.deprogbwlimit = 34, /* GB/s */
 	.displayrtids = 256,
-	.derating = 10,
 };
 
 static const struct intel_sa_info rkl_sa_info = {
 	.deburst = 8,
-	.deprogbwlimit = 20, /* GB/s */
 	.displayrtids = 128,
-	.derating = 10,
 };
 
 static const struct intel_sa_info adls_sa_info = {
 	.deburst = 16,
-	.deprogbwlimit = 38, /* GB/s */
 	.displayrtids = 256,
-	.derating = 10,
 };
 
 static const struct intel_sa_info adlp_sa_info = {
 	.deburst = 16,
-	.deprogbwlimit = 38, /* GB/s */
 	.displayrtids = 256,
-	.derating = 20,
 };
 
 static const struct intel_sa_info mtl_sa_info = {
 	.deburst = 32,
-	.deprogbwlimit = 38, /* GB/s */
 	.displayrtids = 256,
-	.derating = 10,
-};
-
-static const struct intel_sa_info xe2_hpd_sa_info = {
-	.derating = 30,
-	.deprogbwlimit = 53,
-	/* Other values not used by simplified algorithm */
-};
-
-static const struct intel_sa_info xe2_hpd_ecc_sa_info = {
-	.derating = 45,
-	.deprogbwlimit = 53,
-	/* Other values not used by simplified algorithm */
 };
 
 static const struct intel_sa_info xe3lpd_sa_info = {
 	.deburst = 32,
-	.deprogbwlimit = 65, /* GB/s */
 	.displayrtids = 256,
-	.derating = 10,
 };
 
 static const struct intel_sa_info xe3lpd_3002_sa_info = {
 	.deburst = 32,
-	.deprogbwlimit = 22, /* GB/s */
 	.displayrtids = 256,
-	.derating = 10,
 };
 
 static int icl_get_bw_info(struct intel_display *display,
 			   const struct dram_info *dram_info,
+			   const struct intel_soc_bw_params *soc_bw_params,
 			   const struct intel_sa_info *sa)
 {
 	struct intel_qgv_info qi = {};
@@ -466,7 +521,7 @@ static int icl_get_bw_info(struct intel_display *display,
 	}
 
 	dclk_max = icl_sagv_max_dclk(&qi);
-	maxdebw = min(sa->deprogbwlimit * 1000, dclk_max * 16 * 6 / 10);
+	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, dclk_max * 16 * 6 / 10);
 	ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
 	qi.deinterleave = DIV_ROUND_UP(num_channels, is_y_tile ? 4 : 2);
 
@@ -496,7 +551,7 @@ static int icl_get_bw_info(struct intel_display *display,
 			bw = DIV_ROUND_UP(sp->dclk * clpchgroup * 32 * num_channels, ct);
 
 			bi->deratedbw[j] = min(maxdebw,
-					       bw * (100 - sa->derating) / 100);
+					       bw * (100 - soc_bw_params->derating) / 100);
 
 			drm_dbg_kms(display->drm,
 				    "BW%d / QGV %d: num_planes=%d deratedbw=%u\n",
@@ -518,6 +573,7 @@ static int icl_get_bw_info(struct intel_display *display,
 
 static int tgl_get_bw_info(struct intel_display *display,
 			   const struct dram_info *dram_info,
+			   const struct intel_soc_bw_params *soc_bw_params,
 			   const struct intel_sa_info *sa)
 {
 	struct intel_qgv_info qi = {};
@@ -554,7 +610,7 @@ static int tgl_get_bw_info(struct intel_display *display,
 	dclk_max = icl_sagv_max_dclk(&qi);
 
 	peakbw = num_channels * DIV_ROUND_UP(qi.channel_width, 8) * dclk_max;
-	maxdebw = min(sa->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 100);
+	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 100);
 
 	ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
 	/*
@@ -599,7 +655,7 @@ static int tgl_get_bw_info(struct intel_display *display,
 			bw = DIV_ROUND_UP(sp->dclk * clpchgroup * 32 * num_channels, ct);
 
 			bi->deratedbw[j] = min(maxdebw,
-					       bw * (100 - sa->derating) / 100);
+					       bw * (100 - soc_bw_params->derating) / 100);
 			bi->peakbw[j] = DIV_ROUND_CLOSEST(sp->dclk *
 							  num_channels *
 							  qi.channel_width, 8);
@@ -661,7 +717,7 @@ static void dg2_get_bw_info(struct intel_display *display)
 
 static int xe2_hpd_get_bw_info(struct intel_display *display,
 			       const struct dram_info *dram_info,
-			       const struct intel_sa_info *sa)
+			       const struct intel_soc_bw_params *soc_bw_params)
 {
 	struct intel_qgv_info qi = {};
 	int num_channels = dram_info->num_channels;
@@ -676,14 +732,14 @@ static int xe2_hpd_get_bw_info(struct intel_display *display,
 	}
 
 	peakbw = num_channels * qi.channel_width / 8 * icl_sagv_max_dclk(&qi);
-	maxdebw = min(sa->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 10);
+	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 10);
 
 	for (i = 0; i < qi.num_points; i++) {
 		const struct intel_qgv_point *point = &qi.points[i];
 		int bw = num_channels * (qi.channel_width / 8) * point->dclk;
 
 		display->bw.max[0].deratedbw[i] =
-			min(maxdebw, (100 - sa->derating) * bw / 100);
+			min(maxdebw, (100 - soc_bw_params->derating) * bw / 100);
 		display->bw.max[0].peakbw[i] = bw;
 
 		drm_dbg_kms(display->drm, "QGV %d: deratedbw=%u peakbw: %u\n",
@@ -792,11 +848,13 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
 void intel_bw_init_hw(struct intel_display *display)
 {
 	const struct dram_info *dram_info;
+	const struct intel_soc_bw_params *soc_bw_params;
 
 	if (!HAS_DISPLAY(display))
 		return;
 
 	dram_info = intel_dram_info(display);
+	soc_bw_params = get_soc_bw_params(display, dram_info);
 
 	/*
 	 * Starting with Xe3p_LPD, the hardware tells us whether memory has ECC
@@ -809,28 +867,25 @@ void intel_bw_init_hw(struct intel_display *display)
 
 	if (DISPLAY_VER(display) >= 30) {
 		if (DISPLAY_VERx100(display) == 3002)
-			tgl_get_bw_info(display, dram_info, &xe3lpd_3002_sa_info);
+			tgl_get_bw_info(display, dram_info, soc_bw_params, &xe3lpd_3002_sa_info);
 		else
-			tgl_get_bw_info(display, dram_info, &xe3lpd_sa_info);
+			tgl_get_bw_info(display, dram_info, soc_bw_params, &xe3lpd_sa_info);
 	} else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
-		if (dram_info->type == INTEL_DRAM_GDDR_ECC)
-			xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_ecc_sa_info);
-		else
-			xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_sa_info);
+		xe2_hpd_get_bw_info(display, dram_info, soc_bw_params);
 	} else if (DISPLAY_VER(display) >= 14) {
-		tgl_get_bw_info(display, dram_info, &mtl_sa_info);
+		tgl_get_bw_info(display, dram_info, soc_bw_params, &mtl_sa_info);
 	} else if (display->platform.dg2) {
 		dg2_get_bw_info(display);
 	} else if (display->platform.alderlake_p) {
-		tgl_get_bw_info(display, dram_info, &adlp_sa_info);
+		tgl_get_bw_info(display, dram_info, soc_bw_params, &adlp_sa_info);
 	} else if (display->platform.alderlake_s) {
-		tgl_get_bw_info(display, dram_info, &adls_sa_info);
+		tgl_get_bw_info(display, dram_info, soc_bw_params, &adls_sa_info);
 	} else if (display->platform.rocketlake) {
-		tgl_get_bw_info(display, dram_info, &rkl_sa_info);
+		tgl_get_bw_info(display, dram_info, soc_bw_params, &rkl_sa_info);
 	} else if (DISPLAY_VER(display) == 12) {
-		tgl_get_bw_info(display, dram_info, &tgl_sa_info);
+		tgl_get_bw_info(display, dram_info, soc_bw_params, &tgl_sa_info);
 	} else if (DISPLAY_VER(display) == 11) {
-		icl_get_bw_info(display, dram_info, &icl_sa_info);
+		icl_get_bw_info(display, dram_info, soc_bw_params, &icl_sa_info);
 	}
 }
 

-- 
2.53.0

Re: [PATCH v4 2/5] drm/i915/bw: Extract platform-specific parameters

[Matt Roper]

On Mon, May 18, 2026 at 01:14:01PM -0300, Gustavo Sousa wrote:
> We got confirmation from the hardware team that the bandwidth parameters
> deprogbwlimit and derating are platform-specific and not tied to the
> display IP.  As such, let's make sure that we use platform checks for
> those.
> 
> The rest of the members of struct intel_sa_info are tied to the display
> IP and we will deal with them as a follow-up.
> 
> v2:
>   - Use good old if-ladder instead of weird-looking pattern "assign ret,
>     check platform, then return ret". (Jani, Matt)
>   - Have a single call site for get_platform_bw_params() and pass the
>     result as parameter to the *_get_bw_info() functions. (Jani)
>   - Avoid using "plat" as abbreviation for "platform". (Jani)
>   - s/_plat_bw_params/_bw_params/, since all of the instances are
>     prefixed with platform names. (Jani)
>   - s/struct intel_platform_bw_params/struct intel_soc_bw_params/.
>     (Matt)
>   - Do not return a default value; prefer to return NULL and
>     intentionally cause a NULL pointer dereference if a platform is
>     missing. (Gustavo)
> 
> v3:
>   - Call get_soc_bw_params() only after the check on
>     HAS_DISPLAY(display). (Jani)
>   - Combine if-ladder branches for adl_s_bw_params into a single one.
>     (Matt)
>   - Flatten if-ladder by checking for WCL before PTL (as opposed to
>     checking for WCL inside the brace for PTL). (Matt)
>   - Bail out of intel_bw_init_hw() if display version is below 11.
>     (Gustavo)
> 
> v4:
>   - Drop drm_WARN() when no platform was matched to avoid
>     special-casing DG2 and any other platform that doesn't use
>     SoC-specific parameters. (Jani)
>   - Pass dram_info to get_soc_bw_params() to keep a single call to
>     intel_dram_info(). (Jani)
>   - Don't use 2 separate if-ladders (one for client and another for
>     discrete platforms) and keep a single one for simplicity. (Gustavo)
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 151 ++++++++++++++++++++++----------
>  1 file changed, 103 insertions(+), 48 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 7eef693b51ad..f5a0a3e009c1 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -372,81 +372,136 @@ static int icl_sagv_max_dclk(const struct intel_qgv_info *qi)
>  	return dclk;
>  }
>  
> +struct intel_soc_bw_params {
> +	u8 deprogbwlimit;
> +	u8 derating;
> +};
> +
> +static const struct intel_soc_bw_params icl_bw_params = {
> +	.deprogbwlimit = 25,
> +	.derating = 10,
> +};
> +
> +static const struct intel_soc_bw_params tgl_bw_params = {
> +	.deprogbwlimit = 34,
> +	.derating = 10,
> +};
> +
> +static const struct intel_soc_bw_params rkl_bw_params = {
> +	.deprogbwlimit = 20,
> +	.derating = 10,
> +};
> +
> +static const struct intel_soc_bw_params adl_s_bw_params = {
> +	.deprogbwlimit = 38,
> +	.derating = 10,
> +};
> +
> +static const struct intel_soc_bw_params adl_p_bw_params = {
> +	.deprogbwlimit = 38,
> +	.derating = 20,
> +};
> +
> +static const struct intel_soc_bw_params bmg_bw_params = {
> +	.deprogbwlimit = 53,
> +	.derating = 30,
> +};
> +
> +static const struct intel_soc_bw_params bmg_ecc_bw_params = {
> +	.deprogbwlimit = 53,
> +	.derating = 45,
> +};
> +
> +static const struct intel_soc_bw_params ptl_bw_params = {
> +	.deprogbwlimit = 65,
> +	.derating = 10,
> +};
> +
> +static const struct intel_soc_bw_params wcl_bw_params = {
> +	.deprogbwlimit = 22,
> +	.derating = 10,
> +};
> +
> +static const struct intel_soc_bw_params *get_soc_bw_params(struct intel_display *display,
> +							   const struct dram_info *dram_info)
> +{
> +	if (display->platform.icelake ||
> +	    display->platform.jasperlake ||
> +	    display->platform.elkhartlake)
> +		return &icl_bw_params;
> +	else if (display->platform.tigerlake ||
> +		 display->platform.dg1)
> +		return &tgl_bw_params;
> +	else if (display->platform.rocketlake)
> +		return &rkl_bw_params;
> +	else if (display->platform.alderlake_s ||
> +		 display->platform.meteorlake ||
> +		 display->platform.lunarlake)
> +		return &adl_s_bw_params;
> +	else if (display->platform.alderlake_p)
> +		return &adl_p_bw_params;
> +	else if (display->platform.battlemage &&
> +		 dram_info->type == INTEL_DRAM_GDDR_ECC)
> +		return &bmg_ecc_bw_params;
> +	else if (display->platform.battlemage)
> +		return &bmg_bw_params;
> +	else if (display->platform.pantherlake_wildcatlake)
> +		return &wcl_bw_params;
> +	else if (display->platform.pantherlake ||
> +		 display->platform.novalake)
> +		return &ptl_bw_params;
> +
> +	return NULL;
> +}
> +
>  struct intel_sa_info {
>  	u16 displayrtids;
> -	u8 deburst, deprogbwlimit, derating;
> +	u8 deburst;
>  };
>  
>  static const struct intel_sa_info icl_sa_info = {
>  	.deburst = 8,
> -	.deprogbwlimit = 25, /* GB/s */
>  	.displayrtids = 128,
> -	.derating = 10,
>  };
>  
>  static const struct intel_sa_info tgl_sa_info = {
>  	.deburst = 16,
> -	.deprogbwlimit = 34, /* GB/s */
>  	.displayrtids = 256,
> -	.derating = 10,
>  };
>  
>  static const struct intel_sa_info rkl_sa_info = {
>  	.deburst = 8,
> -	.deprogbwlimit = 20, /* GB/s */
>  	.displayrtids = 128,
> -	.derating = 10,
>  };
>  
>  static const struct intel_sa_info adls_sa_info = {
>  	.deburst = 16,
> -	.deprogbwlimit = 38, /* GB/s */
>  	.displayrtids = 256,
> -	.derating = 10,
>  };
>  
>  static const struct intel_sa_info adlp_sa_info = {
>  	.deburst = 16,
> -	.deprogbwlimit = 38, /* GB/s */
>  	.displayrtids = 256,
> -	.derating = 20,
>  };
>  
>  static const struct intel_sa_info mtl_sa_info = {
>  	.deburst = 32,
> -	.deprogbwlimit = 38, /* GB/s */
>  	.displayrtids = 256,
> -	.derating = 10,
> -};
> -
> -static const struct intel_sa_info xe2_hpd_sa_info = {
> -	.derating = 30,
> -	.deprogbwlimit = 53,
> -	/* Other values not used by simplified algorithm */
> -};
> -
> -static const struct intel_sa_info xe2_hpd_ecc_sa_info = {
> -	.derating = 45,
> -	.deprogbwlimit = 53,
> -	/* Other values not used by simplified algorithm */
>  };
>  
>  static const struct intel_sa_info xe3lpd_sa_info = {
>  	.deburst = 32,
> -	.deprogbwlimit = 65, /* GB/s */
>  	.displayrtids = 256,
> -	.derating = 10,
>  };
>  
>  static const struct intel_sa_info xe3lpd_3002_sa_info = {
>  	.deburst = 32,
> -	.deprogbwlimit = 22, /* GB/s */
>  	.displayrtids = 256,
> -	.derating = 10,
>  };
>  
>  static int icl_get_bw_info(struct intel_display *display,
>  			   const struct dram_info *dram_info,
> +			   const struct intel_soc_bw_params *soc_bw_params,
>  			   const struct intel_sa_info *sa)
>  {
>  	struct intel_qgv_info qi = {};
> @@ -466,7 +521,7 @@ static int icl_get_bw_info(struct intel_display *display,
>  	}
>  
>  	dclk_max = icl_sagv_max_dclk(&qi);
> -	maxdebw = min(sa->deprogbwlimit * 1000, dclk_max * 16 * 6 / 10);
> +	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, dclk_max * 16 * 6 / 10);
>  	ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
>  	qi.deinterleave = DIV_ROUND_UP(num_channels, is_y_tile ? 4 : 2);
>  
> @@ -496,7 +551,7 @@ static int icl_get_bw_info(struct intel_display *display,
>  			bw = DIV_ROUND_UP(sp->dclk * clpchgroup * 32 * num_channels, ct);
>  
>  			bi->deratedbw[j] = min(maxdebw,
> -					       bw * (100 - sa->derating) / 100);
> +					       bw * (100 - soc_bw_params->derating) / 100);
>  
>  			drm_dbg_kms(display->drm,
>  				    "BW%d / QGV %d: num_planes=%d deratedbw=%u\n",
> @@ -518,6 +573,7 @@ static int icl_get_bw_info(struct intel_display *display,
>  
>  static int tgl_get_bw_info(struct intel_display *display,
>  			   const struct dram_info *dram_info,
> +			   const struct intel_soc_bw_params *soc_bw_params,
>  			   const struct intel_sa_info *sa)
>  {
>  	struct intel_qgv_info qi = {};
> @@ -554,7 +610,7 @@ static int tgl_get_bw_info(struct intel_display *display,
>  	dclk_max = icl_sagv_max_dclk(&qi);
>  
>  	peakbw = num_channels * DIV_ROUND_UP(qi.channel_width, 8) * dclk_max;
> -	maxdebw = min(sa->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 100);
> +	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 100);
>  
>  	ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
>  	/*
> @@ -599,7 +655,7 @@ static int tgl_get_bw_info(struct intel_display *display,
>  			bw = DIV_ROUND_UP(sp->dclk * clpchgroup * 32 * num_channels, ct);
>  
>  			bi->deratedbw[j] = min(maxdebw,
> -					       bw * (100 - sa->derating) / 100);
> +					       bw * (100 - soc_bw_params->derating) / 100);
>  			bi->peakbw[j] = DIV_ROUND_CLOSEST(sp->dclk *
>  							  num_channels *
>  							  qi.channel_width, 8);
> @@ -661,7 +717,7 @@ static void dg2_get_bw_info(struct intel_display *display)
>  
>  static int xe2_hpd_get_bw_info(struct intel_display *display,
>  			       const struct dram_info *dram_info,
> -			       const struct intel_sa_info *sa)
> +			       const struct intel_soc_bw_params *soc_bw_params)
>  {
>  	struct intel_qgv_info qi = {};
>  	int num_channels = dram_info->num_channels;
> @@ -676,14 +732,14 @@ static int xe2_hpd_get_bw_info(struct intel_display *display,
>  	}
>  
>  	peakbw = num_channels * qi.channel_width / 8 * icl_sagv_max_dclk(&qi);
> -	maxdebw = min(sa->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 10);
> +	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 10);
>  
>  	for (i = 0; i < qi.num_points; i++) {
>  		const struct intel_qgv_point *point = &qi.points[i];
>  		int bw = num_channels * (qi.channel_width / 8) * point->dclk;
>  
>  		display->bw.max[0].deratedbw[i] =
> -			min(maxdebw, (100 - sa->derating) * bw / 100);
> +			min(maxdebw, (100 - soc_bw_params->derating) * bw / 100);
>  		display->bw.max[0].peakbw[i] = bw;
>  
>  		drm_dbg_kms(display->drm, "QGV %d: deratedbw=%u peakbw: %u\n",
> @@ -792,11 +848,13 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
>  void intel_bw_init_hw(struct intel_display *display)
>  {
>  	const struct dram_info *dram_info;
> +	const struct intel_soc_bw_params *soc_bw_params;
>  
>  	if (!HAS_DISPLAY(display))
>  		return;
>  
>  	dram_info = intel_dram_info(display);
> +	soc_bw_params = get_soc_bw_params(display, dram_info);
>  
>  	/*
>  	 * Starting with Xe3p_LPD, the hardware tells us whether memory has ECC
> @@ -809,28 +867,25 @@ void intel_bw_init_hw(struct intel_display *display)
>  
>  	if (DISPLAY_VER(display) >= 30) {
>  		if (DISPLAY_VERx100(display) == 3002)
> -			tgl_get_bw_info(display, dram_info, &xe3lpd_3002_sa_info);
> +			tgl_get_bw_info(display, dram_info, soc_bw_params, &xe3lpd_3002_sa_info);
>  		else
> -			tgl_get_bw_info(display, dram_info, &xe3lpd_sa_info);
> +			tgl_get_bw_info(display, dram_info, soc_bw_params, &xe3lpd_sa_info);
>  	} else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
> -		if (dram_info->type == INTEL_DRAM_GDDR_ECC)
> -			xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_ecc_sa_info);
> -		else
> -			xe2_hpd_get_bw_info(display, dram_info, &xe2_hpd_sa_info);
> +		xe2_hpd_get_bw_info(display, dram_info, soc_bw_params);
>  	} else if (DISPLAY_VER(display) >= 14) {
> -		tgl_get_bw_info(display, dram_info, &mtl_sa_info);
> +		tgl_get_bw_info(display, dram_info, soc_bw_params, &mtl_sa_info);
>  	} else if (display->platform.dg2) {
>  		dg2_get_bw_info(display);
>  	} else if (display->platform.alderlake_p) {
> -		tgl_get_bw_info(display, dram_info, &adlp_sa_info);
> +		tgl_get_bw_info(display, dram_info, soc_bw_params, &adlp_sa_info);
>  	} else if (display->platform.alderlake_s) {
> -		tgl_get_bw_info(display, dram_info, &adls_sa_info);
> +		tgl_get_bw_info(display, dram_info, soc_bw_params, &adls_sa_info);
>  	} else if (display->platform.rocketlake) {
> -		tgl_get_bw_info(display, dram_info, &rkl_sa_info);
> +		tgl_get_bw_info(display, dram_info, soc_bw_params, &rkl_sa_info);
>  	} else if (DISPLAY_VER(display) == 12) {
> -		tgl_get_bw_info(display, dram_info, &tgl_sa_info);
> +		tgl_get_bw_info(display, dram_info, soc_bw_params, &tgl_sa_info);
>  	} else if (DISPLAY_VER(display) == 11) {
> -		icl_get_bw_info(display, dram_info, &icl_sa_info);
> +		icl_get_bw_info(display, dram_info, soc_bw_params, &icl_sa_info);
>  	}
>  }
>  
> 
> -- 
> 2.53.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

[PATCH v4 3/5] drm/i915/bw: Deduplicate intel_sa_info instances

[Gustavo Sousa]

Now that intel_sa_info contains bandwidth parameters specific to the
display IP, we can drop many duplicates and reuse from previous
releases.

Let's do that and also simplify intel_bw_init_hw() while at it.

v2:
  - Drop rkl_sa_info and reuse icl_sa_info. (Matt)
  - Add comment explaining RKL's display's peculiarity on using ICL's
    parameters. (Matt)
  - Don't rename xelpdp_sa_info to mtl_sa_info.  Renaming of instances
    to use IP names will be done in upcoming changes.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 51 ++++++++-------------------------
 1 file changed, 12 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index f5a0a3e009c1..5f2f2b08b92f 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -469,36 +469,11 @@ static const struct intel_sa_info tgl_sa_info = {
 	.displayrtids = 256,
 };
 
-static const struct intel_sa_info rkl_sa_info = {
-	.deburst = 8,
-	.displayrtids = 128,
-};
-
-static const struct intel_sa_info adls_sa_info = {
-	.deburst = 16,
-	.displayrtids = 256,
-};
-
-static const struct intel_sa_info adlp_sa_info = {
-	.deburst = 16,
-	.displayrtids = 256,
-};
-
 static const struct intel_sa_info mtl_sa_info = {
 	.deburst = 32,
 	.displayrtids = 256,
 };
 
-static const struct intel_sa_info xe3lpd_sa_info = {
-	.deburst = 32,
-	.displayrtids = 256,
-};
-
-static const struct intel_sa_info xe3lpd_3002_sa_info = {
-	.deburst = 32,
-	.displayrtids = 256,
-};
-
 static int icl_get_bw_info(struct intel_display *display,
 			   const struct dram_info *dram_info,
 			   const struct intel_soc_bw_params *soc_bw_params,
@@ -865,25 +840,23 @@ void intel_bw_init_hw(struct intel_display *display)
 	if (DISPLAY_VER(display) >= 35)
 		drm_WARN_ON(display->drm, dram_info->ecc_impacting_de_bw);
 
-	if (DISPLAY_VER(display) >= 30) {
-		if (DISPLAY_VERx100(display) == 3002)
-			tgl_get_bw_info(display, dram_info, soc_bw_params, &xe3lpd_3002_sa_info);
-		else
-			tgl_get_bw_info(display, dram_info, soc_bw_params, &xe3lpd_sa_info);
-	} else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
+	if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
 		xe2_hpd_get_bw_info(display, dram_info, soc_bw_params);
 	} else if (DISPLAY_VER(display) >= 14) {
 		tgl_get_bw_info(display, dram_info, soc_bw_params, &mtl_sa_info);
 	} else if (display->platform.dg2) {
 		dg2_get_bw_info(display);
-	} else if (display->platform.alderlake_p) {
-		tgl_get_bw_info(display, dram_info, soc_bw_params, &adlp_sa_info);
-	} else if (display->platform.alderlake_s) {
-		tgl_get_bw_info(display, dram_info, soc_bw_params, &adls_sa_info);
-	} else if (display->platform.rocketlake) {
-		tgl_get_bw_info(display, dram_info, soc_bw_params, &rkl_sa_info);
-	} else if (DISPLAY_VER(display) == 12) {
-		tgl_get_bw_info(display, dram_info, soc_bw_params, &tgl_sa_info);
+	} else if (DISPLAY_VER(display) >= 12) {
+		/*
+		 * RKL's SoC was based on ICL and the display, even though being
+		 * gen12, had changes to the memory interface to match gen11's,
+		 * consequently inheriting gen11's display-specific bandwidth
+		 * parameters.
+		 */
+		if (display->platform.rocketlake)
+			tgl_get_bw_info(display, dram_info, soc_bw_params, &icl_sa_info);
+		else
+			tgl_get_bw_info(display, dram_info, soc_bw_params, &tgl_sa_info);
 	} else if (DISPLAY_VER(display) == 11) {
 		icl_get_bw_info(display, dram_info, soc_bw_params, &icl_sa_info);
 	}

-- 
2.53.0

[PATCH v4 4/5] drm/i915/bw: Rename struct intel_sa_info to intel_display_bw_params

[Gustavo Sousa]

To align with struct intel_platform_bw_params, rename struct
intel_sa_info to intel_display_bw_params.  Also add comments to contrast
their purposes.

v2:
  - Use gen11 and gen12 as prefixes for ICL's and TGL's display-specific
    parameters variables. (Matt)
  - Prefer to use "display" instead of "disp" in variable names. (Jani)
  - Drop the redundant "disp" from the variable names.

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 36 ++++++++++++++++++++-------------
 1 file changed, 22 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 5f2f2b08b92f..26b294544d10 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -372,6 +372,10 @@ static int icl_sagv_max_dclk(const struct intel_qgv_info *qi)
 	return dclk;
 }
 
+/*
+ * Bandwidth parameters that are tied to the SoC (as opposed to struct
+ * intel_display_bw_params).
+ */
 struct intel_soc_bw_params {
 	u8 deprogbwlimit;
 	u8 derating;
@@ -454,22 +458,26 @@ static const struct intel_soc_bw_params *get_soc_bw_params(struct intel_display
 	return NULL;
 }
 
-struct intel_sa_info {
+/*
+ * Bandwidth parameters that are tied to the display IP (as opposed to struct
+ * intel_soc_bw_params).
+ */
+struct intel_display_bw_params {
 	u16 displayrtids;
 	u8 deburst;
 };
 
-static const struct intel_sa_info icl_sa_info = {
+static const struct intel_display_bw_params gen11_bw_params = {
 	.deburst = 8,
 	.displayrtids = 128,
 };
 
-static const struct intel_sa_info tgl_sa_info = {
+static const struct intel_display_bw_params gen12_bw_params = {
 	.deburst = 16,
 	.displayrtids = 256,
 };
 
-static const struct intel_sa_info mtl_sa_info = {
+static const struct intel_display_bw_params xelpdp_bw_params = {
 	.deburst = 32,
 	.displayrtids = 256,
 };
@@ -477,7 +485,7 @@ static const struct intel_sa_info mtl_sa_info = {
 static int icl_get_bw_info(struct intel_display *display,
 			   const struct dram_info *dram_info,
 			   const struct intel_soc_bw_params *soc_bw_params,
-			   const struct intel_sa_info *sa)
+			   const struct intel_display_bw_params *display_bw_params)
 {
 	struct intel_qgv_info qi = {};
 	bool is_y_tile = true; /* assume y tile may be used */
@@ -497,7 +505,7 @@ static int icl_get_bw_info(struct intel_display *display,
 
 	dclk_max = icl_sagv_max_dclk(&qi);
 	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, dclk_max * 16 * 6 / 10);
-	ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
+	ipqdepth = min(ipqdepthpch, display_bw_params->displayrtids / num_channels);
 	qi.deinterleave = DIV_ROUND_UP(num_channels, is_y_tile ? 4 : 2);
 
 	for (i = 0; i < num_groups; i++) {
@@ -505,7 +513,7 @@ static int icl_get_bw_info(struct intel_display *display,
 		int clpchgroup;
 		int j;
 
-		clpchgroup = (sa->deburst * qi.deinterleave / num_channels) << i;
+		clpchgroup = (display_bw_params->deburst * qi.deinterleave / num_channels) << i;
 		bi->num_planes = (ipqdepth - clpchgroup) / clpchgroup + 1;
 
 		bi->num_qgv_points = qi.num_points;
@@ -549,7 +557,7 @@ static int icl_get_bw_info(struct intel_display *display,
 static int tgl_get_bw_info(struct intel_display *display,
 			   const struct dram_info *dram_info,
 			   const struct intel_soc_bw_params *soc_bw_params,
-			   const struct intel_sa_info *sa)
+			   const struct intel_display_bw_params *display_bw_params)
 {
 	struct intel_qgv_info qi = {};
 	bool is_y_tile = true; /* assume y tile may be used */
@@ -587,7 +595,7 @@ static int tgl_get_bw_info(struct intel_display *display,
 	peakbw = num_channels * DIV_ROUND_UP(qi.channel_width, 8) * dclk_max;
 	maxdebw = min(soc_bw_params->deprogbwlimit * 1000, peakbw * DEPROGBWPCLIMIT / 100);
 
-	ipqdepth = min(ipqdepthpch, sa->displayrtids / num_channels);
+	ipqdepth = min(ipqdepthpch, display_bw_params->displayrtids / num_channels);
 	/*
 	 * clperchgroup = 4kpagespermempage * clperchperblock,
 	 * clperchperblock = 8 / num_channels * interleave
@@ -600,7 +608,7 @@ static int tgl_get_bw_info(struct intel_display *display,
 		int clpchgroup;
 		int j;
 
-		clpchgroup = (sa->deburst * qi.deinterleave / num_channels) << i;
+		clpchgroup = (display_bw_params->deburst * qi.deinterleave / num_channels) << i;
 
 		if (i < num_groups - 1) {
 			bi_next = &display->bw.max[i + 1];
@@ -843,7 +851,7 @@ void intel_bw_init_hw(struct intel_display *display)
 	if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
 		xe2_hpd_get_bw_info(display, dram_info, soc_bw_params);
 	} else if (DISPLAY_VER(display) >= 14) {
-		tgl_get_bw_info(display, dram_info, soc_bw_params, &mtl_sa_info);
+		tgl_get_bw_info(display, dram_info, soc_bw_params, &xelpdp_bw_params);
 	} else if (display->platform.dg2) {
 		dg2_get_bw_info(display);
 	} else if (DISPLAY_VER(display) >= 12) {
@@ -854,11 +862,11 @@ void intel_bw_init_hw(struct intel_display *display)
 		 * parameters.
 		 */
 		if (display->platform.rocketlake)
-			tgl_get_bw_info(display, dram_info, soc_bw_params, &icl_sa_info);
+			tgl_get_bw_info(display, dram_info, soc_bw_params, &gen11_bw_params);
 		else
-			tgl_get_bw_info(display, dram_info, soc_bw_params, &tgl_sa_info);
+			tgl_get_bw_info(display, dram_info, soc_bw_params, &gen12_bw_params);
 	} else if (DISPLAY_VER(display) == 11) {
-		icl_get_bw_info(display, dram_info, soc_bw_params, &icl_sa_info);
+		icl_get_bw_info(display, dram_info, soc_bw_params, &gen11_bw_params);
 	}
 }
 

-- 
2.53.0

[PATCH v4 5/5] drm/i915/bw: Extract get_display_bw_params()

[Gustavo Sousa]

Just like it is done for the platform-specific bandwidth parameters, use
a separate function named get_display_bw_params() to return the display
IP-specific parameters.  This simplifies intel_bw_init_hw() by having
just one call for each of the *_get_bw_info() functions.

v2:
  - Prefer to call get_display_bw_params() only once in
    intel_bw_init_hw() instead of having multiple calls in each of the
    affected *_get_bw_info() functions. (Jani)

v3:
  - Call get_display_bw_params() only after the check on
    HAS_DISPLAY(display). (Jani)
  - Return &gen11_bw_params only if display version is 11. (Matt)

v4:
  - Like done with get_soc_bw_params(), drop drm_WARN() when no display
    IP is matched.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 39 ++++++++++++++++++++++-----------
 1 file changed, 26 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 26b294544d10..d7b2bc80f8e3 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -482,6 +482,28 @@ static const struct intel_display_bw_params xelpdp_bw_params = {
 	.displayrtids = 256,
 };
 
+static const struct intel_display_bw_params *get_display_bw_params(struct intel_display *display)
+{
+	if (DISPLAY_VER(display) >= 14) {
+		return &xelpdp_bw_params;
+	} else if (DISPLAY_VER(display) >= 12) {
+		/*
+		 * RKL's SoC was based on ICL and the display, even though being
+		 * gen12, had changes to the memory interface to match gen11's,
+		 * consequently inheriting gen11's display-specific bandwidth
+		 * parameters.
+		 */
+		if (display->platform.rocketlake)
+			return &gen11_bw_params;
+		else
+			return &gen12_bw_params;
+	} else if (DISPLAY_VER(display) == 11) {
+		return &gen11_bw_params;
+	}
+
+	return NULL;
+}
+
 static int icl_get_bw_info(struct intel_display *display,
 			   const struct dram_info *dram_info,
 			   const struct intel_soc_bw_params *soc_bw_params,
@@ -832,12 +854,14 @@ void intel_bw_init_hw(struct intel_display *display)
 {
 	const struct dram_info *dram_info;
 	const struct intel_soc_bw_params *soc_bw_params;
+	const struct intel_display_bw_params *display_bw_params;
 
 	if (!HAS_DISPLAY(display))
 		return;
 
 	dram_info = intel_dram_info(display);
 	soc_bw_params = get_soc_bw_params(display, dram_info);
+	display_bw_params = get_display_bw_params(display);
 
 	/*
 	 * Starting with Xe3p_LPD, the hardware tells us whether memory has ECC
@@ -850,23 +874,12 @@ void intel_bw_init_hw(struct intel_display *display)
 
 	if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
 		xe2_hpd_get_bw_info(display, dram_info, soc_bw_params);
-	} else if (DISPLAY_VER(display) >= 14) {
-		tgl_get_bw_info(display, dram_info, soc_bw_params, &xelpdp_bw_params);
 	} else if (display->platform.dg2) {
 		dg2_get_bw_info(display);
 	} else if (DISPLAY_VER(display) >= 12) {
-		/*
-		 * RKL's SoC was based on ICL and the display, even though being
-		 * gen12, had changes to the memory interface to match gen11's,
-		 * consequently inheriting gen11's display-specific bandwidth
-		 * parameters.
-		 */
-		if (display->platform.rocketlake)
-			tgl_get_bw_info(display, dram_info, soc_bw_params, &gen11_bw_params);
-		else
-			tgl_get_bw_info(display, dram_info, soc_bw_params, &gen12_bw_params);
+		tgl_get_bw_info(display, dram_info, soc_bw_params, display_bw_params);
 	} else if (DISPLAY_VER(display) == 11) {
-		icl_get_bw_info(display, dram_info, soc_bw_params, &gen11_bw_params);
+		icl_get_bw_info(display, dram_info, soc_bw_params, display_bw_params);
 	}
 }
 

-- 
2.53.0

Re: [PATCH v4 5/5] drm/i915/bw: Extract get_display_bw_params()

[Matt Roper]

On Mon, May 18, 2026 at 01:14:04PM -0300, Gustavo Sousa wrote:
> Just like it is done for the platform-specific bandwidth parameters, use
> a separate function named get_display_bw_params() to return the display
> IP-specific parameters.  This simplifies intel_bw_init_hw() by having
> just one call for each of the *_get_bw_info() functions.
> 
> v2:
>   - Prefer to call get_display_bw_params() only once in
>     intel_bw_init_hw() instead of having multiple calls in each of the
>     affected *_get_bw_info() functions. (Jani)
> 
> v3:
>   - Call get_display_bw_params() only after the check on
>     HAS_DISPLAY(display). (Jani)
>   - Return &gen11_bw_params only if display version is 11. (Matt)
> 
> v4:
>   - Like done with get_soc_bw_params(), drop drm_WARN() when no display
>     IP is matched.
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 39 ++++++++++++++++++++++-----------
>  1 file changed, 26 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index 26b294544d10..d7b2bc80f8e3 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -482,6 +482,28 @@ static const struct intel_display_bw_params xelpdp_bw_params = {
>  	.displayrtids = 256,
>  };
>  
> +static const struct intel_display_bw_params *get_display_bw_params(struct intel_display *display)
> +{
> +	if (DISPLAY_VER(display) >= 14) {
> +		return &xelpdp_bw_params;
> +	} else if (DISPLAY_VER(display) >= 12) {
> +		/*
> +		 * RKL's SoC was based on ICL and the display, even though being
> +		 * gen12, had changes to the memory interface to match gen11's,
> +		 * consequently inheriting gen11's display-specific bandwidth
> +		 * parameters.
> +		 */
> +		if (display->platform.rocketlake)
> +			return &gen11_bw_params;
> +		else
> +			return &gen12_bw_params;
> +	} else if (DISPLAY_VER(display) == 11) {
> +		return &gen11_bw_params;
> +	}
> +
> +	return NULL;
> +}
> +
>  static int icl_get_bw_info(struct intel_display *display,
>  			   const struct dram_info *dram_info,
>  			   const struct intel_soc_bw_params *soc_bw_params,
> @@ -832,12 +854,14 @@ void intel_bw_init_hw(struct intel_display *display)
>  {
>  	const struct dram_info *dram_info;
>  	const struct intel_soc_bw_params *soc_bw_params;
> +	const struct intel_display_bw_params *display_bw_params;
>  
>  	if (!HAS_DISPLAY(display))
>  		return;
>  
>  	dram_info = intel_dram_info(display);
>  	soc_bw_params = get_soc_bw_params(display, dram_info);
> +	display_bw_params = get_display_bw_params(display);
>  
>  	/*
>  	 * Starting with Xe3p_LPD, the hardware tells us whether memory has ECC
> @@ -850,23 +874,12 @@ void intel_bw_init_hw(struct intel_display *display)
>  
>  	if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx) {
>  		xe2_hpd_get_bw_info(display, dram_info, soc_bw_params);
> -	} else if (DISPLAY_VER(display) >= 14) {
> -		tgl_get_bw_info(display, dram_info, soc_bw_params, &xelpdp_bw_params);
>  	} else if (display->platform.dg2) {
>  		dg2_get_bw_info(display);
>  	} else if (DISPLAY_VER(display) >= 12) {
> -		/*
> -		 * RKL's SoC was based on ICL and the display, even though being
> -		 * gen12, had changes to the memory interface to match gen11's,
> -		 * consequently inheriting gen11's display-specific bandwidth
> -		 * parameters.
> -		 */
> -		if (display->platform.rocketlake)
> -			tgl_get_bw_info(display, dram_info, soc_bw_params, &gen11_bw_params);
> -		else
> -			tgl_get_bw_info(display, dram_info, soc_bw_params, &gen12_bw_params);
> +		tgl_get_bw_info(display, dram_info, soc_bw_params, display_bw_params);
>  	} else if (DISPLAY_VER(display) == 11) {
> -		icl_get_bw_info(display, dram_info, soc_bw_params, &gen11_bw_params);
> +		icl_get_bw_info(display, dram_info, soc_bw_params, display_bw_params);
>  	}
>  }
>  
> 
> -- 
> 2.53.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

✓ CI.KUnit: success for drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs (rev3)
URL   : https://patchwork.freedesktop.org/series/166340/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[16:21:03] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:21:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:21:38] Starting KUnit Kernel (1/1)...
[16:21:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:21:38] ================== guc_buf (11 subtests) ===================
[16:21:38] [PASSED] test_smallest
[16:21:38] [PASSED] test_largest
[16:21:38] [PASSED] test_granular
[16:21:38] [PASSED] test_unique
[16:21:38] [PASSED] test_overlap
[16:21:38] [PASSED] test_reusable
[16:21:38] [PASSED] test_too_big
[16:21:38] [PASSED] test_flush
[16:21:38] [PASSED] test_lookup
[16:21:38] [PASSED] test_data
[16:21:38] [PASSED] test_class
[16:21:38] ===================== [PASSED] guc_buf =====================
[16:21:38] =================== guc_dbm (7 subtests) ===================
[16:21:38] [PASSED] test_empty
[16:21:38] [PASSED] test_default
[16:21:38] ======================== test_size  ========================
[16:21:38] [PASSED] 4
[16:21:38] [PASSED] 8
[16:21:38] [PASSED] 32
[16:21:38] [PASSED] 256
[16:21:38] ==================== [PASSED] test_size ====================
[16:21:38] ======================= test_reuse  ========================
[16:21:38] [PASSED] 4
[16:21:38] [PASSED] 8
[16:21:38] [PASSED] 32
[16:21:38] [PASSED] 256
[16:21:38] =================== [PASSED] test_reuse ====================
[16:21:38] =================== test_range_overlap  ====================
[16:21:38] [PASSED] 4
[16:21:38] [PASSED] 8
[16:21:38] [PASSED] 32
[16:21:38] [PASSED] 256
[16:21:38] =============== [PASSED] test_range_overlap ================
[16:21:38] =================== test_range_compact  ====================
[16:21:38] [PASSED] 4
[16:21:38] [PASSED] 8
[16:21:38] [PASSED] 32
[16:21:38] [PASSED] 256
[16:21:38] =============== [PASSED] test_range_compact ================
[16:21:38] ==================== test_range_spare  =====================
[16:21:38] [PASSED] 4
[16:21:38] [PASSED] 8
[16:21:38] [PASSED] 32
[16:21:38] [PASSED] 256
[16:21:38] ================ [PASSED] test_range_spare =================
[16:21:38] ===================== [PASSED] guc_dbm =====================
[16:21:38] =================== guc_idm (6 subtests) ===================
[16:21:38] [PASSED] bad_init
[16:21:38] [PASSED] no_init
[16:21:38] [PASSED] init_fini
[16:21:38] [PASSED] check_used
[16:21:38] [PASSED] check_quota
[16:21:38] [PASSED] check_all
[16:21:38] ===================== [PASSED] guc_idm =====================
[16:21:38] ================== no_relay (3 subtests) ===================
[16:21:38] [PASSED] xe_drops_guc2pf_if_not_ready
[16:21:38] [PASSED] xe_drops_guc2vf_if_not_ready
[16:21:38] [PASSED] xe_rejects_send_if_not_ready
[16:21:38] ==================== [PASSED] no_relay =====================
[16:21:38] ================== pf_relay (14 subtests) ==================
[16:21:38] [PASSED] pf_rejects_guc2pf_too_short
[16:21:38] [PASSED] pf_rejects_guc2pf_too_long
[16:21:38] [PASSED] pf_rejects_guc2pf_no_payload
[16:21:38] [PASSED] pf_fails_no_payload
[16:21:38] [PASSED] pf_fails_bad_origin
[16:21:38] [PASSED] pf_fails_bad_type
[16:21:38] [PASSED] pf_txn_reports_error
[16:21:38] [PASSED] pf_txn_sends_pf2guc
[16:21:38] [PASSED] pf_sends_pf2guc
[16:21:38] [SKIPPED] pf_loopback_nop
[16:21:38] [SKIPPED] pf_loopback_echo
[16:21:38] [SKIPPED] pf_loopback_fail
[16:21:38] [SKIPPED] pf_loopback_busy
[16:21:38] [SKIPPED] pf_loopback_retry
[16:21:38] ==================== [PASSED] pf_relay =====================
[16:21:38] ================== vf_relay (3 subtests) ===================
[16:21:38] [PASSED] vf_rejects_guc2vf_too_short
[16:21:38] [PASSED] vf_rejects_guc2vf_too_long
[16:21:38] [PASSED] vf_rejects_guc2vf_no_payload
[16:21:38] ==================== [PASSED] vf_relay =====================
[16:21:38] ================ pf_gt_config (9 subtests) =================
[16:21:38] [PASSED] fair_contexts_1vf
[16:21:38] [PASSED] fair_doorbells_1vf
[16:21:38] [PASSED] fair_ggtt_1vf
[16:21:38] ====================== fair_vram_1vf  ======================
[16:21:38] [PASSED] 3.50 GiB
[16:21:38] [PASSED] 11.5 GiB
[16:21:38] [PASSED] 15.5 GiB
[16:21:38] [PASSED] 31.5 GiB
[16:21:38] [PASSED] 63.5 GiB
[16:21:38] [PASSED] 1.91 GiB
[16:21:38] ================== [PASSED] fair_vram_1vf ==================
[16:21:38] ================ fair_vram_1vf_admin_only  =================
[16:21:38] [PASSED] 3.50 GiB
[16:21:38] [PASSED] 11.5 GiB
[16:21:38] [PASSED] 15.5 GiB
[16:21:38] [PASSED] 31.5 GiB
[16:21:38] [PASSED] 63.5 GiB
[16:21:38] [PASSED] 1.91 GiB
[16:21:38] ============ [PASSED] fair_vram_1vf_admin_only =============
[16:21:38] ====================== fair_contexts  ======================
[16:21:38] [PASSED] 1 VF
[16:21:38] [PASSED] 2 VFs
[16:21:38] [PASSED] 3 VFs
[16:21:38] [PASSED] 4 VFs
[16:21:38] [PASSED] 5 VFs
[16:21:38] [PASSED] 6 VFs
[16:21:38] [PASSED] 7 VFs
[16:21:38] [PASSED] 8 VFs
[16:21:38] [PASSED] 9 VFs
[16:21:38] [PASSED] 10 VFs
[16:21:38] [PASSED] 11 VFs
[16:21:38] [PASSED] 12 VFs
[16:21:38] [PASSED] 13 VFs
[16:21:38] [PASSED] 14 VFs
[16:21:38] [PASSED] 15 VFs
[16:21:38] [PASSED] 16 VFs
[16:21:38] [PASSED] 17 VFs
[16:21:38] [PASSED] 18 VFs
[16:21:38] [PASSED] 19 VFs
[16:21:38] [PASSED] 20 VFs
[16:21:38] [PASSED] 21 VFs
[16:21:38] [PASSED] 22 VFs
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[16:21:38] [PASSED] 24 VFs
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[16:21:38] [PASSED] 33 VFs
[16:21:38] [PASSED] 34 VFs
[16:21:38] [PASSED] 35 VFs
[16:21:38] [PASSED] 36 VFs
[16:21:38] [PASSED] 37 VFs
[16:21:38] [PASSED] 38 VFs
[16:21:38] [PASSED] 39 VFs
[16:21:38] [PASSED] 40 VFs
[16:21:38] [PASSED] 41 VFs
[16:21:38] [PASSED] 42 VFs
[16:21:38] [PASSED] 43 VFs
[16:21:38] [PASSED] 44 VFs
[16:21:38] [PASSED] 45 VFs
[16:21:38] [PASSED] 46 VFs
[16:21:38] [PASSED] 47 VFs
[16:21:38] [PASSED] 48 VFs
[16:21:38] [PASSED] 49 VFs
[16:21:38] [PASSED] 50 VFs
[16:21:39] [PASSED] 51 VFs
[16:21:39] [PASSED] 52 VFs
[16:21:39] [PASSED] 53 VFs
[16:21:39] [PASSED] 54 VFs
[16:21:39] [PASSED] 55 VFs
[16:21:39] [PASSED] 56 VFs
[16:21:39] [PASSED] 57 VFs
[16:21:39] [PASSED] 58 VFs
[16:21:39] [PASSED] 59 VFs
[16:21:39] [PASSED] 60 VFs
[16:21:39] [PASSED] 61 VFs
[16:21:39] [PASSED] 62 VFs
[16:21:39] [PASSED] 63 VFs
[16:21:39] ================== [PASSED] fair_contexts ==================
[16:21:39] ===================== fair_doorbells  ======================
[16:21:39] [PASSED] 1 VF
[16:21:39] [PASSED] 2 VFs
[16:21:39] [PASSED] 3 VFs
[16:21:39] [PASSED] 4 VFs
[16:21:39] [PASSED] 5 VFs
[16:21:39] [PASSED] 6 VFs
[16:21:39] [PASSED] 7 VFs
[16:21:39] [PASSED] 8 VFs
[16:21:39] [PASSED] 9 VFs
[16:21:39] [PASSED] 10 VFs
[16:21:39] [PASSED] 11 VFs
[16:21:39] [PASSED] 12 VFs
[16:21:39] [PASSED] 13 VFs
[16:21:39] [PASSED] 14 VFs
[16:21:39] [PASSED] 15 VFs
[16:21:39] [PASSED] 16 VFs
[16:21:39] [PASSED] 17 VFs
[16:21:39] [PASSED] 18 VFs
[16:21:39] [PASSED] 19 VFs
[16:21:39] [PASSED] 20 VFs
[16:21:39] [PASSED] 21 VFs
[16:21:39] [PASSED] 22 VFs
[16:21:39] [PASSED] 23 VFs
[16:21:39] [PASSED] 24 VFs
[16:21:39] [PASSED] 25 VFs
[16:21:39] [PASSED] 26 VFs
[16:21:39] [PASSED] 27 VFs
[16:21:39] [PASSED] 28 VFs
[16:21:39] [PASSED] 29 VFs
[16:21:39] [PASSED] 30 VFs
[16:21:39] [PASSED] 31 VFs
[16:21:39] [PASSED] 32 VFs
[16:21:39] [PASSED] 33 VFs
[16:21:39] [PASSED] 34 VFs
[16:21:39] [PASSED] 35 VFs
[16:21:39] [PASSED] 36 VFs
[16:21:39] [PASSED] 37 VFs
[16:21:39] [PASSED] 38 VFs
[16:21:39] [PASSED] 39 VFs
[16:21:39] [PASSED] 40 VFs
[16:21:39] [PASSED] 41 VFs
[16:21:39] [PASSED] 42 VFs
[16:21:39] [PASSED] 43 VFs
[16:21:39] [PASSED] 44 VFs
[16:21:39] [PASSED] 45 VFs
[16:21:39] [PASSED] 46 VFs
[16:21:39] [PASSED] 47 VFs
[16:21:39] [PASSED] 48 VFs
[16:21:39] [PASSED] 49 VFs
[16:21:39] [PASSED] 50 VFs
[16:21:39] [PASSED] 51 VFs
[16:21:39] [PASSED] 52 VFs
[16:21:39] [PASSED] 53 VFs
[16:21:39] [PASSED] 54 VFs
[16:21:39] [PASSED] 55 VFs
[16:21:39] [PASSED] 56 VFs
[16:21:39] [PASSED] 57 VFs
[16:21:39] [PASSED] 58 VFs
[16:21:39] [PASSED] 59 VFs
[16:21:39] [PASSED] 60 VFs
[16:21:39] [PASSED] 61 VFs
[16:21:39] [PASSED] 62 VFs
[16:21:39] [PASSED] 63 VFs
[16:21:39] ================= [PASSED] fair_doorbells ==================
[16:21:39] ======================== fair_ggtt  ========================
[16:21:39] [PASSED] 1 VF
[16:21:39] [PASSED] 2 VFs
[16:21:39] [PASSED] 3 VFs
[16:21:39] [PASSED] 4 VFs
[16:21:39] [PASSED] 5 VFs
[16:21:39] [PASSED] 6 VFs
[16:21:39] [PASSED] 7 VFs
[16:21:39] [PASSED] 8 VFs
[16:21:39] [PASSED] 9 VFs
[16:21:39] [PASSED] 10 VFs
[16:21:39] [PASSED] 11 VFs
[16:21:39] [PASSED] 12 VFs
[16:21:39] [PASSED] 13 VFs
[16:21:39] [PASSED] 14 VFs
[16:21:39] [PASSED] 15 VFs
[16:21:39] [PASSED] 16 VFs
[16:21:39] [PASSED] 17 VFs
[16:21:39] [PASSED] 18 VFs
[16:21:39] [PASSED] 19 VFs
[16:21:39] [PASSED] 20 VFs
[16:21:39] [PASSED] 21 VFs
[16:21:39] [PASSED] 22 VFs
[16:21:39] [PASSED] 23 VFs
[16:21:39] [PASSED] 24 VFs
[16:21:39] [PASSED] 25 VFs
[16:21:39] [PASSED] 26 VFs
[16:21:39] [PASSED] 27 VFs
[16:21:39] [PASSED] 28 VFs
[16:21:39] [PASSED] 29 VFs
[16:21:39] [PASSED] 30 VFs
[16:21:39] [PASSED] 31 VFs
[16:21:39] [PASSED] 32 VFs
[16:21:39] [PASSED] 33 VFs
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[16:21:39] [PASSED] 35 VFs
[16:21:39] [PASSED] 36 VFs
[16:21:39] [PASSED] 37 VFs
[16:21:39] [PASSED] 38 VFs
[16:21:39] [PASSED] 39 VFs
[16:21:39] [PASSED] 40 VFs
[16:21:39] [PASSED] 41 VFs
[16:21:39] [PASSED] 42 VFs
[16:21:39] [PASSED] 43 VFs
[16:21:39] [PASSED] 44 VFs
[16:21:39] [PASSED] 45 VFs
[16:21:39] [PASSED] 46 VFs
[16:21:39] [PASSED] 47 VFs
[16:21:39] [PASSED] 48 VFs
[16:21:39] [PASSED] 49 VFs
[16:21:39] [PASSED] 50 VFs
[16:21:39] [PASSED] 51 VFs
[16:21:39] [PASSED] 52 VFs
[16:21:39] [PASSED] 53 VFs
[16:21:39] [PASSED] 54 VFs
[16:21:39] [PASSED] 55 VFs
[16:21:39] [PASSED] 56 VFs
[16:21:39] [PASSED] 57 VFs
[16:21:39] [PASSED] 58 VFs
[16:21:39] [PASSED] 59 VFs
[16:21:39] [PASSED] 60 VFs
[16:21:39] [PASSED] 61 VFs
[16:21:39] [PASSED] 62 VFs
[16:21:39] [PASSED] 63 VFs
[16:21:39] ==================== [PASSED] fair_ggtt ====================
[16:21:39] ======================== fair_vram  ========================
[16:21:39] [PASSED] 1 VF
[16:21:39] [PASSED] 2 VFs
[16:21:39] [PASSED] 3 VFs
[16:21:39] [PASSED] 4 VFs
[16:21:39] [PASSED] 5 VFs
[16:21:39] [PASSED] 6 VFs
[16:21:39] [PASSED] 7 VFs
[16:21:39] [PASSED] 8 VFs
[16:21:39] [PASSED] 9 VFs
[16:21:39] [PASSED] 10 VFs
[16:21:39] [PASSED] 11 VFs
[16:21:39] [PASSED] 12 VFs
[16:21:39] [PASSED] 13 VFs
[16:21:39] [PASSED] 14 VFs
[16:21:39] [PASSED] 15 VFs
[16:21:39] [PASSED] 16 VFs
[16:21:39] [PASSED] 17 VFs
[16:21:39] [PASSED] 18 VFs
[16:21:39] [PASSED] 19 VFs
[16:21:39] [PASSED] 20 VFs
[16:21:39] [PASSED] 21 VFs
[16:21:39] [PASSED] 22 VFs
[16:21:39] [PASSED] 23 VFs
[16:21:39] [PASSED] 24 VFs
[16:21:39] [PASSED] 25 VFs
[16:21:39] [PASSED] 26 VFs
[16:21:39] [PASSED] 27 VFs
[16:21:39] [PASSED] 28 VFs
[16:21:39] [PASSED] 29 VFs
[16:21:39] [PASSED] 30 VFs
[16:21:39] [PASSED] 31 VFs
[16:21:39] [PASSED] 32 VFs
[16:21:39] [PASSED] 33 VFs
[16:21:39] [PASSED] 34 VFs
[16:21:39] [PASSED] 35 VFs
[16:21:39] [PASSED] 36 VFs
[16:21:39] [PASSED] 37 VFs
[16:21:39] [PASSED] 38 VFs
[16:21:39] [PASSED] 39 VFs
[16:21:39] [PASSED] 40 VFs
[16:21:39] [PASSED] 41 VFs
[16:21:39] [PASSED] 42 VFs
[16:21:39] [PASSED] 43 VFs
[16:21:39] [PASSED] 44 VFs
[16:21:39] [PASSED] 45 VFs
[16:21:39] [PASSED] 46 VFs
[16:21:39] [PASSED] 47 VFs
[16:21:39] [PASSED] 48 VFs
[16:21:39] [PASSED] 49 VFs
[16:21:39] [PASSED] 50 VFs
[16:21:39] [PASSED] 51 VFs
[16:21:39] [PASSED] 52 VFs
[16:21:39] [PASSED] 53 VFs
[16:21:39] [PASSED] 54 VFs
[16:21:39] [PASSED] 55 VFs
[16:21:39] [PASSED] 56 VFs
[16:21:39] [PASSED] 57 VFs
[16:21:39] [PASSED] 58 VFs
[16:21:39] [PASSED] 59 VFs
[16:21:39] [PASSED] 60 VFs
[16:21:39] [PASSED] 61 VFs
[16:21:39] [PASSED] 62 VFs
[16:21:39] [PASSED] 63 VFs
[16:21:39] ==================== [PASSED] fair_vram ====================
[16:21:39] ================== [PASSED] pf_gt_config ===================
[16:21:39] ===================== lmtt (1 subtest) =====================
[16:21:39] ======================== test_ops  =========================
[16:21:39] [PASSED] 2-level
[16:21:39] [PASSED] multi-level
[16:21:39] ==================== [PASSED] test_ops =====================
[16:21:39] ====================== [PASSED] lmtt =======================
[16:21:39] ================= pf_service (11 subtests) =================
[16:21:39] [PASSED] pf_negotiate_any
[16:21:39] [PASSED] pf_negotiate_base_match
[16:21:39] [PASSED] pf_negotiate_base_newer
[16:21:39] [PASSED] pf_negotiate_base_next
[16:21:39] [SKIPPED] pf_negotiate_base_older
[16:21:39] [PASSED] pf_negotiate_base_prev
[16:21:39] [PASSED] pf_negotiate_latest_match
[16:21:39] [PASSED] pf_negotiate_latest_newer
[16:21:39] [PASSED] pf_negotiate_latest_next
[16:21:39] [SKIPPED] pf_negotiate_latest_older
[16:21:39] [SKIPPED] pf_negotiate_latest_prev
[16:21:39] =================== [PASSED] pf_service ====================
[16:21:39] ================= xe_guc_g2g (2 subtests) ==================
[16:21:39] ============== xe_live_guc_g2g_kunit_default  ==============
[16:21:39] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[16:21:39] ============== xe_live_guc_g2g_kunit_allmem  ===============
[16:21:39] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[16:21:39] =================== [SKIPPED] xe_guc_g2g ===================
[16:21:39] =================== xe_mocs (2 subtests) ===================
[16:21:39] ================ xe_live_mocs_kernel_kunit  ================
[16:21:39] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[16:21:39] ================ xe_live_mocs_reset_kunit  =================
[16:21:39] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[16:21:39] ==================== [SKIPPED] xe_mocs =====================
[16:21:39] ================= xe_migrate (2 subtests) ==================
[16:21:39] ================= xe_migrate_sanity_kunit  =================
[16:21:39] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[16:21:39] ================== xe_validate_ccs_kunit  ==================
[16:21:39] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[16:21:39] =================== [SKIPPED] xe_migrate ===================
[16:21:39] ================== xe_dma_buf (1 subtest) ==================
[16:21:39] ==================== xe_dma_buf_kunit  =====================
[16:21:39] ================ [SKIPPED] xe_dma_buf_kunit ================
[16:21:39] =================== [SKIPPED] xe_dma_buf ===================
[16:21:39] ================= xe_bo_shrink (1 subtest) =================
[16:21:39] =================== xe_bo_shrink_kunit  ====================
[16:21:39] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[16:21:39] ================== [SKIPPED] xe_bo_shrink ==================
[16:21:39] ==================== xe_bo (2 subtests) ====================
[16:21:39] ================== xe_ccs_migrate_kunit  ===================
[16:21:39] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[16:21:39] ==================== xe_bo_evict_kunit  ====================
[16:21:39] =============== [SKIPPED] xe_bo_evict_kunit ================
[16:21:39] ===================== [SKIPPED] xe_bo ======================
[16:21:39] ==================== args (13 subtests) ====================
[16:21:39] [PASSED] count_args_test
[16:21:39] [PASSED] call_args_example
[16:21:39] [PASSED] call_args_test
[16:21:39] [PASSED] drop_first_arg_example
[16:21:39] [PASSED] drop_first_arg_test
[16:21:39] [PASSED] first_arg_example
[16:21:39] [PASSED] first_arg_test
[16:21:39] [PASSED] last_arg_example
[16:21:39] [PASSED] last_arg_test
[16:21:39] [PASSED] pick_arg_example
[16:21:39] [PASSED] if_args_example
[16:21:39] [PASSED] if_args_test
[16:21:39] [PASSED] sep_comma_example
[16:21:39] ====================== [PASSED] args =======================
[16:21:39] =================== xe_pci (3 subtests) ====================
[16:21:39] ==================== check_graphics_ip  ====================
[16:21:39] [PASSED] 12.00 Xe_LP
[16:21:39] [PASSED] 12.10 Xe_LP+
[16:21:39] [PASSED] 12.55 Xe_HPG
[16:21:39] [PASSED] 12.60 Xe_HPC
[16:21:39] [PASSED] 12.70 Xe_LPG
[16:21:39] [PASSED] 12.71 Xe_LPG
[16:21:39] [PASSED] 12.74 Xe_LPG+
[16:21:39] [PASSED] 20.01 Xe2_HPG
[16:21:39] [PASSED] 20.02 Xe2_HPG
[16:21:39] [PASSED] 20.04 Xe2_LPG
[16:21:39] [PASSED] 30.00 Xe3_LPG
[16:21:39] [PASSED] 30.01 Xe3_LPG
[16:21:39] [PASSED] 30.03 Xe3_LPG
[16:21:39] [PASSED] 30.04 Xe3_LPG
[16:21:39] [PASSED] 30.05 Xe3_LPG
[16:21:39] [PASSED] 35.10 Xe3p_LPG
[16:21:39] [PASSED] 35.11 Xe3p_XPC
[16:21:39] ================ [PASSED] check_graphics_ip ================
[16:21:39] ===================== check_media_ip  ======================
[16:21:39] [PASSED] 12.00 Xe_M
[16:21:39] [PASSED] 12.55 Xe_HPM
[16:21:39] [PASSED] 13.00 Xe_LPM+
[16:21:39] [PASSED] 13.01 Xe2_HPM
[16:21:39] [PASSED] 20.00 Xe2_LPM
[16:21:39] [PASSED] 30.00 Xe3_LPM
[16:21:39] [PASSED] 30.02 Xe3_LPM
[16:21:39] [PASSED] 35.00 Xe3p_LPM
[16:21:39] [PASSED] 35.03 Xe3p_HPM
[16:21:39] ================= [PASSED] check_media_ip ==================
[16:21:39] =================== check_platform_desc  ===================
[16:21:39] [PASSED] 0x9A60 (TIGERLAKE)
[16:21:39] [PASSED] 0x9A68 (TIGERLAKE)
[16:21:39] [PASSED] 0x9A70 (TIGERLAKE)
[16:21:39] [PASSED] 0x9A40 (TIGERLAKE)
[16:21:39] [PASSED] 0x9A49 (TIGERLAKE)
[16:21:39] [PASSED] 0x9A59 (TIGERLAKE)
[16:21:39] [PASSED] 0x9A78 (TIGERLAKE)
[16:21:39] [PASSED] 0x9AC0 (TIGERLAKE)
[16:21:39] [PASSED] 0x9AC9 (TIGERLAKE)
[16:21:39] [PASSED] 0x9AD9 (TIGERLAKE)
[16:21:39] [PASSED] 0x9AF8 (TIGERLAKE)
[16:21:39] [PASSED] 0x4C80 (ROCKETLAKE)
[16:21:39] [PASSED] 0x4C8A (ROCKETLAKE)
[16:21:39] [PASSED] 0x4C8B (ROCKETLAKE)
[16:21:39] [PASSED] 0x4C8C (ROCKETLAKE)
[16:21:39] [PASSED] 0x4C90 (ROCKETLAKE)
[16:21:39] [PASSED] 0x4C9A (ROCKETLAKE)
[16:21:39] [PASSED] 0x4680 (ALDERLAKE_S)
[16:21:39] [PASSED] 0x4682 (ALDERLAKE_S)
[16:21:39] [PASSED] 0x4688 (ALDERLAKE_S)
[16:21:39] [PASSED] 0x468A (ALDERLAKE_S)
[16:21:39] [PASSED] 0x468B (ALDERLAKE_S)
[16:21:39] [PASSED] 0x4690 (ALDERLAKE_S)
[16:21:39] [PASSED] 0x4692 (ALDERLAKE_S)
[16:21:39] [PASSED] 0x4693 (ALDERLAKE_S)
[16:21:39] [PASSED] 0x46A0 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46A1 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46A2 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46A3 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46A6 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46A8 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46AA (ALDERLAKE_P)
[16:21:39] [PASSED] 0x462A (ALDERLAKE_P)
[16:21:39] [PASSED] 0x4626 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x4628 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46B0 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46B1 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46B2 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46B3 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46C0 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46C1 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46C2 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46C3 (ALDERLAKE_P)
[16:21:39] [PASSED] 0x46D0 (ALDERLAKE_N)
[16:21:39] [PASSED] 0x46D1 (ALDERLAKE_N)
[16:21:39] [PASSED] 0x46D2 (ALDERLAKE_N)
[16:21:39] [PASSED] 0x46D3 (ALDERLAKE_N)
[16:21:39] [PASSED] 0x46D4 (ALDERLAKE_N)
[16:21:39] [PASSED] 0xA721 (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7A1 (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7A9 (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7AC (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7AD (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA720 (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7A0 (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7A8 (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7AA (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA7AB (ALDERLAKE_P)
[16:21:39] [PASSED] 0xA780 (ALDERLAKE_S)
[16:21:39] [PASSED] 0xA781 (ALDERLAKE_S)
[16:21:39] [PASSED] 0xA782 (ALDERLAKE_S)
[16:21:39] [PASSED] 0xA783 (ALDERLAKE_S)
[16:21:39] [PASSED] 0xA788 (ALDERLAKE_S)
[16:21:39] [PASSED] 0xA789 (ALDERLAKE_S)
[16:21:39] [PASSED] 0xA78A (ALDERLAKE_S)
[16:21:39] [PASSED] 0xA78B (ALDERLAKE_S)
[16:21:39] [PASSED] 0x4905 (DG1)
[16:21:39] [PASSED] 0x4906 (DG1)
[16:21:39] [PASSED] 0x4907 (DG1)
[16:21:39] [PASSED] 0x4908 (DG1)
[16:21:39] [PASSED] 0x4909 (DG1)
[16:21:39] [PASSED] 0x56C0 (DG2)
[16:21:39] [PASSED] 0x56C2 (DG2)
[16:21:39] [PASSED] 0x56C1 (DG2)
[16:21:39] [PASSED] 0x7D51 (METEORLAKE)
[16:21:39] [PASSED] 0x7DD1 (METEORLAKE)
[16:21:39] [PASSED] 0x7D41 (METEORLAKE)
[16:21:39] [PASSED] 0x7D67 (METEORLAKE)
[16:21:39] [PASSED] 0xB640 (METEORLAKE)
[16:21:39] [PASSED] 0x56A0 (DG2)
[16:21:39] [PASSED] 0x56A1 (DG2)
[16:21:39] [PASSED] 0x56A2 (DG2)
[16:21:39] [PASSED] 0x56BE (DG2)
[16:21:39] [PASSED] 0x56BF (DG2)
[16:21:39] [PASSED] 0x5690 (DG2)
[16:21:39] [PASSED] 0x5691 (DG2)
[16:21:39] [PASSED] 0x5692 (DG2)
[16:21:39] [PASSED] 0x56A5 (DG2)
[16:21:39] [PASSED] 0x56A6 (DG2)
[16:21:39] [PASSED] 0x56B0 (DG2)
[16:21:39] [PASSED] 0x56B1 (DG2)
[16:21:39] [PASSED] 0x56BA (DG2)
[16:21:39] [PASSED] 0x56BB (DG2)
[16:21:39] [PASSED] 0x56BC (DG2)
[16:21:39] [PASSED] 0x56BD (DG2)
[16:21:39] [PASSED] 0x5693 (DG2)
[16:21:39] [PASSED] 0x5694 (DG2)
[16:21:39] [PASSED] 0x5695 (DG2)
[16:21:39] [PASSED] 0x56A3 (DG2)
[16:21:39] [PASSED] 0x56A4 (DG2)
[16:21:39] [PASSED] 0x56B2 (DG2)
[16:21:39] [PASSED] 0x56B3 (DG2)
[16:21:39] [PASSED] 0x5696 (DG2)
[16:21:39] [PASSED] 0x5697 (DG2)
[16:21:39] [PASSED] 0xB69 (PVC)
[16:21:39] [PASSED] 0xB6E (PVC)
[16:21:39] [PASSED] 0xBD4 (PVC)
[16:21:39] [PASSED] 0xBD5 (PVC)
[16:21:39] [PASSED] 0xBD6 (PVC)
[16:21:39] [PASSED] 0xBD7 (PVC)
[16:21:39] [PASSED] 0xBD8 (PVC)
[16:21:39] [PASSED] 0xBD9 (PVC)
[16:21:39] [PASSED] 0xBDA (PVC)
[16:21:39] [PASSED] 0xBDB (PVC)
[16:21:39] [PASSED] 0xBE0 (PVC)
[16:21:39] [PASSED] 0xBE1 (PVC)
[16:21:39] [PASSED] 0xBE5 (PVC)
[16:21:39] [PASSED] 0x7D40 (METEORLAKE)
[16:21:39] [PASSED] 0x7D45 (METEORLAKE)
[16:21:39] [PASSED] 0x7D55 (METEORLAKE)
[16:21:39] [PASSED] 0x7D60 (METEORLAKE)
[16:21:39] [PASSED] 0x7DD5 (METEORLAKE)
[16:21:39] [PASSED] 0x6420 (LUNARLAKE)
[16:21:39] [PASSED] 0x64A0 (LUNARLAKE)
[16:21:39] [PASSED] 0x64B0 (LUNARLAKE)
[16:21:39] [PASSED] 0xE202 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE209 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE20B (BATTLEMAGE)
[16:21:39] [PASSED] 0xE20C (BATTLEMAGE)
[16:21:39] [PASSED] 0xE20D (BATTLEMAGE)
[16:21:39] [PASSED] 0xE210 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE211 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE212 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE216 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE220 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE221 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE222 (BATTLEMAGE)
[16:21:39] [PASSED] 0xE223 (BATTLEMAGE)
[16:21:39] [PASSED] 0xB080 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB081 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB082 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB083 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB084 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB085 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB086 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB087 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB08F (PANTHERLAKE)
[16:21:39] [PASSED] 0xB090 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB0A0 (PANTHERLAKE)
[16:21:39] [PASSED] 0xB0B0 (PANTHERLAKE)
[16:21:39] [PASSED] 0xFD80 (PANTHERLAKE)
[16:21:39] [PASSED] 0xFD81 (PANTHERLAKE)
[16:21:39] [PASSED] 0xD740 (NOVALAKE_S)
[16:21:39] [PASSED] 0xD741 (NOVALAKE_S)
[16:21:39] [PASSED] 0xD742 (NOVALAKE_S)
[16:21:39] [PASSED] 0xD743 (NOVALAKE_S)
[16:21:39] [PASSED] 0xD744 (NOVALAKE_S)
[16:21:39] [PASSED] 0xD745 (NOVALAKE_S)
[16:21:39] [PASSED] 0x674C (CRESCENTISLAND)
[16:21:39] [PASSED] 0x674D (CRESCENTISLAND)
[16:21:39] [PASSED] 0x674E (CRESCENTISLAND)
[16:21:39] [PASSED] 0x674F (CRESCENTISLAND)
[16:21:39] [PASSED] 0x6750 (CRESCENTISLAND)
[16:21:39] [PASSED] 0xD750 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD751 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD752 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD753 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD754 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD755 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD756 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD757 (NOVALAKE_P)
[16:21:39] [PASSED] 0xD75F (NOVALAKE_P)
[16:21:39] =============== [PASSED] check_platform_desc ===============
[16:21:39] ===================== [PASSED] xe_pci ======================
[16:21:39] =================== xe_rtp (2 subtests) ====================
[16:21:39] =============== xe_rtp_process_to_sr_tests  ================
[16:21:39] [PASSED] coalesce-same-reg
[16:21:39] [PASSED] no-match-no-add
[16:21:39] [PASSED] match-or
[16:21:39] [PASSED] match-or-xfail
[16:21:39] [PASSED] no-match-no-add-multiple-rules
[16:21:39] [PASSED] two-regs-two-entries
[16:21:39] [PASSED] clr-one-set-other
[16:21:39] [PASSED] set-field
[16:21:39] [PASSED] conflict-duplicate
[16:21:39] [PASSED] conflict-not-disjoint
[16:21:39] [PASSED] conflict-reg-type
[16:21:39] [PASSED] bad-mcr-reg-forced-to-regular
[16:21:39] [PASSED] bad-regular-reg-forced-to-mcr
[16:21:39] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[16:21:39] ================== xe_rtp_process_tests  ===================
[16:21:39] [PASSED] active1
[16:21:39] [PASSED] active2
[16:21:39] [PASSED] active-inactive
[16:21:39] [PASSED] inactive-active
[16:21:39] [PASSED] inactive-1st_or_active-inactive
[16:21:39] [PASSED] inactive-2nd_or_active-inactive
[16:21:39] [PASSED] inactive-last_or_active-inactive
[16:21:39] [PASSED] inactive-no_or_active-inactive
[16:21:39] ============== [PASSED] xe_rtp_process_tests ===============
[16:21:39] ===================== [PASSED] xe_rtp ======================
[16:21:39] ==================== xe_wa (1 subtest) =====================
[16:21:39] ======================== xe_wa_gt  =========================
[16:21:39] [PASSED] TIGERLAKE B0
[16:21:39] [PASSED] DG1 A0
[16:21:39] [PASSED] DG1 B0
[16:21:39] [PASSED] ALDERLAKE_S A0
[16:21:39] [PASSED] ALDERLAKE_S B0
[16:21:39] [PASSED] ALDERLAKE_S C0
[16:21:39] [PASSED] ALDERLAKE_S D0
[16:21:39] [PASSED] ALDERLAKE_P A0
[16:21:39] [PASSED] ALDERLAKE_P B0
[16:21:39] [PASSED] ALDERLAKE_P C0
[16:21:39] [PASSED] ALDERLAKE_S RPLS D0
[16:21:39] [PASSED] ALDERLAKE_P RPLU E0
[16:21:39] [PASSED] DG2 G10 C0
[16:21:39] [PASSED] DG2 G11 B1
[16:21:39] [PASSED] DG2 G12 A1
[16:21:39] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:21:39] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[16:21:39] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[16:21:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[16:21:39] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[16:21:39] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[16:21:39] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[16:21:39] ==================== [PASSED] xe_wa_gt =====================
[16:21:39] ====================== [PASSED] xe_wa ======================
[16:21:39] ============================================================
[16:21:39] Testing complete. Ran 603 tests: passed: 585, skipped: 18
[16:21:39] Elapsed time: 36.185s total, 4.337s configuring, 31.182s building, 0.629s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[16:21:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:21:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:22:05] Starting KUnit Kernel (1/1)...
[16:22:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:22:05] ============ drm_test_pick_cmdline (2 subtests) ============
[16:22:05] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[16:22:05] =============== drm_test_pick_cmdline_named  ===============
[16:22:05] [PASSED] NTSC
[16:22:05] [PASSED] NTSC-J
[16:22:05] [PASSED] PAL
[16:22:05] [PASSED] PAL-M
[16:22:05] =========== [PASSED] drm_test_pick_cmdline_named ===========
[16:22:05] ============== [PASSED] drm_test_pick_cmdline ==============
[16:22:05] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[16:22:05] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[16:22:05] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[16:22:05] =========== drm_validate_clone_mode (2 subtests) ===========
[16:22:05] ============== drm_test_check_in_clone_mode  ===============
[16:22:05] [PASSED] in_clone_mode
[16:22:05] [PASSED] not_in_clone_mode
[16:22:05] ========== [PASSED] drm_test_check_in_clone_mode ===========
[16:22:05] =============== drm_test_check_valid_clones  ===============
[16:22:05] [PASSED] not_in_clone_mode
[16:22:05] [PASSED] valid_clone
[16:22:05] [PASSED] invalid_clone
[16:22:05] =========== [PASSED] drm_test_check_valid_clones ===========
[16:22:05] ============= [PASSED] drm_validate_clone_mode =============
[16:22:05] ============= drm_validate_modeset (1 subtest) =============
[16:22:05] [PASSED] drm_test_check_connector_changed_modeset
[16:22:05] ============== [PASSED] drm_validate_modeset ===============
[16:22:05] ====== drm_test_bridge_get_current_state (2 subtests) ======
[16:22:05] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[16:22:05] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[16:22:05] ======== [PASSED] drm_test_bridge_get_current_state ========
[16:22:05] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[16:22:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[16:22:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[16:22:05] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[16:22:05] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[16:22:05] ============== drm_bridge_alloc (2 subtests) ===============
[16:22:05] [PASSED] drm_test_drm_bridge_alloc_basic
[16:22:05] [PASSED] drm_test_drm_bridge_alloc_get_put
[16:22:05] ================ [PASSED] drm_bridge_alloc =================
[16:22:05] ============= drm_cmdline_parser (40 subtests) =============
[16:22:05] [PASSED] drm_test_cmdline_force_d_only
[16:22:05] [PASSED] drm_test_cmdline_force_D_only_dvi
[16:22:05] [PASSED] drm_test_cmdline_force_D_only_hdmi
[16:22:05] [PASSED] drm_test_cmdline_force_D_only_not_digital
[16:22:05] [PASSED] drm_test_cmdline_force_e_only
[16:22:05] [PASSED] drm_test_cmdline_res
[16:22:05] [PASSED] drm_test_cmdline_res_vesa
[16:22:05] [PASSED] drm_test_cmdline_res_vesa_rblank
[16:22:05] [PASSED] drm_test_cmdline_res_rblank
[16:22:05] [PASSED] drm_test_cmdline_res_bpp
[16:22:05] [PASSED] drm_test_cmdline_res_refresh
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[16:22:05] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[16:22:05] [PASSED] drm_test_cmdline_res_margins_force_on
[16:22:05] [PASSED] drm_test_cmdline_res_vesa_margins
[16:22:05] [PASSED] drm_test_cmdline_name
[16:22:05] [PASSED] drm_test_cmdline_name_bpp
[16:22:05] [PASSED] drm_test_cmdline_name_option
[16:22:05] [PASSED] drm_test_cmdline_name_bpp_option
[16:22:05] [PASSED] drm_test_cmdline_rotate_0
[16:22:05] [PASSED] drm_test_cmdline_rotate_90
[16:22:05] [PASSED] drm_test_cmdline_rotate_180
[16:22:05] [PASSED] drm_test_cmdline_rotate_270
[16:22:05] [PASSED] drm_test_cmdline_hmirror
[16:22:05] [PASSED] drm_test_cmdline_vmirror
[16:22:05] [PASSED] drm_test_cmdline_margin_options
[16:22:05] [PASSED] drm_test_cmdline_multiple_options
[16:22:05] [PASSED] drm_test_cmdline_bpp_extra_and_option
[16:22:05] [PASSED] drm_test_cmdline_extra_and_option
[16:22:05] [PASSED] drm_test_cmdline_freestanding_options
[16:22:05] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[16:22:05] [PASSED] drm_test_cmdline_panel_orientation
[16:22:05] ================ drm_test_cmdline_invalid  =================
[16:22:05] [PASSED] margin_only
[16:22:05] [PASSED] interlace_only
[16:22:05] [PASSED] res_missing_x
[16:22:05] [PASSED] res_missing_y
[16:22:05] [PASSED] res_bad_y
[16:22:05] [PASSED] res_missing_y_bpp
[16:22:05] [PASSED] res_bad_bpp
[16:22:05] [PASSED] res_bad_refresh
[16:22:05] [PASSED] res_bpp_refresh_force_on_off
[16:22:05] [PASSED] res_invalid_mode
[16:22:05] [PASSED] res_bpp_wrong_place_mode
[16:22:05] [PASSED] name_bpp_refresh
[16:22:05] [PASSED] name_refresh
[16:22:05] [PASSED] name_refresh_wrong_mode
[16:22:05] [PASSED] name_refresh_invalid_mode
[16:22:05] [PASSED] rotate_multiple
[16:22:05] [PASSED] rotate_invalid_val
[16:22:05] [PASSED] rotate_truncated
[16:22:05] [PASSED] invalid_option
[16:22:05] [PASSED] invalid_tv_option
[16:22:05] [PASSED] truncated_tv_option
[16:22:05] ============ [PASSED] drm_test_cmdline_invalid =============
[16:22:05] =============== drm_test_cmdline_tv_options  ===============
[16:22:05] [PASSED] NTSC
[16:22:05] [PASSED] NTSC_443
[16:22:05] [PASSED] NTSC_J
[16:22:05] [PASSED] PAL
[16:22:05] [PASSED] PAL_M
[16:22:05] [PASSED] PAL_N
[16:22:05] [PASSED] SECAM
[16:22:05] [PASSED] MONO_525
[16:22:05] [PASSED] MONO_625
[16:22:05] =========== [PASSED] drm_test_cmdline_tv_options ===========
[16:22:05] =============== [PASSED] drm_cmdline_parser ================
[16:22:05] ========== drmm_connector_hdmi_init (20 subtests) ==========
[16:22:05] [PASSED] drm_test_connector_hdmi_init_valid
[16:22:05] [PASSED] drm_test_connector_hdmi_init_bpc_8
[16:22:05] [PASSED] drm_test_connector_hdmi_init_bpc_10
[16:22:05] [PASSED] drm_test_connector_hdmi_init_bpc_12
[16:22:05] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[16:22:05] [PASSED] drm_test_connector_hdmi_init_bpc_null
[16:22:05] [PASSED] drm_test_connector_hdmi_init_formats_empty
[16:22:05] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[16:22:05] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[16:22:05] [PASSED] supported_formats=0x9 yuv420_allowed=1
[16:22:05] [PASSED] supported_formats=0x9 yuv420_allowed=0
[16:22:05] [PASSED] supported_formats=0x5 yuv420_allowed=1
[16:22:05] [PASSED] supported_formats=0x5 yuv420_allowed=0
[16:22:05] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[16:22:05] [PASSED] drm_test_connector_hdmi_init_null_ddc
[16:22:05] [PASSED] drm_test_connector_hdmi_init_null_product
[16:22:05] [PASSED] drm_test_connector_hdmi_init_null_vendor
[16:22:05] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[16:22:05] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[16:22:05] [PASSED] drm_test_connector_hdmi_init_product_valid
[16:22:05] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[16:22:05] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[16:22:05] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[16:22:05] ========= drm_test_connector_hdmi_init_type_valid  =========
[16:22:05] [PASSED] HDMI-A
[16:22:05] [PASSED] HDMI-B
[16:22:05] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[16:22:05] ======== drm_test_connector_hdmi_init_type_invalid  ========
[16:22:05] [PASSED] Unknown
[16:22:05] [PASSED] VGA
[16:22:05] [PASSED] DVI-I
[16:22:05] [PASSED] DVI-D
[16:22:05] [PASSED] DVI-A
[16:22:05] [PASSED] Composite
[16:22:05] [PASSED] SVIDEO
[16:22:05] [PASSED] LVDS
[16:22:05] [PASSED] Component
[16:22:05] [PASSED] DIN
[16:22:05] [PASSED] DP
[16:22:05] [PASSED] TV
[16:22:05] [PASSED] eDP
[16:22:05] [PASSED] Virtual
[16:22:05] [PASSED] DSI
[16:22:05] [PASSED] DPI
[16:22:05] [PASSED] Writeback
[16:22:05] [PASSED] SPI
[16:22:05] [PASSED] USB
[16:22:05] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[16:22:05] ============ [PASSED] drmm_connector_hdmi_init =============
[16:22:05] ============= drmm_connector_init (3 subtests) =============
[16:22:05] [PASSED] drm_test_drmm_connector_init
[16:22:05] [PASSED] drm_test_drmm_connector_init_null_ddc
[16:22:05] ========= drm_test_drmm_connector_init_type_valid  =========
[16:22:05] [PASSED] Unknown
[16:22:05] [PASSED] VGA
[16:22:05] [PASSED] DVI-I
[16:22:05] [PASSED] DVI-D
[16:22:05] [PASSED] DVI-A
[16:22:05] [PASSED] Composite
[16:22:05] [PASSED] SVIDEO
[16:22:05] [PASSED] LVDS
[16:22:05] [PASSED] Component
[16:22:05] [PASSED] DIN
[16:22:05] [PASSED] DP
[16:22:05] [PASSED] HDMI-A
[16:22:05] [PASSED] HDMI-B
[16:22:05] [PASSED] TV
[16:22:05] [PASSED] eDP
[16:22:05] [PASSED] Virtual
[16:22:05] [PASSED] DSI
[16:22:05] [PASSED] DPI
[16:22:05] [PASSED] Writeback
[16:22:05] [PASSED] SPI
[16:22:05] [PASSED] USB
[16:22:05] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[16:22:05] =============== [PASSED] drmm_connector_init ===============
[16:22:05] ========= drm_connector_dynamic_init (6 subtests) ==========
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_init
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_init_properties
[16:22:05] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[16:22:05] [PASSED] Unknown
[16:22:05] [PASSED] VGA
[16:22:05] [PASSED] DVI-I
[16:22:05] [PASSED] DVI-D
[16:22:05] [PASSED] DVI-A
[16:22:05] [PASSED] Composite
[16:22:05] [PASSED] SVIDEO
[16:22:05] [PASSED] LVDS
[16:22:05] [PASSED] Component
[16:22:05] [PASSED] DIN
[16:22:05] [PASSED] DP
[16:22:05] [PASSED] HDMI-A
[16:22:05] [PASSED] HDMI-B
[16:22:05] [PASSED] TV
[16:22:05] [PASSED] eDP
[16:22:05] [PASSED] Virtual
[16:22:05] [PASSED] DSI
[16:22:05] [PASSED] DPI
[16:22:05] [PASSED] Writeback
[16:22:05] [PASSED] SPI
[16:22:05] [PASSED] USB
[16:22:05] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[16:22:05] ======== drm_test_drm_connector_dynamic_init_name  =========
[16:22:05] [PASSED] Unknown
[16:22:05] [PASSED] VGA
[16:22:05] [PASSED] DVI-I
[16:22:05] [PASSED] DVI-D
[16:22:05] [PASSED] DVI-A
[16:22:05] [PASSED] Composite
[16:22:05] [PASSED] SVIDEO
[16:22:05] [PASSED] LVDS
[16:22:05] [PASSED] Component
[16:22:05] [PASSED] DIN
[16:22:05] [PASSED] DP
[16:22:05] [PASSED] HDMI-A
[16:22:05] [PASSED] HDMI-B
[16:22:05] [PASSED] TV
[16:22:05] [PASSED] eDP
[16:22:05] [PASSED] Virtual
[16:22:05] [PASSED] DSI
[16:22:05] [PASSED] DPI
[16:22:05] [PASSED] Writeback
[16:22:05] [PASSED] SPI
[16:22:05] [PASSED] USB
[16:22:05] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[16:22:05] =========== [PASSED] drm_connector_dynamic_init ============
[16:22:05] ==== drm_connector_dynamic_register_early (4 subtests) =====
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[16:22:05] ====== [PASSED] drm_connector_dynamic_register_early =======
[16:22:05] ======= drm_connector_dynamic_register (7 subtests) ========
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[16:22:05] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[16:22:05] ========= [PASSED] drm_connector_dynamic_register ==========
[16:22:05] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[16:22:05] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[16:22:05] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[16:22:05] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[16:22:05] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[16:22:05] ========== drm_test_get_tv_mode_from_name_valid  ===========
[16:22:05] [PASSED] NTSC
[16:22:05] [PASSED] NTSC-443
[16:22:05] [PASSED] NTSC-J
[16:22:05] [PASSED] PAL
[16:22:05] [PASSED] PAL-M
[16:22:05] [PASSED] PAL-N
[16:22:05] [PASSED] SECAM
[16:22:05] [PASSED] Mono
[16:22:05] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[16:22:05] [PASSED] drm_test_get_tv_mode_from_name_truncated
[16:22:05] ============ [PASSED] drm_get_tv_mode_from_name ============
[16:22:05] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[16:22:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[16:22:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[16:22:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[16:22:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[16:22:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[16:22:05] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[16:22:05] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[16:22:05] [PASSED] VIC 96
[16:22:05] [PASSED] VIC 97
[16:22:05] [PASSED] VIC 101
[16:22:05] [PASSED] VIC 102
[16:22:05] [PASSED] VIC 106
[16:22:05] [PASSED] VIC 107
[16:22:05] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[16:22:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[16:22:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[16:22:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[16:22:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[16:22:05] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[16:22:05] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[16:22:05] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[16:22:05] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[16:22:05] [PASSED] Automatic
[16:22:05] [PASSED] Full
[16:22:05] [PASSED] Limited 16:235
[16:22:05] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[16:22:05] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[16:22:05] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[16:22:05] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[16:22:05] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[16:22:05] [PASSED] RGB
[16:22:05] [PASSED] YUV 4:2:0
[16:22:05] [PASSED] YUV 4:2:2
[16:22:05] [PASSED] YUV 4:4:4
[16:22:05] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[16:22:05] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[16:22:05] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[16:22:05] ============= drm_damage_helper (21 subtests) ==============
[16:22:05] [PASSED] drm_test_damage_iter_no_damage
[16:22:05] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[16:22:05] [PASSED] drm_test_damage_iter_no_damage_src_moved
[16:22:05] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[16:22:05] [PASSED] drm_test_damage_iter_no_damage_not_visible
[16:22:05] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[16:22:05] [PASSED] drm_test_damage_iter_no_damage_no_fb
[16:22:05] [PASSED] drm_test_damage_iter_simple_damage
[16:22:05] [PASSED] drm_test_damage_iter_single_damage
[16:22:05] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[16:22:05] [PASSED] drm_test_damage_iter_single_damage_outside_src
[16:22:05] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[16:22:05] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[16:22:05] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[16:22:05] [PASSED] drm_test_damage_iter_single_damage_src_moved
[16:22:05] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[16:22:05] [PASSED] drm_test_damage_iter_damage
[16:22:05] [PASSED] drm_test_damage_iter_damage_one_intersect
[16:22:05] [PASSED] drm_test_damage_iter_damage_one_outside
[16:22:05] [PASSED] drm_test_damage_iter_damage_src_moved
[16:22:05] [PASSED] drm_test_damage_iter_damage_not_visible
[16:22:05] ================ [PASSED] drm_damage_helper ================
[16:22:05] ============== drm_dp_mst_helper (3 subtests) ==============
[16:22:05] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[16:22:05] [PASSED] Clock 154000 BPP 30 DSC disabled
[16:22:05] [PASSED] Clock 234000 BPP 30 DSC disabled
[16:22:05] [PASSED] Clock 297000 BPP 24 DSC disabled
[16:22:05] [PASSED] Clock 332880 BPP 24 DSC enabled
[16:22:05] [PASSED] Clock 324540 BPP 24 DSC enabled
[16:22:05] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[16:22:05] ============== drm_test_dp_mst_calc_pbn_div  ===============
[16:22:05] [PASSED] Link rate 2000000 lane count 4
[16:22:05] [PASSED] Link rate 2000000 lane count 2
[16:22:05] [PASSED] Link rate 2000000 lane count 1
[16:22:05] [PASSED] Link rate 1350000 lane count 4
[16:22:05] [PASSED] Link rate 1350000 lane count 2
[16:22:05] [PASSED] Link rate 1350000 lane count 1
[16:22:05] [PASSED] Link rate 1000000 lane count 4
[16:22:05] [PASSED] Link rate 1000000 lane count 2
[16:22:05] [PASSED] Link rate 1000000 lane count 1
[16:22:05] [PASSED] Link rate 810000 lane count 4
[16:22:05] [PASSED] Link rate 810000 lane count 2
[16:22:05] [PASSED] Link rate 810000 lane count 1
[16:22:05] [PASSED] Link rate 540000 lane count 4
[16:22:05] [PASSED] Link rate 540000 lane count 2
[16:22:05] [PASSED] Link rate 540000 lane count 1
[16:22:05] [PASSED] Link rate 270000 lane count 4
[16:22:05] [PASSED] Link rate 270000 lane count 2
[16:22:05] [PASSED] Link rate 270000 lane count 1
[16:22:05] [PASSED] Link rate 162000 lane count 4
[16:22:05] [PASSED] Link rate 162000 lane count 2
[16:22:05] [PASSED] Link rate 162000 lane count 1
[16:22:05] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[16:22:05] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[16:22:05] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[16:22:05] [PASSED] DP_POWER_UP_PHY with port number
[16:22:05] [PASSED] DP_POWER_DOWN_PHY with port number
[16:22:05] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[16:22:05] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[16:22:05] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[16:22:05] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[16:22:05] [PASSED] DP_QUERY_PAYLOAD with port number
[16:22:05] [PASSED] DP_QUERY_PAYLOAD with VCPI
[16:22:05] [PASSED] DP_REMOTE_DPCD_READ with port number
[16:22:05] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[16:22:05] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[16:22:05] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[16:22:05] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[16:22:05] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[16:22:05] [PASSED] DP_REMOTE_I2C_READ with port number
[16:22:05] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[16:22:05] [PASSED] DP_REMOTE_I2C_READ with transactions array
[16:22:05] [PASSED] DP_REMOTE_I2C_WRITE with port number
[16:22:05] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[16:22:05] [PASSED] DP_REMOTE_I2C_WRITE with data array
[16:22:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[16:22:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[16:22:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[16:22:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[16:22:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[16:22:05] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[16:22:05] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[16:22:05] ================ [PASSED] drm_dp_mst_helper ================
[16:22:05] ================== drm_exec (7 subtests) ===================
[16:22:05] [PASSED] sanitycheck
[16:22:05] [PASSED] test_lock
[16:22:05] [PASSED] test_lock_unlock
[16:22:05] [PASSED] test_duplicates
[16:22:05] [PASSED] test_prepare
[16:22:05] [PASSED] test_prepare_array
[16:22:05] [PASSED] test_multiple_loops
[16:22:05] ==================== [PASSED] drm_exec =====================
[16:22:05] =========== drm_format_helper_test (17 subtests) ===========
[16:22:05] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[16:22:05] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[16:22:05] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[16:22:05] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[16:22:05] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[16:22:05] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[16:22:05] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[16:22:05] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[16:22:05] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[16:22:05] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[16:22:05] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[16:22:05] ============== drm_test_fb_xrgb8888_to_mono  ===============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[16:22:05] ==================== drm_test_fb_swab  =====================
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ================ [PASSED] drm_test_fb_swab =================
[16:22:05] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[16:22:05] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[16:22:05] [PASSED] single_pixel_source_buffer
[16:22:05] [PASSED] single_pixel_clip_rectangle
[16:22:05] [PASSED] well_known_colors
[16:22:05] [PASSED] destination_pitch
[16:22:05] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[16:22:05] ================= drm_test_fb_clip_offset  =================
[16:22:05] [PASSED] pass through
[16:22:05] [PASSED] horizontal offset
[16:22:05] [PASSED] vertical offset
[16:22:05] [PASSED] horizontal and vertical offset
[16:22:05] [PASSED] horizontal offset (custom pitch)
[16:22:05] [PASSED] vertical offset (custom pitch)
[16:22:05] [PASSED] horizontal and vertical offset (custom pitch)
[16:22:05] ============= [PASSED] drm_test_fb_clip_offset =============
[16:22:05] =================== drm_test_fb_memcpy  ====================
[16:22:05] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[16:22:05] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[16:22:05] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[16:22:05] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[16:22:05] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[16:22:05] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[16:22:05] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[16:22:05] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[16:22:05] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[16:22:05] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[16:22:05] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[16:22:05] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[16:22:05] =============== [PASSED] drm_test_fb_memcpy ================
[16:22:05] ============= [PASSED] drm_format_helper_test ==============
[16:22:05] ================= drm_format (18 subtests) =================
[16:22:05] [PASSED] drm_test_format_block_width_invalid
[16:22:05] [PASSED] drm_test_format_block_width_one_plane
[16:22:05] [PASSED] drm_test_format_block_width_two_plane
[16:22:05] [PASSED] drm_test_format_block_width_three_plane
[16:22:05] [PASSED] drm_test_format_block_width_tiled
[16:22:05] [PASSED] drm_test_format_block_height_invalid
[16:22:05] [PASSED] drm_test_format_block_height_one_plane
[16:22:05] [PASSED] drm_test_format_block_height_two_plane
[16:22:05] [PASSED] drm_test_format_block_height_three_plane
[16:22:05] [PASSED] drm_test_format_block_height_tiled
[16:22:05] [PASSED] drm_test_format_min_pitch_invalid
[16:22:05] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[16:22:05] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[16:22:05] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[16:22:05] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[16:22:05] [PASSED] drm_test_format_min_pitch_two_plane
[16:22:05] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[16:22:05] [PASSED] drm_test_format_min_pitch_tiled
[16:22:05] =================== [PASSED] drm_format ====================
[16:22:05] ============== drm_framebuffer (10 subtests) ===============
[16:22:05] ========== drm_test_framebuffer_check_src_coords  ==========
[16:22:05] [PASSED] Success: source fits into fb
[16:22:05] [PASSED] Fail: overflowing fb with x-axis coordinate
[16:22:05] [PASSED] Fail: overflowing fb with y-axis coordinate
[16:22:05] [PASSED] Fail: overflowing fb with source width
[16:22:05] [PASSED] Fail: overflowing fb with source height
[16:22:05] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[16:22:05] [PASSED] drm_test_framebuffer_cleanup
[16:22:05] =============== drm_test_framebuffer_create  ===============
[16:22:05] [PASSED] ABGR8888 normal sizes
[16:22:05] [PASSED] ABGR8888 max sizes
[16:22:05] [PASSED] ABGR8888 pitch greater than min required
[16:22:05] [PASSED] ABGR8888 pitch less than min required
[16:22:05] [PASSED] ABGR8888 Invalid width
[16:22:05] [PASSED] ABGR8888 Invalid buffer handle
[16:22:05] [PASSED] No pixel format
[16:22:05] [PASSED] ABGR8888 Width 0
[16:22:05] [PASSED] ABGR8888 Height 0
[16:22:05] [PASSED] ABGR8888 Out of bound height * pitch combination
[16:22:05] [PASSED] ABGR8888 Large buffer offset
[16:22:05] [PASSED] ABGR8888 Buffer offset for inexistent plane
[16:22:05] [PASSED] ABGR8888 Invalid flag
[16:22:05] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[16:22:05] [PASSED] ABGR8888 Valid buffer modifier
[16:22:05] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[16:22:05] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[16:22:05] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[16:22:05] [PASSED] NV12 Normal sizes
[16:22:05] [PASSED] NV12 Max sizes
[16:22:05] [PASSED] NV12 Invalid pitch
[16:22:05] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[16:22:05] [PASSED] NV12 different  modifier per-plane
[16:22:05] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[16:22:05] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[16:22:05] [PASSED] NV12 Modifier for inexistent plane
[16:22:05] [PASSED] NV12 Handle for inexistent plane
[16:22:05] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[16:22:05] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[16:22:05] [PASSED] YVU420 Normal sizes
[16:22:05] [PASSED] YVU420 Max sizes
[16:22:05] [PASSED] YVU420 Invalid pitch
[16:22:05] [PASSED] YVU420 Different pitches
[16:22:05] [PASSED] YVU420 Different buffer offsets/pitches
[16:22:05] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[16:22:05] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[16:22:05] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[16:22:05] [PASSED] YVU420 Valid modifier
[16:22:05] [PASSED] YVU420 Different modifiers per plane
[16:22:05] [PASSED] YVU420 Modifier for inexistent plane
[16:22:05] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[16:22:05] [PASSED] X0L2 Normal sizes
[16:22:05] [PASSED] X0L2 Max sizes
[16:22:05] [PASSED] X0L2 Invalid pitch
[16:22:05] [PASSED] X0L2 Pitch greater than minimum required
[16:22:05] [PASSED] X0L2 Handle for inexistent plane
[16:22:05] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[16:22:05] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[16:22:05] [PASSED] X0L2 Valid modifier
[16:22:05] [PASSED] X0L2 Modifier for inexistent plane
[16:22:05] =========== [PASSED] drm_test_framebuffer_create ===========
[16:22:05] [PASSED] drm_test_framebuffer_free
[16:22:05] [PASSED] drm_test_framebuffer_init
[16:22:05] [PASSED] drm_test_framebuffer_init_bad_format
[16:22:05] [PASSED] drm_test_framebuffer_init_dev_mismatch
[16:22:05] [PASSED] drm_test_framebuffer_lookup
[16:22:05] [PASSED] drm_test_framebuffer_lookup_inexistent
[16:22:05] [PASSED] drm_test_framebuffer_modifiers_not_supported
[16:22:05] ================= [PASSED] drm_framebuffer =================
[16:22:05] ================ drm_gem_shmem (8 subtests) ================
[16:22:05] [PASSED] drm_gem_shmem_test_obj_create
[16:22:05] [PASSED] drm_gem_shmem_test_obj_create_private
[16:22:05] [PASSED] drm_gem_shmem_test_pin_pages
[16:22:05] [PASSED] drm_gem_shmem_test_vmap
[16:22:05] [PASSED] drm_gem_shmem_test_get_sg_table
[16:22:05] [PASSED] drm_gem_shmem_test_get_pages_sgt
[16:22:05] [PASSED] drm_gem_shmem_test_madvise
[16:22:05] [PASSED] drm_gem_shmem_test_purge
[16:22:05] ================== [PASSED] drm_gem_shmem ==================
[16:22:05] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[16:22:05] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[16:22:05] [PASSED] Automatic
[16:22:05] [PASSED] Full
[16:22:05] [PASSED] Limited 16:235
[16:22:05] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[16:22:05] [PASSED] drm_test_check_disable_connector
[16:22:05] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[16:22:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[16:22:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[16:22:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[16:22:05] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[16:22:05] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[16:22:05] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[16:22:05] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[16:22:05] [PASSED] drm_test_check_output_bpc_dvi
[16:22:05] [PASSED] drm_test_check_output_bpc_format_vic_1
[16:22:05] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[16:22:05] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[16:22:05] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[16:22:05] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[16:22:05] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[16:22:05] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[16:22:05] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[16:22:05] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[16:22:05] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[16:22:05] [PASSED] drm_test_check_broadcast_rgb_value
[16:22:05] [PASSED] drm_test_check_bpc_8_value
[16:22:05] [PASSED] drm_test_check_bpc_10_value
[16:22:05] [PASSED] drm_test_check_bpc_12_value
[16:22:05] [PASSED] drm_test_check_format_value
[16:22:05] [PASSED] drm_test_check_tmds_char_value
[16:22:05] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[16:22:05] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[16:22:05] [PASSED] drm_test_check_mode_valid
[16:22:05] [PASSED] drm_test_check_mode_valid_reject
[16:22:05] [PASSED] drm_test_check_mode_valid_reject_rate
[16:22:05] [PASSED] drm_test_check_mode_valid_reject_max_clock
[16:22:05] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[16:22:05] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[16:22:05] [PASSED] drm_test_check_infoframes
[16:22:05] [PASSED] drm_test_check_reject_avi_infoframe
[16:22:05] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[16:22:05] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[16:22:05] [PASSED] drm_test_check_reject_audio_infoframe
[16:22:05] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[16:22:05] ================= drm_managed (2 subtests) =================
[16:22:05] [PASSED] drm_test_managed_release_action
[16:22:05] [PASSED] drm_test_managed_run_action
[16:22:05] =================== [PASSED] drm_managed ===================
[16:22:05] =================== drm_mm (6 subtests) ====================
[16:22:05] [PASSED] drm_test_mm_init
[16:22:05] [PASSED] drm_test_mm_debug
[16:22:05] [PASSED] drm_test_mm_align32
[16:22:05] [PASSED] drm_test_mm_align64
[16:22:05] [PASSED] drm_test_mm_lowest
[16:22:05] [PASSED] drm_test_mm_highest
[16:22:05] ===================== [PASSED] drm_mm ======================
[16:22:05] ============= drm_modes_analog_tv (5 subtests) =============
[16:22:05] [PASSED] drm_test_modes_analog_tv_mono_576i
[16:22:05] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[16:22:05] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[16:22:05] [PASSED] drm_test_modes_analog_tv_pal_576i
[16:22:05] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[16:22:05] =============== [PASSED] drm_modes_analog_tv ===============
[16:22:05] ============== drm_plane_helper (2 subtests) ===============
[16:22:05] =============== drm_test_check_plane_state  ================
[16:22:05] [PASSED] clipping_simple
[16:22:05] [PASSED] clipping_rotate_reflect
[16:22:05] [PASSED] positioning_simple
[16:22:05] [PASSED] upscaling
[16:22:05] [PASSED] downscaling
[16:22:05] [PASSED] rounding1
[16:22:05] [PASSED] rounding2
[16:22:05] [PASSED] rounding3
[16:22:05] [PASSED] rounding4
[16:22:05] =========== [PASSED] drm_test_check_plane_state ============
[16:22:05] =========== drm_test_check_invalid_plane_state  ============
[16:22:05] [PASSED] positioning_invalid
[16:22:05] [PASSED] upscaling_invalid
[16:22:05] [PASSED] downscaling_invalid
[16:22:05] ======= [PASSED] drm_test_check_invalid_plane_state ========
[16:22:05] ================ [PASSED] drm_plane_helper =================
[16:22:05] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[16:22:05] ====== drm_test_connector_helper_tv_get_modes_check  =======
[16:22:05] [PASSED] None
[16:22:05] [PASSED] PAL
[16:22:05] [PASSED] NTSC
[16:22:05] [PASSED] Both, NTSC Default
[16:22:05] [PASSED] Both, PAL Default
[16:22:05] [PASSED] Both, NTSC Default, with PAL on command-line
[16:22:05] [PASSED] Both, PAL Default, with NTSC on command-line
[16:22:05] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[16:22:05] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[16:22:05] ================== drm_rect (9 subtests) ===================
[16:22:05] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[16:22:05] [PASSED] drm_test_rect_clip_scaled_not_clipped
[16:22:05] [PASSED] drm_test_rect_clip_scaled_clipped
[16:22:05] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[16:22:05] ================= drm_test_rect_intersect  =================
[16:22:05] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[16:22:05] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[16:22:05] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[16:22:05] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[16:22:05] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[16:22:05] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[16:22:05] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[16:22:05] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[16:22:05] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[16:22:05] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[16:22:05] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[16:22:05] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[16:22:05] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[16:22:05] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[16:22:05] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[16:22:05] ============= [PASSED] drm_test_rect_intersect =============
[16:22:05] ================ drm_test_rect_calc_hscale  ================
[16:22:05] [PASSED] normal use
[16:22:05] [PASSED] out of max range
[16:22:05] [PASSED] out of min range
[16:22:05] [PASSED] zero dst
[16:22:05] [PASSED] negative src
[16:22:05] [PASSED] negative dst
[16:22:05] ============ [PASSED] drm_test_rect_calc_hscale ============
[16:22:05] ================ drm_test_rect_calc_vscale  ================
[16:22:05] [PASSED] normal use
[16:22:05] [PASSED] out of max range
[16:22:05] [PASSED] out of min range
[16:22:05] [PASSED] zero dst
[16:22:05] [PASSED] negative src
[16:22:05] [PASSED] negative dst
[16:22:05] ============ [PASSED] drm_test_rect_calc_vscale ============
[16:22:05] ================== drm_test_rect_rotate  ===================
[16:22:05] [PASSED] reflect-x
[16:22:05] [PASSED] reflect-y
[16:22:05] [PASSED] rotate-0
[16:22:05] [PASSED] rotate-90
[16:22:05] [PASSED] rotate-180
[16:22:05] [PASSED] rotate-270
[16:22:05] ============== [PASSED] drm_test_rect_rotate ===============
[16:22:05] ================ drm_test_rect_rotate_inv  =================
[16:22:05] [PASSED] reflect-x
[16:22:05] [PASSED] reflect-y
[16:22:05] [PASSED] rotate-0
[16:22:05] [PASSED] rotate-90
[16:22:05] [PASSED] rotate-180
[16:22:05] [PASSED] rotate-270
[16:22:05] ============ [PASSED] drm_test_rect_rotate_inv =============
[16:22:05] ==================== [PASSED] drm_rect =====================
[16:22:05] ============ drm_sysfb_modeset_test (1 subtest) ============
[16:22:05] ============ drm_test_sysfb_build_fourcc_list  =============
[16:22:05] [PASSED] no native formats
[16:22:05] [PASSED] XRGB8888 as native format
[16:22:05] [PASSED] remove duplicates
[16:22:05] [PASSED] convert alpha formats
[16:22:05] [PASSED] random formats
[16:22:05] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[16:22:05] ============= [PASSED] drm_sysfb_modeset_test ==============
[16:22:05] ================== drm_fixp (2 subtests) ===================
[16:22:05] [PASSED] drm_test_int2fixp
[16:22:05] [PASSED] drm_test_sm2fixp
[16:22:05] ==================== [PASSED] drm_fixp =====================
[16:22:05] ============================================================
[16:22:05] Testing complete. Ran 621 tests: passed: 621
[16:22:05] Elapsed time: 25.964s total, 1.709s configuring, 24.084s building, 0.139s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[16:22:05] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[16:22:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:22:16] Starting KUnit Kernel (1/1)...
[16:22:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:22:16] ================= ttm_device (5 subtests) ==================
[16:22:16] [PASSED] ttm_device_init_basic
[16:22:16] [PASSED] ttm_device_init_multiple
[16:22:16] [PASSED] ttm_device_fini_basic
[16:22:16] [PASSED] ttm_device_init_no_vma_man
[16:22:16] ================== ttm_device_init_pools  ==================
[16:22:16] [PASSED] No DMA allocations, no DMA32 required
[16:22:16] [PASSED] DMA allocations, DMA32 required
[16:22:16] [PASSED] No DMA allocations, DMA32 required
[16:22:16] [PASSED] DMA allocations, no DMA32 required
[16:22:16] ============== [PASSED] ttm_device_init_pools ==============
[16:22:16] =================== [PASSED] ttm_device ====================
[16:22:16] ================== ttm_pool (8 subtests) ===================
[16:22:16] ================== ttm_pool_alloc_basic  ===================
[16:22:16] [PASSED] One page
[16:22:16] [PASSED] More than one page
[16:22:16] [PASSED] Above the allocation limit
[16:22:16] [PASSED] One page, with coherent DMA mappings enabled
[16:22:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:22:16] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:22:16] ============== ttm_pool_alloc_basic_dma_addr  ==============
[16:22:16] [PASSED] One page
[16:22:16] [PASSED] More than one page
[16:22:16] [PASSED] Above the allocation limit
[16:22:16] [PASSED] One page, with coherent DMA mappings enabled
[16:22:16] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:22:16] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:22:16] [PASSED] ttm_pool_alloc_order_caching_match
[16:22:16] [PASSED] ttm_pool_alloc_caching_mismatch
[16:22:16] [PASSED] ttm_pool_alloc_order_mismatch
[16:22:16] [PASSED] ttm_pool_free_dma_alloc
[16:22:16] [PASSED] ttm_pool_free_no_dma_alloc
[16:22:16] [PASSED] ttm_pool_fini_basic
[16:22:16] ==================== [PASSED] ttm_pool =====================
[16:22:16] ================ ttm_resource (8 subtests) =================
[16:22:16] ================= ttm_resource_init_basic  =================
[16:22:16] [PASSED] Init resource in TTM_PL_SYSTEM
[16:22:16] [PASSED] Init resource in TTM_PL_VRAM
[16:22:16] [PASSED] Init resource in a private placement
[16:22:16] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:22:16] ============= [PASSED] ttm_resource_init_basic =============
[16:22:16] [PASSED] ttm_resource_init_pinned
[16:22:16] [PASSED] ttm_resource_fini_basic
[16:22:16] [PASSED] ttm_resource_manager_init_basic
[16:22:16] [PASSED] ttm_resource_manager_usage_basic
[16:22:16] [PASSED] ttm_resource_manager_set_used_basic
[16:22:16] [PASSED] ttm_sys_man_alloc_basic
[16:22:16] [PASSED] ttm_sys_man_free_basic
[16:22:16] ================== [PASSED] ttm_resource ===================
[16:22:16] =================== ttm_tt (15 subtests) ===================
[16:22:16] ==================== ttm_tt_init_basic  ====================
[16:22:16] [PASSED] Page-aligned size
[16:22:16] [PASSED] Extra pages requested
[16:22:16] ================ [PASSED] ttm_tt_init_basic ================
[16:22:16] [PASSED] ttm_tt_init_misaligned
[16:22:16] [PASSED] ttm_tt_fini_basic
[16:22:16] [PASSED] ttm_tt_fini_sg
[16:22:16] [PASSED] ttm_tt_fini_shmem
[16:22:16] [PASSED] ttm_tt_create_basic
[16:22:16] [PASSED] ttm_tt_create_invalid_bo_type
[16:22:16] [PASSED] ttm_tt_create_ttm_exists
[16:22:16] [PASSED] ttm_tt_create_failed
[16:22:16] [PASSED] ttm_tt_destroy_basic
[16:22:16] [PASSED] ttm_tt_populate_null_ttm
[16:22:16] [PASSED] ttm_tt_populate_populated_ttm
[16:22:16] [PASSED] ttm_tt_unpopulate_basic
[16:22:16] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:22:16] [PASSED] ttm_tt_swapin_basic
[16:22:16] ===================== [PASSED] ttm_tt ======================
[16:22:16] =================== ttm_bo (14 subtests) ===================
[16:22:16] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[16:22:16] [PASSED] Cannot be interrupted and sleeps
[16:22:16] [PASSED] Cannot be interrupted, locks straight away
[16:22:16] [PASSED] Can be interrupted, sleeps
[16:22:16] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:22:16] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:22:16] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:22:16] [PASSED] ttm_bo_reserve_double_resv
[16:22:16] [PASSED] ttm_bo_reserve_interrupted
[16:22:16] [PASSED] ttm_bo_reserve_deadlock
[16:22:16] [PASSED] ttm_bo_unreserve_basic
[16:22:16] [PASSED] ttm_bo_unreserve_pinned
[16:22:16] [PASSED] ttm_bo_unreserve_bulk
[16:22:16] [PASSED] ttm_bo_fini_basic
[16:22:16] [PASSED] ttm_bo_fini_shared_resv
[16:22:16] [PASSED] ttm_bo_pin_basic
[16:22:16] [PASSED] ttm_bo_pin_unpin_resource
[16:22:16] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:22:16] ===================== [PASSED] ttm_bo ======================
[16:22:16] ============== ttm_bo_validate (22 subtests) ===============
[16:22:16] ============== ttm_bo_init_reserved_sys_man  ===============
[16:22:16] [PASSED] Buffer object for userspace
[16:22:16] [PASSED] Kernel buffer object
[16:22:16] [PASSED] Shared buffer object
[16:22:16] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:22:16] ============== ttm_bo_init_reserved_mock_man  ==============
[16:22:16] [PASSED] Buffer object for userspace
[16:22:16] [PASSED] Kernel buffer object
[16:22:16] [PASSED] Shared buffer object
[16:22:16] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:22:16] [PASSED] ttm_bo_init_reserved_resv
[16:22:16] ================== ttm_bo_validate_basic  ==================
[16:22:16] [PASSED] Buffer object for userspace
[16:22:16] [PASSED] Kernel buffer object
[16:22:16] [PASSED] Shared buffer object
[16:22:16] ============== [PASSED] ttm_bo_validate_basic ==============
[16:22:16] [PASSED] ttm_bo_validate_invalid_placement
[16:22:16] ============= ttm_bo_validate_same_placement  ==============
[16:22:16] [PASSED] System manager
[16:22:16] [PASSED] VRAM manager
[16:22:16] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:22:16] [PASSED] ttm_bo_validate_failed_alloc
[16:22:16] [PASSED] ttm_bo_validate_pinned
[16:22:16] [PASSED] ttm_bo_validate_busy_placement
[16:22:16] ================ ttm_bo_validate_multihop  =================
[16:22:16] [PASSED] Buffer object for userspace
[16:22:16] [PASSED] Kernel buffer object
[16:22:16] [PASSED] Shared buffer object
[16:22:16] ============ [PASSED] ttm_bo_validate_multihop =============
[16:22:16] ========== ttm_bo_validate_no_placement_signaled  ==========
[16:22:16] [PASSED] Buffer object in system domain, no page vector
[16:22:16] [PASSED] Buffer object in system domain with an existing page vector
[16:22:16] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:22:16] ======== ttm_bo_validate_no_placement_not_signaled  ========
[16:22:16] [PASSED] Buffer object for userspace
[16:22:16] [PASSED] Kernel buffer object
[16:22:16] [PASSED] Shared buffer object
[16:22:16] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:22:16] [PASSED] ttm_bo_validate_move_fence_signaled
[16:22:16] ========= ttm_bo_validate_move_fence_not_signaled  =========
[16:22:16] [PASSED] Waits for GPU
[16:22:16] [PASSED] Tries to lock straight away
[16:22:16] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:22:16] [PASSED] ttm_bo_validate_swapout
[16:22:16] [PASSED] ttm_bo_validate_happy_evict
[16:22:16] [PASSED] ttm_bo_validate_all_pinned_evict
[16:22:16] [PASSED] ttm_bo_validate_allowed_only_evict
[16:22:16] [PASSED] ttm_bo_validate_deleted_evict
[16:22:16] [PASSED] ttm_bo_validate_busy_domain_evict
[16:22:16] [PASSED] ttm_bo_validate_evict_gutting
[16:22:16] [PASSED] ttm_bo_validate_recrusive_evict
[16:22:16] ================= [PASSED] ttm_bo_validate =================
[16:22:16] ============================================================
[16:22:16] Testing complete. Ran 102 tests: passed: 102
[16:22:16] Elapsed time: 11.382s total, 1.724s configuring, 9.443s building, 0.183s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1573 bytes --]

== Series Details ==

Series: drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs (rev3)
URL   : https://patchwork.freedesktop.org/series/166340/
State : success

== Summary ==

CI Bug Log - changes from xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc_BAT -> xe-pw-166340v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-166340v3_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_live_ktest@xe_dma_buf:
    - bat-bmg-vm:         [PASS][1] -> [ABORT][2] ([Intel XE#8023]) +1 other test abort
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/bat-bmg-vm/igt@xe_live_ktest@xe_dma_buf.html

  
  [Intel XE#8023]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8023


Build changes
-------------

  * Linux: xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc -> xe-pw-166340v3

  IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc: dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc
  xe-pw-166340v3: 166340v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/index.html

[-- Attachment #2: Type: text/html, Size: 2138 bytes --]

✓ Xe.CI.FULL: success for drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 26607 bytes --]

== Series Details ==

Series: drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs (rev3)
URL   : https://patchwork.freedesktop.org/series/166340/
State : success

== Summary ==

CI Bug Log - changes from xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc_FULL -> xe-pw-166340v3_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-166340v3_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-lnl:          NOTRUN -> [SKIP][1] ([Intel XE#1125] / [Intel XE#7312])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@intel_hwmon@hwmon-write.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#3658] / [Intel XE#7360])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][3] ([Intel XE#1407]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][4] ([Intel XE#1124]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
    - shard-bmg:          NOTRUN -> [SKIP][5] ([Intel XE#1124]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#7679])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html

  * igt@kms_ccs@bad-pixel-format-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#2887]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_ccs@bad-pixel-format-y-tiled-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][8] ([Intel XE#2887]) +2 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html

  * igt@kms_chamelium_color@ctm-0-25:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#2325] / [Intel XE#7358])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_chamelium_color@ctm-0-25.html
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#306] / [Intel XE#7358])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_chamelium_color@ctm-0-25.html

  * igt@kms_chamelium_edid@hdmi-mode-timings:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#373]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_chamelium_edid@hdmi-mode-timings.html

  * igt@kms_cursor_crc@cursor-random-max-size:
    - shard-lnl:          NOTRUN -> [SKIP][12] ([Intel XE#1424])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_cursor_crc@cursor-random-max-size.html
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2320])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_cursor_crc@cursor-random-max-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#309] / [Intel XE#7343]) +1 other test skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-bmg:          [PASS][15] -> [FAIL][16] ([Intel XE#7809])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#4331] / [Intel XE#7227])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_dp_linktrain_fallback@dsc-fallback.html
    - shard-lnl:          NOTRUN -> [SKIP][18] ([Intel XE#4331] / [Intel XE#7227])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#1421])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#7178] / [Intel XE#7351])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2311]) +4 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-1p-offscreen-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#656] / [Intel XE#7905]) +3 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-slowdraw:
    - shard-lnl:          NOTRUN -> [SKIP][23] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-slowdraw.html

  * igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#7905]) +4 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_frontbuffer_tracking@drrshdr-2p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-stridechange:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#6312])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-stridechange.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2313]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#7865]) +3 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_frontbuffer_tracking@hdr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#1470] / [Intel XE#2853])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [PASS][29] -> [SKIP][30] ([Intel XE#7915]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-10/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-8/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-a-plane-5:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#7130]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-a-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#7283])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
    - shard-lnl:          NOTRUN -> [SKIP][33] ([Intel XE#7283])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#4608])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#4608] / [Intel XE#7304])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][37] ([Intel XE#2893] / [Intel XE#7304])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#1489]) +1 other test skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#3904] / [Intel XE#7342])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@kms_rotation_crc@primary-rotation-90.html
    - shard-lnl:          NOTRUN -> [SKIP][40] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-lnl:          NOTRUN -> [SKIP][41] ([Intel XE#1499])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@xe_eudebug_online@stopped-thread:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#7636]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@xe_eudebug_online@stopped-thread.html

  * igt@xe_evict@evict-beng-mixed-threads-large-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#6540] / [Intel XE#688]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_evict@evict-beng-mixed-threads-large-multi-vm.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [PASS][44] -> [INCOMPLETE][45] ([Intel XE#6321])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-1/igt@xe_evict@evict-mixed-many-threads-small.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-2/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_exec_balancer@twice-cm-parallel-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#7482]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_exec_balancer@twice-cm-parallel-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#1392])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@many-multi-queue-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#7136]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@xe_exec_fault_mode@many-multi-queue-rebind.html

  * igt@xe_exec_fault_mode@once-multi-queue-invalid-fault:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#7136]) +1 other test skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@xe_exec_fault_mode@once-multi-queue-invalid-fault.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#6874]) +2 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd.html

  * igt@xe_exec_reset@long-spin-reuse-many-preempt-threads:
    - shard-bmg:          [PASS][51] -> [FAIL][52] ([Intel XE#7850])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-9/igt@xe_exec_reset@long-spin-reuse-many-preempt-threads.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-9/igt@xe_exec_reset@long-spin-reuse-many-preempt-threads.html

  * igt@xe_exec_sip_eudebug@wait-writesip-nodebug:
    - shard-lnl:          NOTRUN -> [SKIP][53] ([Intel XE#7636]) +3 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_exec_sip_eudebug@wait-writesip-nodebug.html

  * igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][54] ([Intel XE#7138])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-rebind.html
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#7138])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-5/igt@xe_exec_threads@threads-multi-queue-shared-vm-userptr-rebind.html

  * igt@xe_pat@pat-index-xelp:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#7590] / [Intel XE#977])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_pat@pat-index-xelp.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#944])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_survivability@runtime-survivability:
    - shard-bmg:          [PASS][58] -> [DMESG-WARN][59] ([Intel XE#6627] / [Intel XE#7419])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-4/igt@xe_survivability@runtime-survivability.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-3/igt@xe_survivability@runtime-survivability.html

  * igt@xe_vm@overcommit-nonfault-vram-no-lr:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#7892])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-8/igt@xe_vm@overcommit-nonfault-vram-no-lr.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-bmg:          [FAIL][61] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-9/igt@kms_async_flips@alternate-sync-async-flip.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-9/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2:
    - shard-bmg:          [FAIL][63] ([Intel XE#6078]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-9/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-9/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-varying-size:
    - shard-bmg:          [INCOMPLETE][65] ([Intel XE#1727]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-7/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-bmg:          [FAIL][67] ([Intel XE#7571]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          [FAIL][69] ([Intel XE#301]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][71] ([Intel XE#1503]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-6/igt@kms_hdr@invalid-hdr.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-3/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [SKIP][73] ([Intel XE#7922]) -> [PASS][74] +1 other test pass
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-6/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-3/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][75] ([Intel XE#7915]) -> [PASS][76] +3 other tests pass
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-7/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-10/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][77] ([Intel XE#6321]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-4/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-3/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset:
    - shard-lnl:          [ABORT][79] -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-lnl-1/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-lnl-1/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html

  
#### Warnings ####

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][81] ([Intel XE#2426] / [Intel XE#5848]) -> [FAIL][82] ([Intel XE#1729] / [Intel XE#7424])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/shard-bmg-4/igt@kms_tiled_display@basic-test-pattern.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6627]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6627
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7312
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7360
  [Intel XE#7419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7419
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
  [Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977


Build changes
-------------

  * Linux: xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc -> xe-pw-166340v3

  IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5082-dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc: dd6c69e211ead406faa36e4e2ec21f2ad8b75bbc
  xe-pw-166340v3: 166340v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166340v3/index.html

[-- Attachment #2: Type: text/html, Size: 29882 bytes --]

Re: [PATCH v4 0/5] drm/i915/bw: Split bandwidth params into platform- and display-IP-specific structs

[Gustavo Sousa]

Gustavo Sousa <gustavo.sousa@intel.com> writes:

> Some of the parameters of used in display bandwidth calculations are
> tied to the platform and are orthogonal to the display IP.  After talking
> with the hardware team, we now have the information (and Bspec has been
> updated) that the members deprogbwlimit and derating of struct
> intel_sa_info are such platform-specific ones.
>
> With that, we are now able to make the driver code more aligned with the
> hardware by splitting structs intel_sa_info into two different structs:
> one that is platform-specific and another that is display-IP-specific.
>
> That change also allows us to simplify how we select the parameters for
> the calculation.
>
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

Pushed to drm-intel-next. Thanks everyone for the feedback and reviews!

--
Gustavo Sousa

> ---
> Changes in v4:
> - Minor updates to fix issues captured by CI; see changelog in
>   individual patches for details.
> - Link to v3: https://patch.msgid.link/20260514-separate-platform-from-diplay-ip-specific-bw-params-v3-0-68727d6fe3ec@intel.com
>
> Changes in v3:
> - Incorporated review feedback; see each individual patch for details.
> - Link to v2: https://patch.msgid.link/20260511-separate-platform-from-diplay-ip-specific-bw-params-v2-0-e762cb8662da@intel.com
>
> Changes in v2:
> - Incorporated review feedback; see each individual patch for details.
> - Link to v1: https://patch.msgid.link/20260408-separate-platform-from-diplay-ip-specific-bw-params-v1-0-23c53afa7db0@intel.com
>
> ---
> Gustavo Sousa (5):
>       drm/i915/bw: Don't call intel_dram_info() too early
>       drm/i915/bw: Extract platform-specific parameters
>       drm/i915/bw: Deduplicate intel_sa_info instances
>       drm/i915/bw: Rename struct intel_sa_info to intel_display_bw_params
>       drm/i915/bw: Extract get_display_bw_params()
>
>  drivers/gpu/drm/i915/display/intel_bw.c | 205 ++++++++++++++++++++------------
>  1 file changed, 128 insertions(+), 77 deletions(-)
> ---
> base-commit: f05be6b9858836632ce6b4839e1bda3a470278b9
> change-id: 20260408-separate-platform-from-diplay-ip-specific-bw-params-65bfba0603be
>
> Best regards,
> --  
> Gustavo Sousa <gustavo.sousa@intel.com>