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From: Rodrigo Vivi <rodrigo.vivi@kernel.org>
To: Matthew Brost <matthew.brost@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [PATCH v2 01/31] drm/sched: Add run_wq argument to drm_sched_init
Date: Fri, 5 May 2023 14:24:45 -0400	[thread overview]
Message-ID: <ZFVJ7ZiMoob3FmJv@rdvivi-mobl4> (raw)
In-Reply-To: <ZFJ4XpjSe8X81q1C@DUT025-TGLU.fm.intel.com>

On Wed, May 03, 2023 at 03:06:06PM +0000, Matthew Brost wrote:
> On Wed, May 03, 2023 at 02:03:49PM +0200, Thomas Hellström wrote:
> > Hi,
> > 
> > On 5/2/23 02:16, Matthew Brost wrote:
> > > We will have this argument upstream, lets pull into the Xe repo.
> > 
> > Please rephrase the commit message. Add explanation, imperative wording and
> > remove mentions of the Xe repo (nobody cares about that once it goes
> > upstream)
> > 
> > /Thomas
> 
> This patch gets squashed into one eariler in our repo into t upstream
> version:
> https://patchwork.freedesktop.org/patch/530648/?series=116054&rev=1

if the patch is to be squashed in an existent one please create it with
git commit --fixup=<hash of commit to be changed>

so we push this to the top of the branch and during the cleanup rebases
that I'm running it will get automatically squashed...
(git rebase --autosquash)

without the fixup! annotation I don't have visibility to know which
patches should be squashed.

> 
> Can reword if you think it is a big deal but this is just a placeholder.
> 
> Matt
>  
> 
> > 
> > > 
> > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > ---
> > >   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  2 +-
> > >   drivers/gpu/drm/etnaviv/etnaviv_sched.c    |  2 +-
> > >   drivers/gpu/drm/lima/lima_sched.c          |  2 +-
> > >   drivers/gpu/drm/msm/msm_ringbuffer.c       |  2 +-
> > >   drivers/gpu/drm/panfrost/panfrost_job.c    |  2 +-
> > >   drivers/gpu/drm/scheduler/sched_main.c     |  4 +++-
> > >   drivers/gpu/drm/v3d/v3d_sched.c            | 10 +++++-----
> > >   drivers/gpu/drm/xe/xe_execlist.c           |  2 +-
> > >   drivers/gpu/drm/xe/xe_guc_submit.c         |  2 +-
> > >   include/drm/gpu_scheduler.h                |  1 +
> > >   10 files changed, 16 insertions(+), 13 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > > index 902f9b5ff82c..fe28f6b71fe3 100644
> > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> > > @@ -2364,7 +2364,7 @@ static int amdgpu_device_init_schedulers(struct amdgpu_device *adev)
> > >   			break;
> > >   		}
> > > -		r = drm_sched_init(&ring->sched, &amdgpu_sched_ops,
> > > +		r = drm_sched_init(&ring->sched, &amdgpu_sched_ops, NULL,
> > >   				   ring->num_hw_submission, amdgpu_job_hang_limit,
> > >   				   timeout, adev->reset_domain->wq,
> > >   				   ring->sched_score, ring->name,
> > > diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
> > > index 1ae87dfd19c4..8486a2923f1b 100644
> > > --- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
> > > +++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
> > > @@ -133,7 +133,7 @@ int etnaviv_sched_init(struct etnaviv_gpu *gpu)
> > >   {
> > >   	int ret;
> > > -	ret = drm_sched_init(&gpu->sched, &etnaviv_sched_ops,
> > > +	ret = drm_sched_init(&gpu->sched, &etnaviv_sched_ops, NULL,
> > >   			     etnaviv_hw_jobs_limit, etnaviv_job_hang_limit,
> > >   			     msecs_to_jiffies(500), NULL, NULL,
> > >   			     dev_name(gpu->dev), gpu->dev);
> > > diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c
> > > index ff003403fbbc..54f53bece27c 100644
> > > --- a/drivers/gpu/drm/lima/lima_sched.c
> > > +++ b/drivers/gpu/drm/lima/lima_sched.c
> > > @@ -488,7 +488,7 @@ int lima_sched_pipe_init(struct lima_sched_pipe *pipe, const char *name)
> > >   	INIT_WORK(&pipe->recover_work, lima_sched_recover_work);
> > > -	return drm_sched_init(&pipe->base, &lima_sched_ops, 1,
> > > +	return drm_sched_init(&pipe->base, &lima_sched_ops, NULL, 1,
> > >   			      lima_job_hang_limit,
> > >   			      msecs_to_jiffies(timeout), NULL,
> > >   			      NULL, name, pipe->ldev->dev);
> > > diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c b/drivers/gpu/drm/msm/msm_ringbuffer.c
> > > index 57a8e9564540..5879fc262047 100644
> > > --- a/drivers/gpu/drm/msm/msm_ringbuffer.c
> > > +++ b/drivers/gpu/drm/msm/msm_ringbuffer.c
> > > @@ -95,7 +95,7 @@ struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
> > >   	 /* currently managing hangcheck ourselves: */
> > >   	sched_timeout = MAX_SCHEDULE_TIMEOUT;
> > > -	ret = drm_sched_init(&ring->sched, &msm_sched_ops,
> > > +	ret = drm_sched_init(&ring->sched, &msm_sched_ops, NULL,
> > >   			num_hw_submissions, 0, sched_timeout,
> > >   			NULL, NULL, to_msm_bo(ring->bo)->name, gpu->dev->dev);
> > >   	if (ret) {
> > > diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c
> > > index dbc597ab46fb..f48b07056a16 100644
> > > --- a/drivers/gpu/drm/panfrost/panfrost_job.c
> > > +++ b/drivers/gpu/drm/panfrost/panfrost_job.c
> > > @@ -815,7 +815,7 @@ int panfrost_job_init(struct panfrost_device *pfdev)
> > >   		js->queue[j].fence_context = dma_fence_context_alloc(1);
> > >   		ret = drm_sched_init(&js->queue[j].sched,
> > > -				     &panfrost_sched_ops,
> > > +				     &panfrost_sched_ops, NULL,
> > >   				     nentries, 0,
> > >   				     msecs_to_jiffies(JOB_TIMEOUT_MS),
> > >   				     pfdev->reset.wq,
> > > diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c
> > > index cfd8a838e283..e79b9c760efe 100644
> > > --- a/drivers/gpu/drm/scheduler/sched_main.c
> > > +++ b/drivers/gpu/drm/scheduler/sched_main.c
> > > @@ -1182,6 +1182,7 @@ static void drm_sched_main(struct work_struct *w)
> > >    *
> > >    * @sched: scheduler instance
> > >    * @ops: backend operations for this scheduler
> > > + * @run_wq: workqueue to use for run work. If NULL, the system_wq is used
> > >    * @hw_submission: number of hw submissions that can be in flight
> > >    * @hang_limit: number of times to allow a job to hang before dropping it
> > >    * @timeout: timeout value in jiffies for the scheduler
> > > @@ -1195,6 +1196,7 @@ static void drm_sched_main(struct work_struct *w)
> > >    */
> > >   int drm_sched_init(struct drm_gpu_scheduler *sched,
> > >   		   const struct drm_sched_backend_ops *ops,
> > > +		   struct workqueue_struct *run_wq,
> > >   		   unsigned hw_submission, unsigned hang_limit,
> > >   		   long timeout, struct workqueue_struct *timeout_wq,
> > >   		   atomic_t *score, const char *name, struct device *dev)
> > > @@ -1203,9 +1205,9 @@ int drm_sched_init(struct drm_gpu_scheduler *sched,
> > >   	sched->ops = ops;
> > >   	sched->hw_submission_limit = hw_submission;
> > >   	sched->name = name;
> > > +	sched->run_wq = run_wq ? : system_wq;
> > >   	sched->timeout = timeout;
> > >   	sched->timeout_wq = timeout_wq ? : system_wq;
> > > -	sched->run_wq = system_wq;	/* FIXME: Let user pass this in */
> > >   	sched->hang_limit = hang_limit;
> > >   	sched->score = score ? score : &sched->_score;
> > >   	sched->dev = dev;
> > > diff --git a/drivers/gpu/drm/v3d/v3d_sched.c b/drivers/gpu/drm/v3d/v3d_sched.c
> > > index 06238e6d7f5c..38e092ea41e6 100644
> > > --- a/drivers/gpu/drm/v3d/v3d_sched.c
> > > +++ b/drivers/gpu/drm/v3d/v3d_sched.c
> > > @@ -388,7 +388,7 @@ v3d_sched_init(struct v3d_dev *v3d)
> > >   	int ret;
> > >   	ret = drm_sched_init(&v3d->queue[V3D_BIN].sched,
> > > -			     &v3d_bin_sched_ops,
> > > +			     &v3d_bin_sched_ops, NULL,
> > >   			     hw_jobs_limit, job_hang_limit,
> > >   			     msecs_to_jiffies(hang_limit_ms), NULL,
> > >   			     NULL, "v3d_bin", v3d->drm.dev);
> > > @@ -396,7 +396,7 @@ v3d_sched_init(struct v3d_dev *v3d)
> > >   		return ret;
> > >   	ret = drm_sched_init(&v3d->queue[V3D_RENDER].sched,
> > > -			     &v3d_render_sched_ops,
> > > +			     &v3d_render_sched_ops, NULL,
> > >   			     hw_jobs_limit, job_hang_limit,
> > >   			     msecs_to_jiffies(hang_limit_ms), NULL,
> > >   			     NULL, "v3d_render", v3d->drm.dev);
> > > @@ -404,7 +404,7 @@ v3d_sched_init(struct v3d_dev *v3d)
> > >   		goto fail;
> > >   	ret = drm_sched_init(&v3d->queue[V3D_TFU].sched,
> > > -			     &v3d_tfu_sched_ops,
> > > +			     &v3d_tfu_sched_ops, NULL,
> > >   			     hw_jobs_limit, job_hang_limit,
> > >   			     msecs_to_jiffies(hang_limit_ms), NULL,
> > >   			     NULL, "v3d_tfu", v3d->drm.dev);
> > > @@ -413,7 +413,7 @@ v3d_sched_init(struct v3d_dev *v3d)
> > >   	if (v3d_has_csd(v3d)) {
> > >   		ret = drm_sched_init(&v3d->queue[V3D_CSD].sched,
> > > -				     &v3d_csd_sched_ops,
> > > +				     &v3d_csd_sched_ops, NULL,
> > >   				     hw_jobs_limit, job_hang_limit,
> > >   				     msecs_to_jiffies(hang_limit_ms), NULL,
> > >   				     NULL, "v3d_csd", v3d->drm.dev);
> > > @@ -421,7 +421,7 @@ v3d_sched_init(struct v3d_dev *v3d)
> > >   			goto fail;
> > >   		ret = drm_sched_init(&v3d->queue[V3D_CACHE_CLEAN].sched,
> > > -				     &v3d_cache_clean_sched_ops,
> > > +				     &v3d_cache_clean_sched_ops, NULL,
> > >   				     hw_jobs_limit, job_hang_limit,
> > >   				     msecs_to_jiffies(hang_limit_ms), NULL,
> > >   				     NULL, "v3d_cache_clean", v3d->drm.dev);
> > > diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
> > > index de4f0044b211..d6d60ebf3d5f 100644
> > > --- a/drivers/gpu/drm/xe/xe_execlist.c
> > > +++ b/drivers/gpu/drm/xe/xe_execlist.c
> > > @@ -336,7 +336,7 @@ static int execlist_engine_init(struct xe_engine *e)
> > >   	exl->engine = e;
> > > -	err = drm_sched_init(&exl->sched, &drm_sched_ops,
> > > +	err = drm_sched_init(&exl->sched, &drm_sched_ops, NULL,
> > >   			     e->lrc[0].ring.size / MAX_JOB_SIZE_BYTES,
> > >   			     XE_SCHED_HANG_LIMIT, XE_SCHED_JOB_TIMEOUT,
> > >   			     NULL, NULL, e->hwe->name,
> > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > index e857013070b9..735f31257f3a 100644
> > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > @@ -1081,7 +1081,7 @@ static int guc_engine_init(struct xe_engine *e)
> > >   	init_waitqueue_head(&ge->suspend_wait);
> > >   	timeout = xe_vm_no_dma_fences(e->vm) ? MAX_SCHEDULE_TIMEOUT : HZ * 5;
> > > -	err = drm_sched_init(&ge->sched, &drm_sched_ops,
> > > +	err = drm_sched_init(&ge->sched, &drm_sched_ops, NULL,
> > >   			     e->lrc[0].ring.size / MAX_JOB_SIZE_BYTES,
> > >   			     64, timeout, guc_to_gt(guc)->ordered_wq, NULL,
> > >   			     e->name, gt_to_xe(e->gt)->drm.dev);
> > > diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
> > > index cf85f93218fc..09bc39840dc8 100644
> > > --- a/include/drm/gpu_scheduler.h
> > > +++ b/include/drm/gpu_scheduler.h
> > > @@ -539,6 +539,7 @@ struct drm_gpu_scheduler {
> > >   int drm_sched_init(struct drm_gpu_scheduler *sched,
> > >   		   const struct drm_sched_backend_ops *ops,
> > > +		   struct workqueue_struct *run_wq,
> > >   		   uint32_t hw_submission, unsigned hang_limit,
> > >   		   long timeout, struct workqueue_struct *timeout_wq,
> > >   		   atomic_t *score, const char *name, struct device *dev);

  reply	other threads:[~2023-05-05 18:24 UTC|newest]

Thread overview: 126+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-02  0:16 [Intel-xe] [PATCH v2 00/31] Upstreaming prep / all of mbrosts patches Matthew Brost
2023-05-02  0:16 ` [Intel-xe] [PATCH v2 01/31] drm/sched: Add run_wq argument to drm_sched_init Matthew Brost
2023-05-03 12:03   ` Thomas Hellström
2023-05-03 15:06     ` Matthew Brost
2023-05-05 18:24       ` Rodrigo Vivi [this message]
2023-05-02  0:16 ` [Intel-xe] [PATCH v2 02/31] drm/sched: Move schedule policy to scheduler Matthew Brost
2023-05-03 12:13   ` Thomas Hellström
2023-05-03 15:11     ` Matthew Brost
2023-05-02  0:16 ` [Intel-xe] [PATCH v2 03/31] drm/sched: Add DRM_SCHED_POLICY_SINGLE_ENTITY scheduling policy Matthew Brost
2023-05-08 12:40   ` Thomas Hellström
2023-05-22  1:16     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 04/31] drm/xe: Use DRM_SCHED_POLICY_SINGLE_ENTITY mode Matthew Brost
2023-05-08 12:41   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 05/31] drm/xe: Long running job update Matthew Brost
2023-05-05 18:36   ` Rodrigo Vivi
2023-05-08  1:14     ` Matthew Brost
2023-05-08 13:14   ` Thomas Hellström
2023-05-09 14:56     ` Matthew Brost
2023-05-09 15:21       ` Thomas Hellström
2023-05-09 22:16         ` Matthew Brost
2023-05-10  8:15           ` Thomas Hellström
2023-05-09 22:21     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 06/31] drm/xe: Ensure LR engines are not persistent Matthew Brost
2023-05-05 18:38   ` Rodrigo Vivi
2023-05-08  1:03     ` Matthew Brost
2023-05-09 12:21   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 07/31] drm/xe: Only try to lock external BOs in VM bind Matthew Brost
2023-05-05 18:40   ` Rodrigo Vivi
2023-05-08  1:08     ` Matthew Brost
2023-05-08  1:15       ` Christopher Snowhill
2023-05-08 21:34       ` Rodrigo Vivi
2023-05-09 12:29         ` Thomas Hellström
2023-05-10 23:25           ` Matthew Brost
2023-05-11  7:43             ` Thomas Hellström
2023-05-08  1:17   ` Christopher Snowhill
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 08/31] drm/xe: VM LRU bulk move Matthew Brost
2023-05-08 21:39   ` Rodrigo Vivi
2023-05-09 22:09     ` Matthew Brost
2023-05-10  1:37       ` Rodrigo Vivi
2023-05-09 12:47   ` Thomas Hellström
2023-05-09 22:05     ` Matthew Brost
2023-05-10  8:14       ` Thomas Hellström
2023-05-10 18:40         ` Matthew Brost
2023-05-11  7:24           ` Thomas Hellström
2023-05-11 14:11             ` Matthew Brost
2023-05-12  9:03               ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 09/31] drm/xe/guc: Read HXG fields from DW1 of G2H response Matthew Brost
2023-05-05 18:50   ` Rodrigo Vivi
2023-05-09 12:49   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 10/31] drm/xe/guc: Return the lower part of blocking H2G message Matthew Brost
2023-05-05 18:52   ` Rodrigo Vivi
2023-05-08  1:10     ` Matthew Brost
2023-05-08  9:20       ` Michal Wajdeczko
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 11/31] drm/xe/guc: Use doorbells for submission if possible Matthew Brost
2023-05-08 21:42   ` Rodrigo Vivi
2023-05-10  0:49     ` Matthew Brost
2023-05-09 13:00   ` Thomas Hellström
2023-05-10  0:51     ` Matthew Brost
2023-05-21 12:32   ` Oded Gabbay
2023-06-08 19:30     ` Matthew Brost
2023-06-12 13:01       ` Oded Gabbay
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 12/31] drm/xe/guc: Print doorbell ID in GuC engine debugfs entry Matthew Brost
2023-05-05 18:55   ` Rodrigo Vivi
2023-05-09 13:01     ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 13/31] maple_tree: split up MA_STATE() macro Matthew Brost
2023-05-09 13:21   ` Thomas Hellström
2023-05-10  0:29     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 14/31] maple_tree: Export mas_preallocate Matthew Brost
2023-05-09 13:33   ` Thomas Hellström
2023-05-10  0:31     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 15/31] drm: manager to keep track of GPUs VA mappings Matthew Brost
2023-05-09 13:49   ` Thomas Hellström
2023-05-10  0:55     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 16/31] drm/xe: Port Xe to GPUVA Matthew Brost
2023-05-09 13:52   ` Thomas Hellström
2023-05-11  2:41     ` Matthew Brost
2023-05-11  7:39       ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 17/31] drm/xe: NULL binding implementation Matthew Brost
2023-05-09 14:34   ` Rodrigo Vivi
2023-05-11  2:52     ` Matthew Brost
2023-05-09 15:17   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 18/31] drm/xe: Avoid doing rebinds Matthew Brost
2023-05-09 14:48   ` Rodrigo Vivi
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 19/31] drm/xe: Reduce the number list links in xe_vma Matthew Brost
2023-05-08 21:43   ` Rodrigo Vivi
2023-05-11  8:38   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 20/31] drm/xe: Optimize size of xe_vma allocation Matthew Brost
2023-05-05 19:37   ` Rodrigo Vivi
2023-05-08  1:21     ` Matthew Brost
2023-05-11  9:05   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 21/31] drm/gpuva: Add drm device to GPUVA manager Matthew Brost
2023-05-05 19:39   ` Rodrigo Vivi
2023-05-11  9:06     ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 22/31] drm/gpuva: Move dma-resv " Matthew Brost
2023-05-11  9:10   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 23/31] drm/gpuva: Add support for extobj Matthew Brost
2023-05-11  9:35   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 24/31] drm/xe: Userptr refactor Matthew Brost
2023-05-05 19:41   ` Rodrigo Vivi
2023-05-11  9:46   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 25/31] drm: execution context for GEM buffers v3 Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 26/31] drm/exec: Always compile drm_exec Matthew Brost
2023-05-09 14:45   ` Rodrigo Vivi
2023-05-10  0:37     ` Matthew Brost
2023-05-10  0:38     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 27/31] drm/xe: Use drm_exec for locking rather than TTM exec helpers Matthew Brost
2023-05-05 19:42   ` Rodrigo Vivi
2023-05-11 10:01   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 28/31] drm/xe: Allow dma-fences as in-syncs for compute / faulting VM Matthew Brost
2023-05-05 19:43   ` Rodrigo Vivi
2023-05-08  1:19     ` Matthew Brost
2023-05-08 21:29       ` Rodrigo Vivi
2023-05-11 10:03   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 29/31] drm/xe: Allow compute VMs to output dma-fences on binds Matthew Brost
2023-05-09 14:50   ` Rodrigo Vivi
2023-05-11 10:04   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 30/31] drm/xe: remove async worker, sync binds, new error handling Matthew Brost
2023-05-17 16:53   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 31/31] drm/xe/uapi: Add some VM bind kernel doc Matthew Brost
2023-05-05 19:45   ` Rodrigo Vivi
2023-05-11 10:14     ` Thomas Hellström
2023-05-02  0:20 ` [Intel-xe] ✗ CI.Patch_applied: failure for Upstreaming prep / all of mbrosts patches (rev2) Patchwork
2023-05-02  1:54   ` Christopher Snowhill (kode54)
2023-05-02  1:59   ` Christopher Snowhill (kode54)
2023-05-03 12:37 ` [Intel-xe] [PATCH v2 00/31] Upstreaming prep / all of mbrosts patches Thomas Hellström
2023-05-03 15:27   ` Matthew Brost

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