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From: Rodrigo Vivi <rodrigo.vivi@kernel.org>
To: Matthew Brost <matthew.brost@intel.com>
Cc: intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [PATCH v2 24/31] drm/xe: Userptr refactor
Date: Fri, 5 May 2023 15:41:27 -0400	[thread overview]
Message-ID: <ZFVb55lCbfCx6X0p@rdvivi-mobl4> (raw)
In-Reply-To: <20230502001727.3211096-25-matthew.brost@intel.com>

On Mon, May 01, 2023 at 05:17:20PM -0700, Matthew Brost wrote:
> Add GPUVA userptr flag, add GPUVA userptr sub-struct, and drop sg
> pointer. A larger follow on cleanup may push more of userptr
> implementation to GPUVA.

here as well, please have xe and drm changes in separated patches.
But the final result looks good.... 

> 
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_pt.c       |  6 +--
>  drivers/gpu/drm/xe/xe_vm.c       | 41 +++++++++++----------
>  drivers/gpu/drm/xe/xe_vm.h       | 23 +++++++-----
>  drivers/gpu/drm/xe/xe_vm_types.h | 20 +++++-----
>  include/drm/drm_gpuva_mgr.h      | 63 +++++++++++++++++++++-----------
>  5 files changed, 89 insertions(+), 64 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index 0f40f1950686..964baa24eba3 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -92,8 +92,8 @@ static dma_addr_t vma_addr(struct xe_vma *vma, u64 offset,
>  		page = offset >> PAGE_SHIFT;
>  		offset &= (PAGE_SIZE - 1);
>  
> -		xe_res_first_sg(vma->userptr.sg, page << PAGE_SHIFT, page_size,
> -				&cur);
> +		xe_res_first_sg(&vma->userptr.sgt, page << PAGE_SHIFT,
> +				page_size, &cur);
>  		return xe_res_dma(&cur) + offset;
>  	} else {
>  		return xe_bo_addr(xe_vma_bo(vma), offset, page_size, is_vram);
> @@ -813,7 +813,7 @@ xe_pt_stage_bind(struct xe_gt *gt, struct xe_vma *vma,
>  	xe_bo_assert_held(bo);
>  	if (!xe_vma_is_null(vma)) {
>  		if (xe_vma_is_userptr(vma))
> -			xe_res_first_sg(vma->userptr.sg, 0, xe_vma_size(vma),
> +			xe_res_first_sg(&vma->userptr.sgt, 0, xe_vma_size(vma),
>  					&curs);
>  		else if (xe_bo_is_vram(bo) || xe_bo_is_stolen(bo))
>  			xe_res_first(bo->ttm.resource, xe_vma_bo_offset(vma),
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 336e21c710a5..4d734ec4d6ab 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -73,13 +73,13 @@ int xe_vma_userptr_pin_pages(struct xe_vma *vma)
>  	if (!pages)
>  		return -ENOMEM;
>  
> -	if (vma->userptr.sg) {
> +	if (xe_vma_userptr_sg_mapped(vma)) {
>  		dma_unmap_sgtable(xe->drm.dev,
> -				  vma->userptr.sg,
> +				  &vma->userptr.sgt,
>  				  read_only ? DMA_TO_DEVICE :
>  				  DMA_BIDIRECTIONAL, 0);
> -		sg_free_table(vma->userptr.sg);
> -		vma->userptr.sg = NULL;
> +		sg_free_table(&vma->userptr.sgt);
> +		vma->gpuva.flags &= ~XE_VMA_USERPTR_SG_MAPPED;
>  	}
>  
>  	pinned = ret = 0;
> @@ -119,19 +119,19 @@ int xe_vma_userptr_pin_pages(struct xe_vma *vma)
>  					0, (u64)pinned << PAGE_SHIFT,
>  					GFP_KERNEL);
>  	if (ret) {
> -		vma->userptr.sg = NULL;
> +		vma->gpuva.flags &= ~XE_VMA_USERPTR_SG_MAPPED;
>  		goto out;
>  	}
> -	vma->userptr.sg = &vma->userptr.sgt;
> +	vma->gpuva.flags |= XE_VMA_USERPTR_SG_MAPPED;
>  
> -	ret = dma_map_sgtable(xe->drm.dev, vma->userptr.sg,
> +	ret = dma_map_sgtable(xe->drm.dev, &vma->userptr.sgt,
>  			      read_only ? DMA_TO_DEVICE :
>  			      DMA_BIDIRECTIONAL,
>  			      DMA_ATTR_SKIP_CPU_SYNC |
>  			      DMA_ATTR_NO_KERNEL_MAPPING);
>  	if (ret) {
> -		sg_free_table(vma->userptr.sg);
> -		vma->userptr.sg = NULL;
> +		sg_free_table(&vma->userptr.sgt);
> +		vma->gpuva.flags &= ~XE_VMA_USERPTR_SG_MAPPED;
>  		goto out;
>  	}
>  
> @@ -820,15 +820,13 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm,
>  	 */
>  	INIT_LIST_HEAD(&vma->rebind_link);
>  
> -	INIT_LIST_HEAD(&vma->gpuva.gem.entry);
> -	INIT_LIST_HEAD(&vma->gpuva.gem.extobj_link);
>  	vma->gpuva.mgr = &vm->mgr;
>  	vma->gpuva.va.addr = start;
>  	vma->gpuva.va.range = end - start + 1;
>  	if (read_only)
>  		vma->gpuva.flags |= XE_VMA_READ_ONLY;
>  	if (null)
> -		vma->gpuva.flags |= XE_VMA_NULL;
> +		vma->gpuva.flags |= DRM_GPUVA_SPARSE;
>  
>  	if (gt_mask) {
>  		vma->gt_mask = gt_mask;
> @@ -845,6 +843,8 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm,
>  		xe_bo_assert_held(bo);
>  
>  		drm_gem_object_get(&bo->ttm.base);
> +		INIT_LIST_HEAD(&vma->gpuva.gem.entry);
> +		INIT_LIST_HEAD(&vma->gpuva.gem.extobj_link);
>  		vma->gpuva.gem.obj = &bo->ttm.base;
>  		vma->gpuva.gem.offset = bo_offset_or_userptr;
>  		if (!bo->vm)
> @@ -855,7 +855,8 @@ static struct xe_vma *xe_vma_create(struct xe_vm *vm,
>  			u64 size = end - start + 1;
>  			int err;
>  
> -			vma->gpuva.gem.offset = bo_offset_or_userptr;
> +			vma->gpuva.flags |= DRM_GPUVA_USERPTR;
> +			vma->gpuva.userptr.address= bo_offset_or_userptr;
>  			err = mmu_interval_notifier_insert(&vma->userptr.notifier,
>  							   current->mm,
>  							   xe_vma_userptr(vma),
> @@ -883,13 +884,13 @@ static void xe_vma_destroy_late(struct xe_vma *vma)
>  	bool read_only = xe_vma_read_only(vma);
>  
>  	if (xe_vma_is_userptr(vma)) {
> -		if (vma->userptr.sg) {
> +		if (xe_vma_userptr_sg_mapped(vma)) {
>  			dma_unmap_sgtable(xe->drm.dev,
> -					  vma->userptr.sg,
> +					  &vma->userptr.sgt,
>  					  read_only ? DMA_TO_DEVICE :
>  					  DMA_BIDIRECTIONAL, 0);
> -			sg_free_table(vma->userptr.sg);
> -			vma->userptr.sg = NULL;
> +			sg_free_table(&vma->userptr.sgt);
> +			vma->gpuva.flags &= ~XE_VMA_USERPTR_SG_MAPPED;
>  		}
>  
>  		/*
> @@ -2309,7 +2310,7 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct xe_engine *e,
>  						XE_VMA_READ_ONLY;
>  					bool null =
>  						op->base.remap.unmap->va->flags &
> -						XE_VMA_NULL;
> +						DRM_GPUVA_SPARSE;
>  
>  					vma = new_vma(vm, op->base.remap.prev,
>  						      op->gt_mask, read_only,
> @@ -2344,7 +2345,7 @@ static int vm_bind_ioctl_ops_parse(struct xe_vm *vm, struct xe_engine *e,
>  
>  					bool null =
>  						op->base.remap.unmap->va->flags &
> -						XE_VMA_NULL;
> +						DRM_GPUVA_SPARSE;
>  
>  					vma = new_vma(vm, op->base.remap.next,
>  						      op->gt_mask, read_only,
> @@ -3320,7 +3321,7 @@ int xe_analyze_vm(struct drm_printer *p, struct xe_vm *vm, int gt_id)
>  		} else if (is_userptr) {
>  			struct xe_res_cursor cur;
>  
> -			xe_res_first_sg(vma->userptr.sg, 0, XE_PAGE_SIZE, &cur);
> +			xe_res_first_sg(&vma->userptr.sgt, 0, XE_PAGE_SIZE, &cur);
>  			addr = xe_res_dma(&cur);
>  		} else {
>  			addr = xe_bo_addr(xe_vma_bo(vma), 0, XE_PAGE_SIZE, &is_vram);
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index 12de652d8d1c..f279fa622260 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -101,12 +101,6 @@ static inline u64 xe_vma_bo_offset(struct xe_vma *vma)
>  	return vma->gpuva.gem.offset;
>  }
>  
> -static inline struct xe_bo *xe_vma_bo(struct xe_vma *vma)
> -{
> -	return !vma->gpuva.gem.obj ? NULL :
> -		container_of(vma->gpuva.gem.obj, struct xe_bo, ttm.base);
> -}
> -
>  static inline struct xe_vm *xe_vma_vm(struct xe_vma *vma)
>  {
>  	return container_of(vma->gpuva.mgr, struct xe_vm, mgr);
> @@ -129,7 +123,7 @@ static inline bool xe_vma_read_only(struct xe_vma *vma)
>  
>  static inline u64 xe_vma_userptr(struct xe_vma *vma)
>  {
> -	return vma->gpuva.gem.offset;
> +	return vma->gpuva.userptr.address;
>  }
>  
>  #define xe_vm_assert_held(vm) dma_resv_assert_held(&(vm)->mgr.resv)
> @@ -197,12 +191,18 @@ static inline void xe_vm_reactivate_rebind(struct xe_vm *vm)
>  
>  static inline bool xe_vma_is_null(struct xe_vma *vma)
>  {
> -	return vma->gpuva.flags & XE_VMA_NULL;
> +	return vma->gpuva.flags & DRM_GPUVA_SPARSE;
>  }
>  
>  static inline bool xe_vma_is_userptr(struct xe_vma *vma)
>  {
> -	return !xe_vma_bo(vma) && !xe_vma_is_null(vma);
> +	return vma->gpuva.flags & DRM_GPUVA_USERPTR;
> +}
> +
> +static inline struct xe_bo *xe_vma_bo(struct xe_vma *vma)
> +{
> +	return xe_vma_is_null(vma) || xe_vma_is_userptr(vma) ? NULL :
> +		container_of(vma->gpuva.gem.obj, struct xe_bo, ttm.base);
>  }
>  
>  static inline bool xe_vma_has_no_bo(struct xe_vma *vma)
> @@ -210,6 +210,11 @@ static inline bool xe_vma_has_no_bo(struct xe_vma *vma)
>  	return !xe_vma_bo(vma);
>  }
>  
> +static inline bool xe_vma_userptr_sg_mapped(struct xe_vma *vma)
> +{
> +	return vma->gpuva.flags & XE_VMA_USERPTR_SG_MAPPED;
> +}
> +
>  int xe_vma_userptr_pin_pages(struct xe_vma *vma);
>  
>  int xe_vma_userptr_check_repin(struct xe_vma *vma);
> diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
> index 0b59bde3bc4e..ce1260b8d3ef 100644
> --- a/drivers/gpu/drm/xe/xe_vm_types.h
> +++ b/drivers/gpu/drm/xe/xe_vm_types.h
> @@ -23,15 +23,15 @@ struct xe_vm;
>  #define TEST_VM_ASYNC_OPS_ERROR
>  #define FORCE_ASYNC_OP_ERROR	BIT(31)
>  
> -#define XE_VMA_READ_ONLY	DRM_GPUVA_USERBITS
> -#define XE_VMA_DESTROYED	(DRM_GPUVA_USERBITS << 1)
> -#define XE_VMA_ATOMIC_PTE_BIT	(DRM_GPUVA_USERBITS << 2)
> -#define XE_VMA_FIRST_REBIND	(DRM_GPUVA_USERBITS << 3)
> -#define XE_VMA_LAST_REBIND	(DRM_GPUVA_USERBITS << 4)
> -#define XE_VMA_NULL		(DRM_GPUVA_USERBITS << 5)
> -#define XE_VMA_PTE_4K		(DRM_GPUVA_USERBITS << 6)
> -#define XE_VMA_PTE_2M		(DRM_GPUVA_USERBITS << 7)
> -#define XE_VMA_PTE_1G		(DRM_GPUVA_USERBITS << 8)
> +#define XE_VMA_READ_ONLY		DRM_GPUVA_USERBITS
> +#define XE_VMA_DESTROYED		(DRM_GPUVA_USERBITS << 1)
> +#define XE_VMA_ATOMIC_PTE_BIT		(DRM_GPUVA_USERBITS << 2)
> +#define XE_VMA_FIRST_REBIND		(DRM_GPUVA_USERBITS << 3)
> +#define XE_VMA_LAST_REBIND		(DRM_GPUVA_USERBITS << 4)
> +#define XE_VMA_USERPTR_SG_MAPPED	(DRM_GPUVA_USERBITS << 5)
> +#define XE_VMA_PTE_4K			(DRM_GPUVA_USERBITS << 6)
> +#define XE_VMA_PTE_2M			(DRM_GPUVA_USERBITS << 7)
> +#define XE_VMA_PTE_1G			(DRM_GPUVA_USERBITS << 8)
>  
>  /** struct xe_userptr - User pointer */
>  struct xe_userptr {
> @@ -41,8 +41,6 @@ struct xe_userptr {
>  	struct mmu_interval_notifier notifier;
>  	/** @sgt: storage for a scatter gather table */
>  	struct sg_table sgt;
> -	/** @sg: allocated scatter gather table */
> -	struct sg_table *sg;
>  	/** @notifier_seq: notifier sequence number */
>  	unsigned long notifier_seq;
>  	/**
> diff --git a/include/drm/drm_gpuva_mgr.h b/include/drm/drm_gpuva_mgr.h
> index 57861a7ed504..943c8fcda533 100644
> --- a/include/drm/drm_gpuva_mgr.h
> +++ b/include/drm/drm_gpuva_mgr.h
> @@ -62,10 +62,17 @@ enum drm_gpuva_flags {
>  	 */
>  	DRM_GPUVA_EXTOBJ = (1 << 2),
>  
> +	/**
> +	 * @DRM_GPUVA_USERPTR:
> +	 *
> +	 * Flag indicating that the &drm_gpuva is a user pointer mapping.
> +	 */
> +	DRM_GPUVA_USERPTR = (1 << 3),
> +
>  	/**
>  	 * @DRM_GPUVA_USERBITS: user defined bits
>  	 */
> -	DRM_GPUVA_USERBITS = (1 << 3),
> +	DRM_GPUVA_USERBITS = (1 << 4),
>  };
>  
>  /**
> @@ -102,31 +109,45 @@ struct drm_gpuva {
>  		u64 range;
>  	} va;
>  
> -	/**
> -	 * @gem: structure containing the &drm_gem_object and it's offset
> -	 */
> -	struct {
> -		/**
> -		 * @offset: the offset within the &drm_gem_object
> -		 */
> -		u64 offset;
> -
> -		/**
> -		 * @obj: the mapped &drm_gem_object
> -		 */
> -		struct drm_gem_object *obj;
> -
> +	union {
>  		/**
> -		 * @entry: the &list_head to attach this object to a &drm_gem_object
> +		 * @gem: structure containing the &drm_gem_object and it's
> +		 * offset
>  		 */
> -		struct list_head entry;
> +		struct {
> +			/**
> +			 * @offset: the offset within the &drm_gem_object
> +			 */
> +			u64 offset;
> +
> +			/**
> +			 * @obj: the mapped &drm_gem_object
> +			 */
> +			struct drm_gem_object *obj;
> +
> +			/**
> +			 * @entry: the &list_head to attach this object to a
> +			 * &drm_gem_object
> +			 */
> +			struct list_head entry;
> +
> +			/**
> +			 * @extobj_link: the &list_head to attach this object to
> +			 * a @drm_gpuva_manager.extobj.list
> +			 */
> +			struct list_head extobj_link;
> +		} gem;
>  
>  		/**
> -		 * @extobj_link: the &list_head to attach this object to a
> -		 * @drm_gpuva_manager.extobj.list
> +		 * @userptr: structure containing user pointer state
>  		 */
> -		struct list_head extobj_link;
> -	} gem;
> +		struct {
> +			/**
> +			 * @address: user pointer address
> +			 */
> +			u64 address;
> +		} userptr;
> +	};
>  };
>  
>  void drm_gpuva_link(struct drm_gpuva *va);
> -- 
> 2.34.1
> 

  reply	other threads:[~2023-05-05 19:41 UTC|newest]

Thread overview: 126+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-02  0:16 [Intel-xe] [PATCH v2 00/31] Upstreaming prep / all of mbrosts patches Matthew Brost
2023-05-02  0:16 ` [Intel-xe] [PATCH v2 01/31] drm/sched: Add run_wq argument to drm_sched_init Matthew Brost
2023-05-03 12:03   ` Thomas Hellström
2023-05-03 15:06     ` Matthew Brost
2023-05-05 18:24       ` Rodrigo Vivi
2023-05-02  0:16 ` [Intel-xe] [PATCH v2 02/31] drm/sched: Move schedule policy to scheduler Matthew Brost
2023-05-03 12:13   ` Thomas Hellström
2023-05-03 15:11     ` Matthew Brost
2023-05-02  0:16 ` [Intel-xe] [PATCH v2 03/31] drm/sched: Add DRM_SCHED_POLICY_SINGLE_ENTITY scheduling policy Matthew Brost
2023-05-08 12:40   ` Thomas Hellström
2023-05-22  1:16     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 04/31] drm/xe: Use DRM_SCHED_POLICY_SINGLE_ENTITY mode Matthew Brost
2023-05-08 12:41   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 05/31] drm/xe: Long running job update Matthew Brost
2023-05-05 18:36   ` Rodrigo Vivi
2023-05-08  1:14     ` Matthew Brost
2023-05-08 13:14   ` Thomas Hellström
2023-05-09 14:56     ` Matthew Brost
2023-05-09 15:21       ` Thomas Hellström
2023-05-09 22:16         ` Matthew Brost
2023-05-10  8:15           ` Thomas Hellström
2023-05-09 22:21     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 06/31] drm/xe: Ensure LR engines are not persistent Matthew Brost
2023-05-05 18:38   ` Rodrigo Vivi
2023-05-08  1:03     ` Matthew Brost
2023-05-09 12:21   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 07/31] drm/xe: Only try to lock external BOs in VM bind Matthew Brost
2023-05-05 18:40   ` Rodrigo Vivi
2023-05-08  1:08     ` Matthew Brost
2023-05-08  1:15       ` Christopher Snowhill
2023-05-08 21:34       ` Rodrigo Vivi
2023-05-09 12:29         ` Thomas Hellström
2023-05-10 23:25           ` Matthew Brost
2023-05-11  7:43             ` Thomas Hellström
2023-05-08  1:17   ` Christopher Snowhill
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 08/31] drm/xe: VM LRU bulk move Matthew Brost
2023-05-08 21:39   ` Rodrigo Vivi
2023-05-09 22:09     ` Matthew Brost
2023-05-10  1:37       ` Rodrigo Vivi
2023-05-09 12:47   ` Thomas Hellström
2023-05-09 22:05     ` Matthew Brost
2023-05-10  8:14       ` Thomas Hellström
2023-05-10 18:40         ` Matthew Brost
2023-05-11  7:24           ` Thomas Hellström
2023-05-11 14:11             ` Matthew Brost
2023-05-12  9:03               ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 09/31] drm/xe/guc: Read HXG fields from DW1 of G2H response Matthew Brost
2023-05-05 18:50   ` Rodrigo Vivi
2023-05-09 12:49   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 10/31] drm/xe/guc: Return the lower part of blocking H2G message Matthew Brost
2023-05-05 18:52   ` Rodrigo Vivi
2023-05-08  1:10     ` Matthew Brost
2023-05-08  9:20       ` Michal Wajdeczko
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 11/31] drm/xe/guc: Use doorbells for submission if possible Matthew Brost
2023-05-08 21:42   ` Rodrigo Vivi
2023-05-10  0:49     ` Matthew Brost
2023-05-09 13:00   ` Thomas Hellström
2023-05-10  0:51     ` Matthew Brost
2023-05-21 12:32   ` Oded Gabbay
2023-06-08 19:30     ` Matthew Brost
2023-06-12 13:01       ` Oded Gabbay
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 12/31] drm/xe/guc: Print doorbell ID in GuC engine debugfs entry Matthew Brost
2023-05-05 18:55   ` Rodrigo Vivi
2023-05-09 13:01     ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 13/31] maple_tree: split up MA_STATE() macro Matthew Brost
2023-05-09 13:21   ` Thomas Hellström
2023-05-10  0:29     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 14/31] maple_tree: Export mas_preallocate Matthew Brost
2023-05-09 13:33   ` Thomas Hellström
2023-05-10  0:31     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 15/31] drm: manager to keep track of GPUs VA mappings Matthew Brost
2023-05-09 13:49   ` Thomas Hellström
2023-05-10  0:55     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 16/31] drm/xe: Port Xe to GPUVA Matthew Brost
2023-05-09 13:52   ` Thomas Hellström
2023-05-11  2:41     ` Matthew Brost
2023-05-11  7:39       ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 17/31] drm/xe: NULL binding implementation Matthew Brost
2023-05-09 14:34   ` Rodrigo Vivi
2023-05-11  2:52     ` Matthew Brost
2023-05-09 15:17   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 18/31] drm/xe: Avoid doing rebinds Matthew Brost
2023-05-09 14:48   ` Rodrigo Vivi
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 19/31] drm/xe: Reduce the number list links in xe_vma Matthew Brost
2023-05-08 21:43   ` Rodrigo Vivi
2023-05-11  8:38   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 20/31] drm/xe: Optimize size of xe_vma allocation Matthew Brost
2023-05-05 19:37   ` Rodrigo Vivi
2023-05-08  1:21     ` Matthew Brost
2023-05-11  9:05   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 21/31] drm/gpuva: Add drm device to GPUVA manager Matthew Brost
2023-05-05 19:39   ` Rodrigo Vivi
2023-05-11  9:06     ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 22/31] drm/gpuva: Move dma-resv " Matthew Brost
2023-05-11  9:10   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 23/31] drm/gpuva: Add support for extobj Matthew Brost
2023-05-11  9:35   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 24/31] drm/xe: Userptr refactor Matthew Brost
2023-05-05 19:41   ` Rodrigo Vivi [this message]
2023-05-11  9:46   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 25/31] drm: execution context for GEM buffers v3 Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 26/31] drm/exec: Always compile drm_exec Matthew Brost
2023-05-09 14:45   ` Rodrigo Vivi
2023-05-10  0:37     ` Matthew Brost
2023-05-10  0:38     ` Matthew Brost
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 27/31] drm/xe: Use drm_exec for locking rather than TTM exec helpers Matthew Brost
2023-05-05 19:42   ` Rodrigo Vivi
2023-05-11 10:01   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 28/31] drm/xe: Allow dma-fences as in-syncs for compute / faulting VM Matthew Brost
2023-05-05 19:43   ` Rodrigo Vivi
2023-05-08  1:19     ` Matthew Brost
2023-05-08 21:29       ` Rodrigo Vivi
2023-05-11 10:03   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 29/31] drm/xe: Allow compute VMs to output dma-fences on binds Matthew Brost
2023-05-09 14:50   ` Rodrigo Vivi
2023-05-11 10:04   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 30/31] drm/xe: remove async worker, sync binds, new error handling Matthew Brost
2023-05-17 16:53   ` Thomas Hellström
2023-05-02  0:17 ` [Intel-xe] [PATCH v2 31/31] drm/xe/uapi: Add some VM bind kernel doc Matthew Brost
2023-05-05 19:45   ` Rodrigo Vivi
2023-05-11 10:14     ` Thomas Hellström
2023-05-02  0:20 ` [Intel-xe] ✗ CI.Patch_applied: failure for Upstreaming prep / all of mbrosts patches (rev2) Patchwork
2023-05-02  1:54   ` Christopher Snowhill (kode54)
2023-05-02  1:59   ` Christopher Snowhill (kode54)
2023-05-03 12:37 ` [Intel-xe] [PATCH v2 00/31] Upstreaming prep / all of mbrosts patches Thomas Hellström
2023-05-03 15:27   ` Matthew Brost

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