Re: [PATCH 06/11] drm/i915/dsb: Add support for GOSUB interrupt

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Apr 07, 2025 at 07:53:54PM +0530, Chaitanya Kumar Borah wrote:
> DSB raises an interrupt when there is a nested GOSUB command or
> illegal Head/Tail. Add support to log such errors in the DSB
> interrupt handler.
> 
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c      | 5 ++++-
>  drivers/gpu/drm/i915/display/intel_dsb_regs.h | 2 ++
>  2 files changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index bffa02a0442c..da58f1c821c3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -787,7 +787,7 @@ static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
>  
>  	intel_de_write_fw(display, DSB_INTERRUPT(pipe, dsb->id),
>  			  dsb_error_int_status(display) | DSB_PROG_INT_STATUS |
> -			  dsb_error_int_en(display) | DSB_PROG_INT_EN);
> +			  dsb_error_int_en(display) | DSB_PROG_INT_EN | DSB_GOSUB_INT_EN);

You need to add that to dsb_error_int_{en,status}(), with the
appropriate platform checks to avoid the interrupt handler getting
confused on platforms that don't have GOSUB.

>  
>  	intel_de_write_fw(display, DSB_HEAD(pipe, dsb->id),
>  			  intel_dsb_head(dsb));
> @@ -980,4 +980,7 @@ void intel_dsb_irq_handler(struct intel_display *display,
>  	if (errors & DSB_POLL_ERR_INT_STATUS)
>  		drm_err(display->drm, "[CRTC:%d:%s] DSB %d poll error\n",
>  			crtc->base.base.id, crtc->base.name, dsb_id);
> +	if (errors & DSB_GOSUB_INT_STATUS)
> +		drm_err(display->drm, "[CRTC:%d:%s] DSB %d gosub int error\n",

Maybe something like:
"... GOSUB programming error"

> +			crtc->base.base.id, crtc->base.name, dsb_id);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb_regs.h b/drivers/gpu/drm/i915/display/intel_dsb_regs.h
> index cb6e0e5624a6..230104f36145 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsb_regs.h
> @@ -51,11 +51,13 @@
>  #define   DSB_RESET_SM_STATE_MASK	REG_GENMASK(5, 4)
>  #define   DSB_RUN_SM_STATE_MASK		REG_GENMASK(2, 0)
>  #define DSB_INTERRUPT(pipe, id)		_MMIO(DSBSL_INSTANCE(pipe, id) + 0x28)
> +#define   DSB_GOSUB_INT_EN		REG_BIT(21) /* ptl+ */
>  #define   DSB_ATS_FAULT_INT_EN		REG_BIT(20) /* mtl+ */
>  #define   DSB_GTT_FAULT_INT_EN		REG_BIT(19)
>  #define   DSB_RSPTIMEOUT_INT_EN		REG_BIT(18)
>  #define   DSB_POLL_ERR_INT_EN		REG_BIT(17)
>  #define   DSB_PROG_INT_EN		REG_BIT(16)
> +#define   DSB_GOSUB_INT_STATUS		REG_BIT(5) /* ptl+ */
>  #define   DSB_ATS_FAULT_INT_STATUS	REG_BIT(4) /* mtl+ */
>  #define   DSB_GTT_FAULT_INT_STATUS	REG_BIT(3)
>  #define   DSB_RSPTIMEOUT_INT_STATUS	REG_BIT(2)
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel