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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	uma.shankar@intel.com, animesh.manna@intel.com
Subject: Re: [PATCH 09/11] drm/i915: Program DB LUT registers before vblank
Date: Mon, 7 Apr 2025 19:54:51 +0300	[thread overview]
Message-ID: <Z_QDW_v3PCCCStnP@intel.com> (raw)
In-Reply-To: <20250407142359.1398410-10-chaitanya.kumar.borah@intel.com>

On Mon, Apr 07, 2025 at 07:53:57PM +0530, Chaitanya Kumar Borah wrote:
> Double Buffered LUT registers can be programmed in the active region.
> This patch implements the MMIO path for it. Program the registers after
> evading vblank. The HW latches on to the registers after delayed vblank.
> It takes around 1024 cdclk cycles(~one scanline) for this.
> 
> Following assumptions have been made while making this change
> 
>  - Current vblank evasion time is sufficient for programming
>    the LUT registers.
>  - Current guardband calculation would be sufficient for the HW
>    to latch on to the new values
> 
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 85e28b4c9e66..df9c992d2939 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6725,10 +6725,12 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state,
>  static void intel_update_crtc(struct intel_atomic_state *state,
>  			      struct intel_crtc *crtc)
>  {
> +	struct intel_display *display = to_intel_display(crtc);
>  	const struct intel_crtc_state *old_crtc_state =
>  		intel_atomic_get_old_crtc_state(state, crtc);
>  	struct intel_crtc_state *new_crtc_state =
>  		intel_atomic_get_new_crtc_state(state, crtc);
> +	bool modeset = intel_crtc_needs_modeset(new_crtc_state);
>  
>  	if (new_crtc_state->use_dsb) {
>  		intel_crtc_prepare_vblank_event(new_crtc_state, &crtc->dsb_event);
> @@ -6738,6 +6740,12 @@ static void intel_update_crtc(struct intel_atomic_state *state,
>  		/* Perform vblank evasion around commit operation */
>  		intel_pipe_update_start(state, crtc);
>  
> +		if (!modeset &&
> +		    intel_crtc_needs_color_update(new_crtc_state) &&
> +		    !new_crtc_state->dsb_color &&
> +		    HAS_DOUBLE_BUFFERED_LUT(display))
> +			intel_color_load_luts(new_crtc_state);
> +

I think we want to do this in commit_pipe_post_planes() since
a vblank evasion failure for this is probably less drastic than
for plane programming.

>  		if (new_crtc_state->dsb_commit)
>  			intel_dsb_commit(new_crtc_state->dsb_commit, false);
>  
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2025-04-07 16:54 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-07 14:23 [PATCH 00/11] drm/xe/display: Program double buffered LUT registers Chaitanya Kumar Borah
2025-04-07 14:23 ` [PATCH 01/11] drm/i915/dsb: Extract intel_dsb_ins_align() Chaitanya Kumar Borah
2025-05-14  8:01   ` Shankar, Uma
2025-05-14 11:16   ` Jani Nikula
2025-05-14 11:58     ` Borah, Chaitanya Kumar
2025-04-07 14:23 ` [PATCH 02/11] drm/i915/dsb: Extract assert_dsb_tail_is_aligned() Chaitanya Kumar Borah
2025-04-07 14:23 ` [PATCH 03/11] drm/i915/dsb: Extract intel_dsb_{head,tail}() Chaitanya Kumar Borah
2025-04-07 14:23 ` [PATCH 04/11] drm/i915/dsb: Implement intel_dsb_gosub() Chaitanya Kumar Borah
2025-05-14  9:18   ` Shankar, Uma
2025-04-07 14:23 ` [PATCH 05/11] drm/i915/dsb: add intel_dsb_gosub_finish() Chaitanya Kumar Borah
2025-04-07 16:19   ` Ville Syrjälä
2025-04-07 14:23 ` [PATCH 06/11] drm/i915/dsb: Add support for GOSUB interrupt Chaitanya Kumar Borah
2025-04-07 16:30   ` Ville Syrjälä
2025-04-07 14:23 ` [PATCH 07/11] drm/i915: s/dsb_color_vblank/dsb_color Chaitanya Kumar Borah
2025-04-07 16:39   ` Ville Syrjälä
2025-04-07 14:23 ` [PATCH 08/11] drm/i915: use GOSUB to program doubled buffered LUT registers Chaitanya Kumar Borah
2025-04-07 16:51   ` Ville Syrjälä
2025-04-07 14:23 ` [PATCH 09/11] drm/i915: Program DB LUT registers before vblank Chaitanya Kumar Borah
2025-04-07 16:54   ` Ville Syrjälä [this message]
2025-04-07 14:23 ` [PATCH 10/11] drm/i915/color: Do not pre-load LUTs with DB registers Chaitanya Kumar Borah
2025-04-07 14:23 ` [PATCH 11/11] drm/i915: Disable updating of LUT values during vblank Chaitanya Kumar Borah
2025-04-07 14:49 ` ✓ CI.Patch_applied: success for drm/xe/display: Program double buffered LUT registers (rev5) Patchwork
2025-04-07 14:49 ` ✓ CI.checkpatch: " Patchwork
2025-04-07 14:50 ` ✓ CI.KUnit: " Patchwork
2025-04-07 14:54 ` ✗ CI.Build: failure " Patchwork

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