From: Matthew Brost <matthew.brost@intel.com>
To: Francois Dugast <francois.dugast@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <thomas.hellstrom@linux.intel.com>
Subject: Re: [RFC v1 8/9] drm/xe/hw_engine_group: Resume LR exec queues suspended by dma fence jobs
Date: Wed, 17 Jul 2024 23:03:35 +0000 [thread overview]
Message-ID: <ZphNx/r+mdO9QAB3@DUT025-TGLU.fm.intel.com> (raw)
In-Reply-To: <20240717130821.1073379-9-francois.dugast@intel.com>
On Wed, Jul 17, 2024 at 03:07:29PM +0200, Francois Dugast wrote:
> Submission of a dma fence job leads to suspending the long running exec
> queues of the hw engine group. Work is queued in the resume worker for
> this group and execution is resumed on the attached exec queues in long
> running mode.
>
> This is another entry point for execution on the hw engine group so the
> execution mode is updated.
>
> Signed-off-by: Francois Dugast <francois.dugast@intel.com>
> ---
> drivers/gpu/drm/xe/xe_hw_engine.c | 28 ++++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index e6c755a04fd8..dd8ef65cbf2d 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -431,6 +431,26 @@ hw_engine_setup_default_state(struct xe_hw_engine *hwe)
> xe_rtp_process_to_sr(&ctx, engine_entries, &hwe->reg_sr);
> }
>
> +static void hw_engine_group_resume_work_func(struct work_struct *w)
> +{
> + struct xe_exec_queue *q;
> + struct xe_hw_engine_group *group = container_of(w, struct xe_hw_engine_group, resume_work);
> + int err;
> +
> + err = xe_hw_engine_group_get_mode(group, EXEC_MODE_LR);
> + if (err)
> + return;
> +
I think techincally if we were previously in EXEC_MODE_LR the resume
loop can be skipped. It is harmless though to call resume twice though.
> + list_for_each_entry(q, &group->exec_queue_list, hw_engine_group_link) {
> + if (!xe_vm_in_lr_mode(q->vm))
> + continue;
> +
> + q->ops->resume(q);
> + }
> +
> + xe_hw_engine_group_put(group);
> +}
> +
> static struct xe_hw_engine_group *
> hw_engine_group_alloc(struct xe_device *xe)
> {
> @@ -438,6 +458,8 @@ hw_engine_group_alloc(struct xe_device *xe)
>
> group = kzalloc(sizeof(*group), GFP_KERNEL);
> init_rwsem(&group->mode_sem);
> + group->resume_wq = alloc_ordered_workqueue("xe-resume-lr-jobs-wq", 0);
I think just 1 non-ordered workqueue for all resumes should be fine. You
will also need to destroy this via drmm on driver unload.
> + INIT_WORK(&group->resume_work, hw_engine_group_resume_work_func);
> INIT_LIST_HEAD(&group->exec_queue_list);
>
> return group;
> @@ -1235,6 +1257,7 @@ static int xe_hw_engine_group_suspend_lr_jobs(struct xe_hw_engine_group *group)
> {
> int err;
> struct xe_exec_queue *q;
> + bool suspended_queue = false;
>
I think you call this function, it implied that at 1 exec queue is in LR
mode, right?
> lockdep_assert_held(&group->mode_sem);
>
> @@ -1247,8 +1270,13 @@ static int xe_hw_engine_group_suspend_lr_jobs(struct xe_hw_engine_group *group)
> return err;
>
> q->ops->suspend_wait(q);
> +
> + suspended_queue = true;
> }
>
> + if (suspended_queue)
With above, maybe xe_assert(suspended_queue);
Matt
> + queue_work(group->resume_wq, &group->resume_work);
> +
> return 0;
> }
>
> --
> 2.43.0
>
next prev parent reply other threads:[~2024-07-17 23:04 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-17 13:07 [RFC v1 0/9] Parallel submission of dma fence jobs and LR jobs with shared hardware resources Francois Dugast
2024-07-17 13:07 ` [RFC v1 1/9] drm/xe/hw_engine_group: Introduce xe_hw_engine_group Francois Dugast
2024-07-17 19:29 ` Matthew Brost
2024-07-22 7:40 ` Francois Dugast
2024-07-17 13:07 ` [RFC v1 2/9] drm/xe/exec_queue: Add list link for the hw engine group Francois Dugast
2024-07-17 19:31 ` Matthew Brost
2024-07-17 13:07 ` [RFC v1 3/9] drm/xe/hw_engine_group: Register hw engine group's exec queues Francois Dugast
2024-07-17 19:38 ` Matthew Brost
2024-07-17 19:42 ` Matthew Brost
2024-07-17 20:09 ` Matthew Brost
2024-07-22 8:17 ` Francois Dugast
2024-07-22 17:50 ` Matthew Brost
2024-08-13 12:24 ` Thomas Hellström
2024-08-15 14:55 ` Matthew Brost
2024-07-17 23:19 ` Matthew Brost
2024-07-22 8:31 ` Francois Dugast
2024-07-22 17:47 ` Matthew Brost
2024-07-17 13:07 ` [RFC v1 4/9] drm/xe/hw_engine_group: Add helper to suspend LR jobs Francois Dugast
2024-07-17 19:49 ` Matthew Brost
2024-07-17 23:09 ` Matthew Brost
2024-07-17 13:07 ` [RFC v1 5/9] drm/xe/hw_engine_group: Add helper to wait for dma fence jobs Francois Dugast
2024-07-17 20:18 ` Matthew Brost
2024-07-17 13:07 ` [RFC v1 6/9] drm/xe/hw_engine_group: Ensure safe transition between execution modes Francois Dugast
2024-07-17 22:54 ` Matthew Brost
2024-07-17 13:07 ` [RFC v1 7/9] drm/xe/exec: Switch hw engine group execution mode upon job submission Francois Dugast
2024-07-17 22:57 ` Matthew Brost
2024-07-18 2:09 ` Matthew Brost
2024-07-17 13:07 ` [RFC v1 8/9] drm/xe/hw_engine_group: Resume LR exec queues suspended by dma fence jobs Francois Dugast
2024-07-17 23:03 ` Matthew Brost [this message]
2024-07-17 13:07 ` [RFC v1 9/9] drm/xe/vm: Remove restriction that all VMs must be faulting if one is Francois Dugast
2024-07-17 23:05 ` Matthew Brost
2024-07-17 13:15 ` ✗ CI.Patch_applied: failure for Parallel submission of dma fence jobs and LR jobs with shared hardware resources Patchwork
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