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* [RFC 0/8] CMTG enablement
@ 2025-11-17 11:42 Animesh Manna
  2025-11-17 11:42 ` [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards Animesh Manna
                   ` (12 more replies)
  0 siblings, 13 replies; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Common mode timing generator (CMTG) support is added LNL onwards.
Enable CMTG which will be needed by other fearure like dynamic dc
state enablement later. 

Testing ongoing, sending in advance for early feedback.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (8):
  drm/i915/cmtg: enable cmtg LNL onwards
  drm/i915/cmtg: cmtg set clock select
  drm/i915/cmtg: set timings for cmtg
  drm/i915/cmtg: program vrr registers of cmtg
  drm/i915/cmtg: program set context latency of cmtg
  drm/i915/cmtg: set transcoder mn for cmtg
  drm/i915/cmtg: program sync to port for cmtg
  drm/i915/cmtg: enable cmtg ctl

 drivers/gpu/drm/i915/display/intel_cmtg.c     | 109 ++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_cmtg.h     |   3 +
 .../gpu/drm/i915/display/intel_cmtg_regs.h    |  27 +++++
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  |   8 +-
 drivers/gpu/drm/i915/display/intel_display.c  |   4 +
 .../drm/i915/display/intel_display_types.h    |   3 +
 drivers/gpu/drm/i915/display/intel_dp.c       |   5 +
 7 files changed, 157 insertions(+), 2 deletions(-)

-- 
2.29.0


^ permalink raw reply	[flat|nested] 21+ messages in thread

* [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 15:15   ` Jani Nikula
  2025-11-17 11:42 ` [RFC 2/8] drm/i915/cmtg: cmtg set clock select Animesh Manna
                   ` (11 subsequent siblings)
  12 siblings, 1 reply; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Introduce a flag for cmtg. LNL onwards CMTG support will be added.
Set the flag as per DISPLAY_VER() check.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
 drivers/gpu/drm/i915/display/intel_dp.c            | 5 +++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 38702a9e0f50..7b8343755c90 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1351,6 +1351,9 @@ struct intel_crtc_state {
 
 	struct drm_rect psr2_su_area;
 
+	/* CMTG Enable */
+	bool enable_cmtg;
+
 	/* Variable Refresh Rate state */
 	struct {
 		bool enable, in_range;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0ec82fcbcf48..3f7da4c08665 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3421,6 +3421,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
 	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
 
+	if(DISPLAY_VER(display) >= 15 && intel_dp_is_edp(intel_dp)) {
+		pipe_config->enable_cmtg = true;
+		drm_dbg_kms(display->drm,"ANI-DBG: intel_dp_compute_config\n");
+	}
+
 	return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
 							pipe_config);
 }
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [RFC 2/8] drm/i915/cmtg: cmtg set clock select
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
  2025-11-17 11:42 ` [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 15:17   ` Jani Nikula
  2025-11-17 11:42 ` [RFC 3/8] drm/i915/cmtg: set timings for cmtg Animesh Manna
                   ` (10 subsequent siblings)
  12 siblings, 1 reply; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Program CMTG Clk Select.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c     | 22 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_cmtg.h     |  2 ++
 .../gpu/drm/i915/display/intel_cmtg_regs.h    |  2 ++
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  |  8 +++++--
 4 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 165138b95cb2..4640cafe8dde 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -16,6 +16,7 @@
 #include "intel_display_device.h"
 #include "intel_display_power.h"
 #include "intel_display_regs.h"
+#include "intel_display_types.h"
 
 /**
  * DOC: Common Primary Timing Generator (CMTG)
@@ -186,3 +187,24 @@ void intel_cmtg_sanitize(struct intel_display *display)
 
 	intel_cmtg_disable(display, &cmtg_config);
 }
+
+void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	u32 clk_sel_clr = 0;
+	u32 clk_sel_set = 0;
+
+	if (cpu_transcoder == TRANSCODER_A) {
+		clk_sel_clr = CMTG_CLK_SEL_A_MASK;
+		clk_sel_set = CMTG_CLK_SELECT_PHYA_ENABLE;
+	}
+
+	if (cpu_transcoder == TRANSCODER_B) {
+		clk_sel_clr = CMTG_CLK_SEL_A_MASK;
+		clk_sel_set = CMTG_CLK_SELECT_PHYB_ENABLE;
+	}
+
+	if (clk_sel_set)
+		intel_de_rmw(display, CMTG_CLK_SEL, clk_sel_clr, clk_sel_set);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.h b/drivers/gpu/drm/i915/display/intel_cmtg.h
index ba62199adaa2..bef2426b2787 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.h
@@ -7,7 +7,9 @@
 #define __INTEL_CMTG_H__
 
 struct intel_display;
+struct intel_crtc_state;
 
+void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state);
 void intel_cmtg_sanitize(struct intel_display *display);
 
 #endif /* __INTEL_CMTG_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 945a35578284..9fd54f7e9d1f 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -10,8 +10,10 @@
 
 #define CMTG_CLK_SEL			_MMIO(0x46160)
 #define CMTG_CLK_SEL_A_MASK		REG_GENMASK(31, 29)
+#define CMTG_CLK_SELECT_PHYA_ENABLE	0x4
 #define CMTG_CLK_SEL_A_DISABLED		REG_FIELD_PREP(CMTG_CLK_SEL_A_MASK, 0)
 #define CMTG_CLK_SEL_B_MASK		REG_GENMASK(15, 13)
+#define CMTG_CLK_SELECT_PHYB_ENABLE	0x6
 #define CMTG_CLK_SEL_B_DISABLED		REG_FIELD_PREP(CMTG_CLK_SEL_B_MASK, 0)
 
 #define TRANS_CMTG_CTL_A		_MMIO(0x6fa88)
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index d98b4cf6b60e..32969985d6f7 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -9,6 +9,7 @@
 #include <drm/drm_print.h>
 
 #include "intel_alpm.h"
+#include "intel_cmtg.h"
 #include "intel_cx0_phy.h"
 #include "intel_cx0_phy_regs.h"
 #include "intel_ddi.h"
@@ -3209,10 +3210,13 @@ void intel_mtl_pll_enable(struct intel_encoder *encoder,
 {
 	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
 
-	if (intel_tc_port_in_tbt_alt_mode(dig_port))
+	if (intel_tc_port_in_tbt_alt_mode(dig_port)) {
 		intel_mtl_tbt_pll_enable(encoder, crtc_state);
-	else
+	} else {
 		intel_cx0pll_enable(encoder, crtc_state);
+		if (crtc_state->enable_cmtg)
+			intel_cmtg_set_clk_select(crtc_state);
+	}
 }
 
 /*
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [RFC 3/8] drm/i915/cmtg: set timings for cmtg
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
  2025-11-17 11:42 ` [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards Animesh Manna
  2025-11-17 11:42 ` [RFC 2/8] drm/i915/cmtg: cmtg set clock select Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 15:13   ` Jani Nikula
  2025-11-17 11:42 ` [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg Animesh Manna
                   ` (9 subsequent siblings)
  12 siblings, 1 reply; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Timing registers are separate for CMTG, read transcoder register
and program cmtg transcoder with those values.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c     | 31 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_cmtg.h     |  1 +
 .../gpu/drm/i915/display/intel_cmtg_regs.h    | 13 ++++++++
 drivers/gpu/drm/i915/display/intel_display.c  |  4 +++
 4 files changed, 49 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 4640cafe8dde..5e9aaa50b38f 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -208,3 +208,34 @@ void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state)
 	if (clk_sel_set)
 		intel_de_rmw(display, CMTG_CLK_SEL, clk_sel_clr, clk_sel_set);
 }
+
+static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+	intel_de_write(display, TRANS_HTOTAL_CMTG(cpu_transcoder),
+		       intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder)));
+	intel_de_write(display, TRANS_HBLANK_CMTG(cpu_transcoder),
+		       intel_de_read(display, TRANS_HBLANK(display, cpu_transcoder)));
+	intel_de_write(display, TRANS_HSYNC_CMTG(cpu_transcoder),
+		       intel_de_read(display, TRANS_HSYNC(display, cpu_transcoder)));
+	intel_de_write(display, TRANS_VTOTAL_CMTG(cpu_transcoder),
+		       intel_de_read(display, TRANS_VTOTAL(display, cpu_transcoder)));
+	intel_de_write(display, TRANS_VBLANK_CMTG(cpu_transcoder),
+		       intel_de_read(display, TRANS_VBLANK(display, cpu_transcoder)));
+	intel_de_write(display, TRANS_VSYNC_CMTG(cpu_transcoder),
+		       intel_de_read(display, TRANS_VSYNC(display, cpu_transcoder)));
+}
+
+void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
+{
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+
+	if (cpu_transcoder != TRANSCODER_A && cpu_transcoder != TRANSCODER_B)
+		return;
+
+	/* Program CMTG Transcoder Timings */
+	intel_cmtg_set_timings(crtc_state);
+
+}
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.h b/drivers/gpu/drm/i915/display/intel_cmtg.h
index bef2426b2787..113042e5d3a8 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.h
@@ -11,5 +11,6 @@ struct intel_crtc_state;
 
 void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state);
 void intel_cmtg_sanitize(struct intel_display *display);
+void intel_cmtg_enable(const struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_CMTG_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 9fd54f7e9d1f..47403bbcac7d 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -8,6 +8,12 @@
 
 #include "intel_display_reg_defs.h"
 
+enum cmtg {
+	CMTG_A = 0,
+	CMTG_B,
+	MAX_CMTG
+};
+
 #define CMTG_CLK_SEL			_MMIO(0x46160)
 #define CMTG_CLK_SEL_A_MASK		REG_GENMASK(31, 29)
 #define CMTG_CLK_SELECT_PHYA_ENABLE	0x4
@@ -20,4 +26,11 @@
 #define TRANS_CMTG_CTL_B		_MMIO(0x6fb88)
 #define  CMTG_ENABLE			REG_BIT(31)
 
+#define TRANS_HTOTAL_CMTG(id)		_MMIO(0x6F000 + (id) * 0x100)
+#define TRANS_HBLANK_CMTG(id)		_MMIO(0x6F004 + (id) * 0x100)
+#define TRANS_HSYNC_CMTG(id)		_MMIO(0x6F008 + (id) * 0x100)
+#define TRANS_VTOTAL_CMTG(id)		_MMIO(0x6F00C + (id) * 0x100)
+#define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) * 0x100)
+#define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) * 0x100)
+
 #endif /* __INTEL_CMTG_REGS_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 069967114bd9..19242c12f52a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -63,6 +63,7 @@
 #include "intel_casf.h"
 #include "intel_cdclk.h"
 #include "intel_clock_gating.h"
+#include "intel_cmtg.h"
 #include "intel_color.h"
 #include "intel_crt.h"
 #include "intel_crtc.h"
@@ -1669,6 +1670,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
 	if (!transcoder_is_dsi(cpu_transcoder))
 		hsw_configure_cpu_transcoder(new_crtc_state);
 
+	if (new_crtc_state->enable_cmtg)
+		intel_cmtg_enable(new_crtc_state);
+
 	for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
 		const struct intel_crtc_state *pipe_crtc_state =
 			intel_atomic_get_new_crtc_state(state, pipe_crtc);
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (2 preceding siblings ...)
  2025-11-17 11:42 ` [RFC 3/8] drm/i915/cmtg: set timings for cmtg Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 15:09   ` Jani Nikula
  2025-11-17 11:42 ` [RFC 5/8] drm/i915/cmtg: program set context latency " Animesh Manna
                   ` (8 subsequent siblings)
  12 siblings, 1 reply; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Enable vrr if it is enabled on cmtg registers.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c     | 19 +++++++++++++++++++
 .../gpu/drm/i915/display/intel_cmtg_regs.h    |  5 +++++
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 5e9aaa50b38f..3dfb691913cb 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -17,6 +17,7 @@
 #include "intel_display_power.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
+#include "intel_vrr_regs.h"
 
 /**
  * DOC: Common Primary Timing Generator (CMTG)
@@ -213,6 +214,7 @@ static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	u32 vctl;
 
 	intel_de_write(display, TRANS_HTOTAL_CMTG(cpu_transcoder),
 		       intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder)));
@@ -226,6 +228,23 @@ static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
 		       intel_de_read(display, TRANS_VBLANK(display, cpu_transcoder)));
 	intel_de_write(display, TRANS_VSYNC_CMTG(cpu_transcoder),
 		       intel_de_read(display, TRANS_VSYNC(display, cpu_transcoder)));
+
+	vctl = intel_de_read(display, TRANS_VRR_CTL(display, cpu_transcoder));
+	if (vctl & VRR_CTL_VRR_ENABLE) {
+		u32 vmax, flipline, vmin;
+
+		vmax = intel_de_read(display, TRANS_VRR_VMAX(display, cpu_transcoder));
+		flipline = intel_de_read(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder));
+		if (vmax != flipline)
+			return;
+
+		vmin = intel_de_read(display, TRANS_VRR_VMIN(display, cpu_transcoder));
+
+		intel_de_write(display, TRANS_VRR_VMAX_CMTG(cpu_transcoder), vmax);
+		intel_de_write(display, TRANS_VRR_VMIN_CMTG(cpu_transcoder), vmin);
+		intel_de_write(display, TRANS_VRR_FLIPLINE_CMTG(cpu_transcoder), flipline);
+		intel_de_write(display, TRANS_VRR_CTL_CMTG(cpu_transcoder), vctl);
+	}
 }
 
 void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 47403bbcac7d..37dee7165852 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -33,4 +33,9 @@ enum cmtg {
 #define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) * 0x100)
 #define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) * 0x100)
 
+#define TRANS_VRR_CTL_CMTG(id)		_MMIO(0x6F420 + (id) * 0x100)
+#define TRANS_VRR_VMAX_CMTG(id)		_MMIO(0x6F424 + (id) * 0x100)
+#define TRANS_VRR_VMIN_CMTG(id)		_MMIO(0x6F434 + (id) * 0x100)
+#define TRANS_VRR_FLIPLINE_CMTG(id)	_MMIO(0x6F438 + (id) * 0x100)
+
 #endif /* __INTEL_CMTG_REGS_H__ */
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [RFC 5/8] drm/i915/cmtg: program set context latency of cmtg
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (3 preceding siblings ...)
  2025-11-17 11:42 ` [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 11:42 ` [RFC 6/8] drm/i915/cmtg: set transcoder mn for cmtg Animesh Manna
                   ` (7 subsequent siblings)
  12 siblings, 0 replies; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Program context latency for delayed vblank timings to create window2.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c      | 4 ++++
 drivers/gpu/drm/i915/display/intel_cmtg_regs.h | 2 ++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 3dfb691913cb..6086ba4d764f 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -249,6 +249,7 @@ static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
 
 void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
 {
+	struct intel_display *display = to_intel_display(crtc_state);
 	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
 
 	if (cpu_transcoder != TRANSCODER_A && cpu_transcoder != TRANSCODER_B)
@@ -257,4 +258,7 @@ void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
 	/* Program CMTG Transcoder Timings */
 	intel_cmtg_set_timings(crtc_state);
 
+	/* Program context latency */
+	intel_de_write(display, TRANS_SET_CTX_LATENCY_CMTG(cpu_transcoder),
+		       intel_de_read(display, TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder)));
 }
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 37dee7165852..406b5eb385a5 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -33,6 +33,8 @@ enum cmtg {
 #define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) * 0x100)
 #define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) * 0x100)
 
+#define TRANS_SET_CTX_LATENCY_CMTG(id)	_MMIO(0x6F07C + (id) * 0x100)
+
 #define TRANS_VRR_CTL_CMTG(id)		_MMIO(0x6F420 + (id) * 0x100)
 #define TRANS_VRR_VMAX_CMTG(id)		_MMIO(0x6F424 + (id) * 0x100)
 #define TRANS_VRR_VMIN_CMTG(id)		_MMIO(0x6F434 + (id) * 0x100)
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [RFC 6/8] drm/i915/cmtg: set transcoder mn for cmtg
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (4 preceding siblings ...)
  2025-11-17 11:42 ` [RFC 5/8] drm/i915/cmtg: program set context latency " Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 11:42 ` [RFC 7/8] drm/i915/cmtg: program sync to port " Animesh Manna
                   ` (6 subsequent siblings)
  12 siblings, 0 replies; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Program CMTG link M/N.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c      | 13 +++++++++++++
 drivers/gpu/drm/i915/display/intel_cmtg_regs.h |  3 +++
 2 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 6086ba4d764f..0a804554f16d 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -247,6 +247,16 @@ static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
 	}
 }
 
+static void intel_cpu_cmtg_transcoder_set_m_n(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	const struct intel_link_m_n *m_n = &crtc_state->dp_m_n;
+
+	intel_de_write(display, TRANS_LINKM1_CMTG(cpu_transcoder), m_n->link_m);
+	intel_de_write(display, TRANS_LINKN1_CMTG(cpu_transcoder), m_n->link_n);
+}
+
 void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
@@ -261,4 +271,7 @@ void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
 	/* Program context latency */
 	intel_de_write(display, TRANS_SET_CTX_LATENCY_CMTG(cpu_transcoder),
 		       intel_de_read(display, TRANS_SET_CONTEXT_LATENCY(display, cpu_transcoder)));
+
+	/* Program CMTG MN */
+	intel_cpu_cmtg_transcoder_set_m_n(crtc_state);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 406b5eb385a5..1bbdb66ee587 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -33,6 +33,9 @@ enum cmtg {
 #define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) * 0x100)
 #define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) * 0x100)
 
+#define TRANS_LINKM1_CMTG(id)		_MMIO(0x6F040 + (id) * 0x100)
+#define TRANS_LINKN1_CMTG(id)		_MMIO(0x6F044 + (id) * 0x100)
+
 #define TRANS_SET_CTX_LATENCY_CMTG(id)	_MMIO(0x6F07C + (id) * 0x100)
 
 #define TRANS_VRR_CTL_CMTG(id)		_MMIO(0x6F420 + (id) * 0x100)
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [RFC 7/8] drm/i915/cmtg: program sync to port for cmtg
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (5 preceding siblings ...)
  2025-11-17 11:42 ` [RFC 6/8] drm/i915/cmtg: set transcoder mn for cmtg Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 11:42 ` [RFC 8/8] drm/i915/cmtg: enable cmtg ctl Animesh Manna
                   ` (5 subsequent siblings)
  12 siblings, 0 replies; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Program Cmtg Sync to Port Sync. Set before enabling the timing generator.
While cmtg start running this bit will be cleared.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c      | 3 +++
 drivers/gpu/drm/i915/display/intel_cmtg_regs.h | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index 0a804554f16d..d5793842815f 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -274,4 +274,7 @@ void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
 
 	/* Program CMTG MN */
 	intel_cpu_cmtg_transcoder_set_m_n(crtc_state);
+
+	/* Program Cmtg Sync to Port Sync, TRANS_CMTG_CTL */
+	intel_de_rmw(display, TRANS_CMTG_CTL(cpu_transcoder), CMTG_SYNC_TO_PORT, CMTG_SYNC_TO_PORT);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
index 1bbdb66ee587..aace1490a741 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
@@ -24,7 +24,9 @@ enum cmtg {
 
 #define TRANS_CMTG_CTL_A		_MMIO(0x6fa88)
 #define TRANS_CMTG_CTL_B		_MMIO(0x6fb88)
+#define TRANS_CMTG_CTL(id)		_MMIO(0x6fa88 + (id) * 0x100)
 #define  CMTG_ENABLE			REG_BIT(31)
+#define  CMTG_SYNC_TO_PORT		REG_BIT(29)
 
 #define TRANS_HTOTAL_CMTG(id)		_MMIO(0x6F000 + (id) * 0x100)
 #define TRANS_HBLANK_CMTG(id)		_MMIO(0x6F004 + (id) * 0x100)
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* [RFC 8/8] drm/i915/cmtg: enable cmtg ctl
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (6 preceding siblings ...)
  2025-11-17 11:42 ` [RFC 7/8] drm/i915/cmtg: program sync to port " Animesh Manna
@ 2025-11-17 11:42 ` Animesh Manna
  2025-11-17 12:15 ` ✗ CI.checkpatch: warning for CMTG enablement Patchwork
                   ` (4 subsequent siblings)
  12 siblings, 0 replies; 21+ messages in thread
From: Animesh Manna @ 2025-11-17 11:42 UTC (permalink / raw)
  To: intel-gfx, intel-xe; +Cc: Animesh Manna

Enable CMTG through control register.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cmtg.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
index d5793842815f..fb2ce22d136b 100644
--- a/drivers/gpu/drm/i915/display/intel_cmtg.c
+++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
@@ -257,6 +257,20 @@ static void intel_cpu_cmtg_transcoder_set_m_n(const struct intel_crtc_state *crt
 	intel_de_write(display, TRANS_LINKN1_CMTG(cpu_transcoder), m_n->link_n);
 }
 
+static void intel_cmtg_ctl_enable(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+	u32 val = 0;
+
+	val = intel_de_read(display, TRANS_CMTG_CTL(cpu_transcoder));
+
+	val |= CMTG_ENABLE;
+
+	intel_de_write(display, TRANS_CMTG_CTL(cpu_transcoder), val);
+	drm_dbg_kms(display->drm, "CMTG enabled\n");
+}
+
 void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_display *display = to_intel_display(crtc_state);
@@ -277,4 +291,7 @@ void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
 
 	/* Program Cmtg Sync to Port Sync, TRANS_CMTG_CTL */
 	intel_de_rmw(display, TRANS_CMTG_CTL(cpu_transcoder), CMTG_SYNC_TO_PORT, CMTG_SYNC_TO_PORT);
+
+	/* Program Enable Cmtg */
+	intel_cmtg_ctl_enable(crtc_state);
 }
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 21+ messages in thread

* ✗ CI.checkpatch: warning for CMTG enablement
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (7 preceding siblings ...)
  2025-11-17 11:42 ` [RFC 8/8] drm/i915/cmtg: enable cmtg ctl Animesh Manna
@ 2025-11-17 12:15 ` Patchwork
  2025-11-17 12:16 ` ✓ CI.KUnit: success " Patchwork
                   ` (3 subsequent siblings)
  12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-17 12:15 UTC (permalink / raw)
  To: Animesh Manna; +Cc: intel-xe

== Series Details ==

Series: CMTG enablement
URL   : https://patchwork.freedesktop.org/series/157663/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
2de9a3901bc28757c7906b454717b64e2a214021
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit d4e4ac3bc97a0be5e88eb7a0300c4d40906a5e2a
Author: Animesh Manna <animesh.manna@intel.com>
Date:   Mon Nov 17 17:12:16 2025 +0530

    drm/i915/cmtg: enable cmtg ctl
    
    Enable CMTG through control register.
    
    Signed-off-by: Animesh Manna <animesh.manna@intel.com>
+ /mt/dim checkpatch b2e41c70a5eeddce427dc6df02508b6856eb4a11 drm-intel
f651c06793f9 drm/i915/cmtg: enable cmtg LNL onwards
-:33: ERROR:SPACING: space required before the open parenthesis '('
#33: FILE: drivers/gpu/drm/i915/display/intel_dp.c:3424:
+	if(DISPLAY_VER(display) >= 15 && intel_dp_is_edp(intel_dp)) {

-:35: ERROR:SPACING: space required after that ',' (ctx:VxV)
#35: FILE: drivers/gpu/drm/i915/display/intel_dp.c:3426:
+		drm_dbg_kms(display->drm,"ANI-DBG: intel_dp_compute_config\n");
 		                        ^

-:35: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to using 'intel_dp_compute_config', this function's name, in a string
#35: FILE: drivers/gpu/drm/i915/display/intel_dp.c:3426:
+		drm_dbg_kms(display->drm,"ANI-DBG: intel_dp_compute_config\n");

total: 2 errors, 1 warnings, 0 checks, 20 lines checked
bb64cd8ac65e drm/i915/cmtg: cmtg set clock select
d669f168cd16 drm/i915/cmtg: set timings for cmtg
-:49: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#49: FILE: drivers/gpu/drm/i915/display/intel_cmtg.c:241:
+
+}

total: 0 errors, 0 warnings, 1 checks, 79 lines checked
7353a6524f32 drm/i915/cmtg: program vrr registers of cmtg
ac089b3b7603 drm/i915/cmtg: program set context latency of cmtg
31c15d66c27b drm/i915/cmtg: set transcoder mn for cmtg
5e806bbb973a drm/i915/cmtg: program sync to port for cmtg
d4e4ac3bc97a drm/i915/cmtg: enable cmtg ctl



^ permalink raw reply	[flat|nested] 21+ messages in thread

* ✓ CI.KUnit: success for CMTG enablement
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (8 preceding siblings ...)
  2025-11-17 12:15 ` ✗ CI.checkpatch: warning for CMTG enablement Patchwork
@ 2025-11-17 12:16 ` Patchwork
  2025-11-17 12:31 ` ✗ CI.checksparse: warning " Patchwork
                   ` (2 subsequent siblings)
  12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-17 12:16 UTC (permalink / raw)
  To: Animesh Manna; +Cc: intel-xe

== Series Details ==

Series: CMTG enablement
URL   : https://patchwork.freedesktop.org/series/157663/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:15:22] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:15:27] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:15:57] Starting KUnit Kernel (1/1)...
[12:15:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:15:57] ================== guc_buf (11 subtests) ===================
[12:15:57] [PASSED] test_smallest
[12:15:57] [PASSED] test_largest
[12:15:57] [PASSED] test_granular
[12:15:57] [PASSED] test_unique
[12:15:57] [PASSED] test_overlap
[12:15:57] [PASSED] test_reusable
[12:15:57] [PASSED] test_too_big
[12:15:57] [PASSED] test_flush
[12:15:57] [PASSED] test_lookup
[12:15:57] [PASSED] test_data
[12:15:57] [PASSED] test_class
[12:15:57] ===================== [PASSED] guc_buf =====================
[12:15:57] =================== guc_dbm (7 subtests) ===================
[12:15:57] [PASSED] test_empty
[12:15:57] [PASSED] test_default
[12:15:57] ======================== test_size  ========================
[12:15:57] [PASSED] 4
[12:15:57] [PASSED] 8
[12:15:57] [PASSED] 32
[12:15:57] [PASSED] 256
[12:15:57] ==================== [PASSED] test_size ====================
[12:15:57] ======================= test_reuse  ========================
[12:15:57] [PASSED] 4
[12:15:57] [PASSED] 8
[12:15:57] [PASSED] 32
[12:15:57] [PASSED] 256
[12:15:57] =================== [PASSED] test_reuse ====================
[12:15:57] =================== test_range_overlap  ====================
[12:15:57] [PASSED] 4
[12:15:57] [PASSED] 8
[12:15:57] [PASSED] 32
[12:15:57] [PASSED] 256
[12:15:57] =============== [PASSED] test_range_overlap ================
[12:15:57] =================== test_range_compact  ====================
[12:15:57] [PASSED] 4
[12:15:57] [PASSED] 8
[12:15:57] [PASSED] 32
[12:15:57] [PASSED] 256
[12:15:57] =============== [PASSED] test_range_compact ================
[12:15:57] ==================== test_range_spare  =====================
[12:15:57] [PASSED] 4
[12:15:57] [PASSED] 8
[12:15:57] [PASSED] 32
[12:15:57] [PASSED] 256
[12:15:57] ================ [PASSED] test_range_spare =================
[12:15:57] ===================== [PASSED] guc_dbm =====================
[12:15:57] =================== guc_idm (6 subtests) ===================
[12:15:57] [PASSED] bad_init
[12:15:57] [PASSED] no_init
[12:15:57] [PASSED] init_fini
[12:15:57] [PASSED] check_used
[12:15:57] [PASSED] check_quota
[12:15:57] [PASSED] check_all
[12:15:57] ===================== [PASSED] guc_idm =====================
[12:15:57] ================== no_relay (3 subtests) ===================
[12:15:57] [PASSED] xe_drops_guc2pf_if_not_ready
[12:15:57] [PASSED] xe_drops_guc2vf_if_not_ready
[12:15:57] [PASSED] xe_rejects_send_if_not_ready
[12:15:57] ==================== [PASSED] no_relay =====================
[12:15:57] ================== pf_relay (14 subtests) ==================
[12:15:57] [PASSED] pf_rejects_guc2pf_too_short
[12:15:57] [PASSED] pf_rejects_guc2pf_too_long
[12:15:57] [PASSED] pf_rejects_guc2pf_no_payload
[12:15:57] [PASSED] pf_fails_no_payload
[12:15:57] [PASSED] pf_fails_bad_origin
[12:15:57] [PASSED] pf_fails_bad_type
[12:15:57] [PASSED] pf_txn_reports_error
[12:15:57] [PASSED] pf_txn_sends_pf2guc
[12:15:57] [PASSED] pf_sends_pf2guc
[12:15:57] [SKIPPED] pf_loopback_nop
[12:15:57] [SKIPPED] pf_loopback_echo
[12:15:57] [SKIPPED] pf_loopback_fail
[12:15:57] [SKIPPED] pf_loopback_busy
[12:15:57] [SKIPPED] pf_loopback_retry
[12:15:57] ==================== [PASSED] pf_relay =====================
[12:15:57] ================== vf_relay (3 subtests) ===================
[12:15:57] [PASSED] vf_rejects_guc2vf_too_short
[12:15:57] [PASSED] vf_rejects_guc2vf_too_long
[12:15:57] [PASSED] vf_rejects_guc2vf_no_payload
[12:15:57] ==================== [PASSED] vf_relay =====================
[12:15:57] ================ pf_gt_config (6 subtests) =================
[12:15:57] [PASSED] fair_contexts_1vf
[12:15:57] [PASSED] fair_doorbells_1vf
[12:15:57] [PASSED] fair_ggtt_1vf
[12:15:57] ====================== fair_contexts  ======================
[12:15:57] [PASSED] 1 VF
[12:15:57] [PASSED] 2 VFs
[12:15:57] [PASSED] 3 VFs
[12:15:57] [PASSED] 4 VFs
[12:15:57] [PASSED] 5 VFs
[12:15:57] [PASSED] 6 VFs
[12:15:57] [PASSED] 7 VFs
[12:15:57] [PASSED] 8 VFs
[12:15:57] [PASSED] 9 VFs
[12:15:57] [PASSED] 10 VFs
[12:15:57] [PASSED] 11 VFs
[12:15:57] [PASSED] 12 VFs
[12:15:57] [PASSED] 13 VFs
[12:15:57] [PASSED] 14 VFs
[12:15:57] [PASSED] 15 VFs
[12:15:57] [PASSED] 16 VFs
[12:15:57] [PASSED] 17 VFs
[12:15:57] [PASSED] 18 VFs
[12:15:57] [PASSED] 19 VFs
[12:15:57] [PASSED] 20 VFs
[12:15:57] [PASSED] 21 VFs
[12:15:57] [PASSED] 22 VFs
[12:15:57] [PASSED] 23 VFs
[12:15:57] [PASSED] 24 VFs
[12:15:57] [PASSED] 25 VFs
[12:15:57] [PASSED] 26 VFs
[12:15:57] [PASSED] 27 VFs
[12:15:57] [PASSED] 28 VFs
[12:15:57] [PASSED] 29 VFs
[12:15:57] [PASSED] 30 VFs
[12:15:57] [PASSED] 31 VFs
[12:15:57] [PASSED] 32 VFs
[12:15:57] [PASSED] 33 VFs
[12:15:57] [PASSED] 34 VFs
[12:15:57] [PASSED] 35 VFs
[12:15:57] [PASSED] 36 VFs
[12:15:57] [PASSED] 37 VFs
[12:15:57] [PASSED] 38 VFs
[12:15:57] [PASSED] 39 VFs
[12:15:57] [PASSED] 40 VFs
[12:15:57] [PASSED] 41 VFs
[12:15:57] [PASSED] 42 VFs
[12:15:57] [PASSED] 43 VFs
[12:15:57] [PASSED] 44 VFs
[12:15:57] [PASSED] 45 VFs
[12:15:57] [PASSED] 46 VFs
[12:15:57] [PASSED] 47 VFs
[12:15:57] [PASSED] 48 VFs
[12:15:57] [PASSED] 49 VFs
[12:15:57] [PASSED] 50 VFs
[12:15:57] [PASSED] 51 VFs
[12:15:57] [PASSED] 52 VFs
[12:15:57] [PASSED] 53 VFs
[12:15:57] [PASSED] 54 VFs
[12:15:57] [PASSED] 55 VFs
[12:15:57] [PASSED] 56 VFs
[12:15:57] [PASSED] 57 VFs
[12:15:57] [PASSED] 58 VFs
[12:15:57] [PASSED] 59 VFs
[12:15:57] [PASSED] 60 VFs
[12:15:57] [PASSED] 61 VFs
[12:15:57] [PASSED] 62 VFs
[12:15:57] [PASSED] 63 VFs
[12:15:57] ================== [PASSED] fair_contexts ==================
[12:15:57] ===================== fair_doorbells  ======================
[12:15:57] [PASSED] 1 VF
[12:15:57] [PASSED] 2 VFs
[12:15:57] [PASSED] 3 VFs
[12:15:57] [PASSED] 4 VFs
[12:15:57] [PASSED] 5 VFs
[12:15:57] [PASSED] 6 VFs
[12:15:57] [PASSED] 7 VFs
[12:15:57] [PASSED] 8 VFs
[12:15:57] [PASSED] 9 VFs
[12:15:57] [PASSED] 10 VFs
[12:15:57] [PASSED] 11 VFs
[12:15:57] [PASSED] 12 VFs
[12:15:57] [PASSED] 13 VFs
[12:15:57] [PASSED] 14 VFs
[12:15:57] [PASSED] 15 VFs
[12:15:57] [PASSED] 16 VFs
[12:15:57] [PASSED] 17 VFs
[12:15:57] [PASSED] 18 VFs
[12:15:57] [PASSED] 19 VFs
[12:15:57] [PASSED] 20 VFs
[12:15:57] [PASSED] 21 VFs
[12:15:58] [PASSED] 22 VFs
[12:15:58] [PASSED] 23 VFs
[12:15:58] [PASSED] 24 VFs
[12:15:58] [PASSED] 25 VFs
[12:15:58] [PASSED] 26 VFs
[12:15:58] [PASSED] 27 VFs
[12:15:58] [PASSED] 28 VFs
[12:15:58] [PASSED] 29 VFs
[12:15:58] [PASSED] 30 VFs
[12:15:58] [PASSED] 31 VFs
[12:15:58] [PASSED] 32 VFs
[12:15:58] [PASSED] 33 VFs
[12:15:58] [PASSED] 34 VFs
[12:15:58] [PASSED] 35 VFs
[12:15:58] [PASSED] 36 VFs
[12:15:58] [PASSED] 37 VFs
[12:15:58] [PASSED] 38 VFs
[12:15:58] [PASSED] 39 VFs
[12:15:58] [PASSED] 40 VFs
[12:15:58] [PASSED] 41 VFs
[12:15:58] [PASSED] 42 VFs
[12:15:58] [PASSED] 43 VFs
[12:15:58] [PASSED] 44 VFs
[12:15:58] [PASSED] 45 VFs
[12:15:58] [PASSED] 46 VFs
[12:15:58] [PASSED] 47 VFs
[12:15:58] [PASSED] 48 VFs
[12:15:58] [PASSED] 49 VFs
[12:15:58] [PASSED] 50 VFs
[12:15:58] [PASSED] 51 VFs
[12:15:58] [PASSED] 52 VFs
[12:15:58] [PASSED] 53 VFs
[12:15:58] [PASSED] 54 VFs
[12:15:58] [PASSED] 55 VFs
[12:15:58] [PASSED] 56 VFs
[12:15:58] [PASSED] 57 VFs
[12:15:58] [PASSED] 58 VFs
[12:15:58] [PASSED] 59 VFs
[12:15:58] [PASSED] 60 VFs
[12:15:58] [PASSED] 61 VFs
[12:15:58] [PASSED] 62 VFs
[12:15:58] [PASSED] 63 VFs
[12:15:58] ================= [PASSED] fair_doorbells ==================
[12:15:58] ======================== fair_ggtt  ========================
[12:15:58] [PASSED] 1 VF
[12:15:58] [PASSED] 2 VFs
[12:15:58] [PASSED] 3 VFs
[12:15:58] [PASSED] 4 VFs
[12:15:58] [PASSED] 5 VFs
[12:15:58] [PASSED] 6 VFs
[12:15:58] [PASSED] 7 VFs
[12:15:58] [PASSED] 8 VFs
[12:15:58] [PASSED] 9 VFs
[12:15:58] [PASSED] 10 VFs
[12:15:58] [PASSED] 11 VFs
[12:15:58] [PASSED] 12 VFs
[12:15:58] [PASSED] 13 VFs
[12:15:58] [PASSED] 14 VFs
[12:15:58] [PASSED] 15 VFs
[12:15:58] [PASSED] 16 VFs
[12:15:58] [PASSED] 17 VFs
[12:15:58] [PASSED] 18 VFs
[12:15:58] [PASSED] 19 VFs
[12:15:58] [PASSED] 20 VFs
[12:15:58] [PASSED] 21 VFs
[12:15:58] [PASSED] 22 VFs
[12:15:58] [PASSED] 23 VFs
[12:15:58] [PASSED] 24 VFs
[12:15:58] [PASSED] 25 VFs
[12:15:58] [PASSED] 26 VFs
[12:15:58] [PASSED] 27 VFs
[12:15:58] [PASSED] 28 VFs
[12:15:58] [PASSED] 29 VFs
[12:15:58] [PASSED] 30 VFs
[12:15:58] [PASSED] 31 VFs
[12:15:58] [PASSED] 32 VFs
[12:15:58] [PASSED] 33 VFs
[12:15:58] [PASSED] 34 VFs
[12:15:58] [PASSED] 35 VFs
[12:15:58] [PASSED] 36 VFs
[12:15:58] [PASSED] 37 VFs
[12:15:58] [PASSED] 38 VFs
[12:15:58] [PASSED] 39 VFs
[12:15:58] [PASSED] 40 VFs
[12:15:58] [PASSED] 41 VFs
[12:15:58] [PASSED] 42 VFs
[12:15:58] [PASSED] 43 VFs
[12:15:58] [PASSED] 44 VFs
[12:15:58] [PASSED] 45 VFs
[12:15:58] [PASSED] 46 VFs
[12:15:58] [PASSED] 47 VFs
[12:15:58] [PASSED] 48 VFs
[12:15:58] [PASSED] 49 VFs
[12:15:58] [PASSED] 50 VFs
[12:15:58] [PASSED] 51 VFs
[12:15:58] [PASSED] 52 VFs
[12:15:58] [PASSED] 53 VFs
[12:15:58] [PASSED] 54 VFs
[12:15:58] [PASSED] 55 VFs
[12:15:58] [PASSED] 56 VFs
[12:15:58] [PASSED] 57 VFs
[12:15:58] [PASSED] 58 VFs
[12:15:58] [PASSED] 59 VFs
[12:15:58] [PASSED] 60 VFs
[12:15:58] [PASSED] 61 VFs
[12:15:58] [PASSED] 62 VFs
[12:15:58] [PASSED] 63 VFs
[12:15:58] ==================== [PASSED] fair_ggtt ====================
[12:15:58] ================== [PASSED] pf_gt_config ===================
[12:15:58] ===================== lmtt (1 subtest) =====================
[12:15:58] ======================== test_ops  =========================
[12:15:58] [PASSED] 2-level
[12:15:58] [PASSED] multi-level
[12:15:58] ==================== [PASSED] test_ops =====================
[12:15:58] ====================== [PASSED] lmtt =======================
[12:15:58] ================= pf_service (11 subtests) =================
[12:15:58] [PASSED] pf_negotiate_any
[12:15:58] [PASSED] pf_negotiate_base_match
[12:15:58] [PASSED] pf_negotiate_base_newer
[12:15:58] [PASSED] pf_negotiate_base_next
[12:15:58] [SKIPPED] pf_negotiate_base_older
[12:15:58] [PASSED] pf_negotiate_base_prev
[12:15:58] [PASSED] pf_negotiate_latest_match
[12:15:58] [PASSED] pf_negotiate_latest_newer
[12:15:58] [PASSED] pf_negotiate_latest_next
[12:15:58] [SKIPPED] pf_negotiate_latest_older
[12:15:58] [SKIPPED] pf_negotiate_latest_prev
[12:15:58] =================== [PASSED] pf_service ====================
[12:15:58] ================= xe_guc_g2g (2 subtests) ==================
[12:15:58] ============== xe_live_guc_g2g_kunit_default  ==============
[12:15:58] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:15:58] ============== xe_live_guc_g2g_kunit_allmem  ===============
[12:15:58] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:15:58] =================== [SKIPPED] xe_guc_g2g ===================
[12:15:58] =================== xe_mocs (2 subtests) ===================
[12:15:58] ================ xe_live_mocs_kernel_kunit  ================
[12:15:58] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:15:58] ================ xe_live_mocs_reset_kunit  =================
[12:15:58] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:15:58] ==================== [SKIPPED] xe_mocs =====================
[12:15:58] ================= xe_migrate (2 subtests) ==================
[12:15:58] ================= xe_migrate_sanity_kunit  =================
[12:15:58] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:15:58] ================== xe_validate_ccs_kunit  ==================
[12:15:58] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:15:58] =================== [SKIPPED] xe_migrate ===================
[12:15:58] ================== xe_dma_buf (1 subtest) ==================
[12:15:58] ==================== xe_dma_buf_kunit  =====================
[12:15:58] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:15:58] =================== [SKIPPED] xe_dma_buf ===================
[12:15:58] ================= xe_bo_shrink (1 subtest) =================
[12:15:58] =================== xe_bo_shrink_kunit  ====================
[12:15:58] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:15:58] ================== [SKIPPED] xe_bo_shrink ==================
[12:15:58] ==================== xe_bo (2 subtests) ====================
[12:15:58] ================== xe_ccs_migrate_kunit  ===================
[12:15:58] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:15:58] ==================== xe_bo_evict_kunit  ====================
[12:15:58] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:15:58] ===================== [SKIPPED] xe_bo ======================
[12:15:58] ==================== args (11 subtests) ====================
[12:15:58] [PASSED] count_args_test
[12:15:58] [PASSED] call_args_example
[12:15:58] [PASSED] call_args_test
[12:15:58] [PASSED] drop_first_arg_example
[12:15:58] [PASSED] drop_first_arg_test
[12:15:58] [PASSED] first_arg_example
[12:15:58] [PASSED] first_arg_test
[12:15:58] [PASSED] last_arg_example
[12:15:58] [PASSED] last_arg_test
[12:15:58] [PASSED] pick_arg_example
[12:15:58] [PASSED] sep_comma_example
[12:15:58] ====================== [PASSED] args =======================
[12:15:58] =================== xe_pci (3 subtests) ====================
[12:15:58] ==================== check_graphics_ip  ====================
[12:15:58] [PASSED] 12.00 Xe_LP
[12:15:58] [PASSED] 12.10 Xe_LP+
[12:15:58] [PASSED] 12.55 Xe_HPG
[12:15:58] [PASSED] 12.60 Xe_HPC
[12:15:58] [PASSED] 12.70 Xe_LPG
[12:15:58] [PASSED] 12.71 Xe_LPG
[12:15:58] [PASSED] 12.74 Xe_LPG+
[12:15:58] [PASSED] 20.01 Xe2_HPG
[12:15:58] [PASSED] 20.02 Xe2_HPG
[12:15:58] [PASSED] 20.04 Xe2_LPG
[12:15:58] [PASSED] 30.00 Xe3_LPG
[12:15:58] [PASSED] 30.01 Xe3_LPG
[12:15:58] [PASSED] 30.03 Xe3_LPG
[12:15:58] [PASSED] 30.04 Xe3_LPG
[12:15:58] [PASSED] 30.05 Xe3_LPG
[12:15:58] [PASSED] 35.11 Xe3p_XPC
[12:15:58] ================ [PASSED] check_graphics_ip ================
[12:15:58] ===================== check_media_ip  ======================
[12:15:58] [PASSED] 12.00 Xe_M
[12:15:58] [PASSED] 12.55 Xe_HPM
[12:15:58] [PASSED] 13.00 Xe_LPM+
[12:15:58] [PASSED] 13.01 Xe2_HPM
[12:15:58] [PASSED] 20.00 Xe2_LPM
[12:15:58] [PASSED] 30.00 Xe3_LPM
[12:15:58] [PASSED] 30.02 Xe3_LPM
[12:15:58] [PASSED] 35.00 Xe3p_LPM
[12:15:58] [PASSED] 35.03 Xe3p_HPM
[12:15:58] ================= [PASSED] check_media_ip ==================
[12:15:58] =================== check_platform_desc  ===================
[12:15:58] [PASSED] 0x9A60 (TIGERLAKE)
[12:15:58] [PASSED] 0x9A68 (TIGERLAKE)
[12:15:58] [PASSED] 0x9A70 (TIGERLAKE)
[12:15:58] [PASSED] 0x9A40 (TIGERLAKE)
[12:15:58] [PASSED] 0x9A49 (TIGERLAKE)
[12:15:58] [PASSED] 0x9A59 (TIGERLAKE)
[12:15:58] [PASSED] 0x9A78 (TIGERLAKE)
[12:15:58] [PASSED] 0x9AC0 (TIGERLAKE)
[12:15:58] [PASSED] 0x9AC9 (TIGERLAKE)
[12:15:58] [PASSED] 0x9AD9 (TIGERLAKE)
[12:15:58] [PASSED] 0x9AF8 (TIGERLAKE)
[12:15:58] [PASSED] 0x4C80 (ROCKETLAKE)
[12:15:58] [PASSED] 0x4C8A (ROCKETLAKE)
[12:15:58] [PASSED] 0x4C8B (ROCKETLAKE)
[12:15:58] [PASSED] 0x4C8C (ROCKETLAKE)
[12:15:58] [PASSED] 0x4C90 (ROCKETLAKE)
[12:15:58] [PASSED] 0x4C9A (ROCKETLAKE)
[12:15:58] [PASSED] 0x4680 (ALDERLAKE_S)
[12:15:58] [PASSED] 0x4682 (ALDERLAKE_S)
[12:15:58] [PASSED] 0x4688 (ALDERLAKE_S)
[12:15:58] [PASSED] 0x468A (ALDERLAKE_S)
[12:15:58] [PASSED] 0x468B (ALDERLAKE_S)
[12:15:58] [PASSED] 0x4690 (ALDERLAKE_S)
[12:15:58] [PASSED] 0x4692 (ALDERLAKE_S)
[12:15:58] [PASSED] 0x4693 (ALDERLAKE_S)
[12:15:58] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46AA (ALDERLAKE_P)
[12:15:58] [PASSED] 0x462A (ALDERLAKE_P)
[12:15:58] [PASSED] 0x4626 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x4628 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46B0 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[12:15:58] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:15:58] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:15:58] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:15:58] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:15:58] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:15:58] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:15:58] [PASSED] 0xA721 (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA720 (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:15:58] [PASSED] 0xA780 (ALDERLAKE_S)
[12:15:58] [PASSED] 0xA781 (ALDERLAKE_S)
[12:15:58] [PASSED] 0xA782 (ALDERLAKE_S)
[12:15:58] [PASSED] 0xA783 (ALDERLAKE_S)
[12:15:58] [PASSED] 0xA788 (ALDERLAKE_S)
[12:15:58] [PASSED] 0xA789 (ALDERLAKE_S)
[12:15:58] [PASSED] 0xA78A (ALDERLAKE_S)
[12:15:58] [PASSED] 0xA78B (ALDERLAKE_S)
[12:15:58] [PASSED] 0x4905 (DG1)
[12:15:58] [PASSED] 0x4906 (DG1)
[12:15:58] [PASSED] 0x4907 (DG1)
[12:15:58] [PASSED] 0x4908 (DG1)
[12:15:58] [PASSED] 0x4909 (DG1)
[12:15:58] [PASSED] 0x56C0 (DG2)
[12:15:58] [PASSED] 0x56C2 (DG2)
[12:15:58] [PASSED] 0x56C1 (DG2)
[12:15:58] [PASSED] 0x7D51 (METEORLAKE)
[12:15:58] [PASSED] 0x7DD1 (METEORLAKE)
[12:15:58] [PASSED] 0x7D41 (METEORLAKE)
[12:15:58] [PASSED] 0x7D67 (METEORLAKE)
[12:15:58] [PASSED] 0xB640 (METEORLAKE)
[12:15:58] [PASSED] 0x56A0 (DG2)
[12:15:58] [PASSED] 0x56A1 (DG2)
[12:15:58] [PASSED] 0x56A2 (DG2)
[12:15:58] [PASSED] 0x56BE (DG2)
[12:15:58] [PASSED] 0x56BF (DG2)
[12:15:58] [PASSED] 0x5690 (DG2)
[12:15:58] [PASSED] 0x5691 (DG2)
[12:15:58] [PASSED] 0x5692 (DG2)
[12:15:58] [PASSED] 0x56A5 (DG2)
[12:15:58] [PASSED] 0x56A6 (DG2)
[12:15:58] [PASSED] 0x56B0 (DG2)
[12:15:58] [PASSED] 0x56B1 (DG2)
[12:15:58] [PASSED] 0x56BA (DG2)
[12:15:58] [PASSED] 0x56BB (DG2)
[12:15:58] [PASSED] 0x56BC (DG2)
[12:15:58] [PASSED] 0x56BD (DG2)
[12:15:58] [PASSED] 0x5693 (DG2)
[12:15:58] [PASSED] 0x5694 (DG2)
[12:15:58] [PASSED] 0x5695 (DG2)
[12:15:58] [PASSED] 0x56A3 (DG2)
[12:15:58] [PASSED] 0x56A4 (DG2)
[12:15:58] [PASSED] 0x56B2 (DG2)
[12:15:58] [PASSED] 0x56B3 (DG2)
[12:15:58] [PASSED] 0x5696 (DG2)
[12:15:58] [PASSED] 0x5697 (DG2)
[12:15:58] [PASSED] 0xB69 (PVC)
[12:15:58] [PASSED] 0xB6E (PVC)
[12:15:58] [PASSED] 0xBD4 (PVC)
[12:15:58] [PASSED] 0xBD5 (PVC)
[12:15:58] [PASSED] 0xBD6 (PVC)
[12:15:58] [PASSED] 0xBD7 (PVC)
[12:15:58] [PASSED] 0xBD8 (PVC)
[12:15:58] [PASSED] 0xBD9 (PVC)
[12:15:58] [PASSED] 0xBDA (PVC)
[12:15:58] [PASSED] 0xBDB (PVC)
[12:15:58] [PASSED] 0xBE0 (PVC)
[12:15:58] [PASSED] 0xBE1 (PVC)
[12:15:58] [PASSED] 0xBE5 (PVC)
[12:15:58] [PASSED] 0x7D40 (METEORLAKE)
[12:15:58] [PASSED] 0x7D45 (METEORLAKE)
[12:15:58] [PASSED] 0x7D55 (METEORLAKE)
[12:15:58] [PASSED] 0x7D60 (METEORLAKE)
[12:15:58] [PASSED] 0x7DD5 (METEORLAKE)
[12:15:58] [PASSED] 0x6420 (LUNARLAKE)
[12:15:58] [PASSED] 0x64A0 (LUNARLAKE)
[12:15:58] [PASSED] 0x64B0 (LUNARLAKE)
[12:15:58] [PASSED] 0xE202 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE209 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE20B (BATTLEMAGE)
[12:15:58] [PASSED] 0xE20C (BATTLEMAGE)
[12:15:58] [PASSED] 0xE20D (BATTLEMAGE)
[12:15:58] [PASSED] 0xE210 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE211 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE212 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE216 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE220 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE221 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE222 (BATTLEMAGE)
[12:15:58] [PASSED] 0xE223 (BATTLEMAGE)
[12:15:58] [PASSED] 0xB080 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB081 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB082 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB083 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB084 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB085 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB086 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB087 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB08F (PANTHERLAKE)
[12:15:58] [PASSED] 0xB090 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:15:58] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:15:58] [PASSED] 0xD740 (NOVALAKE_S)
[12:15:58] [PASSED] 0xD741 (NOVALAKE_S)
[12:15:58] [PASSED] 0xD742 (NOVALAKE_S)
[12:15:58] [PASSED] 0xD743 (NOVALAKE_S)
[12:15:58] [PASSED] 0xD744 (NOVALAKE_S)
[12:15:58] [PASSED] 0xD745 (NOVALAKE_S)
[12:15:58] [PASSED] 0x674C (CRESCENTISLAND)
[12:15:58] [PASSED] 0xFD80 (PANTHERLAKE)
[12:15:58] [PASSED] 0xFD81 (PANTHERLAKE)
[12:15:58] =============== [PASSED] check_platform_desc ===============
[12:15:58] ===================== [PASSED] xe_pci ======================
[12:15:58] =================== xe_rtp (2 subtests) ====================
[12:15:58] =============== xe_rtp_process_to_sr_tests  ================
[12:15:58] [PASSED] coalesce-same-reg
[12:15:58] [PASSED] no-match-no-add
[12:15:58] [PASSED] match-or
[12:15:58] [PASSED] match-or-xfail
[12:15:58] [PASSED] no-match-no-add-multiple-rules
[12:15:58] [PASSED] two-regs-two-entries
[12:15:58] [PASSED] clr-one-set-other
[12:15:58] [PASSED] set-field
[12:15:58] [PASSED] conflict-duplicate
[12:15:58] [PASSED] conflict-not-disjoint
[12:15:58] [PASSED] conflict-reg-type
[12:15:58] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:15:58] ================== xe_rtp_process_tests  ===================
[12:15:58] [PASSED] active1
[12:15:58] [PASSED] active2
[12:15:58] [PASSED] active-inactive
[12:15:58] [PASSED] inactive-active
[12:15:58] [PASSED] inactive-1st_or_active-inactive
[12:15:58] [PASSED] inactive-2nd_or_active-inactive
[12:15:58] [PASSED] inactive-last_or_active-inactive
[12:15:58] [PASSED] inactive-no_or_active-inactive
[12:15:58] ============== [PASSED] xe_rtp_process_tests ===============
[12:15:58] ===================== [PASSED] xe_rtp ======================
[12:15:58] ==================== xe_wa (1 subtest) =====================
[12:15:58] ======================== xe_wa_gt  =========================
[12:15:58] [PASSED] TIGERLAKE B0
[12:15:58] [PASSED] DG1 A0
[12:15:58] [PASSED] DG1 B0
[12:15:58] [PASSED] ALDERLAKE_S A0
[12:15:58] [PASSED] ALDERLAKE_S B0
[12:15:58] [PASSED] ALDERLAKE_S C0
[12:15:58] [PASSED] ALDERLAKE_S D0
[12:15:58] [PASSED] ALDERLAKE_P A0
[12:15:58] [PASSED] ALDERLAKE_P B0
[12:15:58] [PASSED] ALDERLAKE_P C0
[12:15:58] [PASSED] ALDERLAKE_S RPLS D0
[12:15:58] [PASSED] ALDERLAKE_P RPLU E0
[12:15:58] [PASSED] DG2 G10 C0
[12:15:58] [PASSED] DG2 G11 B1
[12:15:58] [PASSED] DG2 G12 A1
[12:15:58] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:15:58] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:15:58] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:15:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:15:58] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:15:58] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:15:58] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:15:58] ==================== [PASSED] xe_wa_gt =====================
[12:15:58] ====================== [PASSED] xe_wa ======================
[12:15:58] ============================================================
[12:15:58] Testing complete. Ran 510 tests: passed: 492, skipped: 18
[12:15:58] Elapsed time: 35.255s total, 4.210s configuring, 30.527s building, 0.469s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:15:58] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:15:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:16:24] Starting KUnit Kernel (1/1)...
[12:16:24] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:16:24] ============ drm_test_pick_cmdline (2 subtests) ============
[12:16:24] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:16:24] =============== drm_test_pick_cmdline_named  ===============
[12:16:24] [PASSED] NTSC
[12:16:24] [PASSED] NTSC-J
[12:16:24] [PASSED] PAL
[12:16:24] [PASSED] PAL-M
[12:16:24] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:16:24] ============== [PASSED] drm_test_pick_cmdline ==============
[12:16:24] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:16:24] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:16:24] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:16:24] =========== drm_validate_clone_mode (2 subtests) ===========
[12:16:24] ============== drm_test_check_in_clone_mode  ===============
[12:16:24] [PASSED] in_clone_mode
[12:16:24] [PASSED] not_in_clone_mode
[12:16:24] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:16:24] =============== drm_test_check_valid_clones  ===============
[12:16:24] [PASSED] not_in_clone_mode
[12:16:24] [PASSED] valid_clone
[12:16:24] [PASSED] invalid_clone
[12:16:24] =========== [PASSED] drm_test_check_valid_clones ===========
[12:16:24] ============= [PASSED] drm_validate_clone_mode =============
[12:16:24] ============= drm_validate_modeset (1 subtest) =============
[12:16:24] [PASSED] drm_test_check_connector_changed_modeset
[12:16:24] ============== [PASSED] drm_validate_modeset ===============
[12:16:24] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:16:24] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:16:24] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:16:24] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:16:24] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:16:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:16:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:16:24] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:16:24] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:16:24] ============== drm_bridge_alloc (2 subtests) ===============
[12:16:24] [PASSED] drm_test_drm_bridge_alloc_basic
[12:16:24] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:16:24] ================ [PASSED] drm_bridge_alloc =================
[12:16:24] ================== drm_buddy (8 subtests) ==================
[12:16:24] [PASSED] drm_test_buddy_alloc_limit
[12:16:24] [PASSED] drm_test_buddy_alloc_optimistic
[12:16:24] [PASSED] drm_test_buddy_alloc_pessimistic
[12:16:24] [PASSED] drm_test_buddy_alloc_pathological
[12:16:24] [PASSED] drm_test_buddy_alloc_contiguous
[12:16:24] [PASSED] drm_test_buddy_alloc_clear
[12:16:25] [PASSED] drm_test_buddy_alloc_range_bias
[12:16:25] [PASSED] drm_test_buddy_fragmentation_performance
[12:16:25] ==================== [PASSED] drm_buddy ====================
[12:16:25] ============= drm_cmdline_parser (40 subtests) =============
[12:16:25] [PASSED] drm_test_cmdline_force_d_only
[12:16:25] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:16:25] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:16:25] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:16:25] [PASSED] drm_test_cmdline_force_e_only
[12:16:25] [PASSED] drm_test_cmdline_res
[12:16:25] [PASSED] drm_test_cmdline_res_vesa
[12:16:25] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:16:25] [PASSED] drm_test_cmdline_res_rblank
[12:16:25] [PASSED] drm_test_cmdline_res_bpp
[12:16:25] [PASSED] drm_test_cmdline_res_refresh
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:16:25] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:16:25] [PASSED] drm_test_cmdline_res_margins_force_on
[12:16:25] [PASSED] drm_test_cmdline_res_vesa_margins
[12:16:25] [PASSED] drm_test_cmdline_name
[12:16:25] [PASSED] drm_test_cmdline_name_bpp
[12:16:25] [PASSED] drm_test_cmdline_name_option
[12:16:25] [PASSED] drm_test_cmdline_name_bpp_option
[12:16:25] [PASSED] drm_test_cmdline_rotate_0
[12:16:25] [PASSED] drm_test_cmdline_rotate_90
[12:16:25] [PASSED] drm_test_cmdline_rotate_180
[12:16:25] [PASSED] drm_test_cmdline_rotate_270
[12:16:25] [PASSED] drm_test_cmdline_hmirror
[12:16:25] [PASSED] drm_test_cmdline_vmirror
[12:16:25] [PASSED] drm_test_cmdline_margin_options
[12:16:25] [PASSED] drm_test_cmdline_multiple_options
[12:16:25] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:16:25] [PASSED] drm_test_cmdline_extra_and_option
[12:16:25] [PASSED] drm_test_cmdline_freestanding_options
[12:16:25] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:16:25] [PASSED] drm_test_cmdline_panel_orientation
[12:16:25] ================ drm_test_cmdline_invalid  =================
[12:16:25] [PASSED] margin_only
[12:16:25] [PASSED] interlace_only
[12:16:25] [PASSED] res_missing_x
[12:16:25] [PASSED] res_missing_y
[12:16:25] [PASSED] res_bad_y
[12:16:25] [PASSED] res_missing_y_bpp
[12:16:25] [PASSED] res_bad_bpp
[12:16:25] [PASSED] res_bad_refresh
[12:16:25] [PASSED] res_bpp_refresh_force_on_off
[12:16:25] [PASSED] res_invalid_mode
[12:16:25] [PASSED] res_bpp_wrong_place_mode
[12:16:25] [PASSED] name_bpp_refresh
[12:16:25] [PASSED] name_refresh
[12:16:25] [PASSED] name_refresh_wrong_mode
[12:16:25] [PASSED] name_refresh_invalid_mode
[12:16:25] [PASSED] rotate_multiple
[12:16:25] [PASSED] rotate_invalid_val
[12:16:25] [PASSED] rotate_truncated
[12:16:25] [PASSED] invalid_option
[12:16:25] [PASSED] invalid_tv_option
[12:16:25] [PASSED] truncated_tv_option
[12:16:25] ============ [PASSED] drm_test_cmdline_invalid =============
[12:16:25] =============== drm_test_cmdline_tv_options  ===============
[12:16:25] [PASSED] NTSC
[12:16:25] [PASSED] NTSC_443
[12:16:25] [PASSED] NTSC_J
[12:16:25] [PASSED] PAL
[12:16:25] [PASSED] PAL_M
[12:16:25] [PASSED] PAL_N
[12:16:25] [PASSED] SECAM
[12:16:25] [PASSED] MONO_525
[12:16:25] [PASSED] MONO_625
[12:16:25] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:16:25] =============== [PASSED] drm_cmdline_parser ================
[12:16:25] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:16:25] [PASSED] drm_test_connector_hdmi_init_valid
[12:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:16:25] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:16:25] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:16:25] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:16:25] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[12:16:25] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:16:25] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:16:25] [PASSED] supported_formats=0x3 yuv420_allowed=1
[12:16:25] [PASSED] supported_formats=0x3 yuv420_allowed=0
[12:16:25] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:16:25] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:16:25] [PASSED] drm_test_connector_hdmi_init_null_product
[12:16:25] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:16:25] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:16:25] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:16:25] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:16:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:16:25] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:16:25] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:16:25] ========= drm_test_connector_hdmi_init_type_valid  =========
[12:16:25] [PASSED] HDMI-A
[12:16:25] [PASSED] HDMI-B
[12:16:25] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:16:25] ======== drm_test_connector_hdmi_init_type_invalid  ========
[12:16:25] [PASSED] Unknown
[12:16:25] [PASSED] VGA
[12:16:25] [PASSED] DVI-I
[12:16:25] [PASSED] DVI-D
[12:16:25] [PASSED] DVI-A
[12:16:25] [PASSED] Composite
[12:16:25] [PASSED] SVIDEO
[12:16:25] [PASSED] LVDS
[12:16:25] [PASSED] Component
[12:16:25] [PASSED] DIN
[12:16:25] [PASSED] DP
[12:16:25] [PASSED] TV
[12:16:25] [PASSED] eDP
[12:16:25] [PASSED] Virtual
[12:16:25] [PASSED] DSI
[12:16:25] [PASSED] DPI
[12:16:25] [PASSED] Writeback
[12:16:25] [PASSED] SPI
[12:16:25] [PASSED] USB
[12:16:25] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:16:25] ============ [PASSED] drmm_connector_hdmi_init =============
[12:16:25] ============= drmm_connector_init (3 subtests) =============
[12:16:25] [PASSED] drm_test_drmm_connector_init
[12:16:25] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:16:25] ========= drm_test_drmm_connector_init_type_valid  =========
[12:16:25] [PASSED] Unknown
[12:16:25] [PASSED] VGA
[12:16:25] [PASSED] DVI-I
[12:16:25] [PASSED] DVI-D
[12:16:25] [PASSED] DVI-A
[12:16:25] [PASSED] Composite
[12:16:25] [PASSED] SVIDEO
[12:16:25] [PASSED] LVDS
[12:16:25] [PASSED] Component
[12:16:25] [PASSED] DIN
[12:16:25] [PASSED] DP
[12:16:25] [PASSED] HDMI-A
[12:16:25] [PASSED] HDMI-B
[12:16:25] [PASSED] TV
[12:16:25] [PASSED] eDP
[12:16:25] [PASSED] Virtual
[12:16:25] [PASSED] DSI
[12:16:25] [PASSED] DPI
[12:16:25] [PASSED] Writeback
[12:16:25] [PASSED] SPI
[12:16:25] [PASSED] USB
[12:16:25] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:16:25] =============== [PASSED] drmm_connector_init ===============
[12:16:25] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_init
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:16:25] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[12:16:25] [PASSED] Unknown
[12:16:25] [PASSED] VGA
[12:16:25] [PASSED] DVI-I
[12:16:25] [PASSED] DVI-D
[12:16:25] [PASSED] DVI-A
[12:16:25] [PASSED] Composite
[12:16:25] [PASSED] SVIDEO
[12:16:25] [PASSED] LVDS
[12:16:25] [PASSED] Component
[12:16:25] [PASSED] DIN
[12:16:25] [PASSED] DP
[12:16:25] [PASSED] HDMI-A
[12:16:25] [PASSED] HDMI-B
[12:16:25] [PASSED] TV
[12:16:25] [PASSED] eDP
[12:16:25] [PASSED] Virtual
[12:16:25] [PASSED] DSI
[12:16:25] [PASSED] DPI
[12:16:25] [PASSED] Writeback
[12:16:25] [PASSED] SPI
[12:16:25] [PASSED] USB
[12:16:25] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:16:25] ======== drm_test_drm_connector_dynamic_init_name  =========
[12:16:25] [PASSED] Unknown
[12:16:25] [PASSED] VGA
[12:16:25] [PASSED] DVI-I
[12:16:25] [PASSED] DVI-D
[12:16:25] [PASSED] DVI-A
[12:16:25] [PASSED] Composite
[12:16:25] [PASSED] SVIDEO
[12:16:25] [PASSED] LVDS
[12:16:25] [PASSED] Component
[12:16:25] [PASSED] DIN
[12:16:25] [PASSED] DP
[12:16:25] [PASSED] HDMI-A
[12:16:25] [PASSED] HDMI-B
[12:16:25] [PASSED] TV
[12:16:25] [PASSED] eDP
[12:16:25] [PASSED] Virtual
[12:16:25] [PASSED] DSI
[12:16:25] [PASSED] DPI
[12:16:25] [PASSED] Writeback
[12:16:25] [PASSED] SPI
[12:16:25] [PASSED] USB
[12:16:25] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:16:25] =========== [PASSED] drm_connector_dynamic_init ============
[12:16:25] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:16:25] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:16:25] ======= drm_connector_dynamic_register (7 subtests) ========
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:16:25] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:16:25] ========= [PASSED] drm_connector_dynamic_register ==========
[12:16:25] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:16:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:16:25] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:16:25] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:16:25] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:16:25] ========== drm_test_get_tv_mode_from_name_valid  ===========
[12:16:25] [PASSED] NTSC
[12:16:25] [PASSED] NTSC-443
[12:16:25] [PASSED] NTSC-J
[12:16:25] [PASSED] PAL
[12:16:25] [PASSED] PAL-M
[12:16:25] [PASSED] PAL-N
[12:16:25] [PASSED] SECAM
[12:16:25] [PASSED] Mono
[12:16:25] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:16:25] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:16:25] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:16:25] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:16:25] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:16:25] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[12:16:25] [PASSED] VIC 96
[12:16:25] [PASSED] VIC 97
[12:16:25] [PASSED] VIC 101
[12:16:25] [PASSED] VIC 102
[12:16:25] [PASSED] VIC 106
[12:16:25] [PASSED] VIC 107
[12:16:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:16:25] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:16:25] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:16:25] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:16:25] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[12:16:25] [PASSED] Automatic
[12:16:25] [PASSED] Full
[12:16:25] [PASSED] Limited 16:235
[12:16:25] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:16:25] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:16:25] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:16:25] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:16:25] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[12:16:25] [PASSED] RGB
[12:16:25] [PASSED] YUV 4:2:0
[12:16:25] [PASSED] YUV 4:2:2
[12:16:25] [PASSED] YUV 4:4:4
[12:16:25] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:16:25] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:16:25] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:16:25] ============= drm_damage_helper (21 subtests) ==============
[12:16:25] [PASSED] drm_test_damage_iter_no_damage
[12:16:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:16:25] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:16:25] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:16:25] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:16:25] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:16:25] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:16:25] [PASSED] drm_test_damage_iter_simple_damage
[12:16:25] [PASSED] drm_test_damage_iter_single_damage
[12:16:25] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:16:25] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:16:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:16:25] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:16:25] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:16:25] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:16:25] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:16:25] [PASSED] drm_test_damage_iter_damage
[12:16:25] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:16:25] [PASSED] drm_test_damage_iter_damage_one_outside
[12:16:25] [PASSED] drm_test_damage_iter_damage_src_moved
[12:16:25] [PASSED] drm_test_damage_iter_damage_not_visible
[12:16:25] ================ [PASSED] drm_damage_helper ================
[12:16:25] ============== drm_dp_mst_helper (3 subtests) ==============
[12:16:25] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[12:16:25] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:16:25] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:16:25] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:16:25] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:16:25] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:16:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:16:25] ============== drm_test_dp_mst_calc_pbn_div  ===============
[12:16:25] [PASSED] Link rate 2000000 lane count 4
[12:16:25] [PASSED] Link rate 2000000 lane count 2
[12:16:25] [PASSED] Link rate 2000000 lane count 1
[12:16:25] [PASSED] Link rate 1350000 lane count 4
[12:16:25] [PASSED] Link rate 1350000 lane count 2
[12:16:25] [PASSED] Link rate 1350000 lane count 1
[12:16:25] [PASSED] Link rate 1000000 lane count 4
[12:16:25] [PASSED] Link rate 1000000 lane count 2
[12:16:25] [PASSED] Link rate 1000000 lane count 1
[12:16:25] [PASSED] Link rate 810000 lane count 4
[12:16:25] [PASSED] Link rate 810000 lane count 2
[12:16:25] [PASSED] Link rate 810000 lane count 1
[12:16:25] [PASSED] Link rate 540000 lane count 4
[12:16:25] [PASSED] Link rate 540000 lane count 2
[12:16:25] [PASSED] Link rate 540000 lane count 1
[12:16:25] [PASSED] Link rate 270000 lane count 4
[12:16:25] [PASSED] Link rate 270000 lane count 2
[12:16:25] [PASSED] Link rate 270000 lane count 1
[12:16:25] [PASSED] Link rate 162000 lane count 4
[12:16:25] [PASSED] Link rate 162000 lane count 2
[12:16:25] [PASSED] Link rate 162000 lane count 1
[12:16:25] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:16:25] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[12:16:25] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:16:25] [PASSED] DP_POWER_UP_PHY with port number
[12:16:25] [PASSED] DP_POWER_DOWN_PHY with port number
[12:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:16:25] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:16:25] [PASSED] DP_QUERY_PAYLOAD with port number
[12:16:25] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:16:25] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:16:25] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:16:25] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:16:25] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:16:25] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:16:25] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:16:25] [PASSED] DP_REMOTE_I2C_READ with port number
[12:16:25] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:16:25] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:16:25] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:16:25] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:16:25] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:16:25] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:16:25] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:16:25] ================ [PASSED] drm_dp_mst_helper ================
[12:16:25] ================== drm_exec (7 subtests) ===================
[12:16:25] [PASSED] sanitycheck
[12:16:25] [PASSED] test_lock
[12:16:25] [PASSED] test_lock_unlock
[12:16:25] [PASSED] test_duplicates
[12:16:25] [PASSED] test_prepare
[12:16:25] [PASSED] test_prepare_array
[12:16:25] [PASSED] test_multiple_loops
[12:16:25] ==================== [PASSED] drm_exec =====================
[12:16:25] =========== drm_format_helper_test (17 subtests) ===========
[12:16:25] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:16:25] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:16:25] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:16:25] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:16:25] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:16:25] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:16:25] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:16:25] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:16:25] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:16:25] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:16:25] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:16:25] ============== drm_test_fb_xrgb8888_to_mono  ===============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:16:25] ==================== drm_test_fb_swab  =====================
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ================ [PASSED] drm_test_fb_swab =================
[12:16:25] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:16:25] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[12:16:25] [PASSED] single_pixel_source_buffer
[12:16:25] [PASSED] single_pixel_clip_rectangle
[12:16:25] [PASSED] well_known_colors
[12:16:25] [PASSED] destination_pitch
[12:16:25] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:16:25] ================= drm_test_fb_clip_offset  =================
[12:16:25] [PASSED] pass through
[12:16:25] [PASSED] horizontal offset
[12:16:25] [PASSED] vertical offset
[12:16:25] [PASSED] horizontal and vertical offset
[12:16:25] [PASSED] horizontal offset (custom pitch)
[12:16:25] [PASSED] vertical offset (custom pitch)
[12:16:25] [PASSED] horizontal and vertical offset (custom pitch)
[12:16:25] ============= [PASSED] drm_test_fb_clip_offset =============
[12:16:25] =================== drm_test_fb_memcpy  ====================
[12:16:25] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:16:25] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:16:25] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:16:25] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:16:25] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:16:25] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:16:25] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:16:25] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:16:25] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:16:25] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:16:25] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:16:25] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:16:25] =============== [PASSED] drm_test_fb_memcpy ================
[12:16:25] ============= [PASSED] drm_format_helper_test ==============
[12:16:25] ================= drm_format (18 subtests) =================
[12:16:25] [PASSED] drm_test_format_block_width_invalid
[12:16:25] [PASSED] drm_test_format_block_width_one_plane
[12:16:25] [PASSED] drm_test_format_block_width_two_plane
[12:16:25] [PASSED] drm_test_format_block_width_three_plane
[12:16:25] [PASSED] drm_test_format_block_width_tiled
[12:16:25] [PASSED] drm_test_format_block_height_invalid
[12:16:25] [PASSED] drm_test_format_block_height_one_plane
[12:16:25] [PASSED] drm_test_format_block_height_two_plane
[12:16:25] [PASSED] drm_test_format_block_height_three_plane
[12:16:25] [PASSED] drm_test_format_block_height_tiled
[12:16:25] [PASSED] drm_test_format_min_pitch_invalid
[12:16:25] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:16:25] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:16:25] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:16:25] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:16:25] [PASSED] drm_test_format_min_pitch_two_plane
[12:16:25] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:16:25] [PASSED] drm_test_format_min_pitch_tiled
[12:16:25] =================== [PASSED] drm_format ====================
[12:16:25] ============== drm_framebuffer (10 subtests) ===============
[12:16:25] ========== drm_test_framebuffer_check_src_coords  ==========
[12:16:25] [PASSED] Success: source fits into fb
[12:16:25] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:16:25] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:16:25] [PASSED] Fail: overflowing fb with source width
[12:16:25] [PASSED] Fail: overflowing fb with source height
[12:16:25] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:16:25] [PASSED] drm_test_framebuffer_cleanup
[12:16:25] =============== drm_test_framebuffer_create  ===============
[12:16:25] [PASSED] ABGR8888 normal sizes
[12:16:25] [PASSED] ABGR8888 max sizes
[12:16:25] [PASSED] ABGR8888 pitch greater than min required
[12:16:25] [PASSED] ABGR8888 pitch less than min required
[12:16:25] [PASSED] ABGR8888 Invalid width
[12:16:25] [PASSED] ABGR8888 Invalid buffer handle
[12:16:25] [PASSED] No pixel format
[12:16:25] [PASSED] ABGR8888 Width 0
[12:16:25] [PASSED] ABGR8888 Height 0
[12:16:25] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:16:25] [PASSED] ABGR8888 Large buffer offset
[12:16:25] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:16:25] [PASSED] ABGR8888 Invalid flag
[12:16:25] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:16:25] [PASSED] ABGR8888 Valid buffer modifier
[12:16:25] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:16:25] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:16:25] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:16:25] [PASSED] NV12 Normal sizes
[12:16:25] [PASSED] NV12 Max sizes
[12:16:25] [PASSED] NV12 Invalid pitch
[12:16:25] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:16:25] [PASSED] NV12 different  modifier per-plane
[12:16:25] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:16:25] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:16:25] [PASSED] NV12 Modifier for inexistent plane
[12:16:25] [PASSED] NV12 Handle for inexistent plane
[12:16:25] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:16:25] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:16:25] [PASSED] YVU420 Normal sizes
[12:16:25] [PASSED] YVU420 Max sizes
[12:16:25] [PASSED] YVU420 Invalid pitch
[12:16:25] [PASSED] YVU420 Different pitches
[12:16:25] [PASSED] YVU420 Different buffer offsets/pitches
[12:16:25] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:16:25] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:16:25] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:16:25] [PASSED] YVU420 Valid modifier
[12:16:25] [PASSED] YVU420 Different modifiers per plane
[12:16:25] [PASSED] YVU420 Modifier for inexistent plane
[12:16:25] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:16:25] [PASSED] X0L2 Normal sizes
[12:16:25] [PASSED] X0L2 Max sizes
[12:16:25] [PASSED] X0L2 Invalid pitch
[12:16:25] [PASSED] X0L2 Pitch greater than minimum required
[12:16:25] [PASSED] X0L2 Handle for inexistent plane
[12:16:25] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:16:25] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:16:25] [PASSED] X0L2 Valid modifier
[12:16:25] [PASSED] X0L2 Modifier for inexistent plane
[12:16:25] =========== [PASSED] drm_test_framebuffer_create ===========
[12:16:25] [PASSED] drm_test_framebuffer_free
[12:16:25] [PASSED] drm_test_framebuffer_init
[12:16:25] [PASSED] drm_test_framebuffer_init_bad_format
[12:16:25] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:16:25] [PASSED] drm_test_framebuffer_lookup
[12:16:25] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:16:25] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:16:25] ================= [PASSED] drm_framebuffer =================
[12:16:25] ================ drm_gem_shmem (8 subtests) ================
[12:16:25] [PASSED] drm_gem_shmem_test_obj_create
[12:16:25] [PASSED] drm_gem_shmem_test_obj_create_private
[12:16:25] [PASSED] drm_gem_shmem_test_pin_pages
[12:16:25] [PASSED] drm_gem_shmem_test_vmap
[12:16:25] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:16:25] [PASSED] drm_gem_shmem_test_get_sg_table
[12:16:25] [PASSED] drm_gem_shmem_test_madvise
[12:16:25] [PASSED] drm_gem_shmem_test_purge
[12:16:25] ================== [PASSED] drm_gem_shmem ==================
[12:16:25] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:16:25] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[12:16:25] [PASSED] Automatic
[12:16:25] [PASSED] Full
[12:16:25] [PASSED] Limited 16:235
[12:16:25] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:16:25] [PASSED] drm_test_check_disable_connector
[12:16:25] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:16:25] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:16:25] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:16:25] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:16:25] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:16:25] [PASSED] drm_test_check_output_bpc_dvi
[12:16:25] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:16:25] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:16:25] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:16:25] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:16:25] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:16:25] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:16:25] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:16:25] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:16:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:16:25] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:16:25] [PASSED] drm_test_check_broadcast_rgb_value
[12:16:25] [PASSED] drm_test_check_bpc_8_value
[12:16:25] [PASSED] drm_test_check_bpc_10_value
[12:16:25] [PASSED] drm_test_check_bpc_12_value
[12:16:25] [PASSED] drm_test_check_format_value
[12:16:25] [PASSED] drm_test_check_tmds_char_value
[12:16:25] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:16:25] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:16:25] [PASSED] drm_test_check_mode_valid
[12:16:25] [PASSED] drm_test_check_mode_valid_reject
[12:16:25] [PASSED] drm_test_check_mode_valid_reject_rate
[12:16:25] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:16:25] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:16:25] ================= drm_managed (2 subtests) =================
[12:16:25] [PASSED] drm_test_managed_release_action
[12:16:25] [PASSED] drm_test_managed_run_action
[12:16:25] =================== [PASSED] drm_managed ===================
[12:16:25] =================== drm_mm (6 subtests) ====================
[12:16:25] [PASSED] drm_test_mm_init
[12:16:25] [PASSED] drm_test_mm_debug
[12:16:25] [PASSED] drm_test_mm_align32
[12:16:25] [PASSED] drm_test_mm_align64
[12:16:25] [PASSED] drm_test_mm_lowest
[12:16:25] [PASSED] drm_test_mm_highest
[12:16:25] ===================== [PASSED] drm_mm ======================
[12:16:25] ============= drm_modes_analog_tv (5 subtests) =============
[12:16:25] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:16:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:16:25] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:16:25] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:16:25] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:16:25] =============== [PASSED] drm_modes_analog_tv ===============
[12:16:25] ============== drm_plane_helper (2 subtests) ===============
[12:16:25] =============== drm_test_check_plane_state  ================
[12:16:25] [PASSED] clipping_simple
[12:16:25] [PASSED] clipping_rotate_reflect
[12:16:25] [PASSED] positioning_simple
[12:16:25] [PASSED] upscaling
[12:16:25] [PASSED] downscaling
[12:16:25] [PASSED] rounding1
[12:16:25] [PASSED] rounding2
[12:16:25] [PASSED] rounding3
[12:16:25] [PASSED] rounding4
[12:16:25] =========== [PASSED] drm_test_check_plane_state ============
[12:16:25] =========== drm_test_check_invalid_plane_state  ============
[12:16:25] [PASSED] positioning_invalid
[12:16:25] [PASSED] upscaling_invalid
[12:16:25] [PASSED] downscaling_invalid
[12:16:25] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:16:25] ================ [PASSED] drm_plane_helper =================
[12:16:25] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:16:25] ====== drm_test_connector_helper_tv_get_modes_check  =======
[12:16:25] [PASSED] None
[12:16:25] [PASSED] PAL
[12:16:25] [PASSED] NTSC
[12:16:25] [PASSED] Both, NTSC Default
[12:16:25] [PASSED] Both, PAL Default
[12:16:25] [PASSED] Both, NTSC Default, with PAL on command-line
[12:16:25] [PASSED] Both, PAL Default, with NTSC on command-line
[12:16:25] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:16:25] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:16:25] ================== drm_rect (9 subtests) ===================
[12:16:25] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:16:25] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:16:25] [PASSED] drm_test_rect_clip_scaled_clipped
[12:16:25] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:16:25] ================= drm_test_rect_intersect  =================
[12:16:25] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:16:25] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:16:25] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:16:25] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:16:25] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:16:25] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:16:25] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:16:25] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:16:25] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:16:25] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:16:25] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:16:25] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:16:25] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:16:25] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:16:25] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:16:25] ============= [PASSED] drm_test_rect_intersect =============
[12:16:25] ================ drm_test_rect_calc_hscale  ================
[12:16:25] [PASSED] normal use
[12:16:25] [PASSED] out of max range
[12:16:25] [PASSED] out of min range
[12:16:25] [PASSED] zero dst
[12:16:25] [PASSED] negative src
[12:16:25] [PASSED] negative dst
[12:16:25] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:16:25] ================ drm_test_rect_calc_vscale  ================
[12:16:25] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[12:16:25] [PASSED] out of max range
[12:16:25] [PASSED] out of min range
[12:16:25] [PASSED] zero dst
[12:16:25] [PASSED] negative src
[12:16:25] [PASSED] negative dst
[12:16:25] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:16:25] ================== drm_test_rect_rotate  ===================
[12:16:25] [PASSED] reflect-x
[12:16:25] [PASSED] reflect-y
[12:16:25] [PASSED] rotate-0
[12:16:25] [PASSED] rotate-90
[12:16:25] [PASSED] rotate-180
[12:16:25] [PASSED] rotate-270
[12:16:25] ============== [PASSED] drm_test_rect_rotate ===============
[12:16:25] ================ drm_test_rect_rotate_inv  =================
[12:16:25] [PASSED] reflect-x
[12:16:25] [PASSED] reflect-y
[12:16:25] [PASSED] rotate-0
[12:16:25] [PASSED] rotate-90
[12:16:25] [PASSED] rotate-180
[12:16:25] [PASSED] rotate-270
[12:16:25] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:16:25] ==================== [PASSED] drm_rect =====================
[12:16:25] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:16:25] ============ drm_test_sysfb_build_fourcc_list  =============
[12:16:25] [PASSED] no native formats
[12:16:25] [PASSED] XRGB8888 as native format
[12:16:25] [PASSED] remove duplicates
[12:16:25] [PASSED] convert alpha formats
[12:16:25] [PASSED] random formats
[12:16:25] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:16:25] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:16:25] ============================================================
[12:16:25] Testing complete. Ran 622 tests: passed: 622
[12:16:25] Elapsed time: 26.950s total, 1.695s configuring, 24.838s building, 0.387s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:16:25] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:16:26] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:16:36] Starting KUnit Kernel (1/1)...
[12:16:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:16:36] ================= ttm_device (5 subtests) ==================
[12:16:36] [PASSED] ttm_device_init_basic
[12:16:36] [PASSED] ttm_device_init_multiple
[12:16:36] [PASSED] ttm_device_fini_basic
[12:16:36] [PASSED] ttm_device_init_no_vma_man
[12:16:36] ================== ttm_device_init_pools  ==================
[12:16:36] [PASSED] No DMA allocations, no DMA32 required
[12:16:36] [PASSED] DMA allocations, DMA32 required
[12:16:36] [PASSED] No DMA allocations, DMA32 required
[12:16:36] [PASSED] DMA allocations, no DMA32 required
[12:16:36] ============== [PASSED] ttm_device_init_pools ==============
[12:16:36] =================== [PASSED] ttm_device ====================
[12:16:36] ================== ttm_pool (8 subtests) ===================
[12:16:36] ================== ttm_pool_alloc_basic  ===================
[12:16:36] [PASSED] One page
[12:16:36] [PASSED] More than one page
[12:16:36] [PASSED] Above the allocation limit
[12:16:36] [PASSED] One page, with coherent DMA mappings enabled
[12:16:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:16:36] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:16:36] ============== ttm_pool_alloc_basic_dma_addr  ==============
[12:16:36] [PASSED] One page
[12:16:36] [PASSED] More than one page
[12:16:36] [PASSED] Above the allocation limit
[12:16:36] [PASSED] One page, with coherent DMA mappings enabled
[12:16:36] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:16:36] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:16:36] [PASSED] ttm_pool_alloc_order_caching_match
[12:16:36] [PASSED] ttm_pool_alloc_caching_mismatch
[12:16:36] [PASSED] ttm_pool_alloc_order_mismatch
[12:16:36] [PASSED] ttm_pool_free_dma_alloc
[12:16:36] [PASSED] ttm_pool_free_no_dma_alloc
[12:16:36] [PASSED] ttm_pool_fini_basic
[12:16:36] ==================== [PASSED] ttm_pool =====================
[12:16:36] ================ ttm_resource (8 subtests) =================
[12:16:36] ================= ttm_resource_init_basic  =================
[12:16:36] [PASSED] Init resource in TTM_PL_SYSTEM
[12:16:36] [PASSED] Init resource in TTM_PL_VRAM
[12:16:36] [PASSED] Init resource in a private placement
[12:16:36] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:16:36] ============= [PASSED] ttm_resource_init_basic =============
[12:16:36] [PASSED] ttm_resource_init_pinned
[12:16:36] [PASSED] ttm_resource_fini_basic
[12:16:36] [PASSED] ttm_resource_manager_init_basic
[12:16:36] [PASSED] ttm_resource_manager_usage_basic
[12:16:36] [PASSED] ttm_resource_manager_set_used_basic
[12:16:36] [PASSED] ttm_sys_man_alloc_basic
[12:16:36] [PASSED] ttm_sys_man_free_basic
[12:16:36] ================== [PASSED] ttm_resource ===================
[12:16:36] =================== ttm_tt (15 subtests) ===================
[12:16:36] ==================== ttm_tt_init_basic  ====================
[12:16:36] [PASSED] Page-aligned size
[12:16:36] [PASSED] Extra pages requested
[12:16:36] ================ [PASSED] ttm_tt_init_basic ================
[12:16:36] [PASSED] ttm_tt_init_misaligned
[12:16:36] [PASSED] ttm_tt_fini_basic
[12:16:36] [PASSED] ttm_tt_fini_sg
[12:16:36] [PASSED] ttm_tt_fini_shmem
[12:16:36] [PASSED] ttm_tt_create_basic
[12:16:36] [PASSED] ttm_tt_create_invalid_bo_type
[12:16:36] [PASSED] ttm_tt_create_ttm_exists
[12:16:36] [PASSED] ttm_tt_create_failed
[12:16:36] [PASSED] ttm_tt_destroy_basic
[12:16:36] [PASSED] ttm_tt_populate_null_ttm
[12:16:36] [PASSED] ttm_tt_populate_populated_ttm
[12:16:36] [PASSED] ttm_tt_unpopulate_basic
[12:16:36] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:16:36] [PASSED] ttm_tt_swapin_basic
[12:16:36] ===================== [PASSED] ttm_tt ======================
[12:16:36] =================== ttm_bo (14 subtests) ===================
[12:16:36] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[12:16:36] [PASSED] Cannot be interrupted and sleeps
[12:16:36] [PASSED] Cannot be interrupted, locks straight away
[12:16:36] [PASSED] Can be interrupted, sleeps
[12:16:36] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:16:36] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:16:36] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:16:36] [PASSED] ttm_bo_reserve_double_resv
[12:16:36] [PASSED] ttm_bo_reserve_interrupted
[12:16:36] [PASSED] ttm_bo_reserve_deadlock
[12:16:36] [PASSED] ttm_bo_unreserve_basic
[12:16:36] [PASSED] ttm_bo_unreserve_pinned
[12:16:36] [PASSED] ttm_bo_unreserve_bulk
[12:16:36] [PASSED] ttm_bo_fini_basic
[12:16:36] [PASSED] ttm_bo_fini_shared_resv
[12:16:36] [PASSED] ttm_bo_pin_basic
[12:16:36] [PASSED] ttm_bo_pin_unpin_resource
[12:16:36] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:16:36] ===================== [PASSED] ttm_bo ======================
[12:16:36] ============== ttm_bo_validate (21 subtests) ===============
[12:16:36] ============== ttm_bo_init_reserved_sys_man  ===============
[12:16:36] [PASSED] Buffer object for userspace
[12:16:36] [PASSED] Kernel buffer object
[12:16:36] [PASSED] Shared buffer object
[12:16:36] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:16:36] ============== ttm_bo_init_reserved_mock_man  ==============
[12:16:36] [PASSED] Buffer object for userspace
[12:16:36] [PASSED] Kernel buffer object
[12:16:36] [PASSED] Shared buffer object
[12:16:36] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:16:36] [PASSED] ttm_bo_init_reserved_resv
[12:16:36] ================== ttm_bo_validate_basic  ==================
[12:16:36] [PASSED] Buffer object for userspace
[12:16:36] [PASSED] Kernel buffer object
[12:16:36] [PASSED] Shared buffer object
[12:16:36] ============== [PASSED] ttm_bo_validate_basic ==============
[12:16:36] [PASSED] ttm_bo_validate_invalid_placement
[12:16:36] ============= ttm_bo_validate_same_placement  ==============
[12:16:36] [PASSED] System manager
[12:16:36] [PASSED] VRAM manager
[12:16:36] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:16:36] [PASSED] ttm_bo_validate_failed_alloc
[12:16:36] [PASSED] ttm_bo_validate_pinned
[12:16:36] [PASSED] ttm_bo_validate_busy_placement
[12:16:36] ================ ttm_bo_validate_multihop  =================
[12:16:36] [PASSED] Buffer object for userspace
[12:16:36] [PASSED] Kernel buffer object
[12:16:36] [PASSED] Shared buffer object
[12:16:36] ============ [PASSED] ttm_bo_validate_multihop =============
[12:16:36] ========== ttm_bo_validate_no_placement_signaled  ==========
[12:16:36] [PASSED] Buffer object in system domain, no page vector
[12:16:36] [PASSED] Buffer object in system domain with an existing page vector
[12:16:36] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:16:36] ======== ttm_bo_validate_no_placement_not_signaled  ========
[12:16:36] [PASSED] Buffer object for userspace
[12:16:36] [PASSED] Kernel buffer object
[12:16:36] [PASSED] Shared buffer object
[12:16:36] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:16:36] [PASSED] ttm_bo_validate_move_fence_signaled
[12:16:36] ========= ttm_bo_validate_move_fence_not_signaled  =========
[12:16:36] [PASSED] Waits for GPU
[12:16:36] [PASSED] Tries to lock straight away
[12:16:36] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:16:36] [PASSED] ttm_bo_validate_happy_evict
[12:16:36] [PASSED] ttm_bo_validate_all_pinned_evict
[12:16:36] [PASSED] ttm_bo_validate_allowed_only_evict
[12:16:36] [PASSED] ttm_bo_validate_deleted_evict
[12:16:36] [PASSED] ttm_bo_validate_busy_domain_evict
[12:16:36] [PASSED] ttm_bo_validate_evict_gutting
[12:16:36] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[12:16:36] ================= [PASSED] ttm_bo_validate =================
[12:16:36] ============================================================
[12:16:36] Testing complete. Ran 101 tests: passed: 101
[12:16:36] Elapsed time: 11.140s total, 1.635s configuring, 9.288s building, 0.182s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 21+ messages in thread

* ✗ CI.checksparse: warning for CMTG enablement
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (9 preceding siblings ...)
  2025-11-17 12:16 ` ✓ CI.KUnit: success " Patchwork
@ 2025-11-17 12:31 ` Patchwork
  2025-11-17 12:54 ` ✓ Xe.CI.BAT: success " Patchwork
  2025-11-17 14:54 ` ✗ Xe.CI.Full: failure " Patchwork
  12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-17 12:31 UTC (permalink / raw)
  To: Animesh Manna; +Cc: intel-xe

== Series Details ==

Series: CMTG enablement
URL   : https://patchwork.freedesktop.org/series/157663/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast b2e41c70a5eeddce427dc6df02508b6856eb4a11
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_casf.c:147:21: error: too long token expansion
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2075:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2088:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2088:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2088:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_lt_phy.c:1935:35: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel



^ permalink raw reply	[flat|nested] 21+ messages in thread

* ✓ Xe.CI.BAT: success for CMTG enablement
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (10 preceding siblings ...)
  2025-11-17 12:31 ` ✗ CI.checksparse: warning " Patchwork
@ 2025-11-17 12:54 ` Patchwork
  2025-11-17 14:54 ` ✗ Xe.CI.Full: failure " Patchwork
  12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-17 12:54 UTC (permalink / raw)
  To: Animesh Manna; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 2274 bytes --]

== Series Details ==

Series: CMTG enablement
URL   : https://patchwork.freedesktop.org/series/157663/
State : success

== Summary ==

CI Bug Log - changes from xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11_BAT -> xe-pw-157663v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-157663v1_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@xe_waitfence@abstime:
    - bat-dg2-oem2:       [PASS][1] -> [TIMEOUT][2] ([Intel XE#6506])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/bat-dg2-oem2/igt@xe_waitfence@abstime.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/bat-dg2-oem2/igt@xe_waitfence@abstime.html

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [PASS][3] -> [FAIL][4] ([Intel XE#6519])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/bat-dg2-oem2/igt@xe_waitfence@engine.html

  * igt@xe_waitfence@reltime:
    - bat-dg2-oem2:       [PASS][5] -> [FAIL][6] ([Intel XE#6520])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/bat-dg2-oem2/igt@xe_waitfence@reltime.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/bat-dg2-oem2/igt@xe_waitfence@reltime.html

  
  [Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
  [Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
  [Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520


Build changes
-------------

  * IGT: IGT_8626 -> IGT_8628
  * Linux: xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11 -> xe-pw-157663v1

  IGT_8626: 8626
  IGT_8628: 8628
  xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11: b2e41c70a5eeddce427dc6df02508b6856eb4a11
  xe-pw-157663v1: 157663v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/index.html

[-- Attachment #2: Type: text/html, Size: 2912 bytes --]

^ permalink raw reply	[flat|nested] 21+ messages in thread

* ✗ Xe.CI.Full: failure for CMTG enablement
  2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
                   ` (11 preceding siblings ...)
  2025-11-17 12:54 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-11-17 14:54 ` Patchwork
  12 siblings, 0 replies; 21+ messages in thread
From: Patchwork @ 2025-11-17 14:54 UTC (permalink / raw)
  To: Animesh Manna; +Cc: intel-xe

[-- Attachment #1: Type: text/plain, Size: 94346 bytes --]

== Series Details ==

Series: CMTG enablement
URL   : https://patchwork.freedesktop.org/series/157663/
State : failure

== Summary ==

CI Bug Log - changes from xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11_FULL -> xe-pw-157663v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-157663v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-157663v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-157663v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_wedged@basic-wedged:
    - shard-adlp:         [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-6/igt@xe_wedged@basic-wedged.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-1/igt@xe_wedged@basic-wedged.html

  
Known issues
------------

  Here are the changes found in xe-pw-157663v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][3] ([Intel XE#4543]) +3 other tests dmesg-warn
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-9/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-hdmi-a-1-y.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][4] ([Intel XE#316]) +3 other tests skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#1407]) +1 other test skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-adlp:         NOTRUN -> [SKIP][6] ([Intel XE#1124]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-9/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#3658])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2327]) +6 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-adlp:         [PASS][9] -> [DMESG-FAIL][10] ([Intel XE#4543]) +3 other tests dmesg-fail
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-8/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-adlp:         [PASS][11] -> [FAIL][12] ([Intel XE#1874])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#619])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#607])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#1124]) +3 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][16] ([Intel XE#1124]) +17 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#1124]) +4 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#2191]) +1 other test skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2314] / [Intel XE#2894]) +2 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-2-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][20] ([Intel XE#367]) +3 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html

  * igt@kms_bw@linear-tiling-4-displays-2560x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][21] ([Intel XE#1512])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][22] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2887]) +23 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][24] ([Intel XE#455] / [Intel XE#787]) +11 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#2669] / [Intel XE#3433]) +3 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [PASS][26] -> [INCOMPLETE][27] ([Intel XE#3862]) +1 other test incomplete
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][28] ([Intel XE#2652] / [Intel XE#787]) +17 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][29] ([Intel XE#3432]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][30] ([Intel XE#787]) +41 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#2887]) +4 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-8/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][32] ([Intel XE#787]) +8 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@kms_ccs@crc-sprite-planes-basic-yf-tiled-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][33] ([Intel XE#2907])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][34] ([Intel XE#2907])
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#2669]) +3 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-2/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [PASS][36] -> [INCOMPLETE][37] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6:
    - shard-dg2-set2:     [PASS][38] -> [INCOMPLETE][39] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#6168])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2724])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2325]) +4 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_color@ctm-limited-range:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#306])
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-3/igt@kms_chamelium_color@ctm-limited-range.html

  * igt@kms_chamelium_color@degamma:
    - shard-dg2-set2:     NOTRUN -> [SKIP][43] ([Intel XE#306]) +2 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@kms_chamelium_color@degamma.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2252]) +12 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html

  * igt@kms_chamelium_edid@vga-edid-read:
    - shard-dg2-set2:     NOTRUN -> [SKIP][45] ([Intel XE#373]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@kms_chamelium_edid@vga-edid-read.html
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#373]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-8/igt@kms_chamelium_edid@vga-edid-read.html
    - shard-adlp:         NOTRUN -> [SKIP][47] ([Intel XE#373])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_chamelium_edid@vga-edid-read.html

  * igt@kms_chamelium_sharpness_filter@filter-basic:
    - shard-dg2-set2:     NOTRUN -> [SKIP][48] ([Intel XE#6507])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@kms_chamelium_sharpness_filter@filter-basic.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][49] ([Intel XE#307])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-434/igt@kms_content_protection@dp-mst-lic-type-0.html
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#307])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-7/igt@kms_content_protection@dp-mst-lic-type-0.html
    - shard-adlp:         NOTRUN -> [SKIP][51] ([Intel XE#307])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@kms_content_protection@dp-mst-lic-type-0.html
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#2390])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@lic-type-0@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][53] ([Intel XE#1178]) +1 other test fail
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_content_protection@lic-type-0@pipe-a-dp-2.html

  * igt@kms_content_protection@mei-interface:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2341]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-offscreen-512x170:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2321])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_cursor_crc@cursor-offscreen-512x170.html

  * igt@kms_cursor_crc@cursor-onscreen-128x42:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#1424]) +2 other tests skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-8/igt@kms_cursor_crc@cursor-onscreen-128x42.html

  * igt@kms_cursor_crc@cursor-random-32x32:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#2320]) +6 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@kms_cursor_crc@cursor-random-32x32.html

  * igt@kms_cursor_crc@cursor-sliding-32x10:
    - shard-adlp:         NOTRUN -> [SKIP][58] ([Intel XE#455]) +2 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@kms_cursor_crc@cursor-sliding-32x10.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-bmg:          [PASS][59] -> [SKIP][60] ([Intel XE#2291]) +4 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2291])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#1508])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-bmg:          [PASS][63] -> [SKIP][64] ([Intel XE#4302])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@kms_display_modes@extended-mode-basic.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#1340])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#2244]) +2 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][67] ([Intel XE#2244]) +1 other test skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-7/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#4422])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#4156]) +1 other test skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#776])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#2375])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-blocking-absolute-wf_vblank:
    - shard-adlp:         NOTRUN -> [SKIP][72] ([Intel XE#310])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-6/igt@kms_flip@2x-blocking-absolute-wf_vblank.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-lnl:          NOTRUN -> [SKIP][73] ([Intel XE#1421]) +2 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
    - shard-bmg:          [PASS][74] -> [SKIP][75] ([Intel XE#2316]) +2 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#2316]) +3 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [PASS][77] -> [FAIL][78] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1:
    - shard-adlp:         [PASS][79] -> [DMESG-WARN][80] ([Intel XE#4543]) +5 other tests dmesg-warn
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-6/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1:
    - shard-adlp:         [PASS][81] -> [TIMEOUT][82] ([Intel XE#4543]) +1 other test timeout
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-4/igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-1/igt@kms_flip@flip-vs-panning-vs-hang@d-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-adlp:         [PASS][83] -> [DMESG-WARN][84] ([Intel XE#2953] / [Intel XE#4173]) +3 other tests dmesg-warn
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-9/igt@kms_flip@flip-vs-suspend.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-8/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-bmg:          [PASS][85] -> [INCOMPLETE][86] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-1/igt@kms_flip@flip-vs-suspend-interruptible.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@kms_flip@flip-vs-suspend-interruptible.html
    - shard-dg2-set2:     [PASS][87] -> [INCOMPLETE][88] ([Intel XE#2049] / [Intel XE#2597]) +1 other test incomplete
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-466/igt@kms_flip@flip-vs-suspend-interruptible.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#1397] / [Intel XE#1745])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][90] ([Intel XE#1397])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#2293] / [Intel XE#2380]) +5 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][92] ([Intel XE#2293]) +5 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
    - shard-dg2-set2:     NOTRUN -> [SKIP][93] ([Intel XE#455]) +5 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][94] ([Intel XE#2380]) +1 other test skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
    - shard-lnl:          NOTRUN -> [SKIP][95] ([Intel XE#1401] / [Intel XE#1745])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#1401])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-upscaling:
    - shard-lnl:          NOTRUN -> [FAIL][97] ([Intel XE#4683]) +1 other test fail
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-1/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt:
    - shard-adlp:         NOTRUN -> [SKIP][98] ([Intel XE#651])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt.html
    - shard-lnl:          NOTRUN -> [SKIP][99] ([Intel XE#651]) +1 other test skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][100] ([Intel XE#2311]) +38 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     NOTRUN -> [SKIP][101] ([Intel XE#651]) +14 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][102] ([Intel XE#4141]) +22 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-adlp:         NOTRUN -> [SKIP][103] ([Intel XE#1151])
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][104] ([Intel XE#656]) +13 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#2352]) +1 other test skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-render:
    - shard-dg2-set2:     NOTRUN -> [SKIP][106] ([Intel XE#6312])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscreen-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
    - shard-adlp:         NOTRUN -> [SKIP][107] ([Intel XE#653]) +2 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][108] ([Intel XE#2312]) +9 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move:
    - shard-adlp:         NOTRUN -> [SKIP][109] ([Intel XE#656]) +4 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#2313]) +42 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][111] ([Intel XE#653]) +14 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_hdr@static-swap:
    - shard-lnl:          NOTRUN -> [SKIP][112] ([Intel XE#1503])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-1/igt@kms_hdr@static-swap.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-bmg:          NOTRUN -> [SKIP][113] ([Intel XE#2501])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane_lowres@tiling-none@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][114] ([Intel XE#599]) +3 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@kms_plane_lowres@tiling-none@pipe-b-edp-1.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-adlp:         NOTRUN -> [SKIP][115] ([Intel XE#4596])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-3/igt@kms_plane_multiple@2x-tiling-x.html
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#4596])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-2/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][117] ([Intel XE#5020])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-bmg:          NOTRUN -> [SKIP][118] ([Intel XE#2571])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b:
    - shard-lnl:          NOTRUN -> [SKIP][119] ([Intel XE#2763]) +7 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@kms_plane_scaling@planes-downscale-factor-0-75@pipe-b.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a:
    - shard-bmg:          NOTRUN -> [SKIP][120] ([Intel XE#2763]) +9 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-75@pipe-a.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][121] ([Intel XE#870])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-dg2-set2:     NOTRUN -> [SKIP][122] ([Intel XE#908]) +1 other test skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-bmg:          NOTRUN -> [SKIP][123] ([Intel XE#2392])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@kms_pm_dc@dc6-psr.html
    - shard-adlp:         NOTRUN -> [SKIP][124] ([Intel XE#1129])
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-3/igt@kms_pm_dc@dc6-psr.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][125] ([Intel XE#1129])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-436/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_pm_lpsp@kms-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][126] ([Intel XE#2499])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_pm_lpsp@kms-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][127] ([Intel XE#1439] / [Intel XE#836])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
    - shard-dg2-set2:     NOTRUN -> [SKIP][129] ([Intel XE#1406] / [Intel XE#1489]) +4 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          NOTRUN -> [SKIP][130] ([Intel XE#1406] / [Intel XE#2893] / [Intel XE#4608])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][131] ([Intel XE#1406] / [Intel XE#4608]) +1 other test skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@psr2-cursor-plane-update-sf:
    - shard-adlp:         NOTRUN -> [SKIP][132] ([Intel XE#1406] / [Intel XE#1489])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@kms_psr2_sf@psr2-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
    - shard-bmg:          NOTRUN -> [SKIP][133] ([Intel XE#1406] / [Intel XE#1489]) +13 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-bmg:          NOTRUN -> [SKIP][134] ([Intel XE#1406] / [Intel XE#2387])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-pr-dpms:
    - shard-lnl:          NOTRUN -> [SKIP][135] ([Intel XE#1406]) +3 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-2/igt@kms_psr@fbc-pr-dpms.html

  * igt@kms_psr@fbc-psr2-cursor-plane-move:
    - shard-bmg:          NOTRUN -> [SKIP][136] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +21 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@kms_psr@fbc-psr2-cursor-plane-move.html
    - shard-adlp:         NOTRUN -> [SKIP][137] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@kms_psr@fbc-psr2-cursor-plane-move.html

  * igt@kms_psr@fbc-psr2-dpms@edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][138] ([Intel XE#1406] / [Intel XE#4609]) +1 other test skip
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-3/igt@kms_psr@fbc-psr2-dpms@edp-1.html

  * igt@kms_psr@psr-dpms:
    - shard-dg2-set2:     NOTRUN -> [SKIP][139] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +6 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-435/igt@kms_psr@psr-dpms.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][140] ([Intel XE#3414]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-bmg:          NOTRUN -> [SKIP][141] ([Intel XE#3414] / [Intel XE#3904]) +3 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_scaling_modes@scaling-mode-center:
    - shard-bmg:          NOTRUN -> [SKIP][142] ([Intel XE#2413])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_scaling_modes@scaling-mode-center.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][143] ([Intel XE#1435])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  * igt@kms_sharpness_filter@filter-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][144] ([Intel XE#6503])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@kms_sharpness_filter@filter-dpms.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-dg2-set2:     NOTRUN -> [SKIP][145] ([Intel XE#330])
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@negative-basic:
    - shard-bmg:          NOTRUN -> [SKIP][146] ([Intel XE#1499]) +1 other test skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
    - shard-lnl:          [PASS][147] -> [FAIL][148] ([Intel XE#2142]) +1 other test fail
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html

  * igt@xe_ccs@large-ctrl-surf-copy:
    - shard-adlp:         NOTRUN -> [SKIP][149] ([Intel XE#3576] / [Intel XE#5610])
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@xe_ccs@large-ctrl-surf-copy.html

  * igt@xe_compute_preempt@compute-preempt-many-vram:
    - shard-lnl:          NOTRUN -> [SKIP][150] ([Intel XE#5191])
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-1/igt@xe_compute_preempt@compute-preempt-many-vram.html

  * igt@xe_compute_preempt@compute-threadgroup-preempt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][151] ([Intel XE#6360])
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@xe_compute_preempt@compute-threadgroup-preempt.html

  * igt@xe_copy_basic@mem-copy-linear-0x369:
    - shard-dg2-set2:     NOTRUN -> [SKIP][152] ([Intel XE#1123])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-435/igt@xe_copy_basic@mem-copy-linear-0x369.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-bmg:          NOTRUN -> [SKIP][153] ([Intel XE#4837]) +20 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram:
    - shard-dg2-set2:     NOTRUN -> [SKIP][154] ([Intel XE#4837]) +4 other tests skip
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-435/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html
    - shard-lnl:          NOTRUN -> [SKIP][155] ([Intel XE#4837]) +2 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html
    - shard-adlp:         NOTRUN -> [SKIP][156] ([Intel XE#4837] / [Intel XE#5565])
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-6/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-sram.html

  * igt@xe_evict@evict-beng-cm-threads-small-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][157] ([Intel XE#688]) +4 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-2/igt@xe_evict@evict-beng-cm-threads-small-multi-vm.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-adlp:         NOTRUN -> [SKIP][158] ([Intel XE#261]) +1 other test skip
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_evict_ccs@evict-overcommit-standalone-nofree-reopen:
    - shard-adlp:         NOTRUN -> [SKIP][159] ([Intel XE#688])
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-1/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-reopen.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate:
    - shard-adlp:         NOTRUN -> [SKIP][160] ([Intel XE#1392] / [Intel XE#5575]) +1 other test skip
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-6/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue:
    - shard-bmg:          NOTRUN -> [SKIP][161] ([Intel XE#2322]) +9 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue.html

  * igt@xe_exec_basic@multigpu-once-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][162] ([Intel XE#1392]) +4 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-2/igt@xe_exec_basic@multigpu-once-userptr.html

  * igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-invalidate-race:
    - shard-dg2-set2:     NOTRUN -> [SKIP][163] ([Intel XE#288]) +11 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@once-basic-imm:
    - shard-adlp:         NOTRUN -> [SKIP][164] ([Intel XE#288] / [Intel XE#5561]) +3 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-1/igt@xe_exec_fault_mode@once-basic-imm.html

  * igt@xe_exec_system_allocator@fault-threads-same-page-benchmark:
    - shard-dg2-set2:     NOTRUN -> [SKIP][165] ([Intel XE#4915]) +167 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@xe_exec_system_allocator@fault-threads-same-page-benchmark.html

  * igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][166] ([Intel XE#5007]) +4 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset.html
    - shard-lnl:          NOTRUN -> [SKIP][167] ([Intel XE#5007])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset.html

  * igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][168] ([Intel XE#4943]) +41 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@xe_exec_system_allocator@many-execqueues-mmap-huge-nomemset.html

  * igt@xe_exec_system_allocator@many-stride-free:
    - shard-adlp:         NOTRUN -> [SKIP][169] ([Intel XE#4915]) +43 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@xe_exec_system_allocator@many-stride-free.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-single-vma:
    - shard-lnl:          NOTRUN -> [SKIP][170] ([Intel XE#6196])
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-single-vma.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-huge:
    - shard-lnl:          NOTRUN -> [SKIP][171] ([Intel XE#4943]) +9 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-7/igt@xe_exec_system_allocator@process-many-stride-mmap-huge.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
    - shard-bmg:          NOTRUN -> [SKIP][172] ([Intel XE#6281])
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html

  * igt@xe_live_ktest@xe_eudebug:
    - shard-bmg:          NOTRUN -> [SKIP][173] ([Intel XE#2833])
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_live_ktest@xe_eudebug.html

  * igt@xe_media_fill@media-fill:
    - shard-bmg:          NOTRUN -> [SKIP][174] ([Intel XE#2459] / [Intel XE#2596])
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@xe_media_fill@media-fill.html
    - shard-lnl:          NOTRUN -> [SKIP][175] ([Intel XE#560])
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@xe_media_fill@media-fill.html

  * igt@xe_module_load@force-load:
    - shard-bmg:          NOTRUN -> [SKIP][176] ([Intel XE#2457])
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@xe_module_load@force-load.html
    - shard-lnl:          NOTRUN -> [SKIP][177] ([Intel XE#378])
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@xe_module_load@force-load.html

  * igt@xe_module_load@load:
    - shard-bmg:          ([PASS][178], [PASS][179], [PASS][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197]) -> ([PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [SKIP][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223]) ([Intel XE#2457])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-5/igt@xe_module_load@load.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-5/igt@xe_module_load@load.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-1/igt@xe_module_load@load.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@xe_module_load@load.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@xe_module_load@load.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@xe_module_load@load.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@xe_module_load@load.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-5/igt@xe_module_load@load.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-2/igt@xe_module_load@load.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@xe_module_load@load.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@xe_module_load@load.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-2/igt@xe_module_load@load.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-1/igt@xe_module_load@load.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-4/igt@xe_module_load@load.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-4/igt@xe_module_load@load.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-4/igt@xe_module_load@load.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-8/igt@xe_module_load@load.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-8/igt@xe_module_load@load.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-8/igt@xe_module_load@load.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-1/igt@xe_module_load@load.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@xe_module_load@load.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@xe_module_load@load.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@xe_module_load@load.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@xe_module_load@load.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@xe_module_load@load.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@xe_module_load@load.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_module_load@load.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@xe_module_load@load.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@xe_module_load@load.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@xe_module_load@load.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@xe_module_load@load.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_module_load@load.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_module_load@load.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@xe_module_load@load.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@xe_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@xe_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@xe_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@xe_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@xe_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@xe_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@xe_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@xe_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@xe_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@xe_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-7/igt@xe_module_load@load.html

  * igt@xe_oa@invalid-create-userspace-config:
    - shard-adlp:         NOTRUN -> [SKIP][224] ([Intel XE#3573])
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-6/igt@xe_oa@invalid-create-userspace-config.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][225] ([Intel XE#2248])
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_oa@syncs-userptr-wait-cfg:
    - shard-dg2-set2:     NOTRUN -> [SKIP][226] ([Intel XE#3573]) +4 other tests skip
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@xe_oa@syncs-userptr-wait-cfg.html

  * igt@xe_pm@d3cold-basic-exec:
    - shard-dg2-set2:     NOTRUN -> [SKIP][227] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@xe_pm@d3cold-basic-exec.html

  * igt@xe_pm@d3cold-mocs:
    - shard-bmg:          NOTRUN -> [SKIP][228] ([Intel XE#2284]) +2 other tests skip
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-adlp:         NOTRUN -> [SKIP][229] ([Intel XE#2284] / [Intel XE#366])
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-8/igt@xe_pm@s3-d3cold-basic-exec.html
    - shard-lnl:          NOTRUN -> [SKIP][230] ([Intel XE#2284] / [Intel XE#366]) +1 other test skip
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-7/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pm_residency@idle-residency:
    - shard-dg2-set2:     [PASS][231] -> [FAIL][232] ([Intel XE#6362]) +1 other test fail
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@xe_pm_residency@idle-residency.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@xe_pm_residency@idle-residency.html

  * igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0:
    - shard-lnl:          [PASS][233] -> [FAIL][234] ([Intel XE#6251])
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_video_decode0.html

  * igt@xe_pmu@fn-engine-activity-load:
    - shard-lnl:          NOTRUN -> [SKIP][235] ([Intel XE#4650])
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-1/igt@xe_pmu@fn-engine-activity-load.html

  * igt@xe_pmu@gt-c6-idle:
    - shard-dg2-set2:     [PASS][236] -> [FAIL][237] ([Intel XE#6366])
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@xe_pmu@gt-c6-idle.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@xe_pmu@gt-c6-idle.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][238] ([Intel XE#4733]) +1 other test skip
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  * igt@xe_pxp@pxp-termination-key-update-post-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][239] ([Intel XE#4733]) +4 other tests skip
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-suspend.html

  * igt@xe_query@multigpu-query-invalid-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][240] ([Intel XE#944]) +4 other tests skip
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@xe_query@multigpu-query-invalid-cs-cycles.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][241] ([Intel XE#944]) +1 other test skip
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-435/igt@xe_query@multigpu-query-invalid-cs-cycles.html

  * igt@xe_sriov_flr@flr-vfs-parallel:
    - shard-dg2-set2:     NOTRUN -> [SKIP][242] ([Intel XE#4273])
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@xe_sriov_flr@flr-vfs-parallel.html
    - shard-lnl:          NOTRUN -> [SKIP][243] ([Intel XE#4273])
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-3/igt@xe_sriov_flr@flr-vfs-parallel.html

  * igt@xe_sriov_vram@vf-access-provisioned:
    - shard-lnl:          NOTRUN -> [SKIP][244] ([Intel XE#6376])
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@xe_sriov_vram@vf-access-provisioned.html

  
#### Possible fixes ####

  * igt@kms_async_flips@test-time-stamp-atomic@pipe-a-hdmi-a-1:
    - shard-adlp:         [DMESG-WARN][245] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][246] +4 other tests pass
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-4/igt@kms_async_flips@test-time-stamp-atomic@pipe-a-hdmi-a-1.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-9/igt@kms_async_flips@test-time-stamp-atomic@pipe-a-hdmi-a-1.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-adlp:         [FAIL][247] ([Intel XE#3908]) -> [PASS][248] +1 other test pass
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-adlp:         [DMESG-FAIL][249] ([Intel XE#4543]) -> [PASS][250] +9 other tests pass
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][251] ([Intel XE#3862]) -> [PASS][252] +1 other test pass
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc@pipe-b-dp-4.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-bmg:          [SKIP][253] ([Intel XE#2291]) -> [PASS][254] +1 other test pass
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-adlp:         [FAIL][255] -> [PASS][256]
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-9/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-9/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-bmg:          [SKIP][257] ([Intel XE#2316]) -> [PASS][258] +2 other tests pass
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-panning-interruptible:
    - shard-adlp:         [DMESG-WARN][259] ([Intel XE#4543] / [Intel XE#5208]) -> [PASS][260] +1 other test pass
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-8/igt@kms_flip@flip-vs-panning-interruptible.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-3/igt@kms_flip@flip-vs-panning-interruptible.html

  * igt@kms_flip@flip-vs-panning-interruptible@b-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][261] ([Intel XE#4543]) -> [PASS][262] +13 other tests pass
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-8/igt@kms_flip@flip-vs-panning-interruptible@b-hdmi-a1.html
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-3/igt@kms_flip@flip-vs-panning-interruptible@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-adlp:         [DMESG-FAIL][263] ([Intel XE#4543] / [Intel XE#4921]) -> [PASS][264] +3 other tests pass
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-9/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_hdr@invalid-hdr:
    - shard-dg2-set2:     [SKIP][265] ([Intel XE#455]) -> [PASS][266]
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-464/igt@kms_hdr@invalid-hdr.html
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@kms_hdr@invalid-hdr.html
    - shard-bmg:          [SKIP][267] ([Intel XE#1503]) -> [PASS][268]
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-5/igt@kms_hdr@invalid-hdr.html
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_hdr@invalid-hdr.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [SKIP][269] ([Intel XE#3012]) -> [PASS][270]
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_pm_dc@dc5-dpms:
    - shard-lnl:          [FAIL][271] ([Intel XE#718]) -> [PASS][272] +1 other test pass
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-lnl-8/igt@kms_pm_dc@dc5-dpms.html
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@kms_pm_dc@dc5-dpms.html

  * {igt@kms_sharpness_filter@invalid-plane-with-filter@pipe-a-edp-1-invalid-plane-with-filter}:
    - shard-lnl:          [DMESG-WARN][273] ([Intel XE#4537]) -> [PASS][274] +1 other test pass
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-lnl-3/igt@kms_sharpness_filter@invalid-plane-with-filter@pipe-a-edp-1-invalid-plane-with-filter.html
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-5/igt@kms_sharpness_filter@invalid-plane-with-filter@pipe-a-edp-1-invalid-plane-with-filter.html

  * igt@xe_exec_system_allocator@many-stride-malloc-prefetch:
    - shard-bmg:          [WARN][275] ([Intel XE#5786]) -> [PASS][276]
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html

  * igt@xe_module_load@load:
    - shard-dg2-set2:     ([SKIP][277], [PASS][278], [PASS][279], [PASS][280], [PASS][281], [PASS][282], [PASS][283], [PASS][284], [PASS][285], [PASS][286], [PASS][287], [PASS][288], [PASS][289], [PASS][290], [PASS][291], [PASS][292], [PASS][293], [PASS][294], [PASS][295], [PASS][296], [PASS][297], [PASS][298], [PASS][299], [PASS][300], [PASS][301], [PASS][302]) ([Intel XE#378]) -> ([PASS][303], [PASS][304], [PASS][305], [PASS][306], [PASS][307], [PASS][308], [PASS][309], [PASS][310], [PASS][311], [PASS][312], [PASS][313], [PASS][314], [PASS][315], [PASS][316], [PASS][317], [PASS][318], [PASS][319], [PASS][320], [PASS][321], [PASS][322], [PASS][323], [PASS][324], [PASS][325], [PASS][326], [PASS][327])
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-463/igt@xe_module_load@load.html
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-463/igt@xe_module_load@load.html
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-463/igt@xe_module_load@load.html
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-463/igt@xe_module_load@load.html
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-466/igt@xe_module_load@load.html
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@xe_module_load@load.html
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-464/igt@xe_module_load@load.html
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-464/igt@xe_module_load@load.html
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@xe_module_load@load.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@xe_module_load@load.html
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-435/igt@xe_module_load@load.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-434/igt@xe_module_load@load.html
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-464/igt@xe_module_load@load.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-435/igt@xe_module_load@load.html
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-435/igt@xe_module_load@load.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-466/igt@xe_module_load@load.html
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-466/igt@xe_module_load@load.html
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-433/igt@xe_module_load@load.html
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-433/igt@xe_module_load@load.html
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-432/igt@xe_module_load@load.html
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-432/igt@xe_module_load@load.html
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-433/igt@xe_module_load@load.html
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-436/igt@xe_module_load@load.html
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-436/igt@xe_module_load@load.html
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-436/igt@xe_module_load@load.html
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-dg2-436/igt@xe_module_load@load.html
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@xe_module_load@load.html
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@xe_module_load@load.html
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@xe_module_load@load.html
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-464/igt@xe_module_load@load.html
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-435/igt@xe_module_load@load.html
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-435/igt@xe_module_load@load.html
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-435/igt@xe_module_load@load.html
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@xe_module_load@load.html
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@xe_module_load@load.html
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@xe_module_load@load.html
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-434/igt@xe_module_load@load.html
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-434/igt@xe_module_load@load.html
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-432/igt@xe_module_load@load.html
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-436/igt@xe_module_load@load.html
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-434/igt@xe_module_load@load.html
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@xe_module_load@load.html
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@xe_module_load@load.html
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@xe_module_load@load.html
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-466/igt@xe_module_load@load.html
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@xe_module_load@load.html
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-463/igt@xe_module_load@load.html
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-436/igt@xe_module_load@load.html
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@xe_module_load@load.html
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@xe_module_load@load.html
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-dg2-433/igt@xe_module_load@load.html

  * igt@xe_pm@d3hot-multiple-execs:
    - shard-adlp:         [TIMEOUT][328] -> [PASS][329]
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-6/igt@xe_pm@d3hot-multiple-execs.html
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-9/igt@xe_pm@d3hot-multiple-execs.html

  * igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0:
    - shard-lnl:          [FAIL][330] ([Intel XE#6251]) -> [PASS][331]
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-lnl-1/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-lnl-4/igt@xe_pmu@engine-activity-accuracy-90@engine-drm_xe_engine_class_copy0.html

  
#### Warnings ####

  * igt@kms_content_protection@atomic:
    - shard-bmg:          [FAIL][332] ([Intel XE#1178]) -> [SKIP][333] ([Intel XE#2341])
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-8/igt@kms_content_protection@atomic.html
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_content_protection@atomic.html

  * igt@kms_dirtyfb@fbc-dirtyfb-ioctl:
    - shard-bmg:          [SKIP][334] ([Intel XE#5428]) -> [SKIP][335] ([Intel XE#4210])
   [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html
   [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_dirtyfb@fbc-dirtyfb-ioctl.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-adlp:         [DMESG-WARN][336] ([Intel XE#2953] / [Intel XE#4173]) -> [DMESG-WARN][337] ([Intel XE#4543]) +1 other test dmesg-warn
   [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-4/igt@kms_flip@flip-vs-suspend-interruptible.html
   [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-2/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][338] ([Intel XE#2311]) -> [SKIP][339] ([Intel XE#2312]) +11 other tests skip
   [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-msflip-blt:
    - shard-bmg:          [SKIP][340] ([Intel XE#2312]) -> [SKIP][341] ([Intel XE#2311]) +7 other tests skip
   [340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-msflip-blt.html
   [341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt:
    - shard-bmg:          [SKIP][342] ([Intel XE#6313]) -> [SKIP][343] ([Intel XE#4141]) +3 other tests skip
   [342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html
   [343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][344] ([Intel XE#5390]) -> [SKIP][345] ([Intel XE#4141]) +46 other tests skip
   [344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-rte:
    - shard-bmg:          [SKIP][346] ([Intel XE#5427]) -> [SKIP][347] ([Intel XE#4141])
   [346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-rte.html
   [347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-2p-rte.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][348] ([Intel XE#5390]) -> [SKIP][349] ([Intel XE#2312]) +5 other tests skip
   [348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
   [349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][350] ([Intel XE#2312]) -> [SKIP][351] ([Intel XE#4141]) +4 other tests skip
   [350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
    - shard-bmg:          [SKIP][352] ([Intel XE#2312]) -> [SKIP][353] ([Intel XE#2313]) +6 other tests skip
   [352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
   [353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
    - shard-bmg:          [SKIP][354] ([Intel XE#2313]) -> [SKIP][355] ([Intel XE#2312]) +6 other tests skip
   [354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
   [355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][356] ([Intel XE#3544]) -> [SKIP][357] ([Intel XE#3374] / [Intel XE#3544])
   [356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
   [357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-adlp:         [SKIP][358] ([Intel XE#734]) -> [FAIL][359] ([Intel XE#3325])
   [358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-1/igt@kms_pm_dc@dc9-dpms.html
   [359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-8/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][360] ([Intel XE#2509]) -> [SKIP][361] ([Intel XE#2426])
   [360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0:
    - shard-adlp:         [TIMEOUT][362] ([Intel XE#5213] / [Intel XE#6421]) -> [TIMEOUT][363] ([Intel XE#5213]) +1 other test timeout
   [362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-1/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0.html
   [363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-1/igt@xe_pmu@all-fn-engine-activity-load@engine-drm_xe_engine_class_render0.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
    - shard-adlp:         [DMESG-FAIL][364] ([Intel XE#3868] / [Intel XE#5213] / [Intel XE#5545]) -> [ABORT][365] ([Intel XE#5466]) +1 other test abort
   [364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11/shard-adlp-6/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
   [365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/shard-adlp-6/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
  [Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
  [Intel XE#2459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2459
  [Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
  [Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
  [Intel XE#2596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2596
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2833]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2833
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
  [Intel XE#3325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3325
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3433
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#3576]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3576
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4210]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4210
  [Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4537]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4537
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4683]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4683
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
  [Intel XE#5213]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5213
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5427
  [Intel XE#5428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5428
  [Intel XE#5466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5466
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
  [Intel XE#5610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5610
  [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6251]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6251
  [Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6313
  [Intel XE#6360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6360
  [Intel XE#6362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6362
  [Intel XE#6366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6366
  [Intel XE#6376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6376
  [Intel XE#6421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6421
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#734]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/734
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/908
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * IGT: IGT_8626 -> IGT_8628
  * Linux: xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11 -> xe-pw-157663v1

  IGT_8626: 8626
  IGT_8628: 8628
  xe-4116-b2e41c70a5eeddce427dc6df02508b6856eb4a11: b2e41c70a5eeddce427dc6df02508b6856eb4a11
  xe-pw-157663v1: 157663v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-157663v1/index.html

[-- Attachment #2: Type: text/html, Size: 107983 bytes --]

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg
  2025-11-17 11:42 ` [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg Animesh Manna
@ 2025-11-17 15:09   ` Jani Nikula
  2026-01-08  8:14     ` Manna, Animesh
  0 siblings, 1 reply; 21+ messages in thread
From: Jani Nikula @ 2025-11-17 15:09 UTC (permalink / raw)
  To: Animesh Manna, intel-gfx, intel-xe; +Cc: Animesh Manna

On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> Enable vrr if it is enabled on cmtg registers.

This violates the basic principle that hardware and software states are
kept separate. When we write the software state to the hardware, making
parts of it conditional on the existing hardware state results in
non-deterministic behaviour.

BR,
Jani.

>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cmtg.c     | 19 +++++++++++++++++++
>  .../gpu/drm/i915/display/intel_cmtg_regs.h    |  5 +++++
>  2 files changed, 24 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
> index 5e9aaa50b38f..3dfb691913cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> @@ -17,6 +17,7 @@
>  #include "intel_display_power.h"
>  #include "intel_display_regs.h"
>  #include "intel_display_types.h"
> +#include "intel_vrr_regs.h"
>  
>  /**
>   * DOC: Common Primary Timing Generator (CMTG)
> @@ -213,6 +214,7 @@ static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
>  {
>  	struct intel_display *display = to_intel_display(crtc_state);
>  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +	u32 vctl;
>  
>  	intel_de_write(display, TRANS_HTOTAL_CMTG(cpu_transcoder),
>  		       intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder)));
> @@ -226,6 +228,23 @@ static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
>  		       intel_de_read(display, TRANS_VBLANK(display, cpu_transcoder)));
>  	intel_de_write(display, TRANS_VSYNC_CMTG(cpu_transcoder),
>  		       intel_de_read(display, TRANS_VSYNC(display, cpu_transcoder)));
> +
> +	vctl = intel_de_read(display, TRANS_VRR_CTL(display, cpu_transcoder));
> +	if (vctl & VRR_CTL_VRR_ENABLE) {
> +		u32 vmax, flipline, vmin;
> +
> +		vmax = intel_de_read(display, TRANS_VRR_VMAX(display, cpu_transcoder));
> +		flipline = intel_de_read(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder));
> +		if (vmax != flipline)
> +			return;
> +
> +		vmin = intel_de_read(display, TRANS_VRR_VMIN(display, cpu_transcoder));
> +
> +		intel_de_write(display, TRANS_VRR_VMAX_CMTG(cpu_transcoder), vmax);
> +		intel_de_write(display, TRANS_VRR_VMIN_CMTG(cpu_transcoder), vmin);
> +		intel_de_write(display, TRANS_VRR_FLIPLINE_CMTG(cpu_transcoder), flipline);
> +		intel_de_write(display, TRANS_VRR_CTL_CMTG(cpu_transcoder), vctl);
> +	}
>  }
>  
>  void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> index 47403bbcac7d..37dee7165852 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> @@ -33,4 +33,9 @@ enum cmtg {
>  #define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) * 0x100)
>  #define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) * 0x100)
>  
> +#define TRANS_VRR_CTL_CMTG(id)		_MMIO(0x6F420 + (id) * 0x100)
> +#define TRANS_VRR_VMAX_CMTG(id)		_MMIO(0x6F424 + (id) * 0x100)
> +#define TRANS_VRR_VMIN_CMTG(id)		_MMIO(0x6F434 + (id) * 0x100)
> +#define TRANS_VRR_FLIPLINE_CMTG(id)	_MMIO(0x6F438 + (id) * 0x100)
> +
>  #endif /* __INTEL_CMTG_REGS_H__ */

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [RFC 3/8] drm/i915/cmtg: set timings for cmtg
  2025-11-17 11:42 ` [RFC 3/8] drm/i915/cmtg: set timings for cmtg Animesh Manna
@ 2025-11-17 15:13   ` Jani Nikula
  2026-01-08  8:15     ` Manna, Animesh
  0 siblings, 1 reply; 21+ messages in thread
From: Jani Nikula @ 2025-11-17 15:13 UTC (permalink / raw)
  To: Animesh Manna, intel-gfx, intel-xe; +Cc: Animesh Manna

On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> Timing registers are separate for CMTG, read transcoder register
> and program cmtg transcoder with those values.
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cmtg.c     | 31 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_cmtg.h     |  1 +
>  .../gpu/drm/i915/display/intel_cmtg_regs.h    | 13 ++++++++
>  drivers/gpu/drm/i915/display/intel_display.c  |  4 +++
>  4 files changed, 49 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
> index 4640cafe8dde..5e9aaa50b38f 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> @@ -208,3 +208,34 @@ void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state)
>  	if (clk_sel_set)
>  		intel_de_rmw(display, CMTG_CLK_SEL, clk_sel_clr, clk_sel_set);
>  }
> +
> +static void intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> +	intel_de_write(display, TRANS_HTOTAL_CMTG(cpu_transcoder),
> +		       intel_de_read(display, TRANS_HTOTAL(display, cpu_transcoder)));
> +	intel_de_write(display, TRANS_HBLANK_CMTG(cpu_transcoder),
> +		       intel_de_read(display, TRANS_HBLANK(display, cpu_transcoder)));
> +	intel_de_write(display, TRANS_HSYNC_CMTG(cpu_transcoder),
> +		       intel_de_read(display, TRANS_HSYNC(display, cpu_transcoder)));
> +	intel_de_write(display, TRANS_VTOTAL_CMTG(cpu_transcoder),
> +		       intel_de_read(display, TRANS_VTOTAL(display, cpu_transcoder)));
> +	intel_de_write(display, TRANS_VBLANK_CMTG(cpu_transcoder),
> +		       intel_de_read(display, TRANS_VBLANK(display, cpu_transcoder)));
> +	intel_de_write(display, TRANS_VSYNC_CMTG(cpu_transcoder),
> +		       intel_de_read(display, TRANS_VSYNC(display, cpu_transcoder)));

If something needs to be written in multiple places, it needs to be
written from the same source software state, not via hardware like this.

> +}
> +
> +void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
> +{
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +
> +	if (cpu_transcoder != TRANSCODER_A && cpu_transcoder != TRANSCODER_B)
> +		return;
> +
> +	/* Program CMTG Transcoder Timings */

Is this comment helpful?

> +	intel_cmtg_set_timings(crtc_state);
> +
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.h b/drivers/gpu/drm/i915/display/intel_cmtg.h
> index bef2426b2787..113042e5d3a8 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.h
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.h
> @@ -11,5 +11,6 @@ struct intel_crtc_state;
>  
>  void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state);
>  void intel_cmtg_sanitize(struct intel_display *display);
> +void intel_cmtg_enable(const struct intel_crtc_state *crtc_state);
>  
>  #endif /* __INTEL_CMTG_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> index 9fd54f7e9d1f..47403bbcac7d 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> @@ -8,6 +8,12 @@
>  
>  #include "intel_display_reg_defs.h"
>  
> +enum cmtg {
> +	CMTG_A = 0,
> +	CMTG_B,
> +	MAX_CMTG
> +};
> +
>  #define CMTG_CLK_SEL			_MMIO(0x46160)
>  #define CMTG_CLK_SEL_A_MASK		REG_GENMASK(31, 29)
>  #define CMTG_CLK_SELECT_PHYA_ENABLE	0x4
> @@ -20,4 +26,11 @@
>  #define TRANS_CMTG_CTL_B		_MMIO(0x6fb88)
>  #define  CMTG_ENABLE			REG_BIT(31)
>  
> +#define TRANS_HTOTAL_CMTG(id)		_MMIO(0x6F000 + (id) * 0x100)
> +#define TRANS_HBLANK_CMTG(id)		_MMIO(0x6F004 + (id) * 0x100)
> +#define TRANS_HSYNC_CMTG(id)		_MMIO(0x6F008 + (id) * 0x100)
> +#define TRANS_VTOTAL_CMTG(id)		_MMIO(0x6F00C + (id) * 0x100)
> +#define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) * 0x100)
> +#define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) * 0x100)
> +
>  #endif /* __INTEL_CMTG_REGS_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 069967114bd9..19242c12f52a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -63,6 +63,7 @@
>  #include "intel_casf.h"
>  #include "intel_cdclk.h"
>  #include "intel_clock_gating.h"
> +#include "intel_cmtg.h"
>  #include "intel_color.h"
>  #include "intel_crt.h"
>  #include "intel_crtc.h"
> @@ -1669,6 +1670,9 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>  	if (!transcoder_is_dsi(cpu_transcoder))
>  		hsw_configure_cpu_transcoder(new_crtc_state);
>  
> +	if (new_crtc_state->enable_cmtg)
> +		intel_cmtg_enable(new_crtc_state);
> +
>  	for_each_pipe_crtc_modeset_enable(display, pipe_crtc, new_crtc_state, i) {
>  		const struct intel_crtc_state *pipe_crtc_state =
>  			intel_atomic_get_new_crtc_state(state, pipe_crtc);

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards
  2025-11-17 11:42 ` [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards Animesh Manna
@ 2025-11-17 15:15   ` Jani Nikula
  2026-01-08  8:17     ` Manna, Animesh
  0 siblings, 1 reply; 21+ messages in thread
From: Jani Nikula @ 2025-11-17 15:15 UTC (permalink / raw)
  To: Animesh Manna, intel-gfx, intel-xe; +Cc: Animesh Manna

On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> Introduce a flag for cmtg. LNL onwards CMTG support will be added.
> Set the flag as per DISPLAY_VER() check.
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
>  drivers/gpu/drm/i915/display/intel_dp.c            | 5 +++++
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 38702a9e0f50..7b8343755c90 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1351,6 +1351,9 @@ struct intel_crtc_state {
>  
>  	struct drm_rect psr2_su_area;
>  
> +	/* CMTG Enable */

The comment is useless, it's literally the same as the member name.

> +	bool enable_cmtg;

Please let's add this stuff in sub-structs, we should do it more in
general:

	struct {
		bool enable;
        } cmtg;

> +
>  	/* Variable Refresh Rate state */
>  	struct {
>  		bool enable, in_range;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0ec82fcbcf48..3f7da4c08665 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3421,6 +3421,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
>  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state);
>  
> +	if(DISPLAY_VER(display) >= 15 && intel_dp_is_edp(intel_dp)) {
> +		pipe_config->enable_cmtg = true;
> +		drm_dbg_kms(display->drm,"ANI-DBG: intel_dp_compute_config\n");

Please don't leave personal debug stuff even in RFC code.

> +	}
> +
>  	return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
>  							pipe_config);
>  }

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 21+ messages in thread

* Re: [RFC 2/8] drm/i915/cmtg: cmtg set clock select
  2025-11-17 11:42 ` [RFC 2/8] drm/i915/cmtg: cmtg set clock select Animesh Manna
@ 2025-11-17 15:17   ` Jani Nikula
  0 siblings, 0 replies; 21+ messages in thread
From: Jani Nikula @ 2025-11-17 15:17 UTC (permalink / raw)
  To: Animesh Manna, intel-gfx, intel-xe; +Cc: Animesh Manna

On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> Program CMTG Clk Select.
>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_cmtg.c     | 22 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_cmtg.h     |  2 ++
>  .../gpu/drm/i915/display/intel_cmtg_regs.h    |  2 ++
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c  |  8 +++++--
>  4 files changed, 32 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c b/drivers/gpu/drm/i915/display/intel_cmtg.c
> index 165138b95cb2..4640cafe8dde 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> @@ -16,6 +16,7 @@
>  #include "intel_display_device.h"
>  #include "intel_display_power.h"
>  #include "intel_display_regs.h"
> +#include "intel_display_types.h"
>  
>  /**
>   * DOC: Common Primary Timing Generator (CMTG)
> @@ -186,3 +187,24 @@ void intel_cmtg_sanitize(struct intel_display *display)
>  
>  	intel_cmtg_disable(display, &cmtg_config);
>  }
> +
> +void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_display *display = to_intel_display(crtc_state);
> +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> +	u32 clk_sel_clr = 0;
> +	u32 clk_sel_set = 0;
> +
> +	if (cpu_transcoder == TRANSCODER_A) {
> +		clk_sel_clr = CMTG_CLK_SEL_A_MASK;
> +		clk_sel_set = CMTG_CLK_SELECT_PHYA_ENABLE;
> +	}
> +
> +	if (cpu_transcoder == TRANSCODER_B) {
> +		clk_sel_clr = CMTG_CLK_SEL_A_MASK;

SEL_A for both?

> +		clk_sel_set = CMTG_CLK_SELECT_PHYB_ENABLE;
> +	}
> +
> +	if (clk_sel_set)

What if needs to be disabled? I don't get it.

> +		intel_de_rmw(display, CMTG_CLK_SEL, clk_sel_clr, clk_sel_set);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.h b/drivers/gpu/drm/i915/display/intel_cmtg.h
> index ba62199adaa2..bef2426b2787 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg.h
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg.h
> @@ -7,7 +7,9 @@
>  #define __INTEL_CMTG_H__
>  
>  struct intel_display;
> +struct intel_crtc_state;
>  
> +void intel_cmtg_set_clk_select(const struct intel_crtc_state *crtc_state);
>  void intel_cmtg_sanitize(struct intel_display *display);
>  
>  #endif /* __INTEL_CMTG_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> index 945a35578284..9fd54f7e9d1f 100644
> --- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> @@ -10,8 +10,10 @@
>  
>  #define CMTG_CLK_SEL			_MMIO(0x46160)
>  #define CMTG_CLK_SEL_A_MASK		REG_GENMASK(31, 29)
> +#define CMTG_CLK_SELECT_PHYA_ENABLE	0x4
>  #define CMTG_CLK_SEL_A_DISABLED		REG_FIELD_PREP(CMTG_CLK_SEL_A_MASK, 0)
>  #define CMTG_CLK_SEL_B_MASK		REG_GENMASK(15, 13)
> +#define CMTG_CLK_SELECT_PHYB_ENABLE	0x6
>  #define CMTG_CLK_SEL_B_DISABLED		REG_FIELD_PREP(CMTG_CLK_SEL_B_MASK, 0)
>  
>  #define TRANS_CMTG_CTL_A		_MMIO(0x6fa88)
> diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> index d98b4cf6b60e..32969985d6f7 100644
> --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> @@ -9,6 +9,7 @@
>  #include <drm/drm_print.h>
>  
>  #include "intel_alpm.h"
> +#include "intel_cmtg.h"
>  #include "intel_cx0_phy.h"
>  #include "intel_cx0_phy_regs.h"
>  #include "intel_ddi.h"
> @@ -3209,10 +3210,13 @@ void intel_mtl_pll_enable(struct intel_encoder *encoder,
>  {
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  
> -	if (intel_tc_port_in_tbt_alt_mode(dig_port))
> +	if (intel_tc_port_in_tbt_alt_mode(dig_port)) {
>  		intel_mtl_tbt_pll_enable(encoder, crtc_state);
> -	else
> +	} else {
>  		intel_cx0pll_enable(encoder, crtc_state);
> +		if (crtc_state->enable_cmtg)
> +			intel_cmtg_set_clk_select(crtc_state);
> +	}
>  }
>  
>  /*

-- 
Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg
  2025-11-17 15:09   ` Jani Nikula
@ 2026-01-08  8:14     ` Manna, Animesh
  0 siblings, 0 replies; 21+ messages in thread
From: Manna, Animesh @ 2026-01-08  8:14 UTC (permalink / raw)
  To: Jani Nikula, intel-gfx@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org



> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Monday, November 17, 2025 8:40 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>
> Subject: Re: [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg
> 
> On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> > Enable vrr if it is enabled on cmtg registers.
> 
> This violates the basic principle that hardware and software states are kept
> separate. When we write the software state to the hardware, making parts
> of it conditional on the existing hardware state results in non-deterministic
> behaviour.

Thanks for review.
Taken care by using s/w state in next version, currently debug ongoing with flipQ, will float after that.

Regards,
Animesh
> 
> BR,
> Jani.
> 
> >
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_cmtg.c     | 19 +++++++++++++++++++
> >  .../gpu/drm/i915/display/intel_cmtg_regs.h    |  5 +++++
> >  2 files changed, 24 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c
> > b/drivers/gpu/drm/i915/display/intel_cmtg.c
> > index 5e9aaa50b38f..3dfb691913cb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> > @@ -17,6 +17,7 @@
> >  #include "intel_display_power.h"
> >  #include "intel_display_regs.h"
> >  #include "intel_display_types.h"
> > +#include "intel_vrr_regs.h"
> >
> >  /**
> >   * DOC: Common Primary Timing Generator (CMTG) @@ -213,6 +214,7
> @@
> > static void intel_cmtg_set_timings(const struct intel_crtc_state
> > *crtc_state)  {
> >  	struct intel_display *display = to_intel_display(crtc_state);
> >  	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > +	u32 vctl;
> >
> >  	intel_de_write(display, TRANS_HTOTAL_CMTG(cpu_transcoder),
> >  		       intel_de_read(display, TRANS_HTOTAL(display,
> > cpu_transcoder))); @@ -226,6 +228,23 @@ static void
> intel_cmtg_set_timings(const struct intel_crtc_state *crtc_state)
> >  		       intel_de_read(display, TRANS_VBLANK(display,
> cpu_transcoder)));
> >  	intel_de_write(display, TRANS_VSYNC_CMTG(cpu_transcoder),
> >  		       intel_de_read(display, TRANS_VSYNC(display,
> > cpu_transcoder)));
> > +
> > +	vctl = intel_de_read(display, TRANS_VRR_CTL(display,
> cpu_transcoder));
> > +	if (vctl & VRR_CTL_VRR_ENABLE) {
> > +		u32 vmax, flipline, vmin;
> > +
> > +		vmax = intel_de_read(display, TRANS_VRR_VMAX(display,
> cpu_transcoder));
> > +		flipline = intel_de_read(display,
> TRANS_VRR_FLIPLINE(display, cpu_transcoder));
> > +		if (vmax != flipline)
> > +			return;
> > +
> > +		vmin = intel_de_read(display, TRANS_VRR_VMIN(display,
> > +cpu_transcoder));
> > +
> > +		intel_de_write(display,
> TRANS_VRR_VMAX_CMTG(cpu_transcoder), vmax);
> > +		intel_de_write(display,
> TRANS_VRR_VMIN_CMTG(cpu_transcoder), vmin);
> > +		intel_de_write(display,
> TRANS_VRR_FLIPLINE_CMTG(cpu_transcoder), flipline);
> > +		intel_de_write(display,
> TRANS_VRR_CTL_CMTG(cpu_transcoder), vctl);
> > +	}
> >  }
> >
> >  void intel_cmtg_enable(const struct intel_crtc_state *crtc_state)
> > diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > index 47403bbcac7d..37dee7165852 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > @@ -33,4 +33,9 @@ enum cmtg {
> >  #define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) *
> 0x100)
> >  #define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) *
> 0x100)
> >
> > +#define TRANS_VRR_CTL_CMTG(id)		_MMIO(0x6F420 + (id) *
> 0x100)
> > +#define TRANS_VRR_VMAX_CMTG(id)		_MMIO(0x6F424 +
> (id) * 0x100)
> > +#define TRANS_VRR_VMIN_CMTG(id)		_MMIO(0x6F434 +
> (id) * 0x100)
> > +#define TRANS_VRR_FLIPLINE_CMTG(id)	_MMIO(0x6F438 + (id) *
> 0x100)
> > +
> >  #endif /* __INTEL_CMTG_REGS_H__ */
> 
> --
> Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [RFC 3/8] drm/i915/cmtg: set timings for cmtg
  2025-11-17 15:13   ` Jani Nikula
@ 2026-01-08  8:15     ` Manna, Animesh
  0 siblings, 0 replies; 21+ messages in thread
From: Manna, Animesh @ 2026-01-08  8:15 UTC (permalink / raw)
  To: Jani Nikula, intel-gfx@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org



> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Monday, November 17, 2025 8:43 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>
> Subject: Re: [RFC 3/8] drm/i915/cmtg: set timings for cmtg
> 
> On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> > Timing registers are separate for CMTG, read transcoder register and
> > program cmtg transcoder with those values.
> >
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_cmtg.c     | 31 +++++++++++++++++++
> >  drivers/gpu/drm/i915/display/intel_cmtg.h     |  1 +
> >  .../gpu/drm/i915/display/intel_cmtg_regs.h    | 13 ++++++++
> >  drivers/gpu/drm/i915/display/intel_display.c  |  4 +++
> >  4 files changed, 49 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.c
> > b/drivers/gpu/drm/i915/display/intel_cmtg.c
> > index 4640cafe8dde..5e9aaa50b38f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cmtg.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cmtg.c
> > @@ -208,3 +208,34 @@ void intel_cmtg_set_clk_select(const struct
> intel_crtc_state *crtc_state)
> >  	if (clk_sel_set)
> >  		intel_de_rmw(display, CMTG_CLK_SEL, clk_sel_clr,
> clk_sel_set);  }
> > +
> > +static void intel_cmtg_set_timings(const struct intel_crtc_state
> > +*crtc_state) {
> > +	struct intel_display *display = to_intel_display(crtc_state);
> > +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > +
> > +	intel_de_write(display, TRANS_HTOTAL_CMTG(cpu_transcoder),
> > +		       intel_de_read(display, TRANS_HTOTAL(display,
> cpu_transcoder)));
> > +	intel_de_write(display, TRANS_HBLANK_CMTG(cpu_transcoder),
> > +		       intel_de_read(display, TRANS_HBLANK(display,
> cpu_transcoder)));
> > +	intel_de_write(display, TRANS_HSYNC_CMTG(cpu_transcoder),
> > +		       intel_de_read(display, TRANS_HSYNC(display,
> cpu_transcoder)));
> > +	intel_de_write(display, TRANS_VTOTAL_CMTG(cpu_transcoder),
> > +		       intel_de_read(display, TRANS_VTOTAL(display,
> cpu_transcoder)));
> > +	intel_de_write(display, TRANS_VBLANK_CMTG(cpu_transcoder),
> > +		       intel_de_read(display, TRANS_VBLANK(display,
> cpu_transcoder)));
> > +	intel_de_write(display, TRANS_VSYNC_CMTG(cpu_transcoder),
> > +		       intel_de_read(display, TRANS_VSYNC(display,
> > +cpu_transcoder)));
> 
> If something needs to be written in multiple places, it needs to be written
> from the same source software state, not via hardware like this.

Taken care in next version, currently debug ongoing with flipQ, will float after that.

Regards,
Animesh
> 
> > +}
> > +
> > +void intel_cmtg_enable(const struct intel_crtc_state *crtc_state) {
> > +	enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > +
> > +	if (cpu_transcoder != TRANSCODER_A && cpu_transcoder !=
> TRANSCODER_B)
> > +		return;
> > +
> > +	/* Program CMTG Transcoder Timings */
> 
> Is this comment helpful?
> 
> > +	intel_cmtg_set_timings(crtc_state);
> > +
> > +}
> > diff --git a/drivers/gpu/drm/i915/display/intel_cmtg.h
> > b/drivers/gpu/drm/i915/display/intel_cmtg.h
> > index bef2426b2787..113042e5d3a8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cmtg.h
> > +++ b/drivers/gpu/drm/i915/display/intel_cmtg.h
> > @@ -11,5 +11,6 @@ struct intel_crtc_state;
> >
> >  void intel_cmtg_set_clk_select(const struct intel_crtc_state
> > *crtc_state);  void intel_cmtg_sanitize(struct intel_display
> > *display);
> > +void intel_cmtg_enable(const struct intel_crtc_state *crtc_state);
> >
> >  #endif /* __INTEL_CMTG_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > index 9fd54f7e9d1f..47403bbcac7d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_cmtg_regs.h
> > @@ -8,6 +8,12 @@
> >
> >  #include "intel_display_reg_defs.h"
> >
> > +enum cmtg {
> > +	CMTG_A = 0,
> > +	CMTG_B,
> > +	MAX_CMTG
> > +};
> > +
> >  #define CMTG_CLK_SEL			_MMIO(0x46160)
> >  #define CMTG_CLK_SEL_A_MASK		REG_GENMASK(31, 29)
> >  #define CMTG_CLK_SELECT_PHYA_ENABLE	0x4
> > @@ -20,4 +26,11 @@
> >  #define TRANS_CMTG_CTL_B		_MMIO(0x6fb88)
> >  #define  CMTG_ENABLE			REG_BIT(31)
> >
> > +#define TRANS_HTOTAL_CMTG(id)		_MMIO(0x6F000 + (id) *
> 0x100)
> > +#define TRANS_HBLANK_CMTG(id)		_MMIO(0x6F004 + (id) *
> 0x100)
> > +#define TRANS_HSYNC_CMTG(id)		_MMIO(0x6F008 + (id) *
> 0x100)
> > +#define TRANS_VTOTAL_CMTG(id)		_MMIO(0x6F00C + (id) *
> 0x100)
> > +#define TRANS_VBLANK_CMTG(id)		_MMIO(0x6F010 + (id) *
> 0x100)
> > +#define TRANS_VSYNC_CMTG(id)		_MMIO(0x6F014 + (id) *
> 0x100)
> > +
> >  #endif /* __INTEL_CMTG_REGS_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index 069967114bd9..19242c12f52a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -63,6 +63,7 @@
> >  #include "intel_casf.h"
> >  #include "intel_cdclk.h"
> >  #include "intel_clock_gating.h"
> > +#include "intel_cmtg.h"
> >  #include "intel_color.h"
> >  #include "intel_crt.h"
> >  #include "intel_crtc.h"
> > @@ -1669,6 +1670,9 @@ static void hsw_crtc_enable(struct
> intel_atomic_state *state,
> >  	if (!transcoder_is_dsi(cpu_transcoder))
> >  		hsw_configure_cpu_transcoder(new_crtc_state);
> >
> > +	if (new_crtc_state->enable_cmtg)
> > +		intel_cmtg_enable(new_crtc_state);
> > +
> >  	for_each_pipe_crtc_modeset_enable(display, pipe_crtc,
> new_crtc_state, i) {
> >  		const struct intel_crtc_state *pipe_crtc_state =
> >  			intel_atomic_get_new_crtc_state(state, pipe_crtc);
> 
> --
> Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 21+ messages in thread

* RE: [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards
  2025-11-17 15:15   ` Jani Nikula
@ 2026-01-08  8:17     ` Manna, Animesh
  0 siblings, 0 replies; 21+ messages in thread
From: Manna, Animesh @ 2026-01-08  8:17 UTC (permalink / raw)
  To: Jani Nikula, intel-gfx@lists.freedesktop.org,
	intel-xe@lists.freedesktop.org



> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Monday, November 17, 2025 8:45 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; intel-xe@lists.freedesktop.org
> Cc: Manna, Animesh <animesh.manna@intel.com>
> Subject: Re: [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards
> 
> On Mon, 17 Nov 2025, Animesh Manna <animesh.manna@intel.com> wrote:
> > Introduce a flag for cmtg. LNL onwards CMTG support will be added.
> > Set the flag as per DISPLAY_VER() check.
> >
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
> >  drivers/gpu/drm/i915/display/intel_dp.c            | 5 +++++
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 38702a9e0f50..7b8343755c90 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1351,6 +1351,9 @@ struct intel_crtc_state {
> >
> >  	struct drm_rect psr2_su_area;
> >
> > +	/* CMTG Enable */
> 
> The comment is useless, it's literally the same as the member name.
> 
> > +	bool enable_cmtg;
> 
> Please let's add this stuff in sub-structs, we should do it more in
> general:
> 
> 	struct {
> 		bool enable;
>         } cmtg;
> 
> > +
> >  	/* Variable Refresh Rate state */
> >  	struct {
> >  		bool enable, in_range;
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 0ec82fcbcf48..3f7da4c08665 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -3421,6 +3421,11 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
> >  	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> >  	intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp,
> pipe_config, conn_state);
> >
> > +	if(DISPLAY_VER(display) >= 15 && intel_dp_is_edp(intel_dp)) {
> > +		pipe_config->enable_cmtg = true;
> > +		drm_dbg_kms(display->drm,"ANI-DBG:
> intel_dp_compute_config\n");
> 
> Please don't leave personal debug stuff even in RFC code.

All above feedback have taken care in next version, currently debug ongoing with flipQ, will float after that.

Regards,
Animesh
> 
> > +	}
> > +
> >  	return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp,
> connector,
> >  							pipe_config);
> >  }
> 
> --
> Jani Nikula, Intel

^ permalink raw reply	[flat|nested] 21+ messages in thread

end of thread, other threads:[~2026-01-08  8:17 UTC | newest]

Thread overview: 21+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-17 11:42 [RFC 0/8] CMTG enablement Animesh Manna
2025-11-17 11:42 ` [RFC 1/8] drm/i915/cmtg: enable cmtg LNL onwards Animesh Manna
2025-11-17 15:15   ` Jani Nikula
2026-01-08  8:17     ` Manna, Animesh
2025-11-17 11:42 ` [RFC 2/8] drm/i915/cmtg: cmtg set clock select Animesh Manna
2025-11-17 15:17   ` Jani Nikula
2025-11-17 11:42 ` [RFC 3/8] drm/i915/cmtg: set timings for cmtg Animesh Manna
2025-11-17 15:13   ` Jani Nikula
2026-01-08  8:15     ` Manna, Animesh
2025-11-17 11:42 ` [RFC 4/8] drm/i915/cmtg: program vrr registers of cmtg Animesh Manna
2025-11-17 15:09   ` Jani Nikula
2026-01-08  8:14     ` Manna, Animesh
2025-11-17 11:42 ` [RFC 5/8] drm/i915/cmtg: program set context latency " Animesh Manna
2025-11-17 11:42 ` [RFC 6/8] drm/i915/cmtg: set transcoder mn for cmtg Animesh Manna
2025-11-17 11:42 ` [RFC 7/8] drm/i915/cmtg: program sync to port " Animesh Manna
2025-11-17 11:42 ` [RFC 8/8] drm/i915/cmtg: enable cmtg ctl Animesh Manna
2025-11-17 12:15 ` ✗ CI.checkpatch: warning for CMTG enablement Patchwork
2025-11-17 12:16 ` ✓ CI.KUnit: success " Patchwork
2025-11-17 12:31 ` ✗ CI.checksparse: warning " Patchwork
2025-11-17 12:54 ` ✓ Xe.CI.BAT: success " Patchwork
2025-11-17 14:54 ` ✗ Xe.CI.Full: failure " Patchwork

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