Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Matthew Brost <matthew.brost@intel.com>
To: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
	<thomas.hellstrom@linux.intel.com>, <oak.zeng@intel.com>
Subject: Re: [RFC 27/29] drm/xe/uapi: Add uapi for vma count and mem attributes
Date: Wed, 14 May 2025 12:39:34 -0700	[thread overview]
Message-ID: <aCTxdsdjAjH+F3Ax@lstrano-desk.jf.intel.com> (raw)
In-Reply-To: <20250314080226.2059819-28-himal.prasad.ghimiray@intel.com>

On Fri, Mar 14, 2025 at 01:32:24PM +0530, Himal Prasad Ghimiray wrote:
> -DRM_IOCTL_XE_VM_QUERY_VMAS: Return number of VMAs in user-specified range.
> -DRM_IOCTL_XE_VM_QUERY_VMAS_ATTRS: Fill VMA attributes in user-provided
>  buffer.
> 

I can't remember if landed on if this needed? I thought the answer was,
no not needed.

If it is needed could be make this a single IOCTL. e.g. Call in once
with num_vmas == 0 + NULL vector, IOCTL returns num_vmas, then called
again with num_vmas != 0 + non-NULL vector.

Matt

> Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device.c |   2 +
>  drivers/gpu/drm/xe/xe_vm.c     |  94 +++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_vm.h     |   3 +-
>  include/uapi/drm/xe_drm.h      | 115 +++++++++++++++++++++++++++++++++
>  4 files changed, 213 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 91687679cf14..8ad5e5523e38 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -195,6 +195,8 @@ static const struct drm_ioctl_desc xe_ioctls[] = {
>  			  DRM_RENDER_ALLOW),
>  	DRM_IOCTL_DEF_DRV(XE_OBSERVATION, xe_observation_ioctl, DRM_RENDER_ALLOW),
>  	DRM_IOCTL_DEF_DRV(XE_MADVISE, xe_vm_madvise_ioctl, DRM_RENDER_ALLOW),
> +	DRM_IOCTL_DEF_DRV(XE_VM_QUERY_VMAS, xe_vm_query_vmas_ioctl, DRM_RENDER_ALLOW),
> +	DRM_IOCTL_DEF_DRV(XE_VM_QUERY_VMAS_ATTRS, xe_vm_query_vmas_attrs_ioctl, DRM_RENDER_ALLOW),
>  };
>  
>  static long xe_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 36546c82df06..349481b13546 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -2161,6 +2161,100 @@ int xe_vm_destroy_ioctl(struct drm_device *dev, void *data,
>  	return err;
>  }
>  
> +int xe_vm_query_vmas_ioctl(struct drm_device *dev, void *data,
> +			   struct drm_file *file)
> +{
> +	struct xe_device *xe = to_xe_device(dev);
> +	struct xe_file *xef = to_xe_file(file);
> +	struct drm_xe_vm_query_num_vmas *args = data;
> +	struct drm_gpuva *gpuva;
> +	struct xe_vm *vm;
> +
> +	vm = xe_vm_lookup(xef, args->vm_id);
> +	if (XE_IOCTL_DBG(xe, !vm))
> +		return -EINVAL;
> +
> +	args->num_vmas = 0;
> +	down_write(&vm->lock);
> +
> +	drm_gpuvm_for_each_va_range(gpuva, &vm->gpuvm, args->start, args->start + args->range)
> +		args->num_vmas++;
> +
> +	up_write(&vm->lock);
> +	return 0;
> +}
> +
> +static int get_mem_attrs(struct xe_vm *vm, u32 *num_vmas, u64 start,
> +			 u64 end, struct drm_xe_vma_mem_attr *mem_attrs)
> +{
> +	struct drm_gpuva *gpuva;
> +	int i = 0;
> +
> +	lockdep_assert_held(&vm->lock);
> +
> +	drm_gpuvm_for_each_va_range(gpuva, &vm->gpuvm, start, end) {
> +		struct xe_vma *vma = gpuva_to_vma(gpuva);
> +
> +		if (i == *num_vmas)
> +			return -EINVAL;
> +
> +		mem_attrs[i].start = xe_vma_start(vma);
> +		mem_attrs[i].end = xe_vma_end(vma);
> +		mem_attrs[i].atomic.val = vma->attr.atomic_access;
> +		mem_attrs[i].pat_index.val = vma->attr.pat_index;
> +		mem_attrs[i].preferred_mem_loc.devmem_fd = vma->attr.preferred_loc.devmem_fd;
> +		mem_attrs[i].preferred_mem_loc.migration_policy = vma->attr.preferred_loc.migration_policy;
> +
> +		i++;
> +	}
> +
> +	if (i <  (*num_vmas - 1))
> +		*num_vmas = i;
> +	return 0;
> +}
> +
> +int xe_vm_query_vmas_attrs_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> +{
> +	struct xe_device *xe = to_xe_device(dev);
> +	struct xe_file *xef = to_xe_file(file);
> +	struct drm_xe_vma_mem_attr *mem_attrs;
> +	struct drm_xe_vm_query_vmas_attr *args = data;
> +	u64 __user *attrs_user = NULL;
> +	struct xe_vm *vm;
> +	int err;
> +
> +	if (XE_IOCTL_DBG(xe, args->num_vmas < 1))
> +		return -EINVAL;
> +
> +	vm = xe_vm_lookup(xef, args->vm_id);
> +	if (XE_IOCTL_DBG(xe, !vm))
> +		return -EINVAL;
> +
> +	down_write(&vm->lock);
> +
> +	attrs_user = u64_to_user_ptr(args->vector_of_vma_mem_attr);
> +	mem_attrs = kvmalloc_array(args->num_vmas, sizeof(struct drm_xe_vma_mem_attr),
> +				   GFP_KERNEL | __GFP_ACCOUNT |
> +				   __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
> +	if (!mem_attrs)
> +		return args->num_vmas > 1 ? -ENOBUFS : -ENOMEM;
> +
> +	err = get_mem_attrs(vm, &args->num_vmas, args->start,
> +			    args->start + args->range, mem_attrs);
> +	if (err)
> +		goto free_mem_attrs;
> +
> +	err = __copy_to_user(attrs_user, mem_attrs,
> +			     sizeof(struct drm_xe_vma_mem_attr) * args->num_vmas);
> +
> +free_mem_attrs:
> +	kvfree(mem_attrs);
> +
> +	up_write(&vm->lock);
> +
> +	return err;
> +}
> +
>  static bool vma_matches(struct xe_vma *vma, u64 page_addr)
>  {
>  	if (page_addr > xe_vma_end(vma) - 1 ||
> diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
> index 377f62f859b7..0b2d6e9f77ef 100644
> --- a/drivers/gpu/drm/xe/xe_vm.h
> +++ b/drivers/gpu/drm/xe/xe_vm.h
> @@ -193,7 +193,8 @@ int xe_vm_destroy_ioctl(struct drm_device *dev, void *data,
>  			struct drm_file *file);
>  int xe_vm_bind_ioctl(struct drm_device *dev, void *data,
>  		     struct drm_file *file);
> -
> +int xe_vm_query_vmas_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
> +int xe_vm_query_vmas_attrs_ioctl(struct drm_device *dev, void *data, struct drm_file *file);
>  void xe_vm_close_and_put(struct xe_vm *vm);
>  
>  static inline bool xe_vm_in_fault_mode(struct xe_vm *vm)
> diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
> index f30d0cb5b054..68c447db9f2e 100644
> --- a/include/uapi/drm/xe_drm.h
> +++ b/include/uapi/drm/xe_drm.h
> @@ -82,6 +82,8 @@ extern "C" {
>   *  - &DRM_IOCTL_XE_WAIT_USER_FENCE
>   *  - &DRM_IOCTL_XE_OBSERVATION
>   *  - &DRM_IOCTL_XE_MADVISE
> + *  - &DRM_IOCTL_XE_VM_QUERY_VMAS
> + *  - &DRM_IOCTL_XE_VM_QUERY_VMAS_ATTRS
>   */
>  
>  /*
> @@ -104,6 +106,8 @@ extern "C" {
>  #define DRM_XE_WAIT_USER_FENCE		0x0a
>  #define DRM_XE_OBSERVATION		0x0b
>  #define DRM_XE_MADVISE			0x0c
> +#define DRM_XE_VM_QUERY_VMAS		0x0d
> +#define DRM_XE_VM_QUERY_VMAS_ATTRS	0x0e
>  
>  /* Must be kept compact -- no holes */
>  
> @@ -120,6 +124,8 @@ extern "C" {
>  #define DRM_IOCTL_XE_WAIT_USER_FENCE		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
>  #define DRM_IOCTL_XE_OBSERVATION		DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param)
>  #define DRM_IOCTL_XE_MADVISE			DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_MADVISE, struct drm_xe_madvise)
> +#define DRM_IOCTL_XE_VM_QUERY_VMAS		DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_QUERY_VMAS, struct drm_xe_vm_query_num_vmas)
> +#define DRM_IOCTL_XE_VM_QUERY_VMAS_ATTRS	DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_QUERY_VMAS_ATTRS, struct drm_xe_vm_query_vmas_attr)
>  
>  /**
>   * DOC: Xe IOCTL Extensions
> @@ -2059,6 +2065,115 @@ struct drm_xe_madvise {
>  
>  };
>  
> +/**
> + * struct drm_xe_vm_query_num_vmas - Input of &DRM_IOCTL_XE_VM_QUERY_VMAS
> + *
> + * Get number of vmas in virtual range of vm_id
> + */
> +struct drm_xe_vm_query_num_vmas {
> +	 /** @extensions: Pointer to the first extension struct, if any */
> +	__u64 extensions;
> +
> +	/** @vm_id: vm_id of the virtual range */
> +	__u32 vm_id;
> +
> +	/** @num_vmas: number of vmas in range returned in @num_vmas */
> +	__u32 num_vmas;
> +
> +	/** @start: start of the virtual address range */
> +	__u64 start;
> +
> +	/** @size: size of the virtual address range */
> +	__u64 range;
> +
> +	 /** @reserved: Reserved */
> +	__u64 reserved[2];
> +};
> +
> +struct drm_xe_vma_mem_attr {
> +	 /** @extensions: Pointer to the first extension struct, if any */
> +	__u64 extensions;
> +
> +	/** @start: start of the vma */
> +	__u64 start;
> +
> +	/** @size: end of the vma */
> +	__u64 end;
> +
> +	struct {
> +		struct {
> +		/** @val: value of atomic operation*/
> +			__u32 val;
> +
> +		/** @reserved: Reserved */
> +			__u32 reserved;
> +		} atomic;
> +
> +		struct {
> +		/** @val: value for DRM_XE_VMA_ATTR_PURGEABLE_STATE */
> +			__u32 val;
> +
> +		/** @reserved: Reserved */
> +			__u32 reserved;
> +		} purge_state_val;
> +
> +		struct {
> +			/** @pat_index */
> +			__u32 val;
> +
> +			/** @reserved: Reserved */
> +			__u32 reserved;
> +		} pat_index;
> +
> +		/** @preferred_mem_loc: preferred memory location */
> +		struct {
> +			__u32 devmem_fd;
> +
> +			__u32 migration_policy;
> +		} preferred_mem_loc;
> +	};
> +
> +	 /** @reserved: Reserved */
> +	__u64 reserved[2];
> +};
> +
> +/**
> + * struct drm_xe_vm_query_vmas_attr - Input of &DRM_IOCTL_XE_VM_QUERY_MEM_ATTRIBUTES
> + *
> + * Get memory attributes to a virtual address range
> + */
> +struct drm_xe_vm_query_vmas_attr {
> +	/** @extensions: Pointer to the first extension struct, if any */
> +	__u64 extensions;
> +
> +	/** @vm_id: vm_id of the virtual range */
> +	__u32 vm_id;
> +
> +	/** @num_vmas: number of vmas in range returned in @num_vmas */
> +	__u32 num_vmas;
> +
> +	/** @start: start of the virtual address range */
> +	__u64 start;
> +
> +	/** @size: size of the virtual address range */
> +	__u64 range;
> +
> +	union {
> +		/** @num_vmas: used if num_vmas == 1 */
> +		struct drm_xe_vma_mem_attr attr;
> +
> +		/**
> +		 * @vector_of_ops: userptr to array of struct
> +		 * drm_xe_vma_mem_attr if num_vmas > 1
> +		 */
> +		__u64 vector_of_vma_mem_attr;
> +	};
> +
> +	/** @reserved: Reserved */
> +	__u64 reserved[2];
> +
> +};
> +
>  #if defined(__cplusplus)
>  }
>  #endif
> -- 
> 2.34.1
> 

  reply	other threads:[~2025-05-14 19:38 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-14  8:01 [RFC 00/29] PREFETCH and MADVISE for SVM ranges Himal Prasad Ghimiray
2025-03-14  8:01 ` [RFC 01/29] drm/xe: Introduce xe_vma_op_prefetch_range struct for prefetch of ranges Himal Prasad Ghimiray
2025-04-03 20:59   ` Matthew Brost
2025-03-14  8:01 ` [RFC 02/29] drm/xe: Make xe_svm_alloc_vram public Himal Prasad Ghimiray
2025-03-27 22:45   ` Matthew Brost
2025-03-28  7:51     ` Ghimiray, Himal Prasad
2025-03-14  8:02 ` [RFC 03/29] drm/xe/svm: Helper to add tile masks to svm ranges Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 04/29] drm/xe/svm: Make to_xe_range a public function Himal Prasad Ghimiray
2025-03-28  2:57   ` Matthew Brost
2025-03-14  8:02 ` [RFC 05/29] drm/xe/svm: Make xe_svm_range_* end/start/size public Himal Prasad Ghimiray
2025-03-27 22:46   ` Matthew Brost
2025-03-14  8:02 ` [RFC 06/29] drm/xe/vm: Update xe_vma_ops_incr_pt_update_ops to take an increment value Himal Prasad Ghimiray
2025-03-28  2:56   ` Matthew Brost
2025-03-28  7:52     ` Ghimiray, Himal Prasad
2025-03-14  8:02 ` [RFC 07/29] drm/xe/vm: Add an identifier in xe_vma_ops for svm prefetch Himal Prasad Ghimiray
2025-03-27 22:49   ` Matthew Brost
2025-03-28  7:53     ` Ghimiray, Himal Prasad
2025-03-14  8:02 ` [RFC 08/29] drm/xe: Rename lookup_vma function to xe_find_vma_by_addr Himal Prasad Ghimiray
2025-04-03 21:02   ` Matthew Brost
2025-04-07  6:16     ` Ghimiray, Himal Prasad
2025-03-14  8:02 ` [RFC 09/29] drm/xe/svm: Allow unaligned addresses and ranges for prefetch Himal Prasad Ghimiray
2025-04-03 20:52   ` Matthew Brost
2025-04-07  6:15     ` Ghimiray, Himal Prasad
2025-03-14  8:02 ` [RFC 10/29] drm/xe/svm: Refactor usage of drm_gpusvm* function in xe_svm Himal Prasad Ghimiray
2025-04-03 20:54   ` Matthew Brost
2025-04-07  6:15     ` Ghimiray, Himal Prasad
2025-03-14  8:02 ` [RFC 11/29] drm/xe/svm: Implement prefetch support for SVM ranges Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 12/29] drm/xe/vm: Add debug prints for SVM range prefetch Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 13/29] drm/gpuvm: Introduce MADVISE Operations Himal Prasad Ghimiray
2025-03-14  8:46   ` Ghimiray, Himal Prasad
2025-03-17 14:27   ` Danilo Krummrich
2025-03-18 11:58     ` Ghimiray, Himal Prasad
2025-03-14  8:02 ` [RFC 14/29] drm/xe/uapi: Add madvise interface Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 15/29] drm/xe/vm: Add attributes struct as member of vma Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 16/29] drm/xe/vma: Move pat_index to vma attributes Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 17/29] drm/xe/vma: Modify new_vma to accept struct xe_vma_mem_attr as parameter Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 18/29] drm/gpusvm: Make drm_gpusvm_for_each_* macros public Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 19/29] drm/xe/svm: Split system allocator vma incase of madvise call Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 20/29] drm/xe: Implement madvise ioctl for xe Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 21/29] drm/xe: Allow CPU address mirror VMA unbind with gpu bindings for madvise Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 22/29] drm/xe/svm : Add svm ranges migration policy on atomic access Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 23/29] drm/xe/madvise: Update migration policy based on preferred location Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 24/29] drm/xe/svm: Support DRM_XE_SVM_ATTR_PAT memory attribute Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 25/29] drm/xe/uapi: Add flag for consulting madvise hints on svm prefetch Himal Prasad Ghimiray
2025-05-14 19:26   ` Matthew Brost
2025-03-14  8:02 ` [RFC 26/29] drm/xe/svm: Consult madvise preferred location in prefetch Himal Prasad Ghimiray
2025-03-14  8:02 ` [RFC 27/29] drm/xe/uapi: Add uapi for vma count and mem attributes Himal Prasad Ghimiray
2025-05-14 19:39   ` Matthew Brost [this message]
2025-03-14  8:02 ` [RFC 28/29] drm/xe/bo: Add attributes field to xe_bo Himal Prasad Ghimiray
2025-05-14 19:35   ` Matthew Brost
2025-03-14  8:02 ` [RFC 29/29] drm/xe/bo : Update atomic_access attribute on madvise Himal Prasad Ghimiray
2025-03-14 15:00 ` ✗ CI.Patch_applied: failure for PREFETCH and MADVISE for SVM ranges (rev2) Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=aCTxdsdjAjH+F3Ax@lstrano-desk.jf.intel.com \
    --to=matthew.brost@intel.com \
    --cc=himal.prasad.ghimiray@intel.com \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=oak.zeng@intel.com \
    --cc=thomas.hellstrom@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox