[PATCH 00/13] drm/1915: skl+ watermark/latency stuff

[PATCH 00/13] drm/1915: skl+ watermark/latency stuff

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

A bunch of claenup to the watermark latency setup on skl+, and
a few potential fixes for some edge cases.

Ville Syrjälä (13):
  drm/i915/dram: Also apply the 16Gb DIMM w/a for larger DRAM chips
  drm/i915: Apply the 16Gb DIMM w/a only for the platforms that need it
  drm/i915: Tweak the read latency fixup code
  drm/i915: Don't pass the latency array to {skl,mtl}_read_wm_latency()
  drm/i915: Move adjust_wm_latency() out from
    {mtl,skl}_read_wm_latency()
  drm/i915: Extract multiply_wm_latency() from skl_read_wm_latency()
  drm/i915: Extract increase_wm_latency()
  drm/i915: Use increase_wm_latency() for the 16Gb DIMM w/a
  drm/i915: Extract sanitize_wm_latency()
  drm/i915: Flatten sanitize_wm_latency() a bit
  drm/i915: Make wm latencies monotonic
  drm/i915: Print both the original and adjusted wm latencies
  drm/i915: Make sure wm block/lines are non-decreasing

 drivers/gpu/drm/i915/display/skl_watermark.c | 160 +++++++++++++------
 drivers/gpu/drm/i915/soc/intel_dram.c        |  10 +-
 2 files changed, 118 insertions(+), 52 deletions(-)

-- 
2.49.1

[PATCH 01/13] drm/i915/dram: Also apply the 16Gb DIMM w/a for larger DRAM chips

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

While the spec only asks us to do the WM0 latency bump for 16Gb
DRAM devices I believe we should apply it for larger DRAM chips.
At the time the w/a was added there were no larger chips on
the market, but I think I've seen at least 32Gb DDR4 chips
being available these days.

Whether it's possible to actually find suitable DIMMs for the
affected systems with largers chips I don't know. Also it's
not known whether the 1 usec latency bump would be sufficient
for larger chips. Someone would need to find such DIMMs and
test this. Fortunately we do have a bit of extra latency already
with the 1 usec bump, as the actual requirement was .4 usec for
for 16Gb chips.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c |  4 ++--
 drivers/gpu/drm/i915/soc/intel_dram.c        | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 0b9c86042e78..b7482d428868 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3209,9 +3209,9 @@ adjust_wm_latency(struct intel_display *display,
 	}
 
 	/*
-	 * WA Level-0 adjustment for 16Gb DIMMs: SKL+
+	 * WA Level-0 adjustment for 16Gb+ DIMMs: SKL+
 	 * If we could not get dimm info enable this WA to prevent from
-	 * any underrun. If not able to get DIMM info assume 16Gb DIMM
+	 * any underrun. If not able to get DIMM info assume 16Gb+ DIMM
 	 * to avoid any underrun.
 	 */
 	if (!display->platform.dg2 && dram_info->has_16gb_dimms)
diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
index 149527827624..8e81573022ff 100644
--- a/drivers/gpu/drm/i915/soc/intel_dram.c
+++ b/drivers/gpu/drm/i915/soc/intel_dram.c
@@ -335,7 +335,7 @@ static bool
 skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
 {
 	/* Convert total Gb to Gb per DRAM device */
-	return dimm->size / (intel_dimm_num_devices(dimm) ?: 1) == 16;
+	return dimm->size / (intel_dimm_num_devices(dimm) ?: 1) >= 16;
 }
 
 static void
@@ -354,7 +354,7 @@ skl_dram_get_dimm_info(struct drm_i915_private *i915,
 	}
 
 	drm_dbg_kms(&i915->drm,
-		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb DIMMs: %s\n",
+		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
 		    channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
 		    str_yes_no(skl_is_16gb_dimm(dimm)));
 }
@@ -384,7 +384,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
 	ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
 		skl_is_16gb_dimm(&ch->dimm_s);
 
-	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n",
+	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
 		    channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
 
 	return 0;
@@ -406,7 +406,7 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
 	u32 val;
 	int ret;
 
-	/* Assume 16Gb DIMMs are present until proven otherwise */
+	/* Assume 16Gb+ DIMMs are present until proven otherwise */
 	dram_info->has_16gb_dimms = true;
 
 	val = intel_uncore_read(&i915->uncore,
@@ -438,7 +438,7 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
 	drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
 		    str_yes_no(dram_info->symmetric_memory));
 
-	drm_dbg_kms(&i915->drm, "16Gb DIMMs: %s\n",
+	drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
 		    str_yes_no(dram_info->has_16gb_dimms));
 
 	return 0;
-- 
2.49.1

Re: [PATCH 01/13] drm/i915/dram: Also apply the 16Gb DIMM w/a for larger DRAM chips

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> While the spec only asks us to do the WM0 latency bump for 16Gb
> DRAM devices I believe we should apply it for larger DRAM chips.
> At the time the w/a was added there were no larger chips on
> the market, but I think I've seen at least 32Gb DDR4 chips
> being available these days.
> 
> Whether it's possible to actually find suitable DIMMs for the
> affected systems with largers chips I don't know. Also it's
> not known whether the 1 usec latency bump would be sufficient
> for larger chips. Someone would need to find such DIMMs and
> test this. Fortunately we do have a bit of extra latency already
> with the 1 usec bump, as the actual requirement was .4 usec for
> for 16Gb chips.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Sound reasonable.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.




>  drivers/gpu/drm/i915/display/skl_watermark.c |  4 ++--
>  drivers/gpu/drm/i915/soc/intel_dram.c        | 10 +++++-----
>  2 files changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 0b9c86042e78..b7482d428868 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3209,9 +3209,9 @@ adjust_wm_latency(struct intel_display *display,
>  	}
>  
>  	/*
> -	 * WA Level-0 adjustment for 16Gb DIMMs: SKL+
> +	 * WA Level-0 adjustment for 16Gb+ DIMMs: SKL+
>  	 * If we could not get dimm info enable this WA to prevent from
> -	 * any underrun. If not able to get DIMM info assume 16Gb DIMM
> +	 * any underrun. If not able to get DIMM info assume 16Gb+ DIMM
>  	 * to avoid any underrun.
>  	 */
>  	if (!display->platform.dg2 && dram_info->has_16gb_dimms)
> diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
> index 149527827624..8e81573022ff 100644
> --- a/drivers/gpu/drm/i915/soc/intel_dram.c
> +++ b/drivers/gpu/drm/i915/soc/intel_dram.c
> @@ -335,7 +335,7 @@ static bool
>  skl_is_16gb_dimm(const struct dram_dimm_info *dimm)
>  {
>  	/* Convert total Gb to Gb per DRAM device */
> -	return dimm->size / (intel_dimm_num_devices(dimm) ?: 1) == 16;
> +	return dimm->size / (intel_dimm_num_devices(dimm) ?: 1) >= 16;
>  }
>  
>  static void
> @@ -354,7 +354,7 @@ skl_dram_get_dimm_info(struct drm_i915_private *i915,
>  	}
>  
>  	drm_dbg_kms(&i915->drm,
> -		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb DIMMs: %s\n",
> +		    "CH%u DIMM %c size: %u Gb, width: X%u, ranks: %u, 16Gb+ DIMMs: %s\n",
>  		    channel, dimm_name, dimm->size, dimm->width, dimm->ranks,
>  		    str_yes_no(skl_is_16gb_dimm(dimm)));
>  }
> @@ -384,7 +384,7 @@ skl_dram_get_channel_info(struct drm_i915_private *i915,
>  	ch->is_16gb_dimm = skl_is_16gb_dimm(&ch->dimm_l) ||
>  		skl_is_16gb_dimm(&ch->dimm_s);
>  
> -	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n",
> +	drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb+ DIMMs: %s\n",
>  		    channel, ch->ranks, str_yes_no(ch->is_16gb_dimm));
>  
>  	return 0;
> @@ -406,7 +406,7 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>  	u32 val;
>  	int ret;
>  
> -	/* Assume 16Gb DIMMs are present until proven otherwise */
> +	/* Assume 16Gb+ DIMMs are present until proven otherwise */
>  	dram_info->has_16gb_dimms = true;
>  
>  	val = intel_uncore_read(&i915->uncore,
> @@ -438,7 +438,7 @@ skl_dram_get_channels_info(struct drm_i915_private *i915, struct dram_info *dram
>  	drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n",
>  		    str_yes_no(dram_info->symmetric_memory));
>  
> -	drm_dbg_kms(&i915->drm, "16Gb DIMMs: %s\n",
> +	drm_dbg_kms(&i915->drm, "16Gb+ DIMMs: %s\n",
>  		    str_yes_no(dram_info->has_16gb_dimms));
>  
>  	return 0;

[PATCH 02/13] drm/i915: Apply the 16Gb DIMM w/a only for the platforms that need it

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently the code assumes that every platform except dg2 need the
16Gb DIMM w/a, while in reality it's only needed by skl and icl (and
derivatives). Switch to a more specific platform check.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index b7482d428868..8c434bc96971 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3174,11 +3174,19 @@ void skl_watermark_ipc_init(struct intel_display *display)
 	skl_watermark_ipc_update(display);
 }
 
+static bool need_16gb_dimm_wa(struct intel_display *display)
+{
+	const struct dram_info *dram_info = intel_dram_info(display->drm);
+
+	return (display->platform.skylake || display->platform.kabylake ||
+		display->platform.coffeelake || display->platform.cometlake ||
+		DISPLAY_VER(display) == 11) && dram_info->has_16gb_dimms;
+}
+
 static void
 adjust_wm_latency(struct intel_display *display,
 		  u16 wm[], int num_levels, int read_latency)
 {
-	const struct dram_info *dram_info = intel_dram_info(display->drm);
 	int i, level;
 
 	/*
@@ -3214,7 +3222,7 @@ adjust_wm_latency(struct intel_display *display,
 	 * any underrun. If not able to get DIMM info assume 16Gb+ DIMM
 	 * to avoid any underrun.
 	 */
-	if (!display->platform.dg2 && dram_info->has_16gb_dimms)
+	if (need_16gb_dimm_wa(display))
 		wm[0] += 1;
 }
 
-- 
2.49.1

Re: [PATCH 02/13] drm/i915: Apply the 16Gb DIMM w/a only for the platforms that need it

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently the code assumes that every platform except dg2 need the
> 16Gb DIMM w/a, while in reality it's only needed by skl and icl (and
> derivatives). Switch to a more specific platform check.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.


>  drivers/gpu/drm/i915/display/skl_watermark.c | 12 ++++++++++--
>  1 file changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index b7482d428868..8c434bc96971 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3174,11 +3174,19 @@ void skl_watermark_ipc_init(struct intel_display *display)
>  	skl_watermark_ipc_update(display);
>  }
>  
> +static bool need_16gb_dimm_wa(struct intel_display *display)
> +{
> +	const struct dram_info *dram_info = intel_dram_info(display->drm);
> +
> +	return (display->platform.skylake || display->platform.kabylake ||
> +		display->platform.coffeelake || display->platform.cometlake ||
> +		DISPLAY_VER(display) == 11) && dram_info->has_16gb_dimms;
> +}
> +
>  static void
>  adjust_wm_latency(struct intel_display *display,
>  		  u16 wm[], int num_levels, int read_latency)
>  {
> -	const struct dram_info *dram_info = intel_dram_info(display->drm);
>  	int i, level;
>  
>  	/*
> @@ -3214,7 +3222,7 @@ adjust_wm_latency(struct intel_display *display,
>  	 * any underrun. If not able to get DIMM info assume 16Gb+ DIMM
>  	 * to avoid any underrun.
>  	 */
> -	if (!display->platform.dg2 && dram_info->has_16gb_dimms)
> +	if (need_16gb_dimm_wa(display))
>  		wm[0] += 1;
>  }
>  

[PATCH 03/13] drm/i915: Tweak the read latency fixup code

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

If WM0 latency is zero we need to bump it (and the WM1+ latencies)
but a fixed amount. But any WM1+ level with zero latency must
not be touched since that indicates that corresponding WM level
isn't supported.

Currently the loop doing that adjustment does work, but only because
the previous loop modified the num_levels used as the loop boundary.
This all seems a bit too fragile. Remove the num_levels adjustment
and instead adjust the read latency loop to abort when it encounters
a zero latency value.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 8c434bc96971..805481c92154 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3198,8 +3198,6 @@ adjust_wm_latency(struct intel_display *display,
 		if (wm[level] == 0) {
 			for (i = level + 1; i < num_levels; i++)
 				wm[i] = 0;
-
-			num_levels = level;
 			break;
 		}
 	}
@@ -3212,8 +3210,14 @@ adjust_wm_latency(struct intel_display *display,
 	 * from the punit when level 0 response data is 0us.
 	 */
 	if (wm[0] == 0) {
-		for (level = 0; level < num_levels; level++)
+		wm[0] += read_latency;
+
+		for (level = 1; level < num_levels; level++) {
+			if (wm[level] == 0)
+				break;
+
 			wm[level] += read_latency;
+		}
 	}
 
 	/*
-- 
2.49.1

Re: [PATCH 03/13] drm/i915: Tweak the read latency fixup code

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> If WM0 latency is zero we need to bump it (and the WM1+ latencies)
> but a fixed amount. But any WM1+ level with zero latency must
> not be touched since that indicates that corresponding WM level
> isn't supported.
> 
> Currently the loop doing that adjustment does work, but only because
> the previous loop modified the num_levels used as the loop boundary.
> This all seems a bit too fragile. Remove the num_levels adjustment
> and instead adjust the read latency loop to abort when it encounters
> a zero latency value.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.


>  drivers/gpu/drm/i915/display/skl_watermark.c | 10 +++++++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 8c434bc96971..805481c92154 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3198,8 +3198,6 @@ adjust_wm_latency(struct intel_display *display,
>  		if (wm[level] == 0) {
>  			for (i = level + 1; i < num_levels; i++)
>  				wm[i] = 0;
> -
> -			num_levels = level;
>  			break;
>  		}
>  	}
> @@ -3212,8 +3210,14 @@ adjust_wm_latency(struct intel_display *display,
>  	 * from the punit when level 0 response data is 0us.
>  	 */
>  	if (wm[0] == 0) {
> -		for (level = 0; level < num_levels; level++)
> +		wm[0] += read_latency;
> +
> +		for (level = 1; level < num_levels; level++) {
> +			if (wm[level] == 0)
> +				break;
> +
>  			wm[level] += read_latency;
> +		}
>  	}
>  
>  	/*

[PATCH 04/13] drm/i915: Don't pass the latency array to {skl, mtl}_read_wm_latency()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

We always operate on i915->display.wm.skl_latency in
{skl,mtl}_read_wm_latency(). No real need for the caller
to have to pass that in explicitly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 21 ++++++++++----------
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 805481c92154..9797c2131334 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3184,9 +3184,10 @@ static bool need_16gb_dimm_wa(struct intel_display *display)
 }
 
 static void
-adjust_wm_latency(struct intel_display *display,
-		  u16 wm[], int num_levels, int read_latency)
+adjust_wm_latency(struct intel_display *display, int read_latency)
 {
+	u16 *wm = display->wm.skl_latency;
+	int num_levels = display->wm.num_levels;
 	int i, level;
 
 	/*
@@ -3230,9 +3231,9 @@ adjust_wm_latency(struct intel_display *display,
 		wm[0] += 1;
 }
 
-static void mtl_read_wm_latency(struct intel_display *display, u16 wm[])
+static void mtl_read_wm_latency(struct intel_display *display)
 {
-	int num_levels = display->wm.num_levels;
+	u16 *wm = display->wm.skl_latency;
 	u32 val;
 
 	val = intel_de_read(display, MTL_LATENCY_LP0_LP1);
@@ -3247,12 +3248,12 @@ static void mtl_read_wm_latency(struct intel_display *display, u16 wm[])
 	wm[4] = REG_FIELD_GET(MTL_LATENCY_LEVEL_EVEN_MASK, val);
 	wm[5] = REG_FIELD_GET(MTL_LATENCY_LEVEL_ODD_MASK, val);
 
-	adjust_wm_latency(display, wm, num_levels, 6);
+	adjust_wm_latency(display, 6);
 }
 
-static void skl_read_wm_latency(struct intel_display *display, u16 wm[])
+static void skl_read_wm_latency(struct intel_display *display)
 {
-	int num_levels = display->wm.num_levels;
+	u16 *wm = display->wm.skl_latency;
 	int read_latency = DISPLAY_VER(display) >= 12 ? 3 : 2;
 	int mult = display->platform.dg2 ? 2 : 1;
 	u32 val;
@@ -3284,7 +3285,7 @@ static void skl_read_wm_latency(struct intel_display *display, u16 wm[])
 	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
 	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
 
-	adjust_wm_latency(display, wm, num_levels, read_latency);
+	adjust_wm_latency(display, read_latency);
 }
 
 static void skl_setup_wm_latency(struct intel_display *display)
@@ -3295,9 +3296,9 @@ static void skl_setup_wm_latency(struct intel_display *display)
 		display->wm.num_levels = 8;
 
 	if (DISPLAY_VER(display) >= 14)
-		mtl_read_wm_latency(display, display->wm.skl_latency);
+		mtl_read_wm_latency(display);
 	else
-		skl_read_wm_latency(display, display->wm.skl_latency);
+		skl_read_wm_latency(display);
 
 	intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
 }
-- 
2.49.1

Re: [PATCH 04/13] drm/i915: Don't pass the latency array to {skl, mtl}_read_wm_latency()

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We always operate on i915->display.wm.skl_latency in
> {skl,mtl}_read_wm_latency(). No real need for the caller
> to have to pass that in explicitly.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.


>  drivers/gpu/drm/i915/display/skl_watermark.c | 21 ++++++++++----------
>  1 file changed, 11 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 805481c92154..9797c2131334 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3184,9 +3184,10 @@ static bool need_16gb_dimm_wa(struct intel_display *display)
>  }
>  
>  static void
> -adjust_wm_latency(struct intel_display *display,
> -		  u16 wm[], int num_levels, int read_latency)
> +adjust_wm_latency(struct intel_display *display, int read_latency)
>  {
> +	u16 *wm = display->wm.skl_latency;
> +	int num_levels = display->wm.num_levels;
>  	int i, level;
>  
>  	/*
> @@ -3230,9 +3231,9 @@ adjust_wm_latency(struct intel_display *display,
>  		wm[0] += 1;
>  }
>  
> -static void mtl_read_wm_latency(struct intel_display *display, u16 wm[])
> +static void mtl_read_wm_latency(struct intel_display *display)
>  {
> -	int num_levels = display->wm.num_levels;
> +	u16 *wm = display->wm.skl_latency;
>  	u32 val;
>  
>  	val = intel_de_read(display, MTL_LATENCY_LP0_LP1);
> @@ -3247,12 +3248,12 @@ static void mtl_read_wm_latency(struct intel_display *display, u16 wm[])
>  	wm[4] = REG_FIELD_GET(MTL_LATENCY_LEVEL_EVEN_MASK, val);
>  	wm[5] = REG_FIELD_GET(MTL_LATENCY_LEVEL_ODD_MASK, val);
>  
> -	adjust_wm_latency(display, wm, num_levels, 6);
> +	adjust_wm_latency(display, 6);
>  }
>  
> -static void skl_read_wm_latency(struct intel_display *display, u16 wm[])
> +static void skl_read_wm_latency(struct intel_display *display)
>  {
> -	int num_levels = display->wm.num_levels;
> +	u16 *wm = display->wm.skl_latency;
>  	int read_latency = DISPLAY_VER(display) >= 12 ? 3 : 2;
>  	int mult = display->platform.dg2 ? 2 : 1;
>  	u32 val;
> @@ -3284,7 +3285,7 @@ static void skl_read_wm_latency(struct intel_display *display, u16 wm[])
>  	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
>  	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
>  
> -	adjust_wm_latency(display, wm, num_levels, read_latency);
> +	adjust_wm_latency(display, read_latency);
>  }
>  
>  static void skl_setup_wm_latency(struct intel_display *display)
> @@ -3295,9 +3296,9 @@ static void skl_setup_wm_latency(struct intel_display *display)
>  		display->wm.num_levels = 8;
>  
>  	if (DISPLAY_VER(display) >= 14)
> -		mtl_read_wm_latency(display, display->wm.skl_latency);
> +		mtl_read_wm_latency(display);
>  	else
> -		skl_read_wm_latency(display, display->wm.skl_latency);
> +		skl_read_wm_latency(display);
>  
>  	intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
>  }

[PATCH 05/13] drm/i915: Move adjust_wm_latency() out from {mtl, skl}_read_wm_latency()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

{mtl,skl}_read_wm_latency() are doing way too many things for
my liking. Move the adjustment stuff out into the caller.
This also gives us one place where we specify the 'read_latency'
for all the platforms, instead of two places.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 23 +++++++++++++-------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 9797c2131334..02b64e97ecfe 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3183,12 +3183,22 @@ static bool need_16gb_dimm_wa(struct intel_display *display)
 		DISPLAY_VER(display) == 11) && dram_info->has_16gb_dimms;
 }
 
+static int wm_read_latency(struct intel_display *display)
+{
+	if (DISPLAY_VER(display) >= 14)
+		return 6;
+	else if (DISPLAY_VER(display) >= 12)
+		return 3;
+	else
+		return 2;
+}
+
 static void
-adjust_wm_latency(struct intel_display *display, int read_latency)
+adjust_wm_latency(struct intel_display *display)
 {
 	u16 *wm = display->wm.skl_latency;
-	int num_levels = display->wm.num_levels;
-	int i, level;
+	int i, level, num_levels = display->wm.num_levels;
+	int read_latency = wm_read_latency(display);
 
 	/*
 	 * If a level n (n > 1) has a 0us latency, all levels m (m >= n)
@@ -3247,14 +3257,11 @@ static void mtl_read_wm_latency(struct intel_display *display)
 	val = intel_de_read(display, MTL_LATENCY_LP4_LP5);
 	wm[4] = REG_FIELD_GET(MTL_LATENCY_LEVEL_EVEN_MASK, val);
 	wm[5] = REG_FIELD_GET(MTL_LATENCY_LEVEL_ODD_MASK, val);
-
-	adjust_wm_latency(display, 6);
 }
 
 static void skl_read_wm_latency(struct intel_display *display)
 {
 	u16 *wm = display->wm.skl_latency;
-	int read_latency = DISPLAY_VER(display) >= 12 ? 3 : 2;
 	int mult = display->platform.dg2 ? 2 : 1;
 	u32 val;
 	int ret;
@@ -3284,8 +3291,6 @@ static void skl_read_wm_latency(struct intel_display *display)
 	wm[5] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val) * mult;
 	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
 	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
-
-	adjust_wm_latency(display, read_latency);
 }
 
 static void skl_setup_wm_latency(struct intel_display *display)
@@ -3300,6 +3305,8 @@ static void skl_setup_wm_latency(struct intel_display *display)
 	else
 		skl_read_wm_latency(display);
 
+	adjust_wm_latency(display);
+
 	intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
 }
 
-- 
2.49.1

Re: [PATCH 05/13] drm/i915: Move adjust_wm_latency() out from {mtl, skl}_read_wm_latency()

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> {mtl,skl}_read_wm_latency() are doing way too many things for
> my liking. Move the adjustment stuff out into the caller.
> This also gives us one place where we specify the 'read_latency'
> for all the platforms, instead of two places.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

>  drivers/gpu/drm/i915/display/skl_watermark.c | 23 +++++++++++++-------
>  1 file changed, 15 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 9797c2131334..02b64e97ecfe 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3183,12 +3183,22 @@ static bool need_16gb_dimm_wa(struct intel_display *display)
>  		DISPLAY_VER(display) == 11) && dram_info->has_16gb_dimms;
>  }
>  
> +static int wm_read_latency(struct intel_display *display)
> +{
> +	if (DISPLAY_VER(display) >= 14)
> +		return 6;
> +	else if (DISPLAY_VER(display) >= 12)
> +		return 3;
> +	else
> +		return 2;
> +}
> +
>  static void
> -adjust_wm_latency(struct intel_display *display, int read_latency)
> +adjust_wm_latency(struct intel_display *display)
>  {
>  	u16 *wm = display->wm.skl_latency;
> -	int num_levels = display->wm.num_levels;
> -	int i, level;
> +	int i, level, num_levels = display->wm.num_levels;
> +	int read_latency = wm_read_latency(display);
>  
>  	/*
>  	 * If a level n (n > 1) has a 0us latency, all levels m (m >= n)
> @@ -3247,14 +3257,11 @@ static void mtl_read_wm_latency(struct intel_display *display)
>  	val = intel_de_read(display, MTL_LATENCY_LP4_LP5);
>  	wm[4] = REG_FIELD_GET(MTL_LATENCY_LEVEL_EVEN_MASK, val);
>  	wm[5] = REG_FIELD_GET(MTL_LATENCY_LEVEL_ODD_MASK, val);
> -
> -	adjust_wm_latency(display, 6);
>  }
>  
>  static void skl_read_wm_latency(struct intel_display *display)
>  {
>  	u16 *wm = display->wm.skl_latency;
> -	int read_latency = DISPLAY_VER(display) >= 12 ? 3 : 2;
>  	int mult = display->platform.dg2 ? 2 : 1;
>  	u32 val;
>  	int ret;
> @@ -3284,8 +3291,6 @@ static void skl_read_wm_latency(struct intel_display *display)
>  	wm[5] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val) * mult;
>  	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
>  	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
> -
> -	adjust_wm_latency(display, read_latency);
>  }
>  
>  static void skl_setup_wm_latency(struct intel_display *display)
> @@ -3300,6 +3305,8 @@ static void skl_setup_wm_latency(struct intel_display *display)
>  	else
>  		skl_read_wm_latency(display);
>  
> +	adjust_wm_latency(display);
> +
>  	intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
>  }
>  

[PATCH 06/13] drm/i915: Extract multiply_wm_latency() from skl_read_wm_latency()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

I want skl_read_wm_latency() to just do what it says on
the tin, ie. read the latency values from the pcode mailbox.
Move the DG2 "multiply by two" trick elsewhere.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 29 ++++++++++++++------
 1 file changed, 20 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 02b64e97ecfe..8a98c3e52dc5 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3174,6 +3174,15 @@ void skl_watermark_ipc_init(struct intel_display *display)
 	skl_watermark_ipc_update(display);
 }
 
+static void multiply_wm_latency(struct intel_display *display, int mult)
+{
+	u16 *wm = display->wm.skl_latency;
+	int level, num_levels = display->wm.num_levels;
+
+	for (level = 0; level < num_levels; level++)
+		wm[level] *= mult;
+}
+
 static bool need_16gb_dimm_wa(struct intel_display *display)
 {
 	const struct dram_info *dram_info = intel_dram_info(display->drm);
@@ -3200,6 +3209,9 @@ adjust_wm_latency(struct intel_display *display)
 	int i, level, num_levels = display->wm.num_levels;
 	int read_latency = wm_read_latency(display);
 
+	if (display->platform.dg2)
+		multiply_wm_latency(display, 2);
+
 	/*
 	 * If a level n (n > 1) has a 0us latency, all levels m (m >= n)
 	 * need to be disabled. We make sure to sanitize the values out
@@ -3262,7 +3274,6 @@ static void mtl_read_wm_latency(struct intel_display *display)
 static void skl_read_wm_latency(struct intel_display *display)
 {
 	u16 *wm = display->wm.skl_latency;
-	int mult = display->platform.dg2 ? 2 : 1;
 	u32 val;
 	int ret;
 
@@ -3274,10 +3285,10 @@ static void skl_read_wm_latency(struct intel_display *display)
 		return;
 	}
 
-	wm[0] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val) * mult;
-	wm[1] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val) * mult;
-	wm[2] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
-	wm[3] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
+	wm[0] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val);
+	wm[1] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val);
+	wm[2] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val);
+	wm[3] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val);
 
 	/* read the second set of memory latencies[4:7] */
 	val = 1; /* data0 to be programmed to 1 for second set */
@@ -3287,10 +3298,10 @@ static void skl_read_wm_latency(struct intel_display *display)
 		return;
 	}
 
-	wm[4] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val) * mult;
-	wm[5] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val) * mult;
-	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
-	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
+	wm[4] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val);
+	wm[5] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val);
+	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val);
+	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val);
 }
 
 static void skl_setup_wm_latency(struct intel_display *display)
-- 
2.49.1

Re: [PATCH 06/13] drm/i915: Extract multiply_wm_latency() from skl_read_wm_latency()

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I want skl_read_wm_latency() to just do what it says on
> the tin, ie. read the latency values from the pcode mailbox.
> Move the DG2 "multiply by two" trick elsewhere.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.


>  drivers/gpu/drm/i915/display/skl_watermark.c | 29 ++++++++++++++------
>  1 file changed, 20 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 02b64e97ecfe..8a98c3e52dc5 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3174,6 +3174,15 @@ void skl_watermark_ipc_init(struct intel_display *display)
>  	skl_watermark_ipc_update(display);
>  }
>  
> +static void multiply_wm_latency(struct intel_display *display, int mult)
> +{
> +	u16 *wm = display->wm.skl_latency;
> +	int level, num_levels = display->wm.num_levels;
> +
> +	for (level = 0; level < num_levels; level++)
> +		wm[level] *= mult;
> +}
> +
>  static bool need_16gb_dimm_wa(struct intel_display *display)
>  {
>  	const struct dram_info *dram_info = intel_dram_info(display->drm);
> @@ -3200,6 +3209,9 @@ adjust_wm_latency(struct intel_display *display)
>  	int i, level, num_levels = display->wm.num_levels;
>  	int read_latency = wm_read_latency(display);
>  
> +	if (display->platform.dg2)
> +		multiply_wm_latency(display, 2);
> +
>  	/*
>  	 * If a level n (n > 1) has a 0us latency, all levels m (m >= n)
>  	 * need to be disabled. We make sure to sanitize the values out
> @@ -3262,7 +3274,6 @@ static void mtl_read_wm_latency(struct intel_display *display)
>  static void skl_read_wm_latency(struct intel_display *display)
>  {
>  	u16 *wm = display->wm.skl_latency;
> -	int mult = display->platform.dg2 ? 2 : 1;
>  	u32 val;
>  	int ret;
>  
> @@ -3274,10 +3285,10 @@ static void skl_read_wm_latency(struct intel_display *display)
>  		return;
>  	}
>  
> -	wm[0] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val) * mult;
> -	wm[1] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val) * mult;
> -	wm[2] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
> -	wm[3] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
> +	wm[0] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val);
> +	wm[1] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val);
> +	wm[2] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val);
> +	wm[3] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val);
>  
>  	/* read the second set of memory latencies[4:7] */
>  	val = 1; /* data0 to be programmed to 1 for second set */
> @@ -3287,10 +3298,10 @@ static void skl_read_wm_latency(struct intel_display *display)
>  		return;
>  	}
>  
> -	wm[4] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val) * mult;
> -	wm[5] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val) * mult;
> -	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val) * mult;
> -	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val) * mult;
> +	wm[4] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_0_4_MASK, val);
> +	wm[5] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_1_5_MASK, val);
> +	wm[6] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_2_6_MASK, val);
> +	wm[7] = REG_FIELD_GET(GEN9_MEM_LATENCY_LEVEL_3_7_MASK, val);
>  }
>  
>  static void skl_setup_wm_latency(struct intel_display *display)

[PATCH 07/13] drm/i915: Extract increase_wm_latency()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the "increase wm latencies by some amount" code into
a helper that can be reused.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 28 ++++++++++++--------
 1 file changed, 17 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 8a98c3e52dc5..9eebb908beb8 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3183,6 +3183,21 @@ static void multiply_wm_latency(struct intel_display *display, int mult)
 		wm[level] *= mult;
 }
 
+static void increase_wm_latency(struct intel_display *display, int inc)
+{
+	u16 *wm = display->wm.skl_latency;
+	int level, num_levels = display->wm.num_levels;
+
+	wm[0] += inc;
+
+	for (level = 1; level < num_levels; level++) {
+		if (wm[level] == 0)
+			break;
+
+		wm[level] += inc;
+	}
+}
+
 static bool need_16gb_dimm_wa(struct intel_display *display)
 {
 	const struct dram_info *dram_info = intel_dram_info(display->drm);
@@ -3207,7 +3222,6 @@ adjust_wm_latency(struct intel_display *display)
 {
 	u16 *wm = display->wm.skl_latency;
 	int i, level, num_levels = display->wm.num_levels;
-	int read_latency = wm_read_latency(display);
 
 	if (display->platform.dg2)
 		multiply_wm_latency(display, 2);
@@ -3232,16 +3246,8 @@ adjust_wm_latency(struct intel_display *display)
 	 * to add proper adjustment to each valid level we retrieve
 	 * from the punit when level 0 response data is 0us.
 	 */
-	if (wm[0] == 0) {
-		wm[0] += read_latency;
-
-		for (level = 1; level < num_levels; level++) {
-			if (wm[level] == 0)
-				break;
-
-			wm[level] += read_latency;
-		}
-	}
+	if (wm[0] == 0)
+		increase_wm_latency(display, wm_read_latency(display));
 
 	/*
 	 * WA Level-0 adjustment for 16Gb+ DIMMs: SKL+
-- 
2.49.1

Re: [PATCH 07/13] drm/i915: Extract increase_wm_latency()

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Extract the "increase wm latencies by some amount" code into
> a helper that can be reused.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.


>  drivers/gpu/drm/i915/display/skl_watermark.c | 28 ++++++++++++--------
>  1 file changed, 17 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 8a98c3e52dc5..9eebb908beb8 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3183,6 +3183,21 @@ static void multiply_wm_latency(struct intel_display *display, int mult)
>  		wm[level] *= mult;
>  }
>  
> +static void increase_wm_latency(struct intel_display *display, int inc)
> +{
> +	u16 *wm = display->wm.skl_latency;
> +	int level, num_levels = display->wm.num_levels;
> +
> +	wm[0] += inc;
> +
> +	for (level = 1; level < num_levels; level++) {
> +		if (wm[level] == 0)
> +			break;
> +
> +		wm[level] += inc;
> +	}
> +}
> +
>  static bool need_16gb_dimm_wa(struct intel_display *display)
>  {
>  	const struct dram_info *dram_info = intel_dram_info(display->drm);
> @@ -3207,7 +3222,6 @@ adjust_wm_latency(struct intel_display *display)
>  {
>  	u16 *wm = display->wm.skl_latency;
>  	int i, level, num_levels = display->wm.num_levels;
> -	int read_latency = wm_read_latency(display);
>  
>  	if (display->platform.dg2)
>  		multiply_wm_latency(display, 2);
> @@ -3232,16 +3246,8 @@ adjust_wm_latency(struct intel_display *display)
>  	 * to add proper adjustment to each valid level we retrieve
>  	 * from the punit when level 0 response data is 0us.
>  	 */
> -	if (wm[0] == 0) {
> -		wm[0] += read_latency;
> -
> -		for (level = 1; level < num_levels; level++) {
> -			if (wm[level] == 0)
> -				break;
> -
> -			wm[level] += read_latency;
> -		}
> -	}
> +	if (wm[0] == 0)
> +		increase_wm_latency(display, wm_read_latency(display));
>  
>  	/*
>  	 * WA Level-0 adjustment for 16Gb+ DIMMs: SKL+

[PATCH 08/13] drm/i915: Use increase_wm_latency() for the 16Gb DIMM w/a

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Bump the latency for all watermark levels in the
16Gb+ DIMM w/a. The spec does ask us to do it only for level
0, but it seems more sane to bump all the levels. If the actual
memory access is slower then the wakeup (WM1+) should also
potentially happen earlier.

This also avoids the theoretical case that WM0 would get bumped
higher than WM1+. Not that it is likely to happen because the WM0
latency is always significantly lower than the WM1 latency.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 9eebb908beb8..98a397772678 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3256,7 +3256,7 @@ adjust_wm_latency(struct intel_display *display)
 	 * to avoid any underrun.
 	 */
 	if (need_16gb_dimm_wa(display))
-		wm[0] += 1;
+		increase_wm_latency(display, 1);
 }
 
 static void mtl_read_wm_latency(struct intel_display *display)
-- 
2.49.1

Re: [PATCH 08/13] drm/i915: Use increase_wm_latency() for the 16Gb DIMM w/a

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Bump the latency for all watermark levels in the
> 16Gb+ DIMM w/a. The spec does ask us to do it only for level
> 0, but it seems more sane to bump all the levels. If the actual
> memory access is slower then the wakeup (WM1+) should also
> potentially happen earlier.
> 
> This also avoids the theoretical case that WM0 would get bumped
> higher than WM1+. Not that it is likely to happen because the WM0
> latency is always significantly lower than the WM1 latency.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.


>  drivers/gpu/drm/i915/display/skl_watermark.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 9eebb908beb8..98a397772678 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3256,7 +3256,7 @@ adjust_wm_latency(struct intel_display *display)
>  	 * to avoid any underrun.
>  	 */
>  	if (need_16gb_dimm_wa(display))
> -		wm[0] += 1;
> +		increase_wm_latency(display, 1);
>  }
>  
>  static void mtl_read_wm_latency(struct intel_display *display)

[PATCH 09/13] drm/i915: Extract sanitize_wm_latency()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Pull the "zero out invalid WM latencies" stuff into a helper.
Mainly to avoid mixing higher level and lower level stuff in
the same adjust_wm_latency() function.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 23 ++++++++++++++------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 98a397772678..e3305a399ddf 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3217,14 +3217,10 @@ static int wm_read_latency(struct intel_display *display)
 		return 2;
 }
 
-static void
-adjust_wm_latency(struct intel_display *display)
+static void sanitize_wm_latency(struct intel_display *display)
 {
 	u16 *wm = display->wm.skl_latency;
-	int i, level, num_levels = display->wm.num_levels;
-
-	if (display->platform.dg2)
-		multiply_wm_latency(display, 2);
+	int level, num_levels = display->wm.num_levels;
 
 	/*
 	 * If a level n (n > 1) has a 0us latency, all levels m (m >= n)
@@ -3233,11 +3229,24 @@ adjust_wm_latency(struct intel_display *display)
 	 */
 	for (level = 1; level < num_levels; level++) {
 		if (wm[level] == 0) {
+			int i;
+
 			for (i = level + 1; i < num_levels; i++)
 				wm[i] = 0;
-			break;
+			return;
 		}
 	}
+}
+
+static void
+adjust_wm_latency(struct intel_display *display)
+{
+	u16 *wm = display->wm.skl_latency;
+
+	if (display->platform.dg2)
+		multiply_wm_latency(display, 2);
+
+	sanitize_wm_latency(display);
 
 	/*
 	 * WaWmMemoryReadLatency
-- 
2.49.1

Re: [PATCH 09/13] drm/i915: Extract sanitize_wm_latency()

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Pull the "zero out invalid WM latencies" stuff into a helper.
> Mainly to avoid mixing higher level and lower level stuff in
> the same adjust_wm_latency() function.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.

>  drivers/gpu/drm/i915/display/skl_watermark.c | 23 ++++++++++++++------
>  1 file changed, 16 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 98a397772678..e3305a399ddf 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3217,14 +3217,10 @@ static int wm_read_latency(struct intel_display *display)
>  		return 2;
>  }
>  
> -static void
> -adjust_wm_latency(struct intel_display *display)
> +static void sanitize_wm_latency(struct intel_display *display)
>  {
>  	u16 *wm = display->wm.skl_latency;
> -	int i, level, num_levels = display->wm.num_levels;
> -
> -	if (display->platform.dg2)
> -		multiply_wm_latency(display, 2);
> +	int level, num_levels = display->wm.num_levels;
>  
>  	/*
>  	 * If a level n (n > 1) has a 0us latency, all levels m (m >= n)
> @@ -3233,11 +3229,24 @@ adjust_wm_latency(struct intel_display *display)
>  	 */
>  	for (level = 1; level < num_levels; level++) {
>  		if (wm[level] == 0) {
> +			int i;
> +
>  			for (i = level + 1; i < num_levels; i++)
>  				wm[i] = 0;
> -			break;
> +			return;
>  		}
>  	}
> +}
> +
> +static void
> +adjust_wm_latency(struct intel_display *display)
> +{
> +	u16 *wm = display->wm.skl_latency;
> +
> +	if (display->platform.dg2)
> +		multiply_wm_latency(display, 2);
> +
> +	sanitize_wm_latency(display);
>  
>  	/*
>  	 * WaWmMemoryReadLatency

[PATCH 10/13] drm/i915: Flatten sanitize_wm_latency() a bit

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Flatten the loop inside sanitize_wm_latency() a bit
by using 'continue'.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index e3305a399ddf..e11ba1a822f4 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3228,13 +3228,13 @@ static void sanitize_wm_latency(struct intel_display *display)
 	 * of the punit to satisfy this requirement.
 	 */
 	for (level = 1; level < num_levels; level++) {
-		if (wm[level] == 0) {
-			int i;
+		if (wm[level] != 0)
+			continue;
 
-			for (i = level + 1; i < num_levels; i++)
-				wm[i] = 0;
-			return;
-		}
+		for (level = level + 1; level < num_levels; level++)
+			wm[level] = 0;
+
+		return;
 	}
 }
 
-- 
2.49.1

Re: [PATCH 10/13] drm/i915: Flatten sanitize_wm_latency() a bit

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Flatten the loop inside sanitize_wm_latency() a bit
> by using 'continue'.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index e3305a399ddf..e11ba1a822f4 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3228,13 +3228,13 @@ static void sanitize_wm_latency(struct intel_display *display)
>  	 * of the punit to satisfy this requirement.
>  	 */
>  	for (level = 1; level < num_levels; level++) {
> -		if (wm[level] == 0) {
> -			int i;
> +		if (wm[level] != 0)
> +			continue;
>  
> -			for (i = level + 1; i < num_levels; i++)
> -				wm[i] = 0;
> -			return;
> -		}
> +		for (level = level + 1; level < num_levels; level++)
> +			wm[level] = 0;
> +
> +		return;
>  	}
>  }
>  

This looks a bit clumsy, overwriting level in the second loop.  Can't
the loops be separate, somehing like:

	/* Find the first zero watermark */
 	for (level = 1; level < num_levels; level++) {
		if (wm[level] == 0)
			break;
	}

	/* Zero all remaining watermarks (if any) */
	for (level = level + 1; level < num_levels; level ++)
		wm[level] = 0;

If nothing is found, the level + 1 in the second loop will be greater
than num_levels, so it will just skip.

--
Cheers,
Luca.

[PATCH v2 10/13] drm/i915: Flatten sanitize_wm_latency() a bit

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Move the inner loop out from the outer loop in
sanitize_wm_latency() to flatten things a bit.
Easier to read flat code.

v2: Move the inner loop out completely (Luca)

Cc: Luca Coelho <luciano.coelho@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index e3305a399ddf..caeba4274de3 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3228,14 +3228,12 @@ static void sanitize_wm_latency(struct intel_display *display)
 	 * of the punit to satisfy this requirement.
 	 */
 	for (level = 1; level < num_levels; level++) {
-		if (wm[level] == 0) {
-			int i;
-
-			for (i = level + 1; i < num_levels; i++)
-				wm[i] = 0;
-			return;
-		}
+		if (wm[level] == 0)
+			break;
 	}
+
+	for (level = level + 1; level < num_levels; level++)
+		wm[level] = 0;
 }
 
 static void
-- 
2.49.1

[PATCH 11/13] drm/i915: Make wm latencies monotonic

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Some systems (eg. LNL Lenovo Thinkapd X1 Carbon) declare
semi-bogus non-monotonic WM latency values:
 WM0 latency not provided
 WM1 latency 100 usec
 WM2 latency 100 usec
 WM3 latency 100 usec
 WM4 latency 93 usec
 WM5 latency 100 usec

Apparently Windows just papers over the issue by bumping the
latencies for the higher watermark levels to make them monotonic
again. Do the same.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index e11ba1a822f4..d334cc661328 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3238,6 +3238,19 @@ static void sanitize_wm_latency(struct intel_display *display)
 	}
 }
 
+static void make_wm_latency_monotonic(struct intel_display *display)
+{
+	u16 *wm = display->wm.skl_latency;
+	int level, num_levels = display->wm.num_levels;
+
+	for (level = 1; level < num_levels; level++) {
+		if (wm[level] == 0)
+			break;
+
+		wm[level] = max(wm[level], wm[level-1]);
+	}
+}
+
 static void
 adjust_wm_latency(struct intel_display *display)
 {
@@ -3248,6 +3261,8 @@ adjust_wm_latency(struct intel_display *display)
 
 	sanitize_wm_latency(display);
 
+	make_wm_latency_monotonic(display);
+
 	/*
 	 * WaWmMemoryReadLatency
 	 *
-- 
2.49.1

Re: [PATCH 11/13] drm/i915: Make wm latencies monotonic

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Some systems (eg. LNL Lenovo Thinkapd X1 Carbon) declare
> semi-bogus non-monotonic WM latency values:
>  WM0 latency not provided
>  WM1 latency 100 usec
>  WM2 latency 100 usec
>  WM3 latency 100 usec
>  WM4 latency 93 usec
>  WM5 latency 100 usec
> 
> Apparently Windows just papers over the issue by bumping the
> latencies for the higher watermark levels to make them monotonic
> again. Do the same.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/skl_watermark.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index e11ba1a822f4..d334cc661328 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3238,6 +3238,19 @@ static void sanitize_wm_latency(struct intel_display *display)
>  	}
>  }
>  
> +static void make_wm_latency_monotonic(struct intel_display *display)
> +{
> +	u16 *wm = display->wm.skl_latency;
> +	int level, num_levels = display->wm.num_levels;
> +
> +	for (level = 1; level < num_levels; level++) {
> +		if (wm[level] == 0)
> +			break;
> +
> +		wm[level] = max(wm[level], wm[level-1]);
> +	}
> +}
> +

What if, for instance, we have:

 WM0 latency not provided
 WM1 latency 200 usec
 WM2 latency 100 usec
 WM3 latency 100 usec
 WM4 latency 100 usec
 WM5 latency 100 usec

Do we really want to set them all to be 200 usec? Maybe multiples of
the minimum we have would still be fine?

What's the actual reason for this "papering over"? Is it to synchronize
timers?

--
Cheers,
Luca.

Re: [PATCH 11/13] drm/i915: Make wm latencies monotonic

[Ville Syrjälä]

On Tue, Sep 16, 2025 at 01:29:17PM +0300, Luca Coelho wrote:
> On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Some systems (eg. LNL Lenovo Thinkapd X1 Carbon) declare
> > semi-bogus non-monotonic WM latency values:
> >  WM0 latency not provided
> >  WM1 latency 100 usec
> >  WM2 latency 100 usec
> >  WM3 latency 100 usec
> >  WM4 latency 93 usec
> >  WM5 latency 100 usec
> > 
> > Apparently Windows just papers over the issue by bumping the
> > latencies for the higher watermark levels to make them monotonic
> > again. Do the same.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/skl_watermark.c | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index e11ba1a822f4..d334cc661328 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -3238,6 +3238,19 @@ static void sanitize_wm_latency(struct intel_display *display)
> >  	}
> >  }
> >  
> > +static void make_wm_latency_monotonic(struct intel_display *display)
> > +{
> > +	u16 *wm = display->wm.skl_latency;
> > +	int level, num_levels = display->wm.num_levels;
> > +
> > +	for (level = 1; level < num_levels; level++) {
> > +		if (wm[level] == 0)
> > +			break;
> > +
> > +		wm[level] = max(wm[level], wm[level-1]);
> > +	}
> > +}
> > +
> 
> What if, for instance, we have:
> 
>  WM0 latency not provided
>  WM1 latency 200 usec
>  WM2 latency 100 usec
>  WM3 latency 100 usec
>  WM4 latency 100 usec
>  WM5 latency 100 usec
> 
> Do we really want to set them all to be 200 usec? Maybe multiples of
> the minimum we have would still be fine?

The latencies are supposed to increase as you go along,
each subsequent level corresponding to some deeper pkgC state.

> 
> What's the actual reason for this "papering over"? Is it to synchronize
> timers?

Dunno why Windows started to do this (as opposed to complaining and
telling people to fix their pcode firmware to correctly populate the
latencies). But since it does that it seems likely we might run into
more cases like this in the future.

-- 
Ville Syrjälä
Intel

[PATCH 12/13] drm/i915: Print both the original and adjusted wm latencies

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

In order to help with debugging print both the original wm
latencies read from the mailbox/etc., and the final fixed/adjusted
values.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index d334cc661328..a40113aa3f3e 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3346,9 +3346,11 @@ static void skl_setup_wm_latency(struct intel_display *display)
 	else
 		skl_read_wm_latency(display);
 
+	intel_print_wm_latency(display, "original", display->wm.skl_latency);
+
 	adjust_wm_latency(display);
 
-	intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
+	intel_print_wm_latency(display, "adjusted", display->wm.skl_latency);
 }
 
 static struct intel_global_state *intel_dbuf_duplicate_state(struct intel_global_obj *obj)
-- 
2.49.1

Re: [PATCH 12/13] drm/i915: Print both the original and adjusted wm latencies

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> In order to help with debugging print both the original wm
> latencies read from the mailbox/etc., and the final fixed/adjusted
> values.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.



>  drivers/gpu/drm/i915/display/skl_watermark.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index d334cc661328..a40113aa3f3e 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3346,9 +3346,11 @@ static void skl_setup_wm_latency(struct intel_display *display)
>  	else
>  		skl_read_wm_latency(display);
>  
> +	intel_print_wm_latency(display, "original", display->wm.skl_latency);
> +
>  	adjust_wm_latency(display);
>  
> -	intel_print_wm_latency(display, "Gen9 Plane", display->wm.skl_latency);
> +	intel_print_wm_latency(display, "adjusted", display->wm.skl_latency);
>  }
>  
>  static struct intel_global_state *intel_dbuf_duplicate_state(struct intel_global_obj *obj)

[PATCH 13/13] drm/i915: Make sure wm block/lines are non-decreasing

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The watermark algorithm sometimes produces results where higher
watermark levels have smaller blocks/lines watermarks than the lower
levels. That doesn't really make sense as the corresponding latencies
are supposed to be non-decreasing. It's unclear how the hardware
responds to such watermark values, so it seems better to avoid that
case and just make sure the values are always non-decreasing.

Here's an example how things change for such a case on a GLK NUC:
 [PLANE:70:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm
 [PLANE:70:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    4,   4,   4,   2,   2,   2,   2,   2,   0,   0,    0
 [PLANE:70:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   11,  11,  12,   7,   7,   7,   7,   7,  25,   0,    0
 [PLANE:70:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   12,  12,  13,   8,   8,   8,   8,   8,  26,   0,    0
->
 [PLANE:70:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm
 [PLANE:70:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    4,   4,   4,   4,   4,   4,   4,   4,   0,   0,    0
 [PLANE:70:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   11,  11,  12,  12,  12,  12,  12,  12,  25,   0,    0
 [PLANE:70:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   12,  12,  13,  13,  13,  13,  13,  13,  26,   0,    0

Whether this actually helps on any display blinking issues is unclear.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/8683
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/skl_watermark.c | 21 +++++++++++---------
 1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index a40113aa3f3e..6e268836f5c6 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1878,18 +1878,21 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
 			} else {
 				blocks++;
 			}
-
-			/*
-			 * Make sure result blocks for higher latency levels are
-			 * at least as high as level below the current level.
-			 * Assumption in DDB algorithm optimization for special
-			 * cases. Also covers Display WA #1125 for RC.
-			 */
-			if (result_prev->blocks > blocks)
-				blocks = result_prev->blocks;
 		}
 	}
 
+	/*
+	 * Make sure result blocks for higher latency levels are
+	 * at least as high as level below the current level.
+	 * Assumption in DDB algorithm optimization for special
+	 * cases. Also covers Display WA #1125 for RC.
+	 *
+	 * Let's always do this as the algorithm can give non
+	 * monotonic results on any platform.
+	 */
+	blocks = max_t(u32, blocks, result_prev->blocks);
+	lines = max_t(u32, lines, result_prev->lines);
+
 	if (DISPLAY_VER(display) >= 11) {
 		if (wp->y_tiled) {
 			int extra_lines;
-- 
2.49.1

Re: [PATCH 13/13] drm/i915: Make sure wm block/lines are non-decreasing

[Luca Coelho]

On Fri, 2025-09-05 at 17:58 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The watermark algorithm sometimes produces results where higher
> watermark levels have smaller blocks/lines watermarks than the lower
> levels. That doesn't really make sense as the corresponding latencies
> are supposed to be non-decreasing. It's unclear how the hardware
> responds to such watermark values, so it seems better to avoid that
> case and just make sure the values are always non-decreasing.
> 
> Here's an example how things change for such a case on a GLK NUC:
>  [PLANE:70:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm
>  [PLANE:70:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    4,   4,   4,   2,   2,   2,   2,   2,   0,   0,    0
>  [PLANE:70:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   11,  11,  12,   7,   7,   7,   7,   7,  25,   0,    0
>  [PLANE:70:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   12,  12,  13,   8,   8,   8,   8,   8,  26,   0,    0
> ->
>  [PLANE:70:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm
>  [PLANE:70:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    4,   4,   4,   4,   4,   4,   4,   4,   0,   0,    0
>  [PLANE:70:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   11,  11,  12,  12,  12,  12,  12,  12,  25,   0,    0
>  [PLANE:70:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   12,  12,  13,  13,  13,  13,  13,  13,  26,   0,    0
> 
> Whether this actually helps on any display blinking issues is unclear.
> 
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/8683
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---

Okay, maybe this answers my question to the other monotonic patch.

Reviewed-by: Luca Coelho <luciano.coelho@intel.com>

--
Cheers,
Luca.



>  drivers/gpu/drm/i915/display/skl_watermark.c | 21 +++++++++++---------
>  1 file changed, 12 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index a40113aa3f3e..6e268836f5c6 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -1878,18 +1878,21 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
>  			} else {
>  				blocks++;
>  			}
> -
> -			/*
> -			 * Make sure result blocks for higher latency levels are
> -			 * at least as high as level below the current level.
> -			 * Assumption in DDB algorithm optimization for special
> -			 * cases. Also covers Display WA #1125 for RC.
> -			 */
> -			if (result_prev->blocks > blocks)
> -				blocks = result_prev->blocks;
>  		}
>  	}
>  
> +	/*
> +	 * Make sure result blocks for higher latency levels are
> +	 * at least as high as level below the current level.
> +	 * Assumption in DDB algorithm optimization for special
> +	 * cases. Also covers Display WA #1125 for RC.
> +	 *
> +	 * Let's always do this as the algorithm can give non
> +	 * monotonic results on any platform.
> +	 */
> +	blocks = max_t(u32, blocks, result_prev->blocks);
> +	lines = max_t(u32, lines, result_prev->lines);
> +
>  	if (DISPLAY_VER(display) >= 11) {
>  		if (wp->y_tiled) {
>  			int extra_lines;

✗ CI.checkpatch: warning for drm/1915: skl+ watermark/latency stuff (rev2)

[Patchwork]

== Series Details ==

Series: drm/1915: skl+ watermark/latency stuff (rev2)
URL   : https://patchwork.freedesktop.org/series/154099/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
6563e0a40fcee465b9078301e01a752848b6572c
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 141615148b4642059215e47600dfe27929181c6c
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Fri Sep 5 17:58:32 2025 +0300

    drm/i915: Make sure wm block/lines are non-decreasing
    
    The watermark algorithm sometimes produces results where higher
    watermark levels have smaller blocks/lines watermarks than the lower
    levels. That doesn't really make sense as the corresponding latencies
    are supposed to be non-decreasing. It's unclear how the hardware
    responds to such watermark values, so it seems better to avoid that
    case and just make sure the values are always non-decreasing.
    
    Here's an example how things change for such a case on a GLK NUC:
     [PLANE:70:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm
     [PLANE:70:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    4,   4,   4,   2,   2,   2,   2,   2,   0,   0,    0
     [PLANE:70:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   11,  11,  12,   7,   7,   7,   7,   7,  25,   0,    0
     [PLANE:70:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   12,  12,  13,   8,   8,   8,   8,   8,  26,   0,    0
    ->
     [PLANE:70:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm
     [PLANE:70:cursor A]   lines    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->    4,   4,   4,   4,   4,   4,   4,   4,   0,   0,    0
     [PLANE:70:cursor A]  blocks    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   11,  11,  12,  12,  12,  12,  12,  12,  25,   0,    0
     [PLANE:70:cursor A] min_ddb    0,   0,   0,   0,   0,   0,   0,   0,   0,   0,    0 ->   12,  12,  13,  13,  13,  13,  13,  13,  26,   0,    0
    
    Whether this actually helps on any display blinking issues is unclear.
    
    References: https://gitlab.freedesktop.org/drm/intel/-/issues/8683
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
+ /mt/dim checkpatch e59de55d678b63f430e98772a53cc6303313564b drm-intel
abf3f22795b5 drm/i915/dram: Also apply the 16Gb DIMM w/a for larger DRAM chips
686d004daf6d drm/i915: Apply the 16Gb DIMM w/a only for the platforms that need it
5c15b6748f95 drm/i915: Tweak the read latency fixup code
0601cab51bf0 drm/i915: Don't pass the latency array to {skl, mtl}_read_wm_latency()
a63fe3de9f26 drm/i915: Move adjust_wm_latency() out from {mtl, skl}_read_wm_latency()
69c9913a204c drm/i915: Extract multiply_wm_latency() from skl_read_wm_latency()
0a12b88a2cbe drm/i915: Extract increase_wm_latency()
e6e16ba1c8b5 drm/i915: Use increase_wm_latency() for the 16Gb DIMM w/a
4148719d829e drm/i915: Extract sanitize_wm_latency()
51a5633eb1ea drm/i915: Flatten sanitize_wm_latency() a bit
8976eb843042 drm/i915: Make wm latencies monotonic
-:41: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#41: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:3250:
+		wm[level] = max(wm[level], wm[level-1]);
 		                                   ^

total: 0 errors, 0 warnings, 1 checks, 27 lines checked
16ea3c1ca343 drm/i915: Print both the original and adjusted wm latencies
141615148b46 drm/i915: Make sure wm block/lines are non-decreasing
-:17: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#17: 
 [PLANE:70:cursor A]   level  wm0, wm1, wm2, wm3, wm4, wm5, wm6, wm7, twm, swm, stwm -> *wm0,*wm1,*wm2,*wm3,*wm4,*wm5,*wm6,*wm7,*twm, swm, stwm

-:29: WARNING:COMMIT_LOG_USE_LINK: Unknown link reference 'References:', use 'Link:' or 'Closes:' instead
#29: 
References: https://gitlab.freedesktop.org/drm/intel/-/issues/8683

total: 0 errors, 2 warnings, 0 checks, 30 lines checked

✓ CI.KUnit: success for drm/1915: skl+ watermark/latency stuff (rev2)

[Patchwork]

== Series Details ==

Series: drm/1915: skl+ watermark/latency stuff (rev2)
URL   : https://patchwork.freedesktop.org/series/154099/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[15:25:03] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:25:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:25:36] Starting KUnit Kernel (1/1)...
[15:25:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:25:36] ================== guc_buf (11 subtests) ===================
[15:25:36] [PASSED] test_smallest
[15:25:36] [PASSED] test_largest
[15:25:36] [PASSED] test_granular
[15:25:36] [PASSED] test_unique
[15:25:36] [PASSED] test_overlap
[15:25:36] [PASSED] test_reusable
[15:25:36] [PASSED] test_too_big
[15:25:36] [PASSED] test_flush
[15:25:36] [PASSED] test_lookup
[15:25:36] [PASSED] test_data
[15:25:36] [PASSED] test_class
[15:25:36] ===================== [PASSED] guc_buf =====================
[15:25:36] =================== guc_dbm (7 subtests) ===================
[15:25:36] [PASSED] test_empty
[15:25:36] [PASSED] test_default
[15:25:36] ======================== test_size  ========================
[15:25:36] [PASSED] 4
[15:25:36] [PASSED] 8
[15:25:36] [PASSED] 32
[15:25:36] [PASSED] 256
[15:25:36] ==================== [PASSED] test_size ====================
[15:25:36] ======================= test_reuse  ========================
[15:25:36] [PASSED] 4
[15:25:36] [PASSED] 8
[15:25:36] [PASSED] 32
[15:25:36] [PASSED] 256
[15:25:36] =================== [PASSED] test_reuse ====================
[15:25:36] =================== test_range_overlap  ====================
[15:25:36] [PASSED] 4
[15:25:36] [PASSED] 8
[15:25:36] [PASSED] 32
[15:25:36] [PASSED] 256
[15:25:36] =============== [PASSED] test_range_overlap ================
[15:25:36] =================== test_range_compact  ====================
[15:25:36] [PASSED] 4
[15:25:36] [PASSED] 8
[15:25:36] [PASSED] 32
[15:25:36] [PASSED] 256
[15:25:36] =============== [PASSED] test_range_compact ================
[15:25:36] ==================== test_range_spare  =====================
[15:25:36] [PASSED] 4
[15:25:36] [PASSED] 8
[15:25:36] [PASSED] 32
[15:25:36] [PASSED] 256
[15:25:36] ================ [PASSED] test_range_spare =================
[15:25:36] ===================== [PASSED] guc_dbm =====================
[15:25:36] =================== guc_idm (6 subtests) ===================
[15:25:36] [PASSED] bad_init
[15:25:36] [PASSED] no_init
[15:25:36] [PASSED] init_fini
[15:25:36] [PASSED] check_used
[15:25:36] [PASSED] check_quota
[15:25:36] [PASSED] check_all
[15:25:36] ===================== [PASSED] guc_idm =====================
[15:25:36] ================== no_relay (3 subtests) ===================
[15:25:36] [PASSED] xe_drops_guc2pf_if_not_ready
[15:25:36] [PASSED] xe_drops_guc2vf_if_not_ready
[15:25:36] [PASSED] xe_rejects_send_if_not_ready
[15:25:36] ==================== [PASSED] no_relay =====================
[15:25:36] ================== pf_relay (14 subtests) ==================
[15:25:36] [PASSED] pf_rejects_guc2pf_too_short
[15:25:36] [PASSED] pf_rejects_guc2pf_too_long
[15:25:36] [PASSED] pf_rejects_guc2pf_no_payload
[15:25:36] [PASSED] pf_fails_no_payload
[15:25:36] [PASSED] pf_fails_bad_origin
[15:25:36] [PASSED] pf_fails_bad_type
[15:25:36] [PASSED] pf_txn_reports_error
[15:25:36] [PASSED] pf_txn_sends_pf2guc
[15:25:36] [PASSED] pf_sends_pf2guc
[15:25:36] [SKIPPED] pf_loopback_nop
[15:25:36] [SKIPPED] pf_loopback_echo
[15:25:36] [SKIPPED] pf_loopback_fail
[15:25:36] [SKIPPED] pf_loopback_busy
[15:25:36] [SKIPPED] pf_loopback_retry
[15:25:36] ==================== [PASSED] pf_relay =====================
[15:25:36] ================== vf_relay (3 subtests) ===================
[15:25:36] [PASSED] vf_rejects_guc2vf_too_short
[15:25:36] [PASSED] vf_rejects_guc2vf_too_long
[15:25:36] [PASSED] vf_rejects_guc2vf_no_payload
[15:25:36] ==================== [PASSED] vf_relay =====================
[15:25:36] ===================== lmtt (1 subtest) =====================
[15:25:36] ======================== test_ops  =========================
[15:25:36] [PASSED] 2-level
[15:25:36] [PASSED] multi-level
[15:25:36] ==================== [PASSED] test_ops =====================
[15:25:36] ====================== [PASSED] lmtt =======================
[15:25:36] ================= pf_service (11 subtests) =================
[15:25:36] [PASSED] pf_negotiate_any
[15:25:36] [PASSED] pf_negotiate_base_match
[15:25:36] [PASSED] pf_negotiate_base_newer
[15:25:36] [PASSED] pf_negotiate_base_next
[15:25:36] [SKIPPED] pf_negotiate_base_older
[15:25:36] [PASSED] pf_negotiate_base_prev
[15:25:36] [PASSED] pf_negotiate_latest_match
[15:25:36] [PASSED] pf_negotiate_latest_newer
[15:25:36] [PASSED] pf_negotiate_latest_next
[15:25:36] [SKIPPED] pf_negotiate_latest_older
[15:25:36] [SKIPPED] pf_negotiate_latest_prev
[15:25:36] =================== [PASSED] pf_service ====================
[15:25:36] =================== xe_mocs (2 subtests) ===================
[15:25:36] ================ xe_live_mocs_kernel_kunit  ================
[15:25:36] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[15:25:36] ================ xe_live_mocs_reset_kunit  =================
[15:25:36] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[15:25:36] ==================== [SKIPPED] xe_mocs =====================
[15:25:36] ================= xe_migrate (2 subtests) ==================
[15:25:36] ================= xe_migrate_sanity_kunit  =================
[15:25:36] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[15:25:36] ================== xe_validate_ccs_kunit  ==================
[15:25:36] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[15:25:36] =================== [SKIPPED] xe_migrate ===================
[15:25:36] ================== xe_dma_buf (1 subtest) ==================
[15:25:36] ==================== xe_dma_buf_kunit  =====================
[15:25:36] ================ [SKIPPED] xe_dma_buf_kunit ================
[15:25:36] =================== [SKIPPED] xe_dma_buf ===================
[15:25:36] ================= xe_bo_shrink (1 subtest) =================
[15:25:36] =================== xe_bo_shrink_kunit  ====================
[15:25:36] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[15:25:36] ================== [SKIPPED] xe_bo_shrink ==================
[15:25:36] ==================== xe_bo (2 subtests) ====================
[15:25:36] ================== xe_ccs_migrate_kunit  ===================
[15:25:36] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[15:25:36] ==================== xe_bo_evict_kunit  ====================
[15:25:36] =============== [SKIPPED] xe_bo_evict_kunit ================
[15:25:36] ===================== [SKIPPED] xe_bo ======================
[15:25:36] ==================== args (11 subtests) ====================
[15:25:36] [PASSED] count_args_test
[15:25:36] [PASSED] call_args_example
[15:25:36] [PASSED] call_args_test
[15:25:36] [PASSED] drop_first_arg_example
[15:25:36] [PASSED] drop_first_arg_test
[15:25:36] [PASSED] first_arg_example
[15:25:36] [PASSED] first_arg_test
[15:25:36] [PASSED] last_arg_example
[15:25:36] [PASSED] last_arg_test
[15:25:36] [PASSED] pick_arg_example
[15:25:36] [PASSED] sep_comma_example
[15:25:36] ====================== [PASSED] args =======================
[15:25:36] =================== xe_pci (3 subtests) ====================
[15:25:36] ==================== check_graphics_ip  ====================
[15:25:36] [PASSED] 12.70 Xe_LPG
[15:25:36] [PASSED] 12.71 Xe_LPG
[15:25:36] [PASSED] 12.74 Xe_LPG+
[15:25:36] [PASSED] 20.01 Xe2_HPG
[15:25:36] [PASSED] 20.02 Xe2_HPG
[15:25:36] [PASSED] 20.04 Xe2_LPG
[15:25:36] [PASSED] 30.00 Xe3_LPG
[15:25:36] [PASSED] 30.01 Xe3_LPG
[15:25:36] [PASSED] 30.03 Xe3_LPG
[15:25:36] ================ [PASSED] check_graphics_ip ================
[15:25:36] ===================== check_media_ip  ======================
[15:25:36] [PASSED] 13.00 Xe_LPM+
[15:25:36] [PASSED] 13.01 Xe2_HPM
[15:25:36] [PASSED] 20.00 Xe2_LPM
[15:25:36] [PASSED] 30.00 Xe3_LPM
[15:25:36] [PASSED] 30.02 Xe3_LPM
[15:25:36] ================= [PASSED] check_media_ip ==================
[15:25:36] ================= check_platform_gt_count  =================
[15:25:36] [PASSED] 0x9A60 (TIGERLAKE)
[15:25:36] [PASSED] 0x9A68 (TIGERLAKE)
[15:25:36] [PASSED] 0x9A70 (TIGERLAKE)
[15:25:36] [PASSED] 0x9A40 (TIGERLAKE)
[15:25:36] [PASSED] 0x9A49 (TIGERLAKE)
[15:25:36] [PASSED] 0x9A59 (TIGERLAKE)
[15:25:36] [PASSED] 0x9A78 (TIGERLAKE)
[15:25:36] [PASSED] 0x9AC0 (TIGERLAKE)
[15:25:36] [PASSED] 0x9AC9 (TIGERLAKE)
[15:25:36] [PASSED] 0x9AD9 (TIGERLAKE)
[15:25:36] [PASSED] 0x9AF8 (TIGERLAKE)
[15:25:36] [PASSED] 0x4C80 (ROCKETLAKE)
[15:25:36] [PASSED] 0x4C8A (ROCKETLAKE)
[15:25:36] [PASSED] 0x4C8B (ROCKETLAKE)
[15:25:36] [PASSED] 0x4C8C (ROCKETLAKE)
[15:25:36] [PASSED] 0x4C90 (ROCKETLAKE)
[15:25:36] [PASSED] 0x4C9A (ROCKETLAKE)
[15:25:36] [PASSED] 0x4680 (ALDERLAKE_S)
[15:25:36] [PASSED] 0x4682 (ALDERLAKE_S)
[15:25:36] [PASSED] 0x4688 (ALDERLAKE_S)
[15:25:36] [PASSED] 0x468A (ALDERLAKE_S)
[15:25:36] [PASSED] 0x468B (ALDERLAKE_S)
[15:25:36] [PASSED] 0x4690 (ALDERLAKE_S)
[15:25:36] [PASSED] 0x4692 (ALDERLAKE_S)
[15:25:36] [PASSED] 0x4693 (ALDERLAKE_S)
[15:25:36] [PASSED] 0x46A0 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46A1 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46A2 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46A3 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46A6 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46A8 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46AA (ALDERLAKE_P)
[15:25:36] [PASSED] 0x462A (ALDERLAKE_P)
[15:25:36] [PASSED] 0x4626 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x4628 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46B0 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46B1 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46B2 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46B3 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46C0 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46C1 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46C2 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46C3 (ALDERLAKE_P)
[15:25:36] [PASSED] 0x46D0 (ALDERLAKE_N)
[15:25:36] [PASSED] 0x46D1 (ALDERLAKE_N)
[15:25:36] [PASSED] 0x46D2 (ALDERLAKE_N)
[15:25:36] [PASSED] 0x46D3 (ALDERLAKE_N)
[15:25:36] [PASSED] 0x46D4 (ALDERLAKE_N)
[15:25:36] [PASSED] 0xA721 (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7A1 (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7A9 (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7AC (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7AD (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA720 (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7A0 (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7A8 (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7AA (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA7AB (ALDERLAKE_P)
[15:25:36] [PASSED] 0xA780 (ALDERLAKE_S)
[15:25:36] [PASSED] 0xA781 (ALDERLAKE_S)
[15:25:36] [PASSED] 0xA782 (ALDERLAKE_S)
[15:25:36] [PASSED] 0xA783 (ALDERLAKE_S)
[15:25:36] [PASSED] 0xA788 (ALDERLAKE_S)
[15:25:36] [PASSED] 0xA789 (ALDERLAKE_S)
[15:25:36] [PASSED] 0xA78A (ALDERLAKE_S)
[15:25:36] [PASSED] 0xA78B (ALDERLAKE_S)
[15:25:36] [PASSED] 0x4905 (DG1)
[15:25:36] [PASSED] 0x4906 (DG1)
[15:25:36] [PASSED] 0x4907 (DG1)
[15:25:36] [PASSED] 0x4908 (DG1)
[15:25:36] [PASSED] 0x4909 (DG1)
[15:25:36] [PASSED] 0x56C0 (DG2)
[15:25:36] [PASSED] 0x56C2 (DG2)
[15:25:36] [PASSED] 0x56C1 (DG2)
[15:25:36] [PASSED] 0x7D51 (METEORLAKE)
[15:25:36] [PASSED] 0x7DD1 (METEORLAKE)
[15:25:36] [PASSED] 0x7D41 (METEORLAKE)
[15:25:36] [PASSED] 0x7D67 (METEORLAKE)
[15:25:36] [PASSED] 0xB640 (METEORLAKE)
[15:25:36] [PASSED] 0x56A0 (DG2)
[15:25:36] [PASSED] 0x56A1 (DG2)
[15:25:36] [PASSED] 0x56A2 (DG2)
[15:25:36] [PASSED] 0x56BE (DG2)
[15:25:36] [PASSED] 0x56BF (DG2)
[15:25:36] [PASSED] 0x5690 (DG2)
[15:25:36] [PASSED] 0x5691 (DG2)
[15:25:36] [PASSED] 0x5692 (DG2)
[15:25:36] [PASSED] 0x56A5 (DG2)
[15:25:36] [PASSED] 0x56A6 (DG2)
[15:25:36] [PASSED] 0x56B0 (DG2)
[15:25:36] [PASSED] 0x56B1 (DG2)
[15:25:36] [PASSED] 0x56BA (DG2)
[15:25:36] [PASSED] 0x56BB (DG2)
[15:25:36] [PASSED] 0x56BC (DG2)
[15:25:36] [PASSED] 0x56BD (DG2)
[15:25:36] [PASSED] 0x5693 (DG2)
[15:25:36] [PASSED] 0x5694 (DG2)
[15:25:36] [PASSED] 0x5695 (DG2)
[15:25:36] [PASSED] 0x56A3 (DG2)
[15:25:36] [PASSED] 0x56A4 (DG2)
[15:25:36] [PASSED] 0x56B2 (DG2)
[15:25:36] [PASSED] 0x56B3 (DG2)
[15:25:36] [PASSED] 0x5696 (DG2)
[15:25:36] [PASSED] 0x5697 (DG2)
[15:25:36] [PASSED] 0xB69 (PVC)
[15:25:36] [PASSED] 0xB6E (PVC)
[15:25:36] [PASSED] 0xBD4 (PVC)
[15:25:36] [PASSED] 0xBD5 (PVC)
[15:25:36] [PASSED] 0xBD6 (PVC)
[15:25:36] [PASSED] 0xBD7 (PVC)
[15:25:36] [PASSED] 0xBD8 (PVC)
[15:25:36] [PASSED] 0xBD9 (PVC)
[15:25:36] [PASSED] 0xBDA (PVC)
[15:25:36] [PASSED] 0xBDB (PVC)
[15:25:36] [PASSED] 0xBE0 (PVC)
[15:25:36] [PASSED] 0xBE1 (PVC)
[15:25:36] [PASSED] 0xBE5 (PVC)
[15:25:36] [PASSED] 0x7D40 (METEORLAKE)
[15:25:36] [PASSED] 0x7D45 (METEORLAKE)
[15:25:36] [PASSED] 0x7D55 (METEORLAKE)
[15:25:36] [PASSED] 0x7D60 (METEORLAKE)
[15:25:36] [PASSED] 0x7DD5 (METEORLAKE)
[15:25:36] [PASSED] 0x6420 (LUNARLAKE)
[15:25:36] [PASSED] 0x64A0 (LUNARLAKE)
[15:25:36] [PASSED] 0x64B0 (LUNARLAKE)
[15:25:36] [PASSED] 0xE202 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE209 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE20B (BATTLEMAGE)
[15:25:36] [PASSED] 0xE20C (BATTLEMAGE)
[15:25:36] [PASSED] 0xE20D (BATTLEMAGE)
[15:25:36] [PASSED] 0xE210 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE211 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE212 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE216 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE220 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE221 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE222 (BATTLEMAGE)
[15:25:36] [PASSED] 0xE223 (BATTLEMAGE)
[15:25:36] [PASSED] 0xB080 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB081 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB082 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB083 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB084 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB085 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB086 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB087 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB08F (PANTHERLAKE)
[15:25:36] [PASSED] 0xB090 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB0A0 (PANTHERLAKE)
[15:25:36] [PASSED] 0xB0B0 (PANTHERLAKE)
[15:25:36] [PASSED] 0xFD80 (PANTHERLAKE)
[15:25:36] [PASSED] 0xFD81 (PANTHERLAKE)
[15:25:36] ============= [PASSED] check_platform_gt_count =============
[15:25:36] ===================== [PASSED] xe_pci ======================
[15:25:36] =================== xe_rtp (2 subtests) ====================
[15:25:36] =============== xe_rtp_process_to_sr_tests  ================
[15:25:36] [PASSED] coalesce-same-reg
[15:25:36] [PASSED] no-match-no-add
[15:25:36] [PASSED] match-or
[15:25:36] [PASSED] match-or-xfail
[15:25:36] [PASSED] no-match-no-add-multiple-rules
[15:25:36] [PASSED] two-regs-two-entries
[15:25:36] [PASSED] clr-one-set-other
[15:25:36] [PASSED] set-field
[15:25:36] [PASSED] conflict-duplicate
[15:25:36] [PASSED] conflict-not-disjoint
[15:25:36] [PASSED] conflict-reg-type
[15:25:36] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[15:25:36] ================== xe_rtp_process_tests  ===================
[15:25:36] [PASSED] active1
[15:25:36] [PASSED] active2
[15:25:36] [PASSED] active-inactive
[15:25:36] [PASSED] inactive-active
[15:25:36] [PASSED] inactive-1st_or_active-inactive
[15:25:36] [PASSED] inactive-2nd_or_active-inactive
[15:25:36] [PASSED] inactive-last_or_active-inactive
[15:25:36] [PASSED] inactive-no_or_active-inactive
[15:25:36] ============== [PASSED] xe_rtp_process_tests ===============
[15:25:36] ===================== [PASSED] xe_rtp ======================
[15:25:36] ==================== xe_wa (1 subtest) =====================
[15:25:36] ======================== xe_wa_gt  =========================
[15:25:36] [PASSED] TIGERLAKE B0
[15:25:36] [PASSED] DG1 A0
[15:25:36] [PASSED] DG1 B0
[15:25:36] [PASSED] ALDERLAKE_S A0
[15:25:36] [PASSED] ALDERLAKE_S B0
[15:25:36] [PASSED] ALDERLAKE_S C0
[15:25:36] [PASSED] ALDERLAKE_S D0
[15:25:36] [PASSED] ALDERLAKE_P A0
[15:25:36] [PASSED] ALDERLAKE_P B0
[15:25:36] [PASSED] ALDERLAKE_P C0
[15:25:36] [PASSED] ALDERLAKE_S RPLS D0
[15:25:36] [PASSED] ALDERLAKE_P RPLU E0
[15:25:36] [PASSED] DG2 G10 C0
[15:25:36] [PASSED] DG2 G11 B1
[15:25:36] [PASSED] DG2 G12 A1
[15:25:36] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:25:36] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:25:36] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[15:25:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
stty: 'standard input': Inappropriate ioctl for device
[15:25:36] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[15:25:36] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[15:25:36] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[15:25:36] ==================== [PASSED] xe_wa_gt =====================
[15:25:36] ====================== [PASSED] xe_wa ======================
[15:25:36] ============================================================
[15:25:36] Testing complete. Ran 298 tests: passed: 282, skipped: 16
[15:25:36] Elapsed time: 33.394s total, 4.282s configuring, 28.745s building, 0.331s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:25:36] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:25:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:26:01] Starting KUnit Kernel (1/1)...
[15:26:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:26:01] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[15:26:01] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[15:26:01] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[15:26:01] =========== drm_validate_clone_mode (2 subtests) ===========
[15:26:01] ============== drm_test_check_in_clone_mode  ===============
[15:26:01] [PASSED] in_clone_mode
[15:26:01] [PASSED] not_in_clone_mode
[15:26:01] ========== [PASSED] drm_test_check_in_clone_mode ===========
[15:26:01] =============== drm_test_check_valid_clones  ===============
[15:26:01] [PASSED] not_in_clone_mode
[15:26:01] [PASSED] valid_clone
[15:26:01] [PASSED] invalid_clone
[15:26:01] =========== [PASSED] drm_test_check_valid_clones ===========
[15:26:01] ============= [PASSED] drm_validate_clone_mode =============
[15:26:01] ============= drm_validate_modeset (1 subtest) =============
[15:26:01] [PASSED] drm_test_check_connector_changed_modeset
[15:26:01] ============== [PASSED] drm_validate_modeset ===============
[15:26:01] ====== drm_test_bridge_get_current_state (2 subtests) ======
[15:26:01] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[15:26:01] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[15:26:01] ======== [PASSED] drm_test_bridge_get_current_state ========
[15:26:01] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[15:26:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[15:26:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[15:26:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[15:26:01] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[15:26:01] ============== drm_bridge_alloc (2 subtests) ===============
[15:26:01] [PASSED] drm_test_drm_bridge_alloc_basic
[15:26:01] [PASSED] drm_test_drm_bridge_alloc_get_put
[15:26:01] ================ [PASSED] drm_bridge_alloc =================
[15:26:01] ================== drm_buddy (7 subtests) ==================
[15:26:01] [PASSED] drm_test_buddy_alloc_limit
[15:26:01] [PASSED] drm_test_buddy_alloc_optimistic
[15:26:01] [PASSED] drm_test_buddy_alloc_pessimistic
[15:26:01] [PASSED] drm_test_buddy_alloc_pathological
[15:26:01] [PASSED] drm_test_buddy_alloc_contiguous
[15:26:01] [PASSED] drm_test_buddy_alloc_clear
[15:26:01] [PASSED] drm_test_buddy_alloc_range_bias
[15:26:01] ==================== [PASSED] drm_buddy ====================
[15:26:01] ============= drm_cmdline_parser (40 subtests) =============
[15:26:01] [PASSED] drm_test_cmdline_force_d_only
[15:26:01] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:26:01] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:26:01] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:26:01] [PASSED] drm_test_cmdline_force_e_only
[15:26:01] [PASSED] drm_test_cmdline_res
[15:26:01] [PASSED] drm_test_cmdline_res_vesa
[15:26:01] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:26:01] [PASSED] drm_test_cmdline_res_rblank
[15:26:01] [PASSED] drm_test_cmdline_res_bpp
[15:26:01] [PASSED] drm_test_cmdline_res_refresh
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:26:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:26:01] [PASSED] drm_test_cmdline_res_margins_force_on
[15:26:01] [PASSED] drm_test_cmdline_res_vesa_margins
[15:26:01] [PASSED] drm_test_cmdline_name
[15:26:01] [PASSED] drm_test_cmdline_name_bpp
[15:26:01] [PASSED] drm_test_cmdline_name_option
[15:26:01] [PASSED] drm_test_cmdline_name_bpp_option
[15:26:01] [PASSED] drm_test_cmdline_rotate_0
[15:26:01] [PASSED] drm_test_cmdline_rotate_90
[15:26:01] [PASSED] drm_test_cmdline_rotate_180
[15:26:01] [PASSED] drm_test_cmdline_rotate_270
[15:26:01] [PASSED] drm_test_cmdline_hmirror
[15:26:01] [PASSED] drm_test_cmdline_vmirror
[15:26:01] [PASSED] drm_test_cmdline_margin_options
[15:26:01] [PASSED] drm_test_cmdline_multiple_options
[15:26:01] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:26:01] [PASSED] drm_test_cmdline_extra_and_option
[15:26:01] [PASSED] drm_test_cmdline_freestanding_options
[15:26:01] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:26:01] [PASSED] drm_test_cmdline_panel_orientation
[15:26:01] ================ drm_test_cmdline_invalid  =================
[15:26:01] [PASSED] margin_only
[15:26:01] [PASSED] interlace_only
[15:26:01] [PASSED] res_missing_x
[15:26:01] [PASSED] res_missing_y
[15:26:01] [PASSED] res_bad_y
[15:26:01] [PASSED] res_missing_y_bpp
[15:26:01] [PASSED] res_bad_bpp
[15:26:01] [PASSED] res_bad_refresh
[15:26:01] [PASSED] res_bpp_refresh_force_on_off
[15:26:01] [PASSED] res_invalid_mode
[15:26:01] [PASSED] res_bpp_wrong_place_mode
[15:26:01] [PASSED] name_bpp_refresh
[15:26:01] [PASSED] name_refresh
[15:26:01] [PASSED] name_refresh_wrong_mode
[15:26:01] [PASSED] name_refresh_invalid_mode
[15:26:01] [PASSED] rotate_multiple
[15:26:01] [PASSED] rotate_invalid_val
[15:26:01] [PASSED] rotate_truncated
[15:26:01] [PASSED] invalid_option
[15:26:01] [PASSED] invalid_tv_option
[15:26:01] [PASSED] truncated_tv_option
[15:26:01] ============ [PASSED] drm_test_cmdline_invalid =============
[15:26:01] =============== drm_test_cmdline_tv_options  ===============
[15:26:01] [PASSED] NTSC
[15:26:01] [PASSED] NTSC_443
[15:26:01] [PASSED] NTSC_J
[15:26:01] [PASSED] PAL
[15:26:01] [PASSED] PAL_M
[15:26:01] [PASSED] PAL_N
[15:26:01] [PASSED] SECAM
[15:26:01] [PASSED] MONO_525
[15:26:01] [PASSED] MONO_625
[15:26:01] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:26:01] =============== [PASSED] drm_cmdline_parser ================
[15:26:01] ========== drmm_connector_hdmi_init (20 subtests) ==========
[15:26:01] [PASSED] drm_test_connector_hdmi_init_valid
[15:26:01] [PASSED] drm_test_connector_hdmi_init_bpc_8
[15:26:01] [PASSED] drm_test_connector_hdmi_init_bpc_10
[15:26:01] [PASSED] drm_test_connector_hdmi_init_bpc_12
[15:26:01] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[15:26:01] [PASSED] drm_test_connector_hdmi_init_bpc_null
[15:26:01] [PASSED] drm_test_connector_hdmi_init_formats_empty
[15:26:01] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[15:26:01] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[15:26:01] [PASSED] supported_formats=0x9 yuv420_allowed=1
[15:26:01] [PASSED] supported_formats=0x9 yuv420_allowed=0
[15:26:01] [PASSED] supported_formats=0x3 yuv420_allowed=1
[15:26:01] [PASSED] supported_formats=0x3 yuv420_allowed=0
[15:26:01] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:26:01] [PASSED] drm_test_connector_hdmi_init_null_ddc
[15:26:01] [PASSED] drm_test_connector_hdmi_init_null_product
[15:26:01] [PASSED] drm_test_connector_hdmi_init_null_vendor
[15:26:01] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[15:26:01] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[15:26:01] [PASSED] drm_test_connector_hdmi_init_product_valid
[15:26:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[15:26:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[15:26:01] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[15:26:01] ========= drm_test_connector_hdmi_init_type_valid  =========
[15:26:01] [PASSED] HDMI-A
[15:26:01] [PASSED] HDMI-B
[15:26:01] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[15:26:01] ======== drm_test_connector_hdmi_init_type_invalid  ========
[15:26:01] [PASSED] Unknown
[15:26:01] [PASSED] VGA
[15:26:01] [PASSED] DVI-I
[15:26:01] [PASSED] DVI-D
[15:26:01] [PASSED] DVI-A
[15:26:01] [PASSED] Composite
[15:26:01] [PASSED] SVIDEO
[15:26:01] [PASSED] LVDS
[15:26:01] [PASSED] Component
[15:26:01] [PASSED] DIN
[15:26:01] [PASSED] DP
[15:26:01] [PASSED] TV
[15:26:01] [PASSED] eDP
[15:26:01] [PASSED] Virtual
[15:26:01] [PASSED] DSI
[15:26:01] [PASSED] DPI
[15:26:01] [PASSED] Writeback
[15:26:01] [PASSED] SPI
[15:26:01] [PASSED] USB
[15:26:01] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[15:26:01] ============ [PASSED] drmm_connector_hdmi_init =============
[15:26:01] ============= drmm_connector_init (3 subtests) =============
[15:26:01] [PASSED] drm_test_drmm_connector_init
[15:26:01] [PASSED] drm_test_drmm_connector_init_null_ddc
[15:26:01] ========= drm_test_drmm_connector_init_type_valid  =========
[15:26:01] [PASSED] Unknown
[15:26:01] [PASSED] VGA
[15:26:01] [PASSED] DVI-I
[15:26:01] [PASSED] DVI-D
[15:26:01] [PASSED] DVI-A
[15:26:01] [PASSED] Composite
[15:26:01] [PASSED] SVIDEO
[15:26:01] [PASSED] LVDS
[15:26:01] [PASSED] Component
[15:26:01] [PASSED] DIN
[15:26:01] [PASSED] DP
[15:26:01] [PASSED] HDMI-A
[15:26:01] [PASSED] HDMI-B
[15:26:01] [PASSED] TV
[15:26:01] [PASSED] eDP
[15:26:01] [PASSED] Virtual
[15:26:01] [PASSED] DSI
[15:26:01] [PASSED] DPI
[15:26:01] [PASSED] Writeback
[15:26:01] [PASSED] SPI
[15:26:01] [PASSED] USB
[15:26:01] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[15:26:01] =============== [PASSED] drmm_connector_init ===============
[15:26:01] ========= drm_connector_dynamic_init (6 subtests) ==========
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_init
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_init_properties
[15:26:01] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[15:26:01] [PASSED] Unknown
[15:26:01] [PASSED] VGA
[15:26:01] [PASSED] DVI-I
[15:26:01] [PASSED] DVI-D
[15:26:01] [PASSED] DVI-A
[15:26:01] [PASSED] Composite
[15:26:01] [PASSED] SVIDEO
[15:26:01] [PASSED] LVDS
[15:26:01] [PASSED] Component
[15:26:01] [PASSED] DIN
[15:26:01] [PASSED] DP
[15:26:01] [PASSED] HDMI-A
[15:26:01] [PASSED] HDMI-B
[15:26:01] [PASSED] TV
[15:26:01] [PASSED] eDP
[15:26:01] [PASSED] Virtual
[15:26:01] [PASSED] DSI
[15:26:01] [PASSED] DPI
[15:26:01] [PASSED] Writeback
[15:26:01] [PASSED] SPI
[15:26:01] [PASSED] USB
[15:26:01] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[15:26:01] ======== drm_test_drm_connector_dynamic_init_name  =========
[15:26:01] [PASSED] Unknown
[15:26:01] [PASSED] VGA
[15:26:01] [PASSED] DVI-I
[15:26:01] [PASSED] DVI-D
[15:26:01] [PASSED] DVI-A
[15:26:01] [PASSED] Composite
[15:26:01] [PASSED] SVIDEO
[15:26:01] [PASSED] LVDS
[15:26:01] [PASSED] Component
[15:26:01] [PASSED] DIN
[15:26:01] [PASSED] DP
[15:26:01] [PASSED] HDMI-A
[15:26:01] [PASSED] HDMI-B
[15:26:01] [PASSED] TV
[15:26:01] [PASSED] eDP
[15:26:01] [PASSED] Virtual
[15:26:01] [PASSED] DSI
[15:26:01] [PASSED] DPI
[15:26:01] [PASSED] Writeback
[15:26:01] [PASSED] SPI
[15:26:01] [PASSED] USB
[15:26:01] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[15:26:01] =========== [PASSED] drm_connector_dynamic_init ============
[15:26:01] ==== drm_connector_dynamic_register_early (4 subtests) =====
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[15:26:01] ====== [PASSED] drm_connector_dynamic_register_early =======
[15:26:01] ======= drm_connector_dynamic_register (7 subtests) ========
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[15:26:01] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[15:26:01] ========= [PASSED] drm_connector_dynamic_register ==========
[15:26:01] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[15:26:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[15:26:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[15:26:01] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[15:26:01] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:26:01] ========== drm_test_get_tv_mode_from_name_valid  ===========
[15:26:01] [PASSED] NTSC
[15:26:01] [PASSED] NTSC-443
[15:26:01] [PASSED] NTSC-J
[15:26:01] [PASSED] PAL
[15:26:01] [PASSED] PAL-M
[15:26:01] [PASSED] PAL-N
[15:26:01] [PASSED] SECAM
[15:26:01] [PASSED] Mono
[15:26:01] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:26:01] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:26:01] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:26:01] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[15:26:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[15:26:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[15:26:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[15:26:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[15:26:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[15:26:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[15:26:01] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[15:26:01] [PASSED] VIC 96
[15:26:01] [PASSED] VIC 97
[15:26:01] [PASSED] VIC 101
[15:26:01] [PASSED] VIC 102
[15:26:01] [PASSED] VIC 106
[15:26:01] [PASSED] VIC 107
[15:26:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[15:26:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[15:26:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[15:26:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[15:26:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[15:26:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[15:26:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[15:26:01] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[15:26:01] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[15:26:01] [PASSED] Automatic
[15:26:01] [PASSED] Full
[15:26:01] [PASSED] Limited 16:235
[15:26:01] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[15:26:01] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[15:26:01] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[15:26:01] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[15:26:01] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[15:26:01] [PASSED] RGB
[15:26:01] [PASSED] YUV 4:2:0
[15:26:01] [PASSED] YUV 4:2:2
[15:26:01] [PASSED] YUV 4:4:4
[15:26:01] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[15:26:01] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[15:26:01] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[15:26:01] ============= drm_damage_helper (21 subtests) ==============
[15:26:01] [PASSED] drm_test_damage_iter_no_damage
[15:26:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:26:01] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:26:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:26:01] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:26:01] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:26:01] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:26:01] [PASSED] drm_test_damage_iter_simple_damage
[15:26:01] [PASSED] drm_test_damage_iter_single_damage
[15:26:01] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:26:01] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:26:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:26:01] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:26:01] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:26:01] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:26:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:26:01] [PASSED] drm_test_damage_iter_damage
[15:26:01] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:26:01] [PASSED] drm_test_damage_iter_damage_one_outside
[15:26:01] [PASSED] drm_test_damage_iter_damage_src_moved
[15:26:01] [PASSED] drm_test_damage_iter_damage_not_visible
[15:26:01] ================ [PASSED] drm_damage_helper ================
[15:26:01] ============== drm_dp_mst_helper (3 subtests) ==============
[15:26:01] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[15:26:01] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:26:01] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:26:01] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:26:01] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:26:01] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:26:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:26:01] ============== drm_test_dp_mst_calc_pbn_div  ===============
[15:26:01] [PASSED] Link rate 2000000 lane count 4
[15:26:01] [PASSED] Link rate 2000000 lane count 2
[15:26:01] [PASSED] Link rate 2000000 lane count 1
[15:26:01] [PASSED] Link rate 1350000 lane count 4
[15:26:01] [PASSED] Link rate 1350000 lane count 2
[15:26:01] [PASSED] Link rate 1350000 lane count 1
[15:26:01] [PASSED] Link rate 1000000 lane count 4
[15:26:01] [PASSED] Link rate 1000000 lane count 2
[15:26:01] [PASSED] Link rate 1000000 lane count 1
[15:26:01] [PASSED] Link rate 810000 lane count 4
[15:26:01] [PASSED] Link rate 810000 lane count 2
[15:26:01] [PASSED] Link rate 810000 lane count 1
[15:26:01] [PASSED] Link rate 540000 lane count 4
[15:26:01] [PASSED] Link rate 540000 lane count 2
[15:26:01] [PASSED] Link rate 540000 lane count 1
[15:26:01] [PASSED] Link rate 270000 lane count 4
[15:26:01] [PASSED] Link rate 270000 lane count 2
[15:26:01] [PASSED] Link rate 270000 lane count 1
[15:26:01] [PASSED] Link rate 162000 lane count 4
[15:26:01] [PASSED] Link rate 162000 lane count 2
[15:26:01] [PASSED] Link rate 162000 lane count 1
[15:26:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[15:26:01] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[15:26:01] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:26:01] [PASSED] DP_POWER_UP_PHY with port number
[15:26:01] [PASSED] DP_POWER_DOWN_PHY with port number
[15:26:01] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:26:01] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:26:01] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:26:01] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:26:01] [PASSED] DP_QUERY_PAYLOAD with port number
[15:26:01] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:26:01] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:26:01] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:26:01] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:26:01] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:26:01] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:26:01] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:26:01] [PASSED] DP_REMOTE_I2C_READ with port number
[15:26:01] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:26:01] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:26:01] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:26:01] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:26:01] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:26:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:26:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:26:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:26:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:26:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:26:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:26:01] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:26:01] ================ [PASSED] drm_dp_mst_helper ================
[15:26:01] ================== drm_exec (7 subtests) ===================
[15:26:01] [PASSED] sanitycheck
[15:26:01] [PASSED] test_lock
[15:26:01] [PASSED] test_lock_unlock
[15:26:01] [PASSED] test_duplicates
[15:26:01] [PASSED] test_prepare
[15:26:01] [PASSED] test_prepare_array
[15:26:01] [PASSED] test_multiple_loops
[15:26:01] ==================== [PASSED] drm_exec =====================
[15:26:01] =========== drm_format_helper_test (17 subtests) ===========
[15:26:01] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:26:01] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:26:01] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:26:01] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:26:01] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:26:01] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:26:01] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:26:01] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[15:26:01] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:26:01] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:26:01] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:26:01] ============== drm_test_fb_xrgb8888_to_mono  ===============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:26:01] ==================== drm_test_fb_swab  =====================
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ================ [PASSED] drm_test_fb_swab =================
[15:26:01] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[15:26:01] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[15:26:01] [PASSED] single_pixel_source_buffer
[15:26:01] [PASSED] single_pixel_clip_rectangle
[15:26:01] [PASSED] well_known_colors
[15:26:01] [PASSED] destination_pitch
[15:26:01] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[15:26:01] ================= drm_test_fb_clip_offset  =================
[15:26:01] [PASSED] pass through
[15:26:01] [PASSED] horizontal offset
[15:26:01] [PASSED] vertical offset
[15:26:01] [PASSED] horizontal and vertical offset
[15:26:01] [PASSED] horizontal offset (custom pitch)
[15:26:01] [PASSED] vertical offset (custom pitch)
[15:26:01] [PASSED] horizontal and vertical offset (custom pitch)
[15:26:01] ============= [PASSED] drm_test_fb_clip_offset =============
[15:26:01] =================== drm_test_fb_memcpy  ====================
[15:26:01] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[15:26:01] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[15:26:01] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[15:26:01] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[15:26:01] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[15:26:01] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[15:26:01] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[15:26:01] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[15:26:01] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[15:26:01] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[15:26:01] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[15:26:01] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[15:26:01] =============== [PASSED] drm_test_fb_memcpy ================
[15:26:01] ============= [PASSED] drm_format_helper_test ==============
[15:26:01] ================= drm_format (18 subtests) =================
[15:26:01] [PASSED] drm_test_format_block_width_invalid
[15:26:01] [PASSED] drm_test_format_block_width_one_plane
[15:26:01] [PASSED] drm_test_format_block_width_two_plane
[15:26:01] [PASSED] drm_test_format_block_width_three_plane
[15:26:01] [PASSED] drm_test_format_block_width_tiled
[15:26:01] [PASSED] drm_test_format_block_height_invalid
[15:26:01] [PASSED] drm_test_format_block_height_one_plane
[15:26:01] [PASSED] drm_test_format_block_height_two_plane
[15:26:01] [PASSED] drm_test_format_block_height_three_plane
[15:26:01] [PASSED] drm_test_format_block_height_tiled
[15:26:01] [PASSED] drm_test_format_min_pitch_invalid
[15:26:01] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:26:01] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:26:01] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:26:01] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:26:01] [PASSED] drm_test_format_min_pitch_two_plane
[15:26:01] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:26:01] [PASSED] drm_test_format_min_pitch_tiled
[15:26:01] =================== [PASSED] drm_format ====================
[15:26:01] ============== drm_framebuffer (10 subtests) ===============
[15:26:01] ========== drm_test_framebuffer_check_src_coords  ==========
[15:26:01] [PASSED] Success: source fits into fb
[15:26:01] [PASSED] Fail: overflowing fb with x-axis coordinate
[15:26:01] [PASSED] Fail: overflowing fb with y-axis coordinate
[15:26:01] [PASSED] Fail: overflowing fb with source width
[15:26:01] [PASSED] Fail: overflowing fb with source height
[15:26:01] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[15:26:01] [PASSED] drm_test_framebuffer_cleanup
[15:26:01] =============== drm_test_framebuffer_create  ===============
[15:26:01] [PASSED] ABGR8888 normal sizes
[15:26:01] [PASSED] ABGR8888 max sizes
[15:26:01] [PASSED] ABGR8888 pitch greater than min required
[15:26:01] [PASSED] ABGR8888 pitch less than min required
[15:26:01] [PASSED] ABGR8888 Invalid width
[15:26:01] [PASSED] ABGR8888 Invalid buffer handle
[15:26:01] [PASSED] No pixel format
[15:26:01] [PASSED] ABGR8888 Width 0
[15:26:01] [PASSED] ABGR8888 Height 0
[15:26:01] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:26:01] [PASSED] ABGR8888 Large buffer offset
[15:26:01] [PASSED] ABGR8888 Buffer offset for inexistent plane
[15:26:01] [PASSED] ABGR8888 Invalid flag
[15:26:01] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:26:01] [PASSED] ABGR8888 Valid buffer modifier
[15:26:01] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:26:01] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:26:01] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:26:01] [PASSED] NV12 Normal sizes
[15:26:01] [PASSED] NV12 Max sizes
[15:26:01] [PASSED] NV12 Invalid pitch
[15:26:01] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:26:01] [PASSED] NV12 different  modifier per-plane
[15:26:01] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:26:01] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:26:01] [PASSED] NV12 Modifier for inexistent plane
[15:26:01] [PASSED] NV12 Handle for inexistent plane
[15:26:01] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:26:01] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:26:01] [PASSED] YVU420 Normal sizes
[15:26:01] [PASSED] YVU420 Max sizes
[15:26:01] [PASSED] YVU420 Invalid pitch
[15:26:01] [PASSED] YVU420 Different pitches
[15:26:01] [PASSED] YVU420 Different buffer offsets/pitches
[15:26:01] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:26:01] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:26:01] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:26:01] [PASSED] YVU420 Valid modifier
[15:26:01] [PASSED] YVU420 Different modifiers per plane
[15:26:01] [PASSED] YVU420 Modifier for inexistent plane
[15:26:01] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[15:26:01] [PASSED] X0L2 Normal sizes
[15:26:01] [PASSED] X0L2 Max sizes
[15:26:01] [PASSED] X0L2 Invalid pitch
[15:26:01] [PASSED] X0L2 Pitch greater than minimum required
[15:26:01] [PASSED] X0L2 Handle for inexistent plane
[15:26:01] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:26:01] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:26:01] [PASSED] X0L2 Valid modifier
[15:26:01] [PASSED] X0L2 Modifier for inexistent plane
[15:26:01] =========== [PASSED] drm_test_framebuffer_create ===========
[15:26:01] [PASSED] drm_test_framebuffer_free
[15:26:01] [PASSED] drm_test_framebuffer_init
[15:26:01] [PASSED] drm_test_framebuffer_init_bad_format
[15:26:01] [PASSED] drm_test_framebuffer_init_dev_mismatch
[15:26:01] [PASSED] drm_test_framebuffer_lookup
[15:26:01] [PASSED] drm_test_framebuffer_lookup_inexistent
[15:26:01] [PASSED] drm_test_framebuffer_modifiers_not_supported
[15:26:01] ================= [PASSED] drm_framebuffer =================
[15:26:01] ================ drm_gem_shmem (8 subtests) ================
[15:26:01] [PASSED] drm_gem_shmem_test_obj_create
[15:26:01] [PASSED] drm_gem_shmem_test_obj_create_private
[15:26:01] [PASSED] drm_gem_shmem_test_pin_pages
[15:26:01] [PASSED] drm_gem_shmem_test_vmap
[15:26:01] [PASSED] drm_gem_shmem_test_get_pages_sgt
[15:26:01] [PASSED] drm_gem_shmem_test_get_sg_table
[15:26:01] [PASSED] drm_gem_shmem_test_madvise
[15:26:01] [PASSED] drm_gem_shmem_test_purge
[15:26:01] ================== [PASSED] drm_gem_shmem ==================
[15:26:01] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[15:26:01] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[15:26:01] [PASSED] Automatic
[15:26:01] [PASSED] Full
[15:26:01] [PASSED] Limited 16:235
[15:26:01] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[15:26:01] [PASSED] drm_test_check_disable_connector
[15:26:01] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[15:26:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[15:26:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[15:26:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[15:26:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[15:26:01] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[15:26:01] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[15:26:01] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[15:26:01] [PASSED] drm_test_check_output_bpc_dvi
[15:26:01] [PASSED] drm_test_check_output_bpc_format_vic_1
[15:26:01] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[15:26:01] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[15:26:01] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[15:26:01] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[15:26:01] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[15:26:01] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[15:26:01] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[15:26:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[15:26:01] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[15:26:01] [PASSED] drm_test_check_broadcast_rgb_value
[15:26:01] [PASSED] drm_test_check_bpc_8_value
[15:26:01] [PASSED] drm_test_check_bpc_10_value
[15:26:01] [PASSED] drm_test_check_bpc_12_value
[15:26:01] [PASSED] drm_test_check_format_value
[15:26:01] [PASSED] drm_test_check_tmds_char_value
[15:26:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[15:26:01] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[15:26:01] [PASSED] drm_test_check_mode_valid
[15:26:01] [PASSED] drm_test_check_mode_valid_reject
[15:26:01] [PASSED] drm_test_check_mode_valid_reject_rate
[15:26:01] [PASSED] drm_test_check_mode_valid_reject_max_clock
[15:26:01] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[15:26:01] ================= drm_managed (2 subtests) =================
[15:26:01] [PASSED] drm_test_managed_release_action
[15:26:01] [PASSED] drm_test_managed_run_action
[15:26:01] =================== [PASSED] drm_managed ===================
[15:26:01] =================== drm_mm (6 subtests) ====================
[15:26:01] [PASSED] drm_test_mm_init
[15:26:01] [PASSED] drm_test_mm_debug
[15:26:01] [PASSED] drm_test_mm_align32
[15:26:01] [PASSED] drm_test_mm_align64
[15:26:01] [PASSED] drm_test_mm_lowest
[15:26:01] [PASSED] drm_test_mm_highest
[15:26:01] ===================== [PASSED] drm_mm ======================
[15:26:01] ============= drm_modes_analog_tv (5 subtests) =============
[15:26:01] [PASSED] drm_test_modes_analog_tv_mono_576i
[15:26:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:26:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:26:01] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:26:01] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:26:01] =============== [PASSED] drm_modes_analog_tv ===============
[15:26:01] ============== drm_plane_helper (2 subtests) ===============
[15:26:01] =============== drm_test_check_plane_state  ================
[15:26:01] [PASSED] clipping_simple
[15:26:01] [PASSED] clipping_rotate_reflect
[15:26:01] [PASSED] positioning_simple
[15:26:01] [PASSED] upscaling
[15:26:01] [PASSED] downscaling
[15:26:01] [PASSED] rounding1
[15:26:01] [PASSED] rounding2
[15:26:01] [PASSED] rounding3
[15:26:01] [PASSED] rounding4
[15:26:01] =========== [PASSED] drm_test_check_plane_state ============
[15:26:01] =========== drm_test_check_invalid_plane_state  ============
[15:26:01] [PASSED] positioning_invalid
[15:26:01] [PASSED] upscaling_invalid
[15:26:01] [PASSED] downscaling_invalid
[15:26:01] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:26:01] ================ [PASSED] drm_plane_helper =================
[15:26:01] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:26:01] ====== drm_test_connector_helper_tv_get_modes_check  =======
[15:26:01] [PASSED] None
[15:26:01] [PASSED] PAL
[15:26:01] [PASSED] NTSC
[15:26:01] [PASSED] Both, NTSC Default
[15:26:01] [PASSED] Both, PAL Default
[15:26:01] [PASSED] Both, NTSC Default, with PAL on command-line
[15:26:01] [PASSED] Both, PAL Default, with NTSC on command-line
[15:26:01] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:26:01] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:26:01] ================== drm_rect (9 subtests) ===================
[15:26:01] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:26:01] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:26:01] [PASSED] drm_test_rect_clip_scaled_clipped
[15:26:01] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:26:01] ================= drm_test_rect_intersect  =================
[15:26:01] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:26:01] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:26:01] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:26:01] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:26:01] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:26:01] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:26:01] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:26:01] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:26:01] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:26:01] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:26:01] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:26:01] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:26:01] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:26:01] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:26:01] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:26:01] ============= [PASSED] drm_test_rect_intersect =============
[15:26:01] ================ drm_test_rect_calc_hscale  ================
[15:26:01] [PASSED] normal use
[15:26:01] [PASSED] out of max range
[15:26:01] [PASSED] out of min range
[15:26:01] [PASSED] zero dst
[15:26:01] [PASSED] negative src
[15:26:01] [PASSED] negative dst
[15:26:01] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:26:01] ================ drm_test_rect_calc_vscale  ================
[15:26:01] [PASSED] normal use
[15:26:01] [PASSED] out of max range
[15:26:01] [PASSED] out of min range
[15:26:01] [PASSED] zero dst
[15:26:01] [PASSED] negative src
[15:26:01] [PASSED] negative dst
[15:26:01] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:26:01] ================== drm_test_rect_rotate  ===================
[15:26:01] [PASSED] reflect-x
[15:26:01] [PASSED] reflect-y
[15:26:01] [PASSED] rotate-0
[15:26:01] [PASSED] rotate-90
[15:26:01] [PASSED] rotate-180
[15:26:01] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[15:26:01] ============== [PASSED] drm_test_rect_rotate ===============
[15:26:01] ================ drm_test_rect_rotate_inv  =================
[15:26:01] [PASSED] reflect-x
[15:26:01] [PASSED] reflect-y
[15:26:01] [PASSED] rotate-0
[15:26:01] [PASSED] rotate-90
[15:26:01] [PASSED] rotate-180
[15:26:01] [PASSED] rotate-270
[15:26:01] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:26:01] ==================== [PASSED] drm_rect =====================
[15:26:01] ============ drm_sysfb_modeset_test (1 subtest) ============
[15:26:01] ============ drm_test_sysfb_build_fourcc_list  =============
[15:26:01] [PASSED] no native formats
[15:26:01] [PASSED] XRGB8888 as native format
[15:26:01] [PASSED] remove duplicates
[15:26:01] [PASSED] convert alpha formats
[15:26:01] [PASSED] random formats
[15:26:01] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[15:26:01] ============= [PASSED] drm_sysfb_modeset_test ==============
[15:26:01] ============================================================
[15:26:01] Testing complete. Ran 616 tests: passed: 616
[15:26:01] Elapsed time: 24.510s total, 1.718s configuring, 22.626s building, 0.130s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[15:26:01] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:26:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:26:11] Starting KUnit Kernel (1/1)...
[15:26:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:26:11] ================= ttm_device (5 subtests) ==================
[15:26:11] [PASSED] ttm_device_init_basic
[15:26:11] [PASSED] ttm_device_init_multiple
[15:26:11] [PASSED] ttm_device_fini_basic
[15:26:11] [PASSED] ttm_device_init_no_vma_man
[15:26:11] ================== ttm_device_init_pools  ==================
[15:26:11] [PASSED] No DMA allocations, no DMA32 required
[15:26:11] [PASSED] DMA allocations, DMA32 required
[15:26:11] [PASSED] No DMA allocations, DMA32 required
[15:26:11] [PASSED] DMA allocations, no DMA32 required
[15:26:11] ============== [PASSED] ttm_device_init_pools ==============
[15:26:11] =================== [PASSED] ttm_device ====================
[15:26:11] ================== ttm_pool (8 subtests) ===================
[15:26:11] ================== ttm_pool_alloc_basic  ===================
[15:26:11] [PASSED] One page
[15:26:11] [PASSED] More than one page
[15:26:11] [PASSED] Above the allocation limit
[15:26:11] [PASSED] One page, with coherent DMA mappings enabled
[15:26:11] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:26:11] ============== [PASSED] ttm_pool_alloc_basic ===============
[15:26:11] ============== ttm_pool_alloc_basic_dma_addr  ==============
[15:26:11] [PASSED] One page
[15:26:11] [PASSED] More than one page
[15:26:11] [PASSED] Above the allocation limit
[15:26:11] [PASSED] One page, with coherent DMA mappings enabled
[15:26:11] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[15:26:11] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[15:26:11] [PASSED] ttm_pool_alloc_order_caching_match
[15:26:11] [PASSED] ttm_pool_alloc_caching_mismatch
[15:26:11] [PASSED] ttm_pool_alloc_order_mismatch
[15:26:11] [PASSED] ttm_pool_free_dma_alloc
[15:26:11] [PASSED] ttm_pool_free_no_dma_alloc
[15:26:11] [PASSED] ttm_pool_fini_basic
[15:26:11] ==================== [PASSED] ttm_pool =====================
[15:26:11] ================ ttm_resource (8 subtests) =================
[15:26:11] ================= ttm_resource_init_basic  =================
[15:26:11] [PASSED] Init resource in TTM_PL_SYSTEM
[15:26:11] [PASSED] Init resource in TTM_PL_VRAM
[15:26:11] [PASSED] Init resource in a private placement
[15:26:11] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[15:26:11] ============= [PASSED] ttm_resource_init_basic =============
[15:26:11] [PASSED] ttm_resource_init_pinned
[15:26:11] [PASSED] ttm_resource_fini_basic
[15:26:11] [PASSED] ttm_resource_manager_init_basic
[15:26:11] [PASSED] ttm_resource_manager_usage_basic
[15:26:11] [PASSED] ttm_resource_manager_set_used_basic
[15:26:11] [PASSED] ttm_sys_man_alloc_basic
[15:26:11] [PASSED] ttm_sys_man_free_basic
[15:26:11] ================== [PASSED] ttm_resource ===================
[15:26:11] =================== ttm_tt (15 subtests) ===================
[15:26:11] ==================== ttm_tt_init_basic  ====================
[15:26:11] [PASSED] Page-aligned size
[15:26:11] [PASSED] Extra pages requested
[15:26:11] ================ [PASSED] ttm_tt_init_basic ================
[15:26:11] [PASSED] ttm_tt_init_misaligned
[15:26:11] [PASSED] ttm_tt_fini_basic
[15:26:11] [PASSED] ttm_tt_fini_sg
[15:26:11] [PASSED] ttm_tt_fini_shmem
[15:26:11] [PASSED] ttm_tt_create_basic
[15:26:11] [PASSED] ttm_tt_create_invalid_bo_type
[15:26:11] [PASSED] ttm_tt_create_ttm_exists
[15:26:11] [PASSED] ttm_tt_create_failed
[15:26:11] [PASSED] ttm_tt_destroy_basic
[15:26:11] [PASSED] ttm_tt_populate_null_ttm
[15:26:11] [PASSED] ttm_tt_populate_populated_ttm
[15:26:11] [PASSED] ttm_tt_unpopulate_basic
[15:26:11] [PASSED] ttm_tt_unpopulate_empty_ttm
[15:26:11] [PASSED] ttm_tt_swapin_basic
[15:26:11] ===================== [PASSED] ttm_tt ======================
[15:26:11] =================== ttm_bo (14 subtests) ===================
[15:26:11] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[15:26:11] [PASSED] Cannot be interrupted and sleeps
[15:26:11] [PASSED] Cannot be interrupted, locks straight away
[15:26:11] [PASSED] Can be interrupted, sleeps
[15:26:11] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[15:26:11] [PASSED] ttm_bo_reserve_locked_no_sleep
[15:26:11] [PASSED] ttm_bo_reserve_no_wait_ticket
[15:26:11] [PASSED] ttm_bo_reserve_double_resv
[15:26:11] [PASSED] ttm_bo_reserve_interrupted
[15:26:11] [PASSED] ttm_bo_reserve_deadlock
[15:26:11] [PASSED] ttm_bo_unreserve_basic
[15:26:11] [PASSED] ttm_bo_unreserve_pinned
[15:26:11] [PASSED] ttm_bo_unreserve_bulk
[15:26:11] [PASSED] ttm_bo_put_basic
[15:26:11] [PASSED] ttm_bo_put_shared_resv
[15:26:11] [PASSED] ttm_bo_pin_basic
[15:26:11] [PASSED] ttm_bo_pin_unpin_resource
[15:26:11] [PASSED] ttm_bo_multiple_pin_one_unpin
[15:26:11] ===================== [PASSED] ttm_bo ======================
[15:26:11] ============== ttm_bo_validate (21 subtests) ===============
[15:26:11] ============== ttm_bo_init_reserved_sys_man  ===============
[15:26:11] [PASSED] Buffer object for userspace
[15:26:11] [PASSED] Kernel buffer object
[15:26:11] [PASSED] Shared buffer object
[15:26:11] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[15:26:11] ============== ttm_bo_init_reserved_mock_man  ==============
[15:26:11] [PASSED] Buffer object for userspace
[15:26:11] [PASSED] Kernel buffer object
[15:26:11] [PASSED] Shared buffer object
[15:26:11] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[15:26:11] [PASSED] ttm_bo_init_reserved_resv
[15:26:11] ================== ttm_bo_validate_basic  ==================
[15:26:11] [PASSED] Buffer object for userspace
[15:26:11] [PASSED] Kernel buffer object
[15:26:11] [PASSED] Shared buffer object
[15:26:11] ============== [PASSED] ttm_bo_validate_basic ==============
[15:26:11] [PASSED] ttm_bo_validate_invalid_placement
[15:26:11] ============= ttm_bo_validate_same_placement  ==============
[15:26:11] [PASSED] System manager
[15:26:11] [PASSED] VRAM manager
[15:26:11] ========= [PASSED] ttm_bo_validate_same_placement ==========
[15:26:11] [PASSED] ttm_bo_validate_failed_alloc
[15:26:11] [PASSED] ttm_bo_validate_pinned
[15:26:11] [PASSED] ttm_bo_validate_busy_placement
[15:26:11] ================ ttm_bo_validate_multihop  =================
[15:26:11] [PASSED] Buffer object for userspace
[15:26:11] [PASSED] Kernel buffer object
[15:26:11] [PASSED] Shared buffer object
[15:26:11] ============ [PASSED] ttm_bo_validate_multihop =============
[15:26:11] ========== ttm_bo_validate_no_placement_signaled  ==========
[15:26:11] [PASSED] Buffer object in system domain, no page vector
[15:26:11] [PASSED] Buffer object in system domain with an existing page vector
[15:26:11] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[15:26:11] ======== ttm_bo_validate_no_placement_not_signaled  ========
[15:26:11] [PASSED] Buffer object for userspace
[15:26:11] [PASSED] Kernel buffer object
[15:26:11] [PASSED] Shared buffer object
[15:26:11] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[15:26:11] [PASSED] ttm_bo_validate_move_fence_signaled
[15:26:11] ========= ttm_bo_validate_move_fence_not_signaled  =========
[15:26:11] [PASSED] Waits for GPU
[15:26:11] [PASSED] Tries to lock straight away
[15:26:11] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[15:26:11] [PASSED] ttm_bo_validate_happy_evict
[15:26:11] [PASSED] ttm_bo_validate_all_pinned_evict
[15:26:11] [PASSED] ttm_bo_validate_allowed_only_evict
[15:26:11] [PASSED] ttm_bo_validate_deleted_evict
[15:26:11] [PASSED] ttm_bo_validate_busy_domain_evict
[15:26:11] [PASSED] ttm_bo_validate_evict_gutting
[15:26:11] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[15:26:11] ================= [PASSED] ttm_bo_validate =================
[15:26:11] ============================================================
[15:26:11] Testing complete. Ran 101 tests: passed: 101
[15:26:11] Elapsed time: 9.855s total, 1.725s configuring, 7.914s building, 0.184s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/1915: skl+ watermark/latency stuff (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2111 bytes --]

== Series Details ==

Series: drm/1915: skl+ watermark/latency stuff (rev2)
URL   : https://patchwork.freedesktop.org/series/154099/
State : success

== Summary ==

CI Bug Log - changes from xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823_BAT -> xe-pw-154099v2_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-154099v2_BAT that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_flip@basic-plain-flip@a-edp1:
    - bat-adlp-7:         [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +2 other tests dmesg-warn
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/bat-adlp-7/igt@kms_flip@basic-plain-flip@a-edp1.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/bat-adlp-7/igt@kms_flip@basic-plain-flip@a-edp1.html

  
#### Possible fixes ####

  * igt@xe_vm@bind-execqueues-independent:
    - {bat-ptl-vm}:       [FAIL][3] ([Intel XE#5783]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/bat-ptl-vm/igt@xe_vm@bind-execqueues-independent.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/bat-ptl-vm/igt@xe_vm@bind-execqueues-independent.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783


Build changes
-------------

  * Linux: xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823 -> xe-pw-154099v2

  IGT_8524: 8524
  xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823: 797ed8420a0e60dd3cd56639d458bce00ca42823
  xe-pw-154099v2: 154099v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/index.html

[-- Attachment #2: Type: text/html, Size: 2708 bytes --]

✓ Xe.CI.Full: success for drm/1915: skl+ watermark/latency stuff (rev2)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 71107 bytes --]

== Series Details ==

Series: drm/1915: skl+ watermark/latency stuff (rev2)
URL   : https://patchwork.freedesktop.org/series/154099/
State : success

== Summary ==

CI Bug Log - changes from xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823_FULL -> xe-pw-154099v2_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-154099v2_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@4-tiled-16bpp-rotate-180:
    - shard-adlp:         NOTRUN -> [SKIP][1] ([Intel XE#1124]) +2 other tests skip
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_big_fb@4-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#3658])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@linear-32bpp-rotate-270:
    - shard-adlp:         NOTRUN -> [SKIP][3] ([Intel XE#316]) +1 other test skip
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_big_fb@linear-32bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-90:
    - shard-dg2-set2:     NOTRUN -> [SKIP][4] ([Intel XE#316]) +1 other test skip
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg2-set2:     NOTRUN -> [SKIP][5] ([Intel XE#1124]) +4 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-adlp:         [PASS][6] -> [DMESG-FAIL][7] ([Intel XE#4543])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-adlp:         NOTRUN -> [DMESG-FAIL][8] ([Intel XE#4543]) +1 other test dmesg-fail
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#1124]) +2 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][10] ([Intel XE#1124]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#2191])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-1-displays-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#367])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-2-displays-2560x1440p:
    - shard-adlp:         NOTRUN -> [SKIP][13] ([Intel XE#367])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-b-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][14] ([Intel XE#787]) +125 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-b-dp-2.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2887])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][16] ([Intel XE#2907])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][17] ([Intel XE#2907])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-d-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#455] / [Intel XE#787]) +22 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-d-dp-2.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#2887]) +4 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][20] ([Intel XE#787]) +8 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-d-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][21] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][22] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
    - shard-dg2-set2:     [PASS][23] -> [INCOMPLETE][24] ([Intel XE#3124])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     [PASS][25] -> [DMESG-WARN][26] ([Intel XE#1727] / [Intel XE#3113])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-hdmi-a-6.html

  * igt@kms_cdclk@plane-scaling:
    - shard-adlp:         NOTRUN -> [SKIP][27] ([Intel XE#4416] / [Intel XE#455])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_cdclk@plane-scaling.html

  * igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][28] ([Intel XE#4416]) +2 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-1.html

  * igt@kms_cdclk@plane-scaling@pipe-b-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][29] ([Intel XE#4416]) +3 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_cdclk@plane-scaling@pipe-b-dp-2.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#306])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_edid@dp-edid-change-during-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][31] ([Intel XE#373]) +1 other test skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html

  * igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#2252]) +1 other test skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_chamelium_edid@hdmi-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_hpd@common-hpd-after-hibernate:
    - shard-adlp:         NOTRUN -> [SKIP][33] ([Intel XE#373]) +1 other test skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_chamelium_hpd@common-hpd-after-hibernate.html

  * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
    - shard-dg2-set2:     NOTRUN -> [SKIP][34] ([Intel XE#373]) +4 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-463/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][35] ([Intel XE#1178])
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_content_protection@atomic-dpms@pipe-a-dp-2.html

  * igt@kms_content_protection@dp-mst-lic-type-1:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#307])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_content_protection@dp-mst-lic-type-1.html

  * igt@kms_content_protection@dp-mst-type-0:
    - shard-adlp:         NOTRUN -> [SKIP][37] ([Intel XE#307])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_content_protection@dp-mst-type-0.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][38] ([Intel XE#307])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_content_protection@dp-mst-type-0.html

  * igt@kms_content_protection@srm@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][39] ([Intel XE#1178]) +2 other tests fail
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_content_protection@srm@pipe-a-dp-4.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [FAIL][40] ([Intel XE#1188])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#2320])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-onscreen-32x32:
    - shard-adlp:         NOTRUN -> [SKIP][42] ([Intel XE#455]) +4 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_cursor_crc@cursor-onscreen-32x32.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#2321])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
    - shard-bmg:          [PASS][44] -> [SKIP][45] ([Intel XE#2291]) +3 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-1/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#309])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#2286])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#1508])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#4302])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][50] ([Intel XE#4494])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#4354])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-adlp:         NOTRUN -> [SKIP][52] ([Intel XE#4331])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][53] ([Intel XE#455]) +2 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#4422])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_feature_discovery@display-3x:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2373])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#1137])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-absolute-wf_vblank-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#1421]) +3 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop:
    - shard-bmg:          [PASS][58] -> [SKIP][59] ([Intel XE#2316]) +3 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-3/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop.html

  * igt@kms_flip@2x-plain-flip:
    - shard-adlp:         NOTRUN -> [SKIP][60] ([Intel XE#310]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2293] / [Intel XE#2380]) +2 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][62] ([Intel XE#2293]) +2 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#1401] / [Intel XE#1745])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#1401])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][65] ([Intel XE#651]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     NOTRUN -> [SKIP][66] ([Intel XE#651]) +10 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#5390]) +2 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt:
    - shard-adlp:         NOTRUN -> [SKIP][68] ([Intel XE#651]) +3 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][69] ([Intel XE#656]) +9 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2311]) +8 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#653]) +2 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][72] ([Intel XE#653]) +12 other tests skip
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-adlp:         NOTRUN -> [SKIP][73] ([Intel XE#656]) +11 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][74] ([Intel XE#2313]) +7 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html

  * igt@kms_hdr@static-swap:
    - shard-bmg:          [PASS][75] -> [SKIP][76] ([Intel XE#1503])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-1/igt@kms_hdr@static-swap.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_hdr@static-swap.html

  * igt@kms_joiner@basic-force-ultra-joiner:
    - shard-adlp:         NOTRUN -> [SKIP][77] ([Intel XE#2925])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_joiner@basic-force-ultra-joiner.html

  * igt@kms_plane_lowres@tiling-x@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][78] ([Intel XE#599]) +3 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#5021])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#2763]) +3 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-modifiers.html

  * igt@kms_pm_dc@dc3co-vpb-simulation:
    - shard-adlp:         NOTRUN -> [SKIP][81] ([Intel XE#1122])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_pm_dc@dc3co-vpb-simulation.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][82] ([Intel XE#1122])
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][83] ([Intel XE#1129])
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#2392])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
    - shard-adlp:         NOTRUN -> [SKIP][85] ([Intel XE#1406] / [Intel XE#1489]) +2 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#1406] / [Intel XE#2893]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-dg2-set2:     NOTRUN -> [SKIP][87] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
    - shard-bmg:          NOTRUN -> [SKIP][88] ([Intel XE#1406] / [Intel XE#1489]) +3 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr@fbc-pr-dpms:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#1406]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_psr@fbc-pr-dpms.html

  * igt@kms_psr@fbc-psr-sprite-plane-onoff:
    - shard-adlp:         NOTRUN -> [SKIP][90] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_psr@fbc-psr-sprite-plane-onoff.html

  * igt@kms_psr@fbc-psr2-basic:
    - shard-bmg:          NOTRUN -> [SKIP][91] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_psr@fbc-psr2-basic.html

  * igt@kms_psr@pr-dpms:
    - shard-dg2-set2:     NOTRUN -> [SKIP][92] ([Intel XE#1406] / [Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@kms_psr@pr-dpms.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#2330])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
    - shard-adlp:         NOTRUN -> [SKIP][94] ([Intel XE#3414])
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html

  * igt@kms_setmode@invalid-clone-single-crtc-stealing:
    - shard-lnl:          NOTRUN -> [SKIP][95] ([Intel XE#1435])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_setmode@invalid-clone-single-crtc-stealing.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#330])
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vblank@wait-idle@pipe-a-hdmi-a-1:
    - shard-adlp:         [PASS][97] -> [DMESG-WARN][98] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-8/igt@kms_vblank@wait-idle@pipe-a-hdmi-a-1.html
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-8/igt@kms_vblank@wait-idle@pipe-a-hdmi-a-1.html

  * igt@xe_configfs@survivability-mode:
    - shard-adlp:         NOTRUN -> [SKIP][99] ([Intel XE#6010])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_configfs@survivability-mode.html

  * igt@xe_copy_basic@mem-set-linear-0x3fff:
    - shard-adlp:         NOTRUN -> [SKIP][100] ([Intel XE#1126])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_copy_basic@mem-set-linear-0x3fff.html

  * igt@xe_eu_stall@non-blocking-re-enable:
    - shard-dg2-set2:     NOTRUN -> [SKIP][101] ([Intel XE#5626])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@xe_eu_stall@non-blocking-re-enable.html

  * igt@xe_eudebug@basic-vm-access-faultable:
    - shard-adlp:         NOTRUN -> [SKIP][102] ([Intel XE#4837] / [Intel XE#5565]) +3 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_eudebug@basic-vm-access-faultable.html

  * igt@xe_eudebug@multiple-sessions:
    - shard-lnl:          NOTRUN -> [SKIP][103] ([Intel XE#4837]) +1 other test skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_eudebug@multiple-sessions.html

  * igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
    - shard-dg2-set2:     NOTRUN -> [SKIP][104] ([Intel XE#4837]) +4 other tests skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#4837]) +3 other tests skip
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html

  * igt@xe_eudebug_sriov@deny-eudebug:
    - shard-lnl:          NOTRUN -> [SKIP][106] ([Intel XE#4518])
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_eudebug_sriov@deny-eudebug.html

  * igt@xe_evict@evict-beng-large-external:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#688])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_evict@evict-beng-large-external.html

  * igt@xe_evict@evict-small-cm:
    - shard-adlp:         NOTRUN -> [SKIP][108] ([Intel XE#261] / [Intel XE#5564] / [Intel XE#688])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_evict@evict-small-cm.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-adlp:         NOTRUN -> [SKIP][109] ([Intel XE#1392] / [Intel XE#5575]) +1 other test skip
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_exec_basic@multigpu-no-exec-basic:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#2322]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@xe_exec_basic@multigpu-no-exec-basic.html

  * igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
    - shard-lnl:          NOTRUN -> [SKIP][111] ([Intel XE#1392]) +1 other test skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap:
    - shard-dg2-set2:     NOTRUN -> [SKIP][112] ([Intel XE#1392])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-mmap.html

  * igt@xe_exec_basic@multigpu-once-null:
    - shard-dg2-set2:     [PASS][113] -> [SKIP][114] ([Intel XE#1392]) +5 other tests skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-466/igt@xe_exec_basic@multigpu-once-null.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_exec_basic@multigpu-once-null.html

  * igt@xe_exec_fault_mode@many-userptr-invalidate-race-prefetch:
    - shard-adlp:         NOTRUN -> [SKIP][115] ([Intel XE#288] / [Intel XE#5561]) +6 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_exec_fault_mode@many-userptr-invalidate-race-prefetch.html

  * igt@xe_exec_fault_mode@twice-basic-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][116] ([Intel XE#288]) +7 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@xe_exec_fault_mode@twice-basic-prefetch.html

  * igt@xe_exec_system_allocator@once-mmap-free-huge-nomemset:
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#4943]) +9 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_exec_system_allocator@once-mmap-free-huge-nomemset.html

  * igt@xe_exec_system_allocator@process-many-large-free:
    - shard-adlp:         NOTRUN -> [SKIP][118] ([Intel XE#4915]) +61 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_exec_system_allocator@process-many-large-free.html

  * igt@xe_exec_system_allocator@threads-many-large-mmap-free-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][119] ([Intel XE#4943]) +5 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@xe_exec_system_allocator@threads-many-large-mmap-free-huge-nomemset.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][120] ([Intel XE#4915]) +99 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@xe_exec_system_allocator@threads-shared-vm-many-large-malloc.html

  * igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind:
    - shard-dg2-set2:     [PASS][121] -> [ABORT][122] ([Intel XE#4847] / [Intel XE#5732])
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-435/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-466/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
    - shard-bmg:          [PASS][123] -> [ABORT][124] ([Intel XE#4847])
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-3/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@xe_fault_injection@vm-create-fail-xe_exec_queue_create_bind.html

  * igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
    - shard-dg2-set2:     NOTRUN -> [SKIP][125] ([Intel XE#2229])
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html

  * igt@xe_media_fill@media-fill:
    - shard-dg2-set2:     NOTRUN -> [SKIP][126] ([Intel XE#560])
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-463/igt@xe_media_fill@media-fill.html

  * igt@xe_mmap@pci-membarrier-bad-pagesize:
    - shard-lnl:          NOTRUN -> [SKIP][127] ([Intel XE#5100])
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_mmap@pci-membarrier-bad-pagesize.html

  * igt@xe_mmap@vram:
    - shard-adlp:         NOTRUN -> [SKIP][128] ([Intel XE#1008] / [Intel XE#5591])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_mmap@vram.html

  * igt@xe_module_load@force-load:
    - shard-adlp:         NOTRUN -> [SKIP][129] ([Intel XE#378] / [Intel XE#5612])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_module_load@force-load.html
    - shard-dg2-set2:     NOTRUN -> [SKIP][130] ([Intel XE#378])
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_module_load@force-load.html

  * igt@xe_noexec_ping_pong:
    - shard-lnl:          NOTRUN -> [SKIP][131] ([Intel XE#379])
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_noexec_ping_pong.html

  * igt@xe_oa@closed-fd-and-unmapped-access:
    - shard-dg2-set2:     NOTRUN -> [SKIP][132] ([Intel XE#3573]) +2 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@xe_oa@closed-fd-and-unmapped-access.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][133] ([Intel XE#2248])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_oa@syncs-userptr-wait-cfg:
    - shard-adlp:         NOTRUN -> [SKIP][134] ([Intel XE#3573]) +1 other test skip
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_oa@syncs-userptr-wait-cfg.html

  * igt@xe_pat@pat-index-xelp:
    - shard-lnl:          NOTRUN -> [SKIP][135] ([Intel XE#977])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pm@d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][136] ([Intel XE#2284])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@xe_pm@d3cold-basic-exec.html

  * igt@xe_pm@s2idle-exec-after:
    - shard-adlp:         [PASS][137] -> [DMESG-WARN][138] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504])
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-8/igt@xe_pm@s2idle-exec-after.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_pm@s2idle-exec-after.html

  * igt@xe_pm@s3-vm-bind-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][139] ([Intel XE#584]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_pm@s3-vm-bind-userptr.html

  * igt@xe_pmu@all-fn-engine-activity-load:
    - shard-dg2-set2:     NOTRUN -> [SKIP][140] ([Intel XE#4650]) +1 other test skip
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_pmu@all-fn-engine-activity-load.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-rpm:
    - shard-dg2-set2:     NOTRUN -> [SKIP][141] ([Intel XE#4733]) +1 other test skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-463/igt@xe_pxp@pxp-stale-bo-bind-post-rpm.html

  * igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
    - shard-adlp:         NOTRUN -> [SKIP][142] ([Intel XE#4733] / [Intel XE#5594])
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html

  * igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][143] ([Intel XE#4733]) +1 other test skip
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html

  * igt@xe_query@multigpu-query-mem-usage:
    - shard-dg2-set2:     NOTRUN -> [SKIP][144] ([Intel XE#944])
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@xe_query@multigpu-query-mem-usage.html

  * igt@xe_query@multigpu-query-topology-l3-bank-mask:
    - shard-lnl:          NOTRUN -> [SKIP][145] ([Intel XE#944]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-4/igt@xe_query@multigpu-query-topology-l3-bank-mask.html

  * igt@xe_query@multigpu-query-uc-fw-version-guc:
    - shard-bmg:          NOTRUN -> [SKIP][146] ([Intel XE#944])
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@xe_query@multigpu-query-uc-fw-version-guc.html

  * igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][147] ([Intel XE#4130])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html

  
#### Possible fixes ####

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
    - shard-adlp:         [DMESG-FAIL][148] ([Intel XE#4543]) -> [PASS][149] +1 other test pass
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][150] ([Intel XE#3862]) -> [PASS][151] +1 other test pass
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2:
    - shard-bmg:          [FAIL][152] ([Intel XE#5376]) -> [PASS][153] +1 other test pass
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-2/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][154] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][155]
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4:
    - shard-dg2-set2:     [INCOMPLETE][156] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][157]
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-dp-4.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
    - shard-bmg:          [SKIP][158] ([Intel XE#2291]) -> [PASS][159] +3 other tests pass
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc:
    - shard-bmg:          [SKIP][160] ([Intel XE#1340]) -> [PASS][161]
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          [SKIP][162] ([Intel XE#2316]) -> [PASS][163] +5 other tests pass
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-1/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [INCOMPLETE][164] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][165] +1 other test pass
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-434/igt@kms_flip@flip-vs-suspend-interruptible.html
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-463/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1:
    - shard-adlp:         [DMESG-WARN][166] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][167] +2 other tests pass
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-3/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-8/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-hdmi-a-1.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-bmg:          [SKIP][168] ([Intel XE#2571]) -> [PASS][169]
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-2/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_vrr@flipline:
    - shard-lnl:          [FAIL][170] ([Intel XE#4227]) -> [PASS][171] +1 other test pass
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-lnl-8/igt@kms_vrr@flipline.html
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-lnl-3/igt@kms_vrr@flipline.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind:
    - shard-dg2-set2:     [SKIP][172] ([Intel XE#1392]) -> [PASS][173] +2 other tests pass
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_threads@threads-hang-userptr-rebind:
    - shard-dg2-set2:     [DMESG-WARN][174] ([Intel XE#3876]) -> [PASS][175]
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-466/igt@xe_exec_threads@threads-hang-userptr-rebind.html
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_exec_threads@threads-hang-userptr-rebind.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv:
    - shard-dg2-set2:     [DMESG-WARN][176] ([Intel XE#5893]) -> [PASS][177]
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-435/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_fault_injection@probe-fail-guc-xe_guc_mmio_send_recv.html

  
#### Warnings ####

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][178] ([Intel XE#2705] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [INCOMPLETE][179] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [INCOMPLETE][180] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][181] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-bmg:          [SKIP][182] ([Intel XE#2341]) -> [FAIL][183] ([Intel XE#1178])
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_content_protection@atomic-dpms.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@lic-type-0:
    - shard-bmg:          [FAIL][184] ([Intel XE#1178]) -> [SKIP][185] ([Intel XE#2341])
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-3/igt@kms_content_protection@lic-type-0.html
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [FAIL][186] ([Intel XE#1188]) -> [SKIP][187] ([Intel XE#2341])
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-1/igt@kms_content_protection@uevent.html
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_content_protection@uevent.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][188] ([Intel XE#2311]) -> [SKIP][189] ([Intel XE#2312]) +8 other tests skip
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][190] ([Intel XE#2312]) -> [SKIP][191] ([Intel XE#2311]) +10 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][192] ([Intel XE#5390]) -> [SKIP][193] ([Intel XE#2312]) +5 other tests skip
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][194] ([Intel XE#2312]) -> [SKIP][195] ([Intel XE#5390]) +5 other tests skip
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][196] ([Intel XE#2313]) -> [SKIP][197] ([Intel XE#2312]) +9 other tests skip
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][198] ([Intel XE#2312]) -> [SKIP][199] ([Intel XE#2313]) +10 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][200] ([Intel XE#3544]) -> [SKIP][201] ([Intel XE#3374] / [Intel XE#3544])
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-5/igt@kms_hdr@brightness-with-hdr.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-3/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          [SKIP][202] ([Intel XE#4596]) -> [SKIP][203] ([Intel XE#5021])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][204] ([Intel XE#2509]) -> [SKIP][205] ([Intel XE#2426])
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race:
    - shard-dg2-set2:     [INCOMPLETE][206] -> [SKIP][207] ([Intel XE#1392])
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-invalidate-race.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-adlp:         [ABORT][208] ([Intel XE#4917] / [Intel XE#5530]) -> [ABORT][209] ([Intel XE#5530])
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-4/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-8/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_module_load@load:
    - shard-adlp:         ([PASS][210], [PASS][211], [DMESG-WARN][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [PASS][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [SKIP][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233], [PASS][234], [PASS][235]) ([Intel XE#2953] / [Intel XE#378] / [Intel XE#4173] / [Intel XE#5612]) -> ([PASS][236], [SKIP][237], [PASS][238], [PASS][239], [PASS][240], [PASS][241], [PASS][242], [PASS][243], [PASS][244], [PASS][245], [PASS][246], [PASS][247], [PASS][248], [PASS][249], [PASS][250], [PASS][251], [PASS][252], [PASS][253], [PASS][254], [PASS][255], [PASS][256], [PASS][257], [PASS][258], [PASS][259], [PASS][260], [PASS][261]) ([Intel XE#378] / [Intel XE#5612])
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-8/igt@xe_module_load@load.html
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-8/igt@xe_module_load@load.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-8/igt@xe_module_load@load.html
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-2/igt@xe_module_load@load.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-2/igt@xe_module_load@load.html
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-3/igt@xe_module_load@load.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-3/igt@xe_module_load@load.html
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-6/igt@xe_module_load@load.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-1/igt@xe_module_load@load.html
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-1/igt@xe_module_load@load.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-9/igt@xe_module_load@load.html
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-3/igt@xe_module_load@load.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-2/igt@xe_module_load@load.html
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-9/igt@xe_module_load@load.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-6/igt@xe_module_load@load.html
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-6/igt@xe_module_load@load.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-4/igt@xe_module_load@load.html
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-2/igt@xe_module_load@load.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-4/igt@xe_module_load@load.html
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-1/igt@xe_module_load@load.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-9/igt@xe_module_load@load.html
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-8/igt@xe_module_load@load.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-6/igt@xe_module_load@load.html
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-4/igt@xe_module_load@load.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-4/igt@xe_module_load@load.html
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-adlp-4/igt@xe_module_load@load.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-4/igt@xe_module_load@load.html
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-8/igt@xe_module_load@load.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-8/igt@xe_module_load@load.html
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-8/igt@xe_module_load@load.html
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-8/igt@xe_module_load@load.html
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-9/igt@xe_module_load@load.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-9/igt@xe_module_load@load.html
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-1/igt@xe_module_load@load.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-1/igt@xe_module_load@load.html
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-9/igt@xe_module_load@load.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-9/igt@xe_module_load@load.html
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-1/igt@xe_module_load@load.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-6/igt@xe_module_load@load.html
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-6/igt@xe_module_load@load.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-6/igt@xe_module_load@load.html
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-6/igt@xe_module_load@load.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-4/igt@xe_module_load@load.html
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-4/igt@xe_module_load@load.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-4/igt@xe_module_load@load.html
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_module_load@load.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_module_load@load.html
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-2/igt@xe_module_load@load.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-3/igt@xe_module_load@load.html
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-3/igt@xe_module_load@load.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-3/igt@xe_module_load@load.html
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-adlp-3/igt@xe_module_load@load.html

  * igt@xe_peer2peer@write:
    - shard-dg2-set2:     [FAIL][262] ([Intel XE#1173]) -> [SKIP][263] ([Intel XE#1061])
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823/shard-dg2-466/igt@xe_peer2peer@write.html
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/shard-dg2-432/igt@xe_peer2peer@write.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1008]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1008
  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
  [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2392
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
  [Intel XE#379]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/379
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
  [Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
  [Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4847]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4847
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5376
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5530]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5530
  [Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
  [Intel XE#5564]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5564
  [Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5591]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5591
  [Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
  [Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
  [Intel XE#5612]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5612
  [Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
  [Intel XE#5732]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5732
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5890]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5890
  [Intel XE#5893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5893
  [Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
  [Intel XE#6010]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6010
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977


Build changes
-------------

  * Linux: xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823 -> xe-pw-154099v2

  IGT_8524: 8524
  xe-3689-797ed8420a0e60dd3cd56639d458bce00ca42823: 797ed8420a0e60dd3cd56639d458bce00ca42823
  xe-pw-154099v2: 154099v2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-154099v2/index.html

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