From: Imre Deak <imre.deak@intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: <intel-gfx@lists.freedesktop.org>,
<intel-xe@lists.freedesktop.org>,
"Suraj Kandpal" <suraj.kandpal@intel.com>,
Mika Kahola <mika.kahola@intel.com>
Subject: Re: [PATCH 3/5] drm/i915/cx0: Use intel_port_to_tc() instead of open coding it
Date: Fri, 21 Nov 2025 17:30:02 +0200 [thread overview]
Message-ID: <aSCFeuwSdSQSCMKo@ideak-desk> (raw)
In-Reply-To: <beaa8835608335700c0a1026e0406e715887b799@intel.com>
On Fri, Nov 21, 2025 at 01:28:03PM +0200, Jani Nikula wrote:
> On Thu, 20 Nov 2025, Imre Deak <imre.deak@intel.com> wrote:
> > USe intel_port_to_tc() in mtl_port_to_pll_id(), instead of open coding
> > the same.
>
> Patch 1 just open coded it. Why have this back and forth instead of
> starting off with patch 2 that directly fixes the issue? It's not like
> we need to backport any of this anywhere.
I still wanted to keep the fix itself simple, as it has been tested
already by CI without the rest of the changes, to make both reviewing
and merging it simpler.
> BR,
> Jani.
>
> >
> > Cc: Suraj Kandpal <suraj.kandpal@intel.com>
> > Cc: Mika Kahola <mika.kahola@intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > index 8ae8cc7ad79d3..e0e5e5f65d193 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > @@ -206,7 +206,7 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port)
> > enum intel_dpll_id mtl_port_to_pll_id(struct intel_display *display, enum port port)
> > {
> > if (port >= PORT_TC1)
> > - return icl_tc_port_to_pll_id(port - PORT_TC1 + TC_PORT_1);
> > + return icl_tc_port_to_pll_id(intel_port_to_tc(display, port));
> >
> > switch (port) {
> > case PORT_A:
>
> --
> Jani Nikula, Intel
next prev parent reply other threads:[~2025-11-21 15:30 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-20 17:23 [PATCH 1/5] drm/i915/cx0: Fix port to PLL ID mapping on BMG Imre Deak
2025-11-20 17:23 ` [PATCH 2/5] drm/i915/tc: Add separate intel_tc_phy_port_to_tc() for TC DDI/PHY ports Imre Deak
2025-11-21 2:56 ` Kandpal, Suraj
2025-11-21 11:19 ` Jani Nikula
2025-11-21 15:26 ` Imre Deak
2025-11-20 17:23 ` [PATCH 3/5] drm/i915/cx0: Use intel_port_to_tc() instead of open coding it Imre Deak
2025-11-21 3:08 ` Kandpal, Suraj
2025-11-21 11:28 ` Jani Nikula
2025-11-21 15:30 ` Imre Deak [this message]
2025-11-20 17:23 ` [PATCH 4/5] drm/i915/cx0: Read out power-down state of both TXs in PHY lane 0 Imre Deak
2025-11-21 3:50 ` Kandpal, Suraj
2025-11-20 17:23 ` [PATCH 5/5] drm/i915/cx0: Read out power-down state of both PHY lanes for reversed lanes Imre Deak
2025-11-21 3:54 ` Kandpal, Suraj
2025-11-21 8:31 ` Imre Deak
2025-11-21 8:45 ` Kandpal, Suraj
2025-11-20 22:05 ` ✓ CI.KUnit: success for series starting with [1/5] drm/i915/cx0: Fix port to PLL ID mapping on BMG Patchwork
2025-11-20 22:20 ` ✗ CI.checksparse: warning " Patchwork
2025-11-20 22:44 ` ✓ Xe.CI.BAT: success " Patchwork
2025-11-21 3:43 ` ✗ Xe.CI.Full: failure " Patchwork
[not found] ` <176372186635.17117.13640185361724504300@a3b018990fe9>
2025-11-21 19:47 ` ✗ i915.CI.Full: " Imre Deak
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