* [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits
2026-01-08 13:03 [PATCH v4 0/4] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
@ 2026-01-08 13:03 ` Karthik Poosa
2026-01-09 9:29 ` Raag Jadav
2026-01-08 13:03 ` [PATCH v4 2/4] drm/xe/hwmon: Expose memory controller temperature Karthik Poosa
` (5 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Karthik Poosa @ 2026-01-08 13:03 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, badal.nilawar, rodrigo.vivi, raag.jadav,
Karthik Poosa
Read temperature limits using pcode mailbox and
expose shutdown temperature limit as tempX_emergency,
critical temperature limit of as tempX_crit and
GPU average temperature limit as tempX_max.
Update Xe hwmon documentation for these entries.
v2:
- Resolve a documentation warning.
- Address below review comments from Raag.
- Update date and kernel version in Xe hwmon documentation.
- Remove explicit disable of has_mbx_thermal_info for unsupported
platforms.
- Remove unnecessary default case in switches.
- Remove obvious comments.
- Use TEMP_LIMIT_MAX to compute number of dwords needed in
xe_hwmon_thermal_info.
- Remove THERMAL_LIMITS_DWORDS macro.
- Use has_mbx_thermal_info for checking thermal mailbox support.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
.../ABI/testing/sysfs-driver-intel-xe-hwmon | 40 +++++++
drivers/gpu/drm/xe/xe_device_types.h | 2 +
drivers/gpu/drm/xe/xe_hwmon.c | 107 +++++++++++++++++-
drivers/gpu/drm/xe/xe_pci.c | 3 +
drivers/gpu/drm/xe/xe_pci_types.h | 1 +
drivers/gpu/drm/xe/xe_pcode_api.h | 3 +
6 files changed, 152 insertions(+), 4 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index d9e2b17c6872..c3b367c42741 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -196,3 +196,43 @@ Description: RW. Package burst power limit interval (Tau in PL2/Tau) in
milliseconds over which sustained power is averaged.
Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_emergency
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Package shutdown temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_crit
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Package critical temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_max
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Package average temperature limit in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_emergency
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. VRAM shutdown temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_crit
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. VRAM critical temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 7d46d5ecda91..e359889b4378 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -322,6 +322,8 @@ struct xe_device {
* pcode mailbox commands.
*/
u8 has_mbx_power_limits:1;
+ /** @info.has_mbx_thermal_info: Device has support for thermal mailbox commands */
+ u8 has_mbx_thermal_info:1;
/** @info.has_mem_copy_instr: Device supports MEM_COPY instruction */
u8 has_mem_copy_instr:1;
/** @info.has_mert: Device has standalone MERT */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index ff2aea52ef75..db00728c89e4 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -53,6 +53,15 @@ enum xe_fan_channel {
FAN_MAX,
};
+enum xe_temp_limit {
+ TEMP_LIMIT_PKG_SHUTDOWN,
+ TEMP_LIMIT_PKG_TJMAX,
+ TEMP_LIMIT_MEM_SHUTDOWN,
+ TEMP_LIMIT_PKG_CRIT,
+ TEMP_LIMIT_MEM_TJMAX,
+ TEMP_LIMIT_MAX,
+};
+
/* Attribute index for powerX_xxx_interval sysfs entries */
enum sensor_attr_power {
SENSOR_INDEX_PSYS_PL1,
@@ -111,6 +120,18 @@ struct xe_hwmon_fan_info {
u64 time_prev;
};
+/**
+ * struct xe_hwmon_thermal_info - to store temperature data
+ */
+struct xe_hwmon_thermal_info {
+ union {
+ /** @limit: temperatures limits */
+ u8 limit[TEMP_LIMIT_MAX];
+ /** @data: temperature limits in dwords */
+ u32 data[(TEMP_LIMIT_MAX / sizeof(u32)) + ((TEMP_LIMIT_MAX % sizeof(u32)) ? 1 : 0)];
+ };
+};
+
/**
* struct xe_hwmon - xe hwmon data structure
*/
@@ -137,7 +158,8 @@ struct xe_hwmon {
u32 pl1_on_boot[CHANNEL_MAX];
/** @pl2_on_boot: power limit PL2 on boot */
u32 pl2_on_boot[CHANNEL_MAX];
-
+ /** @temp: Temperature info */
+ struct xe_hwmon_thermal_info temp;
};
static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel,
@@ -677,8 +699,11 @@ static const struct attribute_group *hwmon_groups[] = {
};
static const struct hwmon_channel_info * const hwmon_info[] = {
- HWMON_CHANNEL_INFO(temp, HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL,
- HWMON_T_INPUT | HWMON_T_LABEL),
+ HWMON_CHANNEL_INFO(temp,
+ HWMON_T_LABEL,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
+ HWMON_T_MAX,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
HWMON_P_CAP,
HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CAP),
@@ -689,6 +714,19 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
NULL
};
+static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
+{
+ struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+ int ret = 0;
+
+ ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
+ &hwmon->temp.data[0], &hwmon->temp.data[1]);
+ drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
+ hwmon->temp.data[0], hwmon->temp.data[1]);
+
+ return ret;
+}
+
/* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
{
@@ -787,6 +825,34 @@ static umode_t
xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
{
switch (attr) {
+ case hwmon_temp_emergency:
+ switch (channel) {
+ case CHANNEL_PKG:
+ return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
+ case CHANNEL_VRAM:
+ return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
+ default:
+ return 0;
+ }
+ break;
+ case hwmon_temp_crit:
+ switch (channel) {
+ case CHANNEL_PKG:
+ return hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] ? 0444 : 0;
+ case CHANNEL_VRAM:
+ return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
+ default:
+ return 0;
+ }
+ break;
+ case hwmon_temp_max:
+ switch (channel) {
+ case CHANNEL_PKG:
+ return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
+ default:
+ return 0;
+ }
+ break;
case hwmon_temp_input:
case hwmon_temp_label:
return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
@@ -807,10 +873,38 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
/* HW register value is in degrees Celsius, convert to millidegrees. */
*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
- return 0;
+ break;
+ case hwmon_temp_emergency:
+ switch (channel) {
+ case CHANNEL_PKG:
+ *val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
+ break;
+ case CHANNEL_VRAM:
+ *val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
+ break;
+ }
+ break;
+ case hwmon_temp_crit:
+ switch (channel) {
+ case CHANNEL_PKG:
+ *val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
+ break;
+ case CHANNEL_VRAM:
+ *val = hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] * MILLIDEGREE_PER_DEGREE;
+ break;
+ }
+ break;
+ case hwmon_temp_max:
+ switch (channel) {
+ case CHANNEL_PKG:
+ *val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
+ break;
+ }
+ break;
default:
return -EOPNOTSUPP;
}
+ return 0;
}
static umode_t
@@ -1263,6 +1357,11 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
for (channel = 0; channel < FAN_MAX; channel++)
if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
+
+ if (hwmon->xe->info.has_mbx_thermal_info)
+ if (xe_hwmon_pcode_read_thermal_info(hwmon))
+ drm_dbg(&hwmon->xe->drm,
+ "Thermal mailbox support not present in firmware\n");
}
int xe_hwmon_register(struct xe_device *xe)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a1fdca451ce0..776ed4bd538b 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -366,6 +366,7 @@ static const struct xe_device_desc bmg_desc = {
.has_fan_control = true,
.has_flat_ccs = 1,
.has_mbx_power_limits = true,
+ .has_mbx_thermal_info = true,
.has_gsc_nvm = 1,
.has_heci_cscfi = 1,
.has_i2c = true,
@@ -421,6 +422,7 @@ static const struct xe_device_desc cri_desc = {
.has_gsc_nvm = 1,
.has_i2c = true,
.has_mbx_power_limits = true,
+ .has_mbx_thermal_info = true,
.has_mert = true,
.has_pre_prod_wa = 1,
.has_soc_remapper_sysctrl = true,
@@ -686,6 +688,7 @@ static int xe_info_init_early(struct xe_device *xe,
/* runtime fusing may force flat_ccs to disabled later */
xe->info.has_flat_ccs = desc->has_flat_ccs;
xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
+ xe->info.has_mbx_thermal_info = desc->has_mbx_thermal_info;
xe->info.has_gsc_nvm = desc->has_gsc_nvm;
xe->info.has_heci_gscfi = desc->has_heci_gscfi;
xe->info.has_heci_cscfi = desc->has_heci_cscfi;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 5f20f56571d1..20acc5349ee6 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -48,6 +48,7 @@ struct xe_device_desc {
u8 has_late_bind:1;
u8 has_llc:1;
u8 has_mbx_power_limits:1;
+ u8 has_mbx_thermal_info:1;
u8 has_mem_copy_instr:1;
u8 has_mert:1;
u8 has_pre_prod_wa:1;
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index 975892d6b230..6c84c1780fe9 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -65,6 +65,9 @@
#define FAN_TABLE 1
#define VR_CONFIG 2
+#define PCODE_THERMAL_INFO 0x25
+#define READ_THERMAL_LIMITS 0x0
+
#define PCODE_FREQUENCY_CONFIG 0x6e
/* Frequency Config Sub Commands (param1) */
#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits
2026-01-08 13:03 ` [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits Karthik Poosa
@ 2026-01-09 9:29 ` Raag Jadav
2026-01-09 13:42 ` Poosa, Karthik
0 siblings, 1 reply; 13+ messages in thread
From: Raag Jadav @ 2026-01-09 9:29 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe, anshuman.gupta, badal.nilawar, rodrigo.vivi
On Thu, Jan 08, 2026 at 06:33:20PM +0530, Karthik Poosa wrote:
> Read temperature limits using pcode mailbox and
> expose shutdown temperature limit as tempX_emergency,
> critical temperature limit of as tempX_crit and
> GPU average temperature limit as tempX_max.
Looks like this can be less lines, please utilize the remaining space.
> Update Xe hwmon documentation for these entries.
>
> v2:
> - Resolve a documentation warning.
> - Address below review comments from Raag.
> - Update date and kernel version in Xe hwmon documentation.
> - Remove explicit disable of has_mbx_thermal_info for unsupported
> platforms.
> - Remove unnecessary default case in switches.
> - Remove obvious comments.
> - Use TEMP_LIMIT_MAX to compute number of dwords needed in
> xe_hwmon_thermal_info.
> - Remove THERMAL_LIMITS_DWORDS macro.
> - Use has_mbx_thermal_info for checking thermal mailbox support.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> .../ABI/testing/sysfs-driver-intel-xe-hwmon | 40 +++++++
> drivers/gpu/drm/xe/xe_device_types.h | 2 +
> drivers/gpu/drm/xe/xe_hwmon.c | 107 +++++++++++++++++-
> drivers/gpu/drm/xe/xe_pci.c | 3 +
> drivers/gpu/drm/xe/xe_pci_types.h | 1 +
> drivers/gpu/drm/xe/xe_pcode_api.h | 3 +
> 6 files changed, 152 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> index d9e2b17c6872..c3b367c42741 100644
> --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> @@ -196,3 +196,43 @@ Description: RW. Package burst power limit interval (Tau in PL2/Tau) in
> milliseconds over which sustained power is averaged.
>
> Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_emergency
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. Package shutdown temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_crit
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. Package critical temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_max
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. Package average temperature limit in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_emergency
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. VRAM shutdown temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_crit
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. VRAM critical temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
Group these with existing temperature entries as per channel index in
alphabetic order.
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 7d46d5ecda91..e359889b4378 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -322,6 +322,8 @@ struct xe_device {
> * pcode mailbox commands.
> */
> u8 has_mbx_power_limits:1;
> + /** @info.has_mbx_thermal_info: Device has support for thermal mailbox commands */
Nit: "supports thermal ..."
> + u8 has_mbx_thermal_info:1;
> /** @info.has_mem_copy_instr: Device supports MEM_COPY instruction */
> u8 has_mem_copy_instr:1;
> /** @info.has_mert: Device has standalone MERT */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index ff2aea52ef75..db00728c89e4 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -53,6 +53,15 @@ enum xe_fan_channel {
> FAN_MAX,
> };
>
> +enum xe_temp_limit {
> + TEMP_LIMIT_PKG_SHUTDOWN,
> + TEMP_LIMIT_PKG_TJMAX,
> + TEMP_LIMIT_MEM_SHUTDOWN,
> + TEMP_LIMIT_PKG_CRIT,
> + TEMP_LIMIT_MEM_TJMAX,
> + TEMP_LIMIT_MAX,
This is guaranteed last member so redundant comma.
> +};
> +
> /* Attribute index for powerX_xxx_interval sysfs entries */
> enum sensor_attr_power {
> SENSOR_INDEX_PSYS_PL1,
> @@ -111,6 +120,18 @@ struct xe_hwmon_fan_info {
> u64 time_prev;
> };
>
> +/**
> + * struct xe_hwmon_thermal_info - to store temperature data
> + */
> +struct xe_hwmon_thermal_info {
> + union {
> + /** @limit: temperatures limits */
> + u8 limit[TEMP_LIMIT_MAX];
> + /** @data: temperature limits in dwords */
> + u32 data[(TEMP_LIMIT_MAX / sizeof(u32)) + ((TEMP_LIMIT_MAX % sizeof(u32)) ? 1 : 0)];
I think this can be (((TEMP_LIMIT_MAX - 1) / sizeof(u32)) + 1) but please
double check.
> + };
> +};
> +
> /**
> * struct xe_hwmon - xe hwmon data structure
> */
> @@ -137,7 +158,8 @@ struct xe_hwmon {
> u32 pl1_on_boot[CHANNEL_MAX];
> /** @pl2_on_boot: power limit PL2 on boot */
> u32 pl2_on_boot[CHANNEL_MAX];
> -
> + /** @temp: Temperature info */
> + struct xe_hwmon_thermal_info temp;
> };
>
> static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel,
> @@ -677,8 +699,11 @@ static const struct attribute_group *hwmon_groups[] = {
> };
>
> static const struct hwmon_channel_info * const hwmon_info[] = {
> - HWMON_CHANNEL_INFO(temp, HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL,
> - HWMON_T_INPUT | HWMON_T_LABEL),
> + HWMON_CHANNEL_INFO(temp,
> + HWMON_T_LABEL,
> + HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
Let's make this alphabetic order.
> + HWMON_T_MAX,
> + HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
Ditto.
> HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
> HWMON_P_CAP,
> HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CAP),
> @@ -689,6 +714,19 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
> NULL
> };
>
> +static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
> +{
> + struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> + int ret = 0;
Redundant initialization.
> + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
> + &hwmon->temp.data[0], &hwmon->temp.data[1]);
> + drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
> + hwmon->temp.data[0], hwmon->temp.data[1]);
> +
> + return ret;
> +}
> +
> /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
> static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
> {
> @@ -787,6 +825,34 @@ static umode_t
> xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> {
> switch (attr) {
> + case hwmon_temp_emergency:
> + switch (channel) {
> + case CHANNEL_PKG:
> + return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
> + case CHANNEL_VRAM:
> + return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
> + default:
> + return 0;
> + }
> + break;
I don't believe we'll ever reach here, so please drop the dead code.
> + case hwmon_temp_crit:
> + switch (channel) {
> + case CHANNEL_PKG:
> + return hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] ? 0444 : 0;
> + case CHANNEL_VRAM:
> + return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
> + default:
> + return 0;
> + }
> + break;
Ditto.
> + case hwmon_temp_max:
> + switch (channel) {
> + case CHANNEL_PKG:
> + return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
> + default:
> + return 0;
> + }
> + break;
Ditto.
> case hwmon_temp_input:
> case hwmon_temp_label:
> return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
> @@ -807,10 +873,38 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>
> /* HW register value is in degrees Celsius, convert to millidegrees. */
> *val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
> - return 0;
> + break;
and we don't have a reason to continue here, so let's try to return where
possible.
> + case hwmon_temp_emergency:
> + switch (channel) {
> + case CHANNEL_PKG:
> + *val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> + break;
Ditto.
> + case CHANNEL_VRAM:
> + *val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> + break;
Ditto.
> + }
> + break;
Ditto.
> + case hwmon_temp_crit:
> + switch (channel) {
> + case CHANNEL_PKG:
> + *val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
> + break;
Ditto.
> + case CHANNEL_VRAM:
> + *val = hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] * MILLIDEGREE_PER_DEGREE;
> + break;
Ditto.
> + }
> + break;
Ditto.
> + case hwmon_temp_max:
> + switch (channel) {
> + case CHANNEL_PKG:
> + *val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
> + break;
Ditto.
> + }
> + break;
Ditto.
> default:
> return -EOPNOTSUPP;
> }
> + return 0;
With above in place, this won't be needed.
> }
>
> static umode_t
> @@ -1263,6 +1357,11 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
> for (channel = 0; channel < FAN_MAX; channel++)
> if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
> xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
> +
> + if (hwmon->xe->info.has_mbx_thermal_info)
> + if (xe_hwmon_pcode_read_thermal_info(hwmon))
These can be a single if condition with && operation.
> + drm_dbg(&hwmon->xe->drm,
> + "Thermal mailbox support not present in firmware\n");
Nit: "not supported by firmware"
> }
>
> int xe_hwmon_register(struct xe_device *xe)
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index a1fdca451ce0..776ed4bd538b 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -366,6 +366,7 @@ static const struct xe_device_desc bmg_desc = {
> .has_fan_control = true,
> .has_flat_ccs = 1,
> .has_mbx_power_limits = true,
> + .has_mbx_thermal_info = true,
> .has_gsc_nvm = 1,
> .has_heci_cscfi = 1,
> .has_i2c = true,
> @@ -421,6 +422,7 @@ static const struct xe_device_desc cri_desc = {
> .has_gsc_nvm = 1,
> .has_i2c = true,
> .has_mbx_power_limits = true,
> + .has_mbx_thermal_info = true,
> .has_mert = true,
> .has_pre_prod_wa = 1,
> .has_soc_remapper_sysctrl = true,
> @@ -686,6 +688,7 @@ static int xe_info_init_early(struct xe_device *xe,
> /* runtime fusing may force flat_ccs to disabled later */
> xe->info.has_flat_ccs = desc->has_flat_ccs;
> xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
> + xe->info.has_mbx_thermal_info = desc->has_mbx_thermal_info;
> xe->info.has_gsc_nvm = desc->has_gsc_nvm;
> xe->info.has_heci_gscfi = desc->has_heci_gscfi;
> xe->info.has_heci_cscfi = desc->has_heci_cscfi;
> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
> index 5f20f56571d1..20acc5349ee6 100644
> --- a/drivers/gpu/drm/xe/xe_pci_types.h
> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
> @@ -48,6 +48,7 @@ struct xe_device_desc {
> u8 has_late_bind:1;
> u8 has_llc:1;
> u8 has_mbx_power_limits:1;
> + u8 has_mbx_thermal_info:1;
> u8 has_mem_copy_instr:1;
> u8 has_mert:1;
> u8 has_pre_prod_wa:1;
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index 975892d6b230..6c84c1780fe9 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -65,6 +65,9 @@
> #define FAN_TABLE 1
> #define VR_CONFIG 2
>
> +#define PCODE_THERMAL_INFO 0x25
> +#define READ_THERMAL_LIMITS 0x0
This file is full of randomly ordered commands so at some point
we might want to order them correctly. For now just add this above
PCODE_LATE_BINDING.
Raag
> #define PCODE_FREQUENCY_CONFIG 0x6e
> /* Frequency Config Sub Commands (param1) */
> #define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits
2026-01-09 9:29 ` Raag Jadav
@ 2026-01-09 13:42 ` Poosa, Karthik
2026-01-09 14:24 ` Poosa, Karthik
0 siblings, 1 reply; 13+ messages in thread
From: Poosa, Karthik @ 2026-01-09 13:42 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe, anshuman.gupta, badal.nilawar, rodrigo.vivi
[-- Attachment #1: Type: text/plain, Size: 13232 bytes --]
On 09-01-2026 14:59, Raag Jadav wrote:
> On Thu, Jan 08, 2026 at 06:33:20PM +0530, Karthik Poosa wrote:
>> Read temperature limits using pcode mailbox and
>> expose shutdown temperature limit as tempX_emergency,
>> critical temperature limit of as tempX_crit and
>> GPU average temperature limit as tempX_max.
> Looks like this can be less lines, please utilize the remaining space.
>
>> Update Xe hwmon documentation for these entries.
>>
>> v2:
>> - Resolve a documentation warning.
>> - Address below review comments from Raag.
>> - Update date and kernel version in Xe hwmon documentation.
>> - Remove explicit disable of has_mbx_thermal_info for unsupported
>> platforms.
>> - Remove unnecessary default case in switches.
>> - Remove obvious comments.
>> - Use TEMP_LIMIT_MAX to compute number of dwords needed in
>> xe_hwmon_thermal_info.
>> - Remove THERMAL_LIMITS_DWORDS macro.
>> - Use has_mbx_thermal_info for checking thermal mailbox support.
>>
>> Signed-off-by: Karthik Poosa<karthik.poosa@intel.com>
>> ---
>> .../ABI/testing/sysfs-driver-intel-xe-hwmon | 40 +++++++
>> drivers/gpu/drm/xe/xe_device_types.h | 2 +
>> drivers/gpu/drm/xe/xe_hwmon.c | 107 +++++++++++++++++-
>> drivers/gpu/drm/xe/xe_pci.c | 3 +
>> drivers/gpu/drm/xe/xe_pci_types.h | 1 +
>> drivers/gpu/drm/xe/xe_pcode_api.h | 3 +
>> 6 files changed, 152 insertions(+), 4 deletions(-)
>>
>> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
>> index d9e2b17c6872..c3b367c42741 100644
>> --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
>> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
>> @@ -196,3 +196,43 @@ Description: RW. Package burst power limit interval (Tau in PL2/Tau) in
>> milliseconds over which sustained power is averaged.
>>
>> Only supported for particular Intel Xe graphics platforms.
>> +
>> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_emergency
>> +Date: January 2026
>> +KernelVersion: 7.0
>> +Contact: intel-xe@lists.freedesktop.org
>> +Description: RO. Package shutdown temperature in millidegree Celsius.
>> +
>> + Only supported for particular Intel Xe graphics platforms.
>> +
>> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_crit
>> +Date: January 2026
>> +KernelVersion: 7.0
>> +Contact: intel-xe@lists.freedesktop.org
>> +Description: RO. Package critical temperature in millidegree Celsius.
>> +
>> + Only supported for particular Intel Xe graphics platforms.
>> +
>> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_max
>> +Date: January 2026
>> +KernelVersion: 7.0
>> +Contact: intel-xe@lists.freedesktop.org
>> +Description: RO. Package average temperature limit in millidegree Celsius.
>> +
>> + Only supported for particular Intel Xe graphics platforms.
>> +
>> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_emergency
>> +Date: January 2026
>> +KernelVersion: 7.0
>> +Contact: intel-xe@lists.freedesktop.org
>> +Description: RO. VRAM shutdown temperature in millidegree Celsius.
>> +
>> + Only supported for particular Intel Xe graphics platforms.
>> +
>> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_crit
>> +Date: January 2026
>> +KernelVersion: 7.0
>> +Contact: intel-xe@lists.freedesktop.org
>> +Description: RO. VRAM critical temperature in millidegree Celsius.
>> +
>> + Only supported for particular Intel Xe graphics platforms.
> Group these with existing temperature entries as per channel index in
> alphabetic order.
>
>> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
>> index 7d46d5ecda91..e359889b4378 100644
>> --- a/drivers/gpu/drm/xe/xe_device_types.h
>> +++ b/drivers/gpu/drm/xe/xe_device_types.h
>> @@ -322,6 +322,8 @@ struct xe_device {
>> * pcode mailbox commands.
>> */
>> u8 has_mbx_power_limits:1;
>> + /** @info.has_mbx_thermal_info: Device has support for thermal mailbox commands */
> Nit: "supports thermal ..."
>
>> + u8 has_mbx_thermal_info:1;
>> /** @info.has_mem_copy_instr: Device supports MEM_COPY instruction */
>> u8 has_mem_copy_instr:1;
>> /** @info.has_mert: Device has standalone MERT */
>> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
>> index ff2aea52ef75..db00728c89e4 100644
>> --- a/drivers/gpu/drm/xe/xe_hwmon.c
>> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
>> @@ -53,6 +53,15 @@ enum xe_fan_channel {
>> FAN_MAX,
>> };
>>
>> +enum xe_temp_limit {
>> + TEMP_LIMIT_PKG_SHUTDOWN,
>> + TEMP_LIMIT_PKG_TJMAX,
>> + TEMP_LIMIT_MEM_SHUTDOWN,
>> + TEMP_LIMIT_PKG_CRIT,
>> + TEMP_LIMIT_MEM_TJMAX,
>> + TEMP_LIMIT_MAX,
> This is guaranteed last member so redundant comma.
>
>> +};
>> +
>> /* Attribute index for powerX_xxx_interval sysfs entries */
>> enum sensor_attr_power {
>> SENSOR_INDEX_PSYS_PL1,
>> @@ -111,6 +120,18 @@ struct xe_hwmon_fan_info {
>> u64 time_prev;
>> };
>>
>> +/**
>> + * struct xe_hwmon_thermal_info - to store temperature data
>> + */
>> +struct xe_hwmon_thermal_info {
>> + union {
>> + /** @limit: temperatures limits */
>> + u8 limit[TEMP_LIMIT_MAX];
>> + /** @data: temperature limits in dwords */
>> + u32 data[(TEMP_LIMIT_MAX / sizeof(u32)) + ((TEMP_LIMIT_MAX % sizeof(u32)) ? 1 : 0)];
> I think this can be (((TEMP_LIMIT_MAX - 1) / sizeof(u32)) + 1) but please
> double check.
>
>> + };
>> +};
>> +
>> /**
>> * struct xe_hwmon - xe hwmon data structure
>> */
>> @@ -137,7 +158,8 @@ struct xe_hwmon {
>> u32 pl1_on_boot[CHANNEL_MAX];
>> /** @pl2_on_boot: power limit PL2 on boot */
>> u32 pl2_on_boot[CHANNEL_MAX];
>> -
>> + /** @temp: Temperature info */
>> + struct xe_hwmon_thermal_info temp;
>> };
>>
>> static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel,
>> @@ -677,8 +699,11 @@ static const struct attribute_group *hwmon_groups[] = {
>> };
>>
>> static const struct hwmon_channel_info * const hwmon_info[] = {
>> - HWMON_CHANNEL_INFO(temp, HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL,
>> - HWMON_T_INPUT | HWMON_T_LABEL),
>> + HWMON_CHANNEL_INFO(temp,
>> + HWMON_T_LABEL,
>> + HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
> Let's make this alphabetic order.
>
>> + HWMON_T_MAX,
>> + HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
> Ditto.
>
>> HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
>> HWMON_P_CAP,
>> HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CAP),
>> @@ -689,6 +714,19 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
>> NULL
>> };
>>
>> +static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>> +{
>> + struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>> + int ret = 0;
> Redundant initialization.
>
>> + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
>> + &hwmon->temp.data[0], &hwmon->temp.data[1]);
>> + drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
>> + hwmon->temp.data[0], hwmon->temp.data[1]);
>> +
>> + return ret;
>> +}
>> +
>> /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
>> static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
>> {
>> @@ -787,6 +825,34 @@ static umode_t
>> xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
>> {
>> switch (attr) {
>> + case hwmon_temp_emergency:
>> + switch (channel) {
>> + case CHANNEL_PKG:
>> + return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
>> + case CHANNEL_VRAM:
>> + return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
>> + default:
>> + return 0;
>> + }
>> + break;
> I don't believe we'll ever reach here, so please drop the dead code.
>
>> + case hwmon_temp_crit:
>> + switch (channel) {
>> + case CHANNEL_PKG:
>> + return hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] ? 0444 : 0;
>> + case CHANNEL_VRAM:
>> + return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
>> + default:
>> + return 0;
>> + }
>> + break;
> Ditto.
>
>> + case hwmon_temp_max:
>> + switch (channel) {
>> + case CHANNEL_PKG:
>> + return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
>> + default:
>> + return 0;
>> + }
>> + break;
> Ditto.
>
>> case hwmon_temp_input:
>> case hwmon_temp_label:
>> return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
>> @@ -807,10 +873,38 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>>
>> /* HW register value is in degrees Celsius, convert to millidegrees. */
>> *val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
>> - return 0;
>> + break;
> and we don't have a reason to continue here, so let's try to return where
> possible.
>
>> + case hwmon_temp_emergency:
>> + switch (channel) {
>> + case CHANNEL_PKG:
>> + *val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>> + break;
> Ditto.
>
>> + case CHANNEL_VRAM:
>> + *val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
>> + break;
> Ditto.
>
>> + }
>> + break;
> Ditto.
>
>> + case hwmon_temp_crit:
>> + switch (channel) {
>> + case CHANNEL_PKG:
>> + *val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
>> + break;
> Ditto.
>
>> + case CHANNEL_VRAM:
>> + *val = hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] * MILLIDEGREE_PER_DEGREE;
>> + break;
> Ditto.
>
>> + }
>> + break;
> Ditto.
>
>> + case hwmon_temp_max:
>> + switch (channel) {
>> + case CHANNEL_PKG:
>> + *val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
>> + break;
> Ditto.
>
>> + }
>> + break;
> Ditto.
>
>> default:
>> return -EOPNOTSUPP;
>> }
>> + return 0;
> With above in place, this won't be needed.
>
>> }
>>
>> static umode_t
>> @@ -1263,6 +1357,11 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
>> for (channel = 0; channel < FAN_MAX; channel++)
>> if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
>> xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
>> +
>> + if (hwmon->xe->info.has_mbx_thermal_info)
>> + if (xe_hwmon_pcode_read_thermal_info(hwmon))
> These can be a single if condition with && operation.
I kept it this way to avoid showing unsupported logs on platforms where
support is not probed at all.
>
>> + drm_dbg(&hwmon->xe->drm,
>> + "Thermal mailbox support not present in firmware\n");
> Nit: "not supported by firmware"
this can be "Thermal mailbox not supported by card firmware"
>
>> }
>>
>> int xe_hwmon_register(struct xe_device *xe)
>> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
>> index a1fdca451ce0..776ed4bd538b 100644
>> --- a/drivers/gpu/drm/xe/xe_pci.c
>> +++ b/drivers/gpu/drm/xe/xe_pci.c
>> @@ -366,6 +366,7 @@ static const struct xe_device_desc bmg_desc = {
>> .has_fan_control = true,
>> .has_flat_ccs = 1,
>> .has_mbx_power_limits = true,
>> + .has_mbx_thermal_info = true,
>> .has_gsc_nvm = 1,
>> .has_heci_cscfi = 1,
>> .has_i2c = true,
>> @@ -421,6 +422,7 @@ static const struct xe_device_desc cri_desc = {
>> .has_gsc_nvm = 1,
>> .has_i2c = true,
>> .has_mbx_power_limits = true,
>> + .has_mbx_thermal_info = true,
>> .has_mert = true,
>> .has_pre_prod_wa = 1,
>> .has_soc_remapper_sysctrl = true,
>> @@ -686,6 +688,7 @@ static int xe_info_init_early(struct xe_device *xe,
>> /* runtime fusing may force flat_ccs to disabled later */
>> xe->info.has_flat_ccs = desc->has_flat_ccs;
>> xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
>> + xe->info.has_mbx_thermal_info = desc->has_mbx_thermal_info;
>> xe->info.has_gsc_nvm = desc->has_gsc_nvm;
>> xe->info.has_heci_gscfi = desc->has_heci_gscfi;
>> xe->info.has_heci_cscfi = desc->has_heci_cscfi;
>> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
>> index 5f20f56571d1..20acc5349ee6 100644
>> --- a/drivers/gpu/drm/xe/xe_pci_types.h
>> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
>> @@ -48,6 +48,7 @@ struct xe_device_desc {
>> u8 has_late_bind:1;
>> u8 has_llc:1;
>> u8 has_mbx_power_limits:1;
>> + u8 has_mbx_thermal_info:1;
>> u8 has_mem_copy_instr:1;
>> u8 has_mert:1;
>> u8 has_pre_prod_wa:1;
>> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
>> index 975892d6b230..6c84c1780fe9 100644
>> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
>> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
>> @@ -65,6 +65,9 @@
>> #define FAN_TABLE 1
>> #define VR_CONFIG 2
>>
>> +#define PCODE_THERMAL_INFO 0x25
>> +#define READ_THERMAL_LIMITS 0x0
> This file is full of randomly ordered commands so at some point
> we might want to order them correctly. For now just add this above
> PCODE_LATE_BINDING.
>
> Raag
>
>> #define PCODE_FREQUENCY_CONFIG 0x6e
>> /* Frequency Config Sub Commands (param1) */
>> #define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
>> --
>> 2.25.1
>>
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^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits
2026-01-09 13:42 ` Poosa, Karthik
@ 2026-01-09 14:24 ` Poosa, Karthik
0 siblings, 0 replies; 13+ messages in thread
From: Poosa, Karthik @ 2026-01-09 14:24 UTC (permalink / raw)
To: Jadav, Raag
Cc: intel-xe@lists.freedesktop.org, Gupta, Anshuman, Nilawar, Badal,
Vivi, Rodrigo
________________________________________
From: Poosa, Karthik <karthik.poosa@intel.com>
Sent: Friday, January 09, 2026 7:12 PM
To: Jadav, Raag <raag.jadav@intel.com>
Cc: intel-xe@lists.freedesktop.org <intel-xe@lists.freedesktop.org>; Gupta, Anshuman <anshuman.gupta@intel.com>; Nilawar, Badal <badal.nilawar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
Subject: Re: [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits
On 09-01-2026 14:59, Raag Jadav wrote:
On Thu, Jan 08, 2026 at 06:33:20PM +0530, Karthik Poosa wrote:
Read temperature limits using pcode mailbox and
expose shutdown temperature limit as tempX_emergency,
critical temperature limit of as tempX_crit and
GPU average temperature limit as tempX_max.
Looks like this can be less lines, please utilize the remaining space.
Update Xe hwmon documentation for these entries.
v2:
- Resolve a documentation warning.
- Address below review comments from Raag.
- Update date and kernel version in Xe hwmon documentation.
- Remove explicit disable of has_mbx_thermal_info for unsupported
platforms.
- Remove unnecessary default case in switches.
- Remove obvious comments.
- Use TEMP_LIMIT_MAX to compute number of dwords needed in
xe_hwmon_thermal_info.
- Remove THERMAL_LIMITS_DWORDS macro.
- Use has_mbx_thermal_info for checking thermal mailbox support.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
.../ABI/testing/sysfs-driver-intel-xe-hwmon | 40 +++++++
drivers/gpu/drm/xe/xe_device_types.h | 2 +
drivers/gpu/drm/xe/xe_hwmon.c | 107 +++++++++++++++++-
drivers/gpu/drm/xe/xe_pci.c | 3 +
drivers/gpu/drm/xe/xe_pci_types.h | 1 +
drivers/gpu/drm/xe/xe_pcode_api.h | 3 +
6 files changed, 152 insertions(+), 4 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index d9e2b17c6872..c3b367c42741 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -196,3 +196,43 @@ Description: RW. Package burst power limit interval (Tau in PL2/Tau) in
milliseconds over which sustained power is averaged.
Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_emergency
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Package shutdown temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_crit
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Package critical temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_max
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Package average temperature limit in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_emergency
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. VRAM shutdown temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_crit
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. VRAM critical temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
Group these with existing temperature entries as per channel index in
alphabetic order.
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 7d46d5ecda91..e359889b4378 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -322,6 +322,8 @@ struct xe_device {
* pcode mailbox commands.
*/
u8 has_mbx_power_limits:1;
+ /** @info.has_mbx_thermal_info: Device has support for thermal mailbox commands */
Nit: "supports thermal ..."
+ u8 has_mbx_thermal_info:1;
/** @info.has_mem_copy_instr: Device supports MEM_COPY instruction */
u8 has_mem_copy_instr:1;
/** @info.has_mert: Device has standalone MERT */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index ff2aea52ef75..db00728c89e4 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -53,6 +53,15 @@ enum xe_fan_channel {
FAN_MAX,
};
+enum xe_temp_limit {
+ TEMP_LIMIT_PKG_SHUTDOWN,
+ TEMP_LIMIT_PKG_TJMAX,
+ TEMP_LIMIT_MEM_SHUTDOWN,
+ TEMP_LIMIT_PKG_CRIT,
+ TEMP_LIMIT_MEM_TJMAX,
+ TEMP_LIMIT_MAX,
This is guaranteed last member so redundant comma.
+};
+
/* Attribute index for powerX_xxx_interval sysfs entries */
enum sensor_attr_power {
SENSOR_INDEX_PSYS_PL1,
@@ -111,6 +120,18 @@ struct xe_hwmon_fan_info {
u64 time_prev;
};
+/**
+ * struct xe_hwmon_thermal_info - to store temperature data
+ */
+struct xe_hwmon_thermal_info {
+ union {
+ /** @limit: temperatures limits */
+ u8 limit[TEMP_LIMIT_MAX];
+ /** @data: temperature limits in dwords */
+ u32 data[(TEMP_LIMIT_MAX / sizeof(u32)) + ((TEMP_LIMIT_MAX % sizeof(u32)) ? 1 : 0)];
I think this can be (((TEMP_LIMIT_MAX - 1) / sizeof(u32)) + 1) but please
double check.
+ };
+};
+
/**
* struct xe_hwmon - xe hwmon data structure
*/
@@ -137,7 +158,8 @@ struct xe_hwmon {
u32 pl1_on_boot[CHANNEL_MAX];
/** @pl2_on_boot: power limit PL2 on boot */
u32 pl2_on_boot[CHANNEL_MAX];
-
+ /** @temp: Temperature info */
+ struct xe_hwmon_thermal_info temp;
};
static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel,
@@ -677,8 +699,11 @@ static const struct attribute_group *hwmon_groups[] = {
};
static const struct hwmon_channel_info * const hwmon_info[] = {
- HWMON_CHANNEL_INFO(temp, HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_LABEL,
- HWMON_T_INPUT | HWMON_T_LABEL),
+ HWMON_CHANNEL_INFO(temp,
+ HWMON_T_LABEL,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
Let's make this alphabetic order.
+ HWMON_T_MAX,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
Ditto.
HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
HWMON_P_CAP,
HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CAP),
@@ -689,6 +714,19 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
NULL
};
+static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
+{
+ struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+ int ret = 0;
Redundant initialization.
+ ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
+ &hwmon->temp.data[0], &hwmon->temp.data[1]);
+ drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
+ hwmon->temp.data[0], hwmon->temp.data[1]);
+
+ return ret;
+}
+
/* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
{
@@ -787,6 +825,34 @@ static umode_t
xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
{
switch (attr) {
+ case hwmon_temp_emergency:
+ switch (channel) {
+ case CHANNEL_PKG:
+ return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
+ case CHANNEL_VRAM:
+ return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
+ default:
+ return 0;
+ }
+ break;
I don't believe we'll ever reach here, so please drop the dead code.
+ case hwmon_temp_crit:
+ switch (channel) {
+ case CHANNEL_PKG:
+ return hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] ? 0444 : 0;
+ case CHANNEL_VRAM:
+ return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
+ default:
+ return 0;
+ }
+ break;
Ditto.
+ case hwmon_temp_max:
+ switch (channel) {
+ case CHANNEL_PKG:
+ return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
+ default:
+ return 0;
+ }
+ break;
Ditto.
case hwmon_temp_input:
case hwmon_temp_label:
return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
@@ -807,10 +873,38 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
/* HW register value is in degrees Celsius, convert to millidegrees. */
*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
- return 0;
+ break;
and we don't have a reason to continue here, so let's try to return where
possible.
+ case hwmon_temp_emergency:
+ switch (channel) {
+ case CHANNEL_PKG:
+ *val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
+ break;
Ditto.
+ case CHANNEL_VRAM:
+ *val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
+ break;
Ditto.
+ }
+ break;
Ditto.
+ case hwmon_temp_crit:
+ switch (channel) {
+ case CHANNEL_PKG:
+ *val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
+ break;
Ditto.
+ case CHANNEL_VRAM:
+ *val = hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] * MILLIDEGREE_PER_DEGREE;
+ break;
Ditto.
+ }
+ break;
Ditto.
+ case hwmon_temp_max:
+ switch (channel) {
+ case CHANNEL_PKG:
+ *val = hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] * MILLIDEGREE_PER_DEGREE;
+ break;
Ditto.
+ }
+ break;
Ditto.
default:
return -EOPNOTSUPP;
}
+ return 0;
With above in place, this won't be needed.
}
static umode_t
@@ -1263,6 +1357,11 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
for (channel = 0; channel < FAN_MAX; channel++)
if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
+
+ if (hwmon->xe->info.has_mbx_thermal_info)
+ if (xe_hwmon_pcode_read_thermal_info(hwmon))
These can be a single if condition with && operation.
I kept it this way to avoid showing unsupported logs on platforms where support is not probed at all.
> Please disregard this comment; it is incorrect.
+ drm_dbg(&hwmon->xe->drm,
+ "Thermal mailbox support not present in firmware\n");
Nit: "not supported by firmware"
this can be "Thermal mailbox not supported by card firmware"
}
int xe_hwmon_register(struct xe_device *xe)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index a1fdca451ce0..776ed4bd538b 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -366,6 +366,7 @@ static const struct xe_device_desc bmg_desc = {
.has_fan_control = true,
.has_flat_ccs = 1,
.has_mbx_power_limits = true,
+ .has_mbx_thermal_info = true,
.has_gsc_nvm = 1,
.has_heci_cscfi = 1,
.has_i2c = true,
@@ -421,6 +422,7 @@ static const struct xe_device_desc cri_desc = {
.has_gsc_nvm = 1,
.has_i2c = true,
.has_mbx_power_limits = true,
+ .has_mbx_thermal_info = true,
.has_mert = true,
.has_pre_prod_wa = 1,
.has_soc_remapper_sysctrl = true,
@@ -686,6 +688,7 @@ static int xe_info_init_early(struct xe_device *xe,
/* runtime fusing may force flat_ccs to disabled later */
xe->info.has_flat_ccs = desc->has_flat_ccs;
xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
+ xe->info.has_mbx_thermal_info = desc->has_mbx_thermal_info;
xe->info.has_gsc_nvm = desc->has_gsc_nvm;
xe->info.has_heci_gscfi = desc->has_heci_gscfi;
xe->info.has_heci_cscfi = desc->has_heci_cscfi;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 5f20f56571d1..20acc5349ee6 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -48,6 +48,7 @@ struct xe_device_desc {
u8 has_late_bind:1;
u8 has_llc:1;
u8 has_mbx_power_limits:1;
+ u8 has_mbx_thermal_info:1;
u8 has_mem_copy_instr:1;
u8 has_mert:1;
u8 has_pre_prod_wa:1;
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index 975892d6b230..6c84c1780fe9 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -65,6 +65,9 @@
#define FAN_TABLE 1
#define VR_CONFIG 2
+#define PCODE_THERMAL_INFO 0x25
+#define READ_THERMAL_LIMITS 0x0
This file is full of randomly ordered commands so at some point
we might want to order them correctly. For now just add this above
PCODE_LATE_BINDING.
Raag
#define PCODE_FREQUENCY_CONFIG 0x6e
/* Frequency Config Sub Commands (param1) */
#define PCODE_MBOX_FC_SC_READ_FUSED_P0 0x0
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v4 2/4] drm/xe/hwmon: Expose memory controller temperature
2026-01-08 13:03 [PATCH v4 0/4] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
2026-01-08 13:03 ` [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits Karthik Poosa
@ 2026-01-08 13:03 ` Karthik Poosa
2026-01-09 10:56 ` Raag Jadav
2026-01-08 13:03 ` [PATCH v4 3/4] drm/xe/hwmon: Expose GPU pcie temperature Karthik Poosa
` (4 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Karthik Poosa @ 2026-01-08 13:03 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, badal.nilawar, rodrigo.vivi, raag.jadav,
Karthik Poosa
Expose GPU memory controller average temperature and its limits
under temp4_xxx.
Update Xe hwmon documentation for this.
v2:
- Rephrase commit message. (Badal)
- Update kernel version in Xe hwmon documentation. (Raag)
v3:
- Update kernel version in Xe hwmon documentation.
- Address review comments from Raag.
- Remove obvious comments.
- Remove redundant debug logs.
- Remove unnecessary checks.
- Avoid magic numbers.
- Add new comments.
- Use temperature sensors count to make memory controller visible.
- Use temperature limits of package for memory controller.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
.../ABI/testing/sysfs-driver-intel-xe-hwmon | 24 ++++++
drivers/gpu/drm/xe/xe_hwmon.c | 86 ++++++++++++++++++-
drivers/gpu/drm/xe/xe_pcode_api.h | 4 +
3 files changed, 110 insertions(+), 4 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index c3b367c42741..a9fcfa6f11b9 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -236,3 +236,27 @@ Contact: intel-xe@lists.freedesktop.org
Description: RO. VRAM critical temperature in millidegree Celsius.
Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_input
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Memory controller average temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_emergency
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Memory controller shutdown temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_crit
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. Memory controller critical temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index db00728c89e4..2bf5c9ac948a 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -43,6 +43,7 @@ enum xe_hwmon_channel {
CHANNEL_CARD,
CHANNEL_PKG,
CHANNEL_VRAM,
+ CHANNEL_MCTRL,
CHANNEL_MAX,
};
@@ -100,6 +101,11 @@ enum sensor_attr_power {
*/
#define PL_WRITE_MBX_TIMEOUT_MS (1)
+/*
+ * Maximum number of thermal sensors supported by hardware.
+ */
+#define MAX_THERMAL_SENSORS (255)
+
/**
* struct xe_hwmon_energy_info - to accumulate energy
*/
@@ -130,6 +136,10 @@ struct xe_hwmon_thermal_info {
/** @data: temperature limits in dwords */
u32 data[(TEMP_LIMIT_MAX / sizeof(u32)) + ((TEMP_LIMIT_MAX % sizeof(u32)) ? 1 : 0)];
};
+ /** @count: no of temperature sensors available for the platform */
+ u8 count;
+ /** @value: value from each sensor, bit 7 is for sign and 6:0 for value */
+ s8 value[MAX_THERMAL_SENSORS];
};
/**
@@ -703,6 +713,7 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
HWMON_T_LABEL,
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
HWMON_T_MAX,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
HWMON_P_CAP,
@@ -718,15 +729,58 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
{
struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
int ret = 0;
+ u32 val = 0;
ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
&hwmon->temp.data[0], &hwmon->temp.data[1]);
+ if (ret)
+ return ret;
+
drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
hwmon->temp.data[0], hwmon->temp.data[1]);
+ ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
+ &val, NULL);
+ if (ret)
+ return ret;
+
+ drm_dbg(&hwmon->xe->drm, "thermal config count %d\n", val);
+ hwmon->temp.count = val & TEMP_MASK;
+
return ret;
}
+static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
+{
+ struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+ int ret = 0, i = 0;
+ u32 *dword = (u32 *)hwmon->temp.value;
+ s16 average = 0;
+
+ for (i = 0; i < (hwmon->temp.count / sizeof(u32)); i++) {
+ ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
+ (dword + i), NULL);
+ if (ret)
+ return ret;
+ drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
+ }
+
+ if (hwmon->temp.count % (sizeof(u32))) {
+ ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
+ (dword + i), NULL);
+ if (ret)
+ return ret;
+ drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
+ }
+
+ for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
+ average += hwmon->temp.value[i];
+
+ average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
+ *val = average * MILLIDEGREE_PER_DEGREE;
+ return 0;
+}
+
/* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
{
@@ -831,6 +885,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
case CHANNEL_VRAM:
return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
+ case CHANNEL_MCTRL:
+ return hwmon->temp.count ? 0444 : 0;
default:
return 0;
}
@@ -841,6 +897,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
return hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] ? 0444 : 0;
case CHANNEL_VRAM:
return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
+ case CHANNEL_MCTRL:
+ return hwmon->temp.count ? 0444 : 0;
default:
return 0;
}
@@ -855,7 +913,16 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
break;
case hwmon_temp_input:
case hwmon_temp_label:
- return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
+ switch (channel) {
+ case CHANNEL_PKG:
+ case CHANNEL_VRAM:
+ return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
+ channel)) ? 0444 : 0;
+ case CHANNEL_MCTRL:
+ return hwmon->temp.count ? 0444 : 0;
+ default:
+ return 0;
+ }
default:
return 0;
}
@@ -869,14 +936,22 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
switch (attr) {
case hwmon_temp_input:
- reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
+ switch (channel) {
+ case CHANNEL_PKG:
+ case CHANNEL_VRAM:
+ reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
- /* HW register value is in degrees Celsius, convert to millidegrees. */
- *val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
+ /* HW register value is in degrees Celsius, convert to millidegrees. */
+ *val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
+ break;
+ case CHANNEL_MCTRL:
+ return get_mc_temp(hwmon, val);
+ }
break;
case hwmon_temp_emergency:
switch (channel) {
case CHANNEL_PKG:
+ case CHANNEL_MCTRL:
*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
break;
case CHANNEL_VRAM:
@@ -887,6 +962,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
case hwmon_temp_crit:
switch (channel) {
case CHANNEL_PKG:
+ case CHANNEL_MCTRL:
*val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
break;
case CHANNEL_VRAM:
@@ -1263,6 +1339,8 @@ static int xe_hwmon_read_label(struct device *dev,
*str = "pkg";
else if (channel == CHANNEL_VRAM)
*str = "vram";
+ else if (channel == CHANNEL_MCTRL)
+ *str = "mctrl";
return 0;
case hwmon_power:
case hwmon_energy:
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index 6c84c1780fe9..fc8811a87741 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -67,6 +67,10 @@
#define PCODE_THERMAL_INFO 0x25
#define READ_THERMAL_LIMITS 0x0
+#define READ_THERMAL_CONFIG 0x1
+#define READ_THERMAL_DATA 0x2
+#define TEMP_INDEX_MCTRL 0x2
+#define TEMP_MASK_MAILBOX REG_GENMASK8(6, 0)
#define PCODE_FREQUENCY_CONFIG 0x6e
/* Frequency Config Sub Commands (param1) */
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v4 2/4] drm/xe/hwmon: Expose memory controller temperature
2026-01-08 13:03 ` [PATCH v4 2/4] drm/xe/hwmon: Expose memory controller temperature Karthik Poosa
@ 2026-01-09 10:56 ` Raag Jadav
0 siblings, 0 replies; 13+ messages in thread
From: Raag Jadav @ 2026-01-09 10:56 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe, anshuman.gupta, badal.nilawar, rodrigo.vivi
On Thu, Jan 08, 2026 at 06:33:21PM +0530, Karthik Poosa wrote:
> Expose GPU memory controller average temperature and its limits
> under temp4_xxx.
Same comments as last patch.
> Update Xe hwmon documentation for this.
>
> v2:
> - Rephrase commit message. (Badal)
> - Update kernel version in Xe hwmon documentation. (Raag)
>
> v3:
> - Update kernel version in Xe hwmon documentation.
> - Address review comments from Raag.
> - Remove obvious comments.
> - Remove redundant debug logs.
> - Remove unnecessary checks.
> - Avoid magic numbers.
> - Add new comments.
> - Use temperature sensors count to make memory controller visible.
> - Use temperature limits of package for memory controller.
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> .../ABI/testing/sysfs-driver-intel-xe-hwmon | 24 ++++++
> drivers/gpu/drm/xe/xe_hwmon.c | 86 ++++++++++++++++++-
> drivers/gpu/drm/xe/xe_pcode_api.h | 4 +
> 3 files changed, 110 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> index c3b367c42741..a9fcfa6f11b9 100644
> --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> @@ -236,3 +236,27 @@ Contact: intel-xe@lists.freedesktop.org
> Description: RO. VRAM critical temperature in millidegree Celsius.
>
> Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_input
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. Memory controller average temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_emergency
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. Memory controller shutdown temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_crit
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. Memory controller critical temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
Same comments as last patch.
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index db00728c89e4..2bf5c9ac948a 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -43,6 +43,7 @@ enum xe_hwmon_channel {
> CHANNEL_CARD,
> CHANNEL_PKG,
> CHANNEL_VRAM,
> + CHANNEL_MCTRL,
> CHANNEL_MAX,
> };
>
> @@ -100,6 +101,11 @@ enum sensor_attr_power {
> */
> #define PL_WRITE_MBX_TIMEOUT_MS (1)
>
> +/*
> + * Maximum number of thermal sensors supported by hardware.
> + */
> +#define MAX_THERMAL_SENSORS (255)
I don't think we need this, see below.
> +
> /**
> * struct xe_hwmon_energy_info - to accumulate energy
> */
> @@ -130,6 +136,10 @@ struct xe_hwmon_thermal_info {
> /** @data: temperature limits in dwords */
> u32 data[(TEMP_LIMIT_MAX / sizeof(u32)) + ((TEMP_LIMIT_MAX % sizeof(u32)) ? 1 : 0)];
> };
> + /** @count: no of temperature sensors available for the platform */
> + u8 count;
> + /** @value: value from each sensor, bit 7 is for sign and 6:0 for value */
Nit: "Signed value from each sensor" would be sufficient.
> + s8 value[MAX_THERMAL_SENSORS];
Just use U8_MAX and add a comment that it's the size of count member.
> };
>
> /**
> @@ -703,6 +713,7 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
> HWMON_T_LABEL,
> HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
> HWMON_T_MAX,
> + HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
Alphabetic order please!
> HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
> HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
> HWMON_P_CAP,
> @@ -718,15 +729,58 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> int ret = 0;
> + u32 val = 0;
Make this config.
> ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
> &hwmon->temp.data[0], &hwmon->temp.data[1]);
> + if (ret)
> + return ret;
> +
> drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
> hwmon->temp.data[0], hwmon->temp.data[1]);
>
> + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
> + &val, NULL);
> + if (ret)
> + return ret;
> +
> + drm_dbg(&hwmon->xe->drm, "thermal config count %d\n", val);
> + hwmon->temp.count = val & TEMP_MASK;
> +
> return ret;
> }
>
> +static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
> +{
> + struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> + int ret = 0, i = 0;
Redundant initializations.
> + u32 *dword = (u32 *)hwmon->temp.value;
Use reverse xmas tree order.
> + s16 average = 0;
I know this does the job but let's use s32 for uniformity.
> + for (i = 0; i < (hwmon->temp.count / sizeof(u32)); i++) {
Hm... see below.
> + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
> + (dword + i), NULL);
> + if (ret)
> + return ret;
> + drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
> + }
> +
> + if (hwmon->temp.count % (sizeof(u32))) {
I think the correct logic would be to use
(((hwmon->temp.count - 1)/ sizeof(u32)) + 1) as loop condition,
or did I miss something?
> + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
> + (dword + i), NULL);
> + if (ret)
> + return ret;
> + drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
> + }
> +
> + for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
> + average += hwmon->temp.value[i];
> +
> + average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
> + *val = average * MILLIDEGREE_PER_DEGREE;
> + return 0;
> +}
> +
> /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
> static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
> {
> @@ -831,6 +885,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
> case CHANNEL_VRAM:
> return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
> + case CHANNEL_MCTRL:
> + return hwmon->temp.count ? 0444 : 0;
> default:
> return 0;
> }
> @@ -841,6 +897,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> return hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] ? 0444 : 0;
> case CHANNEL_VRAM:
> return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
> + case CHANNEL_MCTRL:
> + return hwmon->temp.count ? 0444 : 0;
> default:
> return 0;
> }
> @@ -855,7 +913,16 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> break;
> case hwmon_temp_input:
> case hwmon_temp_label:
> - return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP, channel)) ? 0444 : 0;
> + switch (channel) {
> + case CHANNEL_PKG:
> + case CHANNEL_VRAM:
> + return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
> + channel)) ? 0444 : 0;
Align with correct braces.
> + case CHANNEL_MCTRL:
> + return hwmon->temp.count ? 0444 : 0;
> + default:
> + return 0;
> + }
> default:
> return 0;
> }
> @@ -869,14 +936,22 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
>
> switch (attr) {
> case hwmon_temp_input:
> - reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
> + switch (channel) {
> + case CHANNEL_PKG:
> + case CHANNEL_VRAM:
> + reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
>
> - /* HW register value is in degrees Celsius, convert to millidegrees. */
> - *val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
> + /* HW register value is in degrees Celsius, convert to millidegrees. */
> + *val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
> + break;
Nope, just return.
> + case CHANNEL_MCTRL:
> + return get_mc_temp(hwmon, val);
Add a default case with return 0 to make static checker happy (and also
in all other similar places).
> + }
> break;
> case hwmon_temp_emergency:
> switch (channel) {
> case CHANNEL_PKG:
> + case CHANNEL_MCTRL:
> *val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> break;
> case CHANNEL_VRAM:
> @@ -887,6 +962,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> case hwmon_temp_crit:
> switch (channel) {
> case CHANNEL_PKG:
> + case CHANNEL_MCTRL:
> *val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
> break;
> case CHANNEL_VRAM:
> @@ -1263,6 +1339,8 @@ static int xe_hwmon_read_label(struct device *dev,
> *str = "pkg";
> else if (channel == CHANNEL_VRAM)
> *str = "vram";
> + else if (channel == CHANNEL_MCTRL)
> + *str = "mctrl";
> return 0;
> case hwmon_power:
> case hwmon_energy:
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index 6c84c1780fe9..fc8811a87741 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -67,6 +67,10 @@
>
> #define PCODE_THERMAL_INFO 0x25
> #define READ_THERMAL_LIMITS 0x0
> +#define READ_THERMAL_CONFIG 0x1
> +#define READ_THERMAL_DATA 0x2
> +#define TEMP_INDEX_MCTRL 0x2
This is not used by pcode and should not be in this file. I think the right
place for it would be xe_hwmon.c.
> +#define TEMP_MASK_MAILBOX REG_GENMASK8(6, 0)
Is this used in this patch?
Raag
> #define PCODE_FREQUENCY_CONFIG 0x6e
> /* Frequency Config Sub Commands (param1) */
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 3/4] drm/xe/hwmon: Expose GPU pcie temperature
2026-01-08 13:03 [PATCH v4 0/4] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
2026-01-08 13:03 ` [PATCH v4 1/4] drm/xe/hwmon: Expose temperature limits Karthik Poosa
2026-01-08 13:03 ` [PATCH v4 2/4] drm/xe/hwmon: Expose memory controller temperature Karthik Poosa
@ 2026-01-08 13:03 ` Karthik Poosa
2026-01-09 13:26 ` Raag Jadav
2026-01-08 13:03 ` [PATCH v4 4/4] drm/xe/hwmon: Expose individual vram channel temperature Karthik Poosa
` (3 subsequent siblings)
6 siblings, 1 reply; 13+ messages in thread
From: Karthik Poosa @ 2026-01-08 13:03 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, badal.nilawar, rodrigo.vivi, raag.jadav,
Karthik Poosa
Expose GPU PCIe average temperature and its limits via hwmon
sysfs temp5_xxx.
Update Xe hwmon sysfs documentation for this.
v2: Update kernel version in Xe hwmon documentation. (Raag)
v3:
- Address review comments from Raag.
- Remove redundant debug log.
- Update kernel version in Xe hwmon documentation. (Raag)
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
.../ABI/testing/sysfs-driver-intel-xe-hwmon | 24 ++++++++++++++
drivers/gpu/drm/xe/xe_hwmon.c | 32 +++++++++++++++++++
drivers/gpu/drm/xe/xe_pcode_api.h | 4 ++-
3 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index a9fcfa6f11b9..6041805a5efc 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -260,3 +260,27 @@ Contact: intel-xe@lists.freedesktop.org
Description: RO. Memory controller critical temperature in millidegree Celsius.
Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_input
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. GPU PCIe temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_emergency
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. GPU PCIe shutdown temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_crit
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. GPU PCIe critical temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 2bf5c9ac948a..317e30c4e1f1 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -44,6 +44,7 @@ enum xe_hwmon_channel {
CHANNEL_PKG,
CHANNEL_VRAM,
CHANNEL_MCTRL,
+ CHANNEL_PCIE,
CHANNEL_MAX,
};
@@ -714,6 +715,7 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
HWMON_T_MAX,
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
HWMON_P_CAP,
@@ -781,6 +783,27 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
return 0;
}
+static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
+{
+ struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+ int ret = 0;
+ u32 data = 0;
+
+ ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
+ PCIE_SENSOR_GROUP_ID), &data, NULL);
+ if (ret)
+ return ret;
+
+ /* Sensor offset is different for G21 */
+ if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
+ data >>= PCIE_SENSOR_SHIFT;
+
+ data &= TEMP_MASK_MAILBOX;
+ *val = (s8)data * MILLIDEGREE_PER_DEGREE;
+
+ return 0;
+}
+
/* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
{
@@ -886,6 +909,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
case CHANNEL_VRAM:
return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
case CHANNEL_MCTRL:
+ case CHANNEL_PCIE:
return hwmon->temp.count ? 0444 : 0;
default:
return 0;
@@ -898,6 +922,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
case CHANNEL_VRAM:
return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
case CHANNEL_MCTRL:
+ case CHANNEL_PCIE:
return hwmon->temp.count ? 0444 : 0;
default:
return 0;
@@ -919,6 +944,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
channel)) ? 0444 : 0;
case CHANNEL_MCTRL:
+ case CHANNEL_PCIE:
return hwmon->temp.count ? 0444 : 0;
default:
return 0;
@@ -946,12 +972,15 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
break;
case CHANNEL_MCTRL:
return get_mc_temp(hwmon, val);
+ case CHANNEL_PCIE:
+ return get_pcie_temp(hwmon, val);
}
break;
case hwmon_temp_emergency:
switch (channel) {
case CHANNEL_PKG:
case CHANNEL_MCTRL:
+ case CHANNEL_PCIE:
*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
break;
case CHANNEL_VRAM:
@@ -963,6 +992,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
switch (channel) {
case CHANNEL_PKG:
case CHANNEL_MCTRL:
+ case CHANNEL_PCIE:
*val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
break;
case CHANNEL_VRAM:
@@ -1341,6 +1371,8 @@ static int xe_hwmon_read_label(struct device *dev,
*str = "vram";
else if (channel == CHANNEL_MCTRL)
*str = "mctrl";
+ else if (channel == CHANNEL_PCIE)
+ *str = "pcie";
return 0;
case hwmon_power:
case hwmon_energy:
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index fc8811a87741..dd7635bbc4e7 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -70,7 +70,9 @@
#define READ_THERMAL_CONFIG 0x1
#define READ_THERMAL_DATA 0x2
#define TEMP_INDEX_MCTRL 0x2
-#define TEMP_MASK_MAILBOX REG_GENMASK8(6, 0)
+#define TEMP_MASK_MAILBOX REG_GENMASK8(7, 0)
+#define PCIE_SENSOR_GROUP_ID 0x2
+#define PCIE_SENSOR_SHIFT 16
#define PCODE_FREQUENCY_CONFIG 0x6e
/* Frequency Config Sub Commands (param1) */
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v4 3/4] drm/xe/hwmon: Expose GPU pcie temperature
2026-01-08 13:03 ` [PATCH v4 3/4] drm/xe/hwmon: Expose GPU pcie temperature Karthik Poosa
@ 2026-01-09 13:26 ` Raag Jadav
0 siblings, 0 replies; 13+ messages in thread
From: Raag Jadav @ 2026-01-09 13:26 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe, anshuman.gupta, badal.nilawar, rodrigo.vivi
On Thu, Jan 08, 2026 at 06:33:22PM +0530, Karthik Poosa wrote:
> Expose GPU PCIe average temperature and its limits via hwmon
> sysfs temp5_xxx.
Same comments as last patch. Also, use PCIe in subject.
> Update Xe hwmon sysfs documentation for this.
>
> v2: Update kernel version in Xe hwmon documentation. (Raag)
>
> v3:
> - Address review comments from Raag.
> - Remove redundant debug log.
> - Update kernel version in Xe hwmon documentation. (Raag)
>
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> .../ABI/testing/sysfs-driver-intel-xe-hwmon | 24 ++++++++++++++
> drivers/gpu/drm/xe/xe_hwmon.c | 32 +++++++++++++++++++
> drivers/gpu/drm/xe/xe_pcode_api.h | 4 ++-
> 3 files changed, 59 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> index a9fcfa6f11b9..6041805a5efc 100644
> --- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> +++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
> @@ -260,3 +260,27 @@ Contact: intel-xe@lists.freedesktop.org
> Description: RO. Memory controller critical temperature in millidegree Celsius.
>
> Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_input
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. GPU PCIe temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_emergency
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. GPU PCIe shutdown temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
> +
> +What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_crit
> +Date: January 2026
> +KernelVersion: 7.0
> +Contact: intel-xe@lists.freedesktop.org
> +Description: RO. GPU PCIe critical temperature in millidegree Celsius.
> +
> + Only supported for particular Intel Xe graphics platforms.
Same comments as last patch.
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 2bf5c9ac948a..317e30c4e1f1 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -44,6 +44,7 @@ enum xe_hwmon_channel {
> CHANNEL_PKG,
> CHANNEL_VRAM,
> CHANNEL_MCTRL,
> + CHANNEL_PCIE,
> CHANNEL_MAX,
> };
>
> @@ -714,6 +715,7 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
> HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT |
> HWMON_T_MAX,
> HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
> + HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
Alphabetic order please!
> HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
> HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
> HWMON_P_CAP,
> @@ -781,6 +783,27 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
> return 0;
> }
>
> +static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
> +{
> + struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> + int ret = 0;
Redundant initialization.
> + u32 data = 0;
> +
> + ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
> + PCIE_SENSOR_GROUP_ID), &data, NULL);
> + if (ret)
> + return ret;
> +
> + /* Sensor offset is different for G21 */
> + if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
> + data >>= PCIE_SENSOR_SHIFT;
Rather,
#define PCIE_SENSOR_MASK REG_GENMASK(30, 16)
data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
> + data &= TEMP_MASK_MAILBOX;
Don't we already have TEMP_MASK?
> + *val = (s8)data * MILLIDEGREE_PER_DEGREE;
> +
> + return 0;
> +}
> +
> /* I1 is exposed as power_crit or as curr_crit depending on bit 31 */
> static int xe_hwmon_pcode_read_i1(const struct xe_hwmon *hwmon, u32 *uval)
> {
> @@ -886,6 +909,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> case CHANNEL_VRAM:
> return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
> case CHANNEL_MCTRL:
> + case CHANNEL_PCIE:
> return hwmon->temp.count ? 0444 : 0;
> default:
> return 0;
> @@ -898,6 +922,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> case CHANNEL_VRAM:
> return hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] ? 0444 : 0;
> case CHANNEL_MCTRL:
> + case CHANNEL_PCIE:
> return hwmon->temp.count ? 0444 : 0;
> default:
> return 0;
> @@ -919,6 +944,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
> return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
> channel)) ? 0444 : 0;
> case CHANNEL_MCTRL:
> + case CHANNEL_PCIE:
> return hwmon->temp.count ? 0444 : 0;
> default:
> return 0;
> @@ -946,12 +972,15 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> break;
> case CHANNEL_MCTRL:
> return get_mc_temp(hwmon, val);
> + case CHANNEL_PCIE:
> + return get_pcie_temp(hwmon, val);
> }
> break;
> case hwmon_temp_emergency:
> switch (channel) {
> case CHANNEL_PKG:
> case CHANNEL_MCTRL:
> + case CHANNEL_PCIE:
> *val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
> break;
> case CHANNEL_VRAM:
> @@ -963,6 +992,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
> switch (channel) {
> case CHANNEL_PKG:
> case CHANNEL_MCTRL:
> + case CHANNEL_PCIE:
> *val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
> break;
> case CHANNEL_VRAM:
> @@ -1341,6 +1371,8 @@ static int xe_hwmon_read_label(struct device *dev,
> *str = "vram";
> else if (channel == CHANNEL_MCTRL)
> *str = "mctrl";
> + else if (channel == CHANNEL_PCIE)
> + *str = "pcie";
> return 0;
> case hwmon_power:
> case hwmon_energy:
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index fc8811a87741..dd7635bbc4e7 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -70,7 +70,9 @@
> #define READ_THERMAL_CONFIG 0x1
> #define READ_THERMAL_DATA 0x2
> #define TEMP_INDEX_MCTRL 0x2
> -#define TEMP_MASK_MAILBOX REG_GENMASK8(6, 0)
> +#define TEMP_MASK_MAILBOX REG_GENMASK8(7, 0)
> +#define PCIE_SENSOR_GROUP_ID 0x2
The convention for submacros is double space here, so let's make
it consistent.
Raag
> +#define PCIE_SENSOR_SHIFT 16
>
> #define PCODE_FREQUENCY_CONFIG 0x6e
> /* Frequency Config Sub Commands (param1) */
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4 4/4] drm/xe/hwmon: Expose individual vram channel temperature
2026-01-08 13:03 [PATCH v4 0/4] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
` (2 preceding siblings ...)
2026-01-08 13:03 ` [PATCH v4 3/4] drm/xe/hwmon: Expose GPU pcie temperature Karthik Poosa
@ 2026-01-08 13:03 ` Karthik Poosa
2026-01-08 13:20 ` ✓ CI.KUnit: success for drm/xe/hwmon: Expose new temperature attributes (rev5) Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 13+ messages in thread
From: Karthik Poosa @ 2026-01-08 13:03 UTC (permalink / raw)
To: intel-xe
Cc: anshuman.gupta, badal.nilawar, rodrigo.vivi, raag.jadav,
Karthik Poosa
Expose individual VRAM temperature attributes.
Update Xe hwmon documentation for this entry.
v2:
- Avoid using default switch case for VRAM individual temperatures.
- Append labels with vram number.
- Update kernel version in Xe hwmon documentation.
v3:
- Add missing brackets in Xe hwmon documentation from vram sysfs.
- Reorder BMG_VRAM_TEMPERATURE_N macro in xe_pcode_regs.h.
- Add api to check if vram is available on the channel.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
.../ABI/testing/sysfs-driver-intel-xe-hwmon | 24 +++++++
drivers/gpu/drm/xe/regs/xe_pcode_regs.h | 3 +
drivers/gpu/drm/xe/xe_hwmon.c | 68 +++++++++++++++++--
3 files changed, 90 insertions(+), 5 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
index 6041805a5efc..4da405699571 100644
--- a/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
+++ b/Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon
@@ -284,3 +284,27 @@ Contact: intel-xe@lists.freedesktop.org
Description: RO. GPU PCIe critical temperature in millidegree Celsius.
Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_input
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. VRAM channel temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_emergency
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. VRAM channel shutdown temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
+
+What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_crit
+Date: January 2026
+KernelVersion: 7.0
+Contact: intel-xe@lists.freedesktop.org
+Description: RO. VRAM channel critical temperature in millidegree Celsius.
+
+ Only supported for particular Intel Xe graphics platforms.
diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
index fb097607b86c..6627591c05b7 100644
--- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
@@ -22,6 +22,9 @@
#define BMG_FAN_2_SPEED XE_REG(0x138170)
#define BMG_FAN_3_SPEED XE_REG(0x1381a0)
#define BMG_VRAM_TEMPERATURE XE_REG(0x1382c0)
+#define BMG_VRAM_TEMPERATURE_N(n) XE_REG(0x138260 + (n))
+#define TEMP_MASK_VRAM_N REG_GENMASK(30, 8)
+#define TEMP_SIGN_MASK BIT(31)
#define BMG_PACKAGE_TEMPERATURE XE_REG(0x138434)
#endif /* _XE_PCODE_REGS_H_ */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 317e30c4e1f1..561e71864f95 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -39,12 +39,16 @@ enum xe_hwmon_reg_operation {
REG_READ64,
};
+#define MAX_VRAM_CHANNELS (16)
+
enum xe_hwmon_channel {
CHANNEL_CARD,
CHANNEL_PKG,
CHANNEL_VRAM,
CHANNEL_MCTRL,
CHANNEL_PCIE,
+ CHANNEL_VRAM_N,
+ CHANNEL_VRAM_N_MAX = CHANNEL_VRAM_N + MAX_VRAM_CHANNELS,
CHANNEL_MAX,
};
@@ -257,6 +261,8 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
return BMG_PACKAGE_TEMPERATURE;
else if (channel == CHANNEL_VRAM)
return BMG_VRAM_TEMPERATURE;
+ else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX)
+ return BMG_VRAM_TEMPERATURE_N(((channel - CHANNEL_VRAM_N) * 4));
} else if (xe->info.platform == XE_DG2) {
if (channel == CHANNEL_PKG)
return PCU_CR_PACKAGE_TEMPERATURE;
@@ -716,6 +722,22 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
HWMON_T_MAX,
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
+ HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT,
HWMON_T_LABEL | HWMON_T_INPUT | HWMON_T_EMERGENCY | HWMON_T_CRIT),
HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
HWMON_P_CAP,
@@ -898,6 +920,18 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
}
+static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
+{
+ struct xe_reg vram_ch_temp;
+ struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
+
+ vram_ch_temp = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
+ if (xe_reg_is_valid(vram_ch_temp))
+ return (xe_mmio_read32(mmio, vram_ch_temp)) ? 1 : 0;
+
+ return 0;
+}
+
static umode_t
xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
{
@@ -911,6 +945,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
case CHANNEL_MCTRL:
case CHANNEL_PCIE:
return hwmon->temp.count ? 0444 : 0;
+ case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+ return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
default:
return 0;
}
@@ -924,6 +960,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
case CHANNEL_MCTRL:
case CHANNEL_PCIE:
return hwmon->temp.count ? 0444 : 0;
+ case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+ return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
default:
return 0;
}
@@ -946,6 +984,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
case CHANNEL_MCTRL:
case CHANNEL_PCIE:
return hwmon->temp.count ? 0444 : 0;
+ case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+ return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
default:
return 0;
}
@@ -974,6 +1014,16 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
return get_mc_temp(hwmon, val);
case CHANNEL_PCIE:
return get_pcie_temp(hwmon, val);
+ case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+ reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
+ /*
+ * This temperature format is bit 31 for sign, bits [30:8] for whole number
+ * and bits [7:0] for fraction
+ */
+ *val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
+ (REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
+ MILLIDEGREE_PER_DEGREE;
+ break;
}
break;
case hwmon_temp_emergency:
@@ -984,6 +1034,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
*val = hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
break;
case CHANNEL_VRAM:
+ case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
*val = hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] * MILLIDEGREE_PER_DEGREE;
break;
}
@@ -996,6 +1047,7 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
*val = hwmon->temp.limit[TEMP_LIMIT_PKG_TJMAX] * MILLIDEGREE_PER_DEGREE;
break;
case CHANNEL_VRAM:
+ case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
*val = hwmon->temp.limit[TEMP_LIMIT_MEM_TJMAX] * MILLIDEGREE_PER_DEGREE;
break;
}
@@ -1363,16 +1415,22 @@ static int xe_hwmon_read_label(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
+ char temp[16] = {0};
+
switch (type) {
case hwmon_temp:
- if (channel == CHANNEL_PKG)
+ if (channel == CHANNEL_PKG) {
*str = "pkg";
- else if (channel == CHANNEL_VRAM)
- *str = "vram";
- else if (channel == CHANNEL_MCTRL)
+ } else if (channel == CHANNEL_VRAM) {
+ *str = "vram_avg";
+ } else if (channel == CHANNEL_MCTRL) {
*str = "mctrl";
- else if (channel == CHANNEL_PCIE)
+ } else if (channel == CHANNEL_PCIE) {
*str = "pcie";
+ } else if (channel >= CHANNEL_VRAM_N && channel <= CHANNEL_VRAM_N_MAX) {
+ sprintf(temp, "vram_%d", (channel - CHANNEL_VRAM_N));
+ *str = temp;
+ }
return 0;
case hwmon_power:
case hwmon_energy:
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* ✓ CI.KUnit: success for drm/xe/hwmon: Expose new temperature attributes (rev5)
2026-01-08 13:03 [PATCH v4 0/4] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
` (3 preceding siblings ...)
2026-01-08 13:03 ` [PATCH v4 4/4] drm/xe/hwmon: Expose individual vram channel temperature Karthik Poosa
@ 2026-01-08 13:20 ` Patchwork
2026-01-08 13:58 ` ✓ Xe.CI.BAT: " Patchwork
2026-01-08 19:02 ` ✓ Xe.CI.Full: " Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-01-08 13:20 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe
== Series Details ==
Series: drm/xe/hwmon: Expose new temperature attributes (rev5)
URL : https://patchwork.freedesktop.org/series/158384/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:19:05] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:19:09] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[13:19:48] Starting KUnit Kernel (1/1)...
[13:19:48] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:19:48] ================== guc_buf (11 subtests) ===================
[13:19:48] [PASSED] test_smallest
[13:19:48] [PASSED] test_largest
[13:19:48] [PASSED] test_granular
[13:19:48] [PASSED] test_unique
[13:19:48] [PASSED] test_overlap
[13:19:48] [PASSED] test_reusable
[13:19:48] [PASSED] test_too_big
[13:19:48] [PASSED] test_flush
[13:19:48] [PASSED] test_lookup
[13:19:48] [PASSED] test_data
[13:19:48] [PASSED] test_class
[13:19:48] ===================== [PASSED] guc_buf =====================
[13:19:48] =================== guc_dbm (7 subtests) ===================
[13:19:48] [PASSED] test_empty
[13:19:48] [PASSED] test_default
[13:19:48] ======================== test_size ========================
[13:19:48] [PASSED] 4
[13:19:48] [PASSED] 8
[13:19:48] [PASSED] 32
[13:19:48] [PASSED] 256
[13:19:48] ==================== [PASSED] test_size ====================
[13:19:48] ======================= test_reuse ========================
[13:19:48] [PASSED] 4
[13:19:48] [PASSED] 8
[13:19:48] [PASSED] 32
[13:19:48] [PASSED] 256
[13:19:48] =================== [PASSED] test_reuse ====================
[13:19:48] =================== test_range_overlap ====================
[13:19:48] [PASSED] 4
[13:19:48] [PASSED] 8
[13:19:48] [PASSED] 32
[13:19:48] [PASSED] 256
[13:19:48] =============== [PASSED] test_range_overlap ================
[13:19:48] =================== test_range_compact ====================
[13:19:48] [PASSED] 4
[13:19:48] [PASSED] 8
[13:19:48] [PASSED] 32
[13:19:48] [PASSED] 256
[13:19:48] =============== [PASSED] test_range_compact ================
[13:19:48] ==================== test_range_spare =====================
[13:19:48] [PASSED] 4
[13:19:48] [PASSED] 8
[13:19:48] [PASSED] 32
[13:19:48] [PASSED] 256
[13:19:48] ================ [PASSED] test_range_spare =================
[13:19:48] ===================== [PASSED] guc_dbm =====================
[13:19:48] =================== guc_idm (6 subtests) ===================
[13:19:48] [PASSED] bad_init
[13:19:48] [PASSED] no_init
[13:19:48] [PASSED] init_fini
[13:19:48] [PASSED] check_used
[13:19:48] [PASSED] check_quota
[13:19:48] [PASSED] check_all
[13:19:48] ===================== [PASSED] guc_idm =====================
[13:19:48] ================== no_relay (3 subtests) ===================
[13:19:48] [PASSED] xe_drops_guc2pf_if_not_ready
[13:19:48] [PASSED] xe_drops_guc2vf_if_not_ready
[13:19:48] [PASSED] xe_rejects_send_if_not_ready
[13:19:48] ==================== [PASSED] no_relay =====================
[13:19:48] ================== pf_relay (14 subtests) ==================
[13:19:48] [PASSED] pf_rejects_guc2pf_too_short
[13:19:48] [PASSED] pf_rejects_guc2pf_too_long
[13:19:48] [PASSED] pf_rejects_guc2pf_no_payload
[13:19:48] [PASSED] pf_fails_no_payload
[13:19:48] [PASSED] pf_fails_bad_origin
[13:19:48] [PASSED] pf_fails_bad_type
[13:19:48] [PASSED] pf_txn_reports_error
[13:19:48] [PASSED] pf_txn_sends_pf2guc
[13:19:48] [PASSED] pf_sends_pf2guc
[13:19:48] [SKIPPED] pf_loopback_nop
[13:19:48] [SKIPPED] pf_loopback_echo
[13:19:48] [SKIPPED] pf_loopback_fail
[13:19:48] [SKIPPED] pf_loopback_busy
[13:19:48] [SKIPPED] pf_loopback_retry
[13:19:48] ==================== [PASSED] pf_relay =====================
[13:19:48] ================== vf_relay (3 subtests) ===================
[13:19:48] [PASSED] vf_rejects_guc2vf_too_short
[13:19:48] [PASSED] vf_rejects_guc2vf_too_long
[13:19:48] [PASSED] vf_rejects_guc2vf_no_payload
[13:19:48] ==================== [PASSED] vf_relay =====================
[13:19:48] ================ pf_gt_config (6 subtests) =================
[13:19:48] [PASSED] fair_contexts_1vf
[13:19:48] [PASSED] fair_doorbells_1vf
[13:19:48] [PASSED] fair_ggtt_1vf
[13:19:48] ====================== fair_contexts ======================
[13:19:48] [PASSED] 1 VF
[13:19:48] [PASSED] 2 VFs
[13:19:48] [PASSED] 3 VFs
[13:19:48] [PASSED] 4 VFs
[13:19:48] [PASSED] 5 VFs
[13:19:48] [PASSED] 6 VFs
[13:19:48] [PASSED] 7 VFs
[13:19:48] [PASSED] 8 VFs
[13:19:48] [PASSED] 9 VFs
[13:19:48] [PASSED] 10 VFs
[13:19:48] [PASSED] 11 VFs
[13:19:48] [PASSED] 12 VFs
[13:19:48] [PASSED] 13 VFs
[13:19:48] [PASSED] 14 VFs
[13:19:48] [PASSED] 15 VFs
[13:19:48] [PASSED] 16 VFs
[13:19:48] [PASSED] 17 VFs
[13:19:48] [PASSED] 18 VFs
[13:19:48] [PASSED] 19 VFs
[13:19:48] [PASSED] 20 VFs
[13:19:49] [PASSED] 21 VFs
[13:19:49] [PASSED] 22 VFs
[13:19:49] [PASSED] 23 VFs
[13:19:49] [PASSED] 24 VFs
[13:19:49] [PASSED] 25 VFs
[13:19:49] [PASSED] 26 VFs
[13:19:49] [PASSED] 27 VFs
[13:19:49] [PASSED] 28 VFs
[13:19:49] [PASSED] 29 VFs
[13:19:49] [PASSED] 30 VFs
[13:19:49] [PASSED] 31 VFs
[13:19:49] [PASSED] 32 VFs
[13:19:49] [PASSED] 33 VFs
[13:19:49] [PASSED] 34 VFs
[13:19:49] [PASSED] 35 VFs
[13:19:49] [PASSED] 36 VFs
[13:19:49] [PASSED] 37 VFs
[13:19:49] [PASSED] 38 VFs
[13:19:49] [PASSED] 39 VFs
[13:19:49] [PASSED] 40 VFs
[13:19:49] [PASSED] 41 VFs
[13:19:49] [PASSED] 42 VFs
[13:19:49] [PASSED] 43 VFs
[13:19:49] [PASSED] 44 VFs
[13:19:49] [PASSED] 45 VFs
[13:19:49] [PASSED] 46 VFs
[13:19:49] [PASSED] 47 VFs
[13:19:49] [PASSED] 48 VFs
[13:19:49] [PASSED] 49 VFs
[13:19:49] [PASSED] 50 VFs
[13:19:49] [PASSED] 51 VFs
[13:19:49] [PASSED] 52 VFs
[13:19:49] [PASSED] 53 VFs
[13:19:49] [PASSED] 54 VFs
[13:19:49] [PASSED] 55 VFs
[13:19:49] [PASSED] 56 VFs
[13:19:49] [PASSED] 57 VFs
[13:19:49] [PASSED] 58 VFs
[13:19:49] [PASSED] 59 VFs
[13:19:49] [PASSED] 60 VFs
[13:19:49] [PASSED] 61 VFs
[13:19:49] [PASSED] 62 VFs
[13:19:49] [PASSED] 63 VFs
[13:19:49] ================== [PASSED] fair_contexts ==================
[13:19:49] ===================== fair_doorbells ======================
[13:19:49] [PASSED] 1 VF
[13:19:49] [PASSED] 2 VFs
[13:19:49] [PASSED] 3 VFs
[13:19:49] [PASSED] 4 VFs
[13:19:49] [PASSED] 5 VFs
[13:19:49] [PASSED] 6 VFs
[13:19:49] [PASSED] 7 VFs
[13:19:49] [PASSED] 8 VFs
[13:19:49] [PASSED] 9 VFs
[13:19:49] [PASSED] 10 VFs
[13:19:49] [PASSED] 11 VFs
[13:19:49] [PASSED] 12 VFs
[13:19:49] [PASSED] 13 VFs
[13:19:49] [PASSED] 14 VFs
[13:19:49] [PASSED] 15 VFs
[13:19:49] [PASSED] 16 VFs
[13:19:49] [PASSED] 17 VFs
[13:19:49] [PASSED] 18 VFs
[13:19:49] [PASSED] 19 VFs
[13:19:49] [PASSED] 20 VFs
[13:19:49] [PASSED] 21 VFs
[13:19:49] [PASSED] 22 VFs
[13:19:49] [PASSED] 23 VFs
[13:19:49] [PASSED] 24 VFs
[13:19:49] [PASSED] 25 VFs
[13:19:49] [PASSED] 26 VFs
[13:19:49] [PASSED] 27 VFs
[13:19:49] [PASSED] 28 VFs
[13:19:49] [PASSED] 29 VFs
[13:19:49] [PASSED] 30 VFs
[13:19:49] [PASSED] 31 VFs
[13:19:49] [PASSED] 32 VFs
[13:19:49] [PASSED] 33 VFs
[13:19:49] [PASSED] 34 VFs
[13:19:49] [PASSED] 35 VFs
[13:19:49] [PASSED] 36 VFs
[13:19:49] [PASSED] 37 VFs
[13:19:49] [PASSED] 38 VFs
[13:19:49] [PASSED] 39 VFs
[13:19:49] [PASSED] 40 VFs
[13:19:49] [PASSED] 41 VFs
[13:19:49] [PASSED] 42 VFs
[13:19:49] [PASSED] 43 VFs
[13:19:49] [PASSED] 44 VFs
[13:19:49] [PASSED] 45 VFs
[13:19:49] [PASSED] 46 VFs
[13:19:49] [PASSED] 47 VFs
[13:19:49] [PASSED] 48 VFs
[13:19:49] [PASSED] 49 VFs
[13:19:49] [PASSED] 50 VFs
[13:19:49] [PASSED] 51 VFs
[13:19:49] [PASSED] 52 VFs
[13:19:49] [PASSED] 53 VFs
[13:19:49] [PASSED] 54 VFs
[13:19:49] [PASSED] 55 VFs
[13:19:49] [PASSED] 56 VFs
[13:19:49] [PASSED] 57 VFs
[13:19:49] [PASSED] 58 VFs
[13:19:49] [PASSED] 59 VFs
[13:19:49] [PASSED] 60 VFs
[13:19:49] [PASSED] 61 VFs
[13:19:49] [PASSED] 62 VFs
[13:19:49] [PASSED] 63 VFs
[13:19:49] ================= [PASSED] fair_doorbells ==================
[13:19:49] ======================== fair_ggtt ========================
[13:19:49] [PASSED] 1 VF
[13:19:49] [PASSED] 2 VFs
[13:19:49] [PASSED] 3 VFs
[13:19:49] [PASSED] 4 VFs
[13:19:49] [PASSED] 5 VFs
[13:19:49] [PASSED] 6 VFs
[13:19:49] [PASSED] 7 VFs
[13:19:49] [PASSED] 8 VFs
[13:19:49] [PASSED] 9 VFs
[13:19:49] [PASSED] 10 VFs
[13:19:49] [PASSED] 11 VFs
[13:19:49] [PASSED] 12 VFs
[13:19:49] [PASSED] 13 VFs
[13:19:49] [PASSED] 14 VFs
[13:19:49] [PASSED] 15 VFs
[13:19:49] [PASSED] 16 VFs
[13:19:49] [PASSED] 17 VFs
[13:19:49] [PASSED] 18 VFs
[13:19:49] [PASSED] 19 VFs
[13:19:49] [PASSED] 20 VFs
[13:19:49] [PASSED] 21 VFs
[13:19:49] [PASSED] 22 VFs
[13:19:49] [PASSED] 23 VFs
[13:19:49] [PASSED] 24 VFs
[13:19:49] [PASSED] 25 VFs
[13:19:49] [PASSED] 26 VFs
[13:19:49] [PASSED] 27 VFs
[13:19:49] [PASSED] 28 VFs
[13:19:49] [PASSED] 29 VFs
[13:19:49] [PASSED] 30 VFs
[13:19:49] [PASSED] 31 VFs
[13:19:49] [PASSED] 32 VFs
[13:19:49] [PASSED] 33 VFs
[13:19:49] [PASSED] 34 VFs
[13:19:49] [PASSED] 35 VFs
[13:19:49] [PASSED] 36 VFs
[13:19:49] [PASSED] 37 VFs
[13:19:49] [PASSED] 38 VFs
[13:19:49] [PASSED] 39 VFs
[13:19:49] [PASSED] 40 VFs
[13:19:49] [PASSED] 41 VFs
[13:19:49] [PASSED] 42 VFs
[13:19:49] [PASSED] 43 VFs
[13:19:49] [PASSED] 44 VFs
[13:19:49] [PASSED] 45 VFs
[13:19:49] [PASSED] 46 VFs
[13:19:49] [PASSED] 47 VFs
[13:19:49] [PASSED] 48 VFs
[13:19:49] [PASSED] 49 VFs
[13:19:49] [PASSED] 50 VFs
[13:19:49] [PASSED] 51 VFs
[13:19:49] [PASSED] 52 VFs
[13:19:49] [PASSED] 53 VFs
[13:19:49] [PASSED] 54 VFs
[13:19:49] [PASSED] 55 VFs
[13:19:49] [PASSED] 56 VFs
[13:19:49] [PASSED] 57 VFs
[13:19:49] [PASSED] 58 VFs
[13:19:49] [PASSED] 59 VFs
[13:19:49] [PASSED] 60 VFs
[13:19:49] [PASSED] 61 VFs
[13:19:49] [PASSED] 62 VFs
[13:19:49] [PASSED] 63 VFs
[13:19:49] ==================== [PASSED] fair_ggtt ====================
[13:19:49] ================== [PASSED] pf_gt_config ===================
[13:19:49] ===================== lmtt (1 subtest) =====================
[13:19:49] ======================== test_ops =========================
[13:19:49] [PASSED] 2-level
[13:19:49] [PASSED] multi-level
[13:19:49] ==================== [PASSED] test_ops =====================
[13:19:49] ====================== [PASSED] lmtt =======================
[13:19:49] ================= pf_service (11 subtests) =================
[13:19:49] [PASSED] pf_negotiate_any
[13:19:49] [PASSED] pf_negotiate_base_match
[13:19:49] [PASSED] pf_negotiate_base_newer
[13:19:49] [PASSED] pf_negotiate_base_next
[13:19:49] [SKIPPED] pf_negotiate_base_older
[13:19:49] [PASSED] pf_negotiate_base_prev
[13:19:49] [PASSED] pf_negotiate_latest_match
[13:19:49] [PASSED] pf_negotiate_latest_newer
[13:19:49] [PASSED] pf_negotiate_latest_next
[13:19:49] [SKIPPED] pf_negotiate_latest_older
[13:19:49] [SKIPPED] pf_negotiate_latest_prev
[13:19:49] =================== [PASSED] pf_service ====================
[13:19:49] ================= xe_guc_g2g (2 subtests) ==================
[13:19:49] ============== xe_live_guc_g2g_kunit_default ==============
[13:19:49] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[13:19:49] ============== xe_live_guc_g2g_kunit_allmem ===============
[13:19:49] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[13:19:49] =================== [SKIPPED] xe_guc_g2g ===================
[13:19:49] =================== xe_mocs (2 subtests) ===================
[13:19:49] ================ xe_live_mocs_kernel_kunit ================
[13:19:49] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:19:49] ================ xe_live_mocs_reset_kunit =================
[13:19:49] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:19:49] ==================== [SKIPPED] xe_mocs =====================
[13:19:49] ================= xe_migrate (2 subtests) ==================
[13:19:49] ================= xe_migrate_sanity_kunit =================
[13:19:49] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:19:49] ================== xe_validate_ccs_kunit ==================
[13:19:49] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:19:49] =================== [SKIPPED] xe_migrate ===================
[13:19:49] ================== xe_dma_buf (1 subtest) ==================
[13:19:49] ==================== xe_dma_buf_kunit =====================
[13:19:49] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:19:49] =================== [SKIPPED] xe_dma_buf ===================
[13:19:49] ================= xe_bo_shrink (1 subtest) =================
[13:19:49] =================== xe_bo_shrink_kunit ====================
[13:19:49] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:19:49] ================== [SKIPPED] xe_bo_shrink ==================
[13:19:49] ==================== xe_bo (2 subtests) ====================
[13:19:49] ================== xe_ccs_migrate_kunit ===================
[13:19:49] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:19:49] ==================== xe_bo_evict_kunit ====================
[13:19:49] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:19:49] ===================== [SKIPPED] xe_bo ======================
[13:19:49] ==================== args (13 subtests) ====================
[13:19:49] [PASSED] count_args_test
[13:19:49] [PASSED] call_args_example
[13:19:49] [PASSED] call_args_test
[13:19:49] [PASSED] drop_first_arg_example
[13:19:49] [PASSED] drop_first_arg_test
[13:19:49] [PASSED] first_arg_example
[13:19:49] [PASSED] first_arg_test
[13:19:49] [PASSED] last_arg_example
[13:19:49] [PASSED] last_arg_test
[13:19:49] [PASSED] pick_arg_example
[13:19:49] [PASSED] if_args_example
[13:19:49] [PASSED] if_args_test
[13:19:49] [PASSED] sep_comma_example
[13:19:49] ====================== [PASSED] args =======================
[13:19:49] =================== xe_pci (3 subtests) ====================
[13:19:49] ==================== check_graphics_ip ====================
[13:19:49] [PASSED] 12.00 Xe_LP
[13:19:49] [PASSED] 12.10 Xe_LP+
[13:19:49] [PASSED] 12.55 Xe_HPG
[13:19:49] [PASSED] 12.60 Xe_HPC
[13:19:49] [PASSED] 12.70 Xe_LPG
[13:19:49] [PASSED] 12.71 Xe_LPG
[13:19:49] [PASSED] 12.74 Xe_LPG+
[13:19:49] [PASSED] 20.01 Xe2_HPG
[13:19:49] [PASSED] 20.02 Xe2_HPG
[13:19:49] [PASSED] 20.04 Xe2_LPG
[13:19:49] [PASSED] 30.00 Xe3_LPG
[13:19:49] [PASSED] 30.01 Xe3_LPG
[13:19:49] [PASSED] 30.03 Xe3_LPG
[13:19:49] [PASSED] 30.04 Xe3_LPG
[13:19:49] [PASSED] 30.05 Xe3_LPG
[13:19:49] [PASSED] 35.11 Xe3p_XPC
[13:19:49] ================ [PASSED] check_graphics_ip ================
[13:19:49] ===================== check_media_ip ======================
[13:19:49] [PASSED] 12.00 Xe_M
[13:19:49] [PASSED] 12.55 Xe_HPM
[13:19:49] [PASSED] 13.00 Xe_LPM+
[13:19:49] [PASSED] 13.01 Xe2_HPM
[13:19:49] [PASSED] 20.00 Xe2_LPM
[13:19:49] [PASSED] 30.00 Xe3_LPM
[13:19:49] [PASSED] 30.02 Xe3_LPM
[13:19:49] [PASSED] 35.00 Xe3p_LPM
[13:19:49] [PASSED] 35.03 Xe3p_HPM
[13:19:49] ================= [PASSED] check_media_ip ==================
[13:19:49] =================== check_platform_desc ===================
[13:19:49] [PASSED] 0x9A60 (TIGERLAKE)
[13:19:49] [PASSED] 0x9A68 (TIGERLAKE)
[13:19:49] [PASSED] 0x9A70 (TIGERLAKE)
[13:19:49] [PASSED] 0x9A40 (TIGERLAKE)
[13:19:49] [PASSED] 0x9A49 (TIGERLAKE)
[13:19:49] [PASSED] 0x9A59 (TIGERLAKE)
[13:19:49] [PASSED] 0x9A78 (TIGERLAKE)
[13:19:49] [PASSED] 0x9AC0 (TIGERLAKE)
[13:19:49] [PASSED] 0x9AC9 (TIGERLAKE)
[13:19:49] [PASSED] 0x9AD9 (TIGERLAKE)
[13:19:49] [PASSED] 0x9AF8 (TIGERLAKE)
[13:19:49] [PASSED] 0x4C80 (ROCKETLAKE)
[13:19:49] [PASSED] 0x4C8A (ROCKETLAKE)
[13:19:49] [PASSED] 0x4C8B (ROCKETLAKE)
[13:19:49] [PASSED] 0x4C8C (ROCKETLAKE)
[13:19:49] [PASSED] 0x4C90 (ROCKETLAKE)
[13:19:49] [PASSED] 0x4C9A (ROCKETLAKE)
[13:19:49] [PASSED] 0x4680 (ALDERLAKE_S)
[13:19:49] [PASSED] 0x4682 (ALDERLAKE_S)
[13:19:49] [PASSED] 0x4688 (ALDERLAKE_S)
[13:19:49] [PASSED] 0x468A (ALDERLAKE_S)
[13:19:49] [PASSED] 0x468B (ALDERLAKE_S)
[13:19:49] [PASSED] 0x4690 (ALDERLAKE_S)
[13:19:49] [PASSED] 0x4692 (ALDERLAKE_S)
[13:19:49] [PASSED] 0x4693 (ALDERLAKE_S)
[13:19:49] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46AA (ALDERLAKE_P)
[13:19:49] [PASSED] 0x462A (ALDERLAKE_P)
[13:19:49] [PASSED] 0x4626 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x4628 (ALDERLAKE_P)
stty: 'standard input': Inappropriate ioctl for device
[13:19:49] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:19:49] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:19:49] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:19:49] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:19:49] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:19:49] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:19:49] [PASSED] 0xA721 (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA720 (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:19:49] [PASSED] 0xA780 (ALDERLAKE_S)
[13:19:49] [PASSED] 0xA781 (ALDERLAKE_S)
[13:19:49] [PASSED] 0xA782 (ALDERLAKE_S)
[13:19:49] [PASSED] 0xA783 (ALDERLAKE_S)
[13:19:49] [PASSED] 0xA788 (ALDERLAKE_S)
[13:19:49] [PASSED] 0xA789 (ALDERLAKE_S)
[13:19:49] [PASSED] 0xA78A (ALDERLAKE_S)
[13:19:49] [PASSED] 0xA78B (ALDERLAKE_S)
[13:19:49] [PASSED] 0x4905 (DG1)
[13:19:49] [PASSED] 0x4906 (DG1)
[13:19:49] [PASSED] 0x4907 (DG1)
[13:19:49] [PASSED] 0x4908 (DG1)
[13:19:49] [PASSED] 0x4909 (DG1)
[13:19:49] [PASSED] 0x56C0 (DG2)
[13:19:49] [PASSED] 0x56C2 (DG2)
[13:19:49] [PASSED] 0x56C1 (DG2)
[13:19:49] [PASSED] 0x7D51 (METEORLAKE)
[13:19:49] [PASSED] 0x7DD1 (METEORLAKE)
[13:19:49] [PASSED] 0x7D41 (METEORLAKE)
[13:19:49] [PASSED] 0x7D67 (METEORLAKE)
[13:19:49] [PASSED] 0xB640 (METEORLAKE)
[13:19:49] [PASSED] 0x56A0 (DG2)
[13:19:49] [PASSED] 0x56A1 (DG2)
[13:19:49] [PASSED] 0x56A2 (DG2)
[13:19:49] [PASSED] 0x56BE (DG2)
[13:19:49] [PASSED] 0x56BF (DG2)
[13:19:49] [PASSED] 0x5690 (DG2)
[13:19:49] [PASSED] 0x5691 (DG2)
[13:19:49] [PASSED] 0x5692 (DG2)
[13:19:49] [PASSED] 0x56A5 (DG2)
[13:19:49] [PASSED] 0x56A6 (DG2)
[13:19:49] [PASSED] 0x56B0 (DG2)
[13:19:49] [PASSED] 0x56B1 (DG2)
[13:19:49] [PASSED] 0x56BA (DG2)
[13:19:49] [PASSED] 0x56BB (DG2)
[13:19:49] [PASSED] 0x56BC (DG2)
[13:19:49] [PASSED] 0x56BD (DG2)
[13:19:49] [PASSED] 0x5693 (DG2)
[13:19:49] [PASSED] 0x5694 (DG2)
[13:19:49] [PASSED] 0x5695 (DG2)
[13:19:49] [PASSED] 0x56A3 (DG2)
[13:19:49] [PASSED] 0x56A4 (DG2)
[13:19:49] [PASSED] 0x56B2 (DG2)
[13:19:49] [PASSED] 0x56B3 (DG2)
[13:19:49] [PASSED] 0x5696 (DG2)
[13:19:49] [PASSED] 0x5697 (DG2)
[13:19:49] [PASSED] 0xB69 (PVC)
[13:19:49] [PASSED] 0xB6E (PVC)
[13:19:49] [PASSED] 0xBD4 (PVC)
[13:19:49] [PASSED] 0xBD5 (PVC)
[13:19:49] [PASSED] 0xBD6 (PVC)
[13:19:49] [PASSED] 0xBD7 (PVC)
[13:19:49] [PASSED] 0xBD8 (PVC)
[13:19:49] [PASSED] 0xBD9 (PVC)
[13:19:49] [PASSED] 0xBDA (PVC)
[13:19:49] [PASSED] 0xBDB (PVC)
[13:19:49] [PASSED] 0xBE0 (PVC)
[13:19:49] [PASSED] 0xBE1 (PVC)
[13:19:49] [PASSED] 0xBE5 (PVC)
[13:19:49] [PASSED] 0x7D40 (METEORLAKE)
[13:19:49] [PASSED] 0x7D45 (METEORLAKE)
[13:19:49] [PASSED] 0x7D55 (METEORLAKE)
[13:19:49] [PASSED] 0x7D60 (METEORLAKE)
[13:19:49] [PASSED] 0x7DD5 (METEORLAKE)
[13:19:49] [PASSED] 0x6420 (LUNARLAKE)
[13:19:49] [PASSED] 0x64A0 (LUNARLAKE)
[13:19:49] [PASSED] 0x64B0 (LUNARLAKE)
[13:19:49] [PASSED] 0xE202 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE209 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE20B (BATTLEMAGE)
[13:19:49] [PASSED] 0xE20C (BATTLEMAGE)
[13:19:49] [PASSED] 0xE20D (BATTLEMAGE)
[13:19:49] [PASSED] 0xE210 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE211 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE212 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE216 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE220 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE221 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE222 (BATTLEMAGE)
[13:19:49] [PASSED] 0xE223 (BATTLEMAGE)
[13:19:49] [PASSED] 0xB080 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB081 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB082 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB083 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB084 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB085 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB086 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB087 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB08F (PANTHERLAKE)
[13:19:49] [PASSED] 0xB090 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:19:49] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:19:49] [PASSED] 0xFD80 (PANTHERLAKE)
[13:19:49] [PASSED] 0xFD81 (PANTHERLAKE)
[13:19:49] [PASSED] 0xD740 (NOVALAKE_S)
[13:19:49] [PASSED] 0xD741 (NOVALAKE_S)
[13:19:49] [PASSED] 0xD742 (NOVALAKE_S)
[13:19:49] [PASSED] 0xD743 (NOVALAKE_S)
[13:19:49] [PASSED] 0xD744 (NOVALAKE_S)
[13:19:49] [PASSED] 0xD745 (NOVALAKE_S)
[13:19:49] [PASSED] 0x674C (CRESCENTISLAND)
[13:19:49] =============== [PASSED] check_platform_desc ===============
[13:19:49] ===================== [PASSED] xe_pci ======================
[13:19:49] =================== xe_rtp (2 subtests) ====================
[13:19:49] =============== xe_rtp_process_to_sr_tests ================
[13:19:49] [PASSED] coalesce-same-reg
[13:19:49] [PASSED] no-match-no-add
[13:19:49] [PASSED] match-or
[13:19:49] [PASSED] match-or-xfail
[13:19:49] [PASSED] no-match-no-add-multiple-rules
[13:19:49] [PASSED] two-regs-two-entries
[13:19:49] [PASSED] clr-one-set-other
[13:19:49] [PASSED] set-field
[13:19:49] [PASSED] conflict-duplicate
[13:19:49] [PASSED] conflict-not-disjoint
[13:19:49] [PASSED] conflict-reg-type
[13:19:49] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:19:49] ================== xe_rtp_process_tests ===================
[13:19:49] [PASSED] active1
[13:19:49] [PASSED] active2
[13:19:49] [PASSED] active-inactive
[13:19:49] [PASSED] inactive-active
[13:19:49] [PASSED] inactive-1st_or_active-inactive
[13:19:49] [PASSED] inactive-2nd_or_active-inactive
[13:19:49] [PASSED] inactive-last_or_active-inactive
[13:19:49] [PASSED] inactive-no_or_active-inactive
[13:19:49] ============== [PASSED] xe_rtp_process_tests ===============
[13:19:49] ===================== [PASSED] xe_rtp ======================
[13:19:49] ==================== xe_wa (1 subtest) =====================
[13:19:49] ======================== xe_wa_gt =========================
[13:19:49] [PASSED] TIGERLAKE B0
[13:19:49] [PASSED] DG1 A0
[13:19:49] [PASSED] DG1 B0
[13:19:49] [PASSED] ALDERLAKE_S A0
[13:19:49] [PASSED] ALDERLAKE_S B0
[13:19:49] [PASSED] ALDERLAKE_S C0
[13:19:49] [PASSED] ALDERLAKE_S D0
[13:19:49] [PASSED] ALDERLAKE_P A0
[13:19:49] [PASSED] ALDERLAKE_P B0
[13:19:49] [PASSED] ALDERLAKE_P C0
[13:19:49] [PASSED] ALDERLAKE_S RPLS D0
[13:19:49] [PASSED] ALDERLAKE_P RPLU E0
[13:19:49] [PASSED] DG2 G10 C0
[13:19:49] [PASSED] DG2 G11 B1
[13:19:49] [PASSED] DG2 G12 A1
[13:19:49] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:19:49] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[13:19:49] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[13:19:49] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[13:19:49] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[13:19:49] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[13:19:49] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[13:19:49] ==================== [PASSED] xe_wa_gt =====================
[13:19:49] ====================== [PASSED] xe_wa ======================
[13:19:49] ============================================================
[13:19:49] Testing complete. Ran 512 tests: passed: 494, skipped: 18
[13:19:49] Elapsed time: 43.815s total, 4.275s configuring, 39.023s building, 0.489s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:19:49] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:19:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[13:20:21] Starting KUnit Kernel (1/1)...
[13:20:21] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:20:21] ============ drm_test_pick_cmdline (2 subtests) ============
[13:20:21] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[13:20:21] =============== drm_test_pick_cmdline_named ===============
[13:20:21] [PASSED] NTSC
[13:20:21] [PASSED] NTSC-J
[13:20:21] [PASSED] PAL
[13:20:21] [PASSED] PAL-M
[13:20:21] =========== [PASSED] drm_test_pick_cmdline_named ===========
[13:20:21] ============== [PASSED] drm_test_pick_cmdline ==============
[13:20:21] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[13:20:21] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[13:20:21] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[13:20:21] =========== drm_validate_clone_mode (2 subtests) ===========
[13:20:21] ============== drm_test_check_in_clone_mode ===============
[13:20:21] [PASSED] in_clone_mode
[13:20:21] [PASSED] not_in_clone_mode
[13:20:21] ========== [PASSED] drm_test_check_in_clone_mode ===========
[13:20:21] =============== drm_test_check_valid_clones ===============
[13:20:21] [PASSED] not_in_clone_mode
[13:20:21] [PASSED] valid_clone
[13:20:21] [PASSED] invalid_clone
[13:20:21] =========== [PASSED] drm_test_check_valid_clones ===========
[13:20:21] ============= [PASSED] drm_validate_clone_mode =============
[13:20:21] ============= drm_validate_modeset (1 subtest) =============
[13:20:21] [PASSED] drm_test_check_connector_changed_modeset
[13:20:21] ============== [PASSED] drm_validate_modeset ===============
[13:20:21] ====== drm_test_bridge_get_current_state (2 subtests) ======
[13:20:21] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[13:20:21] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[13:20:21] ======== [PASSED] drm_test_bridge_get_current_state ========
[13:20:21] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[13:20:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[13:20:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[13:20:21] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[13:20:21] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[13:20:21] ============== drm_bridge_alloc (2 subtests) ===============
[13:20:21] [PASSED] drm_test_drm_bridge_alloc_basic
[13:20:21] [PASSED] drm_test_drm_bridge_alloc_get_put
[13:20:21] ================ [PASSED] drm_bridge_alloc =================
[13:20:21] ================== drm_buddy (8 subtests) ==================
[13:20:21] [PASSED] drm_test_buddy_alloc_limit
[13:20:21] [PASSED] drm_test_buddy_alloc_optimistic
[13:20:21] [PASSED] drm_test_buddy_alloc_pessimistic
[13:20:21] [PASSED] drm_test_buddy_alloc_pathological
[13:20:21] [PASSED] drm_test_buddy_alloc_contiguous
[13:20:21] [PASSED] drm_test_buddy_alloc_clear
[13:20:21] [PASSED] drm_test_buddy_alloc_range_bias
[13:20:22] [PASSED] drm_test_buddy_fragmentation_performance
[13:20:22] ==================== [PASSED] drm_buddy ====================
[13:20:22] ============= drm_cmdline_parser (40 subtests) =============
[13:20:22] [PASSED] drm_test_cmdline_force_d_only
[13:20:22] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:20:22] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:20:22] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:20:22] [PASSED] drm_test_cmdline_force_e_only
[13:20:22] [PASSED] drm_test_cmdline_res
[13:20:22] [PASSED] drm_test_cmdline_res_vesa
[13:20:22] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:20:22] [PASSED] drm_test_cmdline_res_rblank
[13:20:22] [PASSED] drm_test_cmdline_res_bpp
[13:20:22] [PASSED] drm_test_cmdline_res_refresh
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:20:22] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:20:22] [PASSED] drm_test_cmdline_res_margins_force_on
[13:20:22] [PASSED] drm_test_cmdline_res_vesa_margins
[13:20:22] [PASSED] drm_test_cmdline_name
[13:20:22] [PASSED] drm_test_cmdline_name_bpp
[13:20:22] [PASSED] drm_test_cmdline_name_option
[13:20:22] [PASSED] drm_test_cmdline_name_bpp_option
[13:20:22] [PASSED] drm_test_cmdline_rotate_0
[13:20:22] [PASSED] drm_test_cmdline_rotate_90
[13:20:22] [PASSED] drm_test_cmdline_rotate_180
[13:20:22] [PASSED] drm_test_cmdline_rotate_270
[13:20:22] [PASSED] drm_test_cmdline_hmirror
[13:20:22] [PASSED] drm_test_cmdline_vmirror
[13:20:22] [PASSED] drm_test_cmdline_margin_options
[13:20:22] [PASSED] drm_test_cmdline_multiple_options
[13:20:22] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:20:22] [PASSED] drm_test_cmdline_extra_and_option
[13:20:22] [PASSED] drm_test_cmdline_freestanding_options
[13:20:22] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:20:22] [PASSED] drm_test_cmdline_panel_orientation
[13:20:22] ================ drm_test_cmdline_invalid =================
[13:20:22] [PASSED] margin_only
[13:20:22] [PASSED] interlace_only
[13:20:22] [PASSED] res_missing_x
[13:20:22] [PASSED] res_missing_y
[13:20:22] [PASSED] res_bad_y
[13:20:22] [PASSED] res_missing_y_bpp
[13:20:22] [PASSED] res_bad_bpp
[13:20:22] [PASSED] res_bad_refresh
[13:20:22] [PASSED] res_bpp_refresh_force_on_off
[13:20:22] [PASSED] res_invalid_mode
[13:20:22] [PASSED] res_bpp_wrong_place_mode
[13:20:22] [PASSED] name_bpp_refresh
[13:20:22] [PASSED] name_refresh
[13:20:22] [PASSED] name_refresh_wrong_mode
[13:20:22] [PASSED] name_refresh_invalid_mode
[13:20:22] [PASSED] rotate_multiple
[13:20:22] [PASSED] rotate_invalid_val
[13:20:22] [PASSED] rotate_truncated
[13:20:22] [PASSED] invalid_option
[13:20:22] [PASSED] invalid_tv_option
[13:20:22] [PASSED] truncated_tv_option
[13:20:22] ============ [PASSED] drm_test_cmdline_invalid =============
[13:20:22] =============== drm_test_cmdline_tv_options ===============
[13:20:22] [PASSED] NTSC
[13:20:22] [PASSED] NTSC_443
[13:20:22] [PASSED] NTSC_J
[13:20:22] [PASSED] PAL
[13:20:22] [PASSED] PAL_M
[13:20:22] [PASSED] PAL_N
[13:20:22] [PASSED] SECAM
[13:20:22] [PASSED] MONO_525
[13:20:22] [PASSED] MONO_625
[13:20:22] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:20:22] =============== [PASSED] drm_cmdline_parser ================
[13:20:22] ========== drmm_connector_hdmi_init (20 subtests) ==========
[13:20:22] [PASSED] drm_test_connector_hdmi_init_valid
[13:20:22] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:20:22] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:20:22] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:20:22] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:20:22] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:20:22] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:20:22] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:20:22] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:20:22] [PASSED] supported_formats=0x9 yuv420_allowed=1
[13:20:22] [PASSED] supported_formats=0x9 yuv420_allowed=0
[13:20:22] [PASSED] supported_formats=0x3 yuv420_allowed=1
[13:20:22] [PASSED] supported_formats=0x3 yuv420_allowed=0
[13:20:22] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[13:20:22] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:20:22] [PASSED] drm_test_connector_hdmi_init_null_product
[13:20:22] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:20:22] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:20:22] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:20:22] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:20:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:20:22] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:20:22] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:20:22] ========= drm_test_connector_hdmi_init_type_valid =========
[13:20:22] [PASSED] HDMI-A
[13:20:22] [PASSED] HDMI-B
[13:20:22] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:20:22] ======== drm_test_connector_hdmi_init_type_invalid ========
[13:20:22] [PASSED] Unknown
[13:20:22] [PASSED] VGA
[13:20:22] [PASSED] DVI-I
[13:20:22] [PASSED] DVI-D
[13:20:22] [PASSED] DVI-A
[13:20:22] [PASSED] Composite
[13:20:22] [PASSED] SVIDEO
[13:20:22] [PASSED] LVDS
[13:20:22] [PASSED] Component
[13:20:22] [PASSED] DIN
[13:20:22] [PASSED] DP
[13:20:22] [PASSED] TV
[13:20:22] [PASSED] eDP
[13:20:22] [PASSED] Virtual
[13:20:22] [PASSED] DSI
[13:20:22] [PASSED] DPI
[13:20:22] [PASSED] Writeback
[13:20:22] [PASSED] SPI
[13:20:22] [PASSED] USB
[13:20:22] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:20:22] ============ [PASSED] drmm_connector_hdmi_init =============
[13:20:22] ============= drmm_connector_init (3 subtests) =============
[13:20:22] [PASSED] drm_test_drmm_connector_init
[13:20:22] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:20:22] ========= drm_test_drmm_connector_init_type_valid =========
[13:20:22] [PASSED] Unknown
[13:20:22] [PASSED] VGA
[13:20:22] [PASSED] DVI-I
[13:20:22] [PASSED] DVI-D
[13:20:22] [PASSED] DVI-A
[13:20:22] [PASSED] Composite
[13:20:22] [PASSED] SVIDEO
[13:20:22] [PASSED] LVDS
[13:20:22] [PASSED] Component
[13:20:22] [PASSED] DIN
[13:20:22] [PASSED] DP
[13:20:22] [PASSED] HDMI-A
[13:20:22] [PASSED] HDMI-B
[13:20:22] [PASSED] TV
[13:20:22] [PASSED] eDP
[13:20:22] [PASSED] Virtual
[13:20:22] [PASSED] DSI
[13:20:22] [PASSED] DPI
[13:20:22] [PASSED] Writeback
[13:20:22] [PASSED] SPI
[13:20:22] [PASSED] USB
[13:20:22] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:20:22] =============== [PASSED] drmm_connector_init ===============
[13:20:22] ========= drm_connector_dynamic_init (6 subtests) ==========
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_init
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_init_properties
[13:20:22] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[13:20:22] [PASSED] Unknown
[13:20:22] [PASSED] VGA
[13:20:22] [PASSED] DVI-I
[13:20:22] [PASSED] DVI-D
[13:20:22] [PASSED] DVI-A
[13:20:22] [PASSED] Composite
[13:20:22] [PASSED] SVIDEO
[13:20:22] [PASSED] LVDS
[13:20:22] [PASSED] Component
[13:20:22] [PASSED] DIN
[13:20:22] [PASSED] DP
[13:20:22] [PASSED] HDMI-A
[13:20:22] [PASSED] HDMI-B
[13:20:22] [PASSED] TV
[13:20:22] [PASSED] eDP
[13:20:22] [PASSED] Virtual
[13:20:22] [PASSED] DSI
[13:20:22] [PASSED] DPI
[13:20:22] [PASSED] Writeback
[13:20:22] [PASSED] SPI
[13:20:22] [PASSED] USB
[13:20:22] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[13:20:22] ======== drm_test_drm_connector_dynamic_init_name =========
[13:20:22] [PASSED] Unknown
[13:20:22] [PASSED] VGA
[13:20:22] [PASSED] DVI-I
[13:20:22] [PASSED] DVI-D
[13:20:22] [PASSED] DVI-A
[13:20:22] [PASSED] Composite
[13:20:22] [PASSED] SVIDEO
[13:20:22] [PASSED] LVDS
[13:20:22] [PASSED] Component
[13:20:22] [PASSED] DIN
[13:20:22] [PASSED] DP
[13:20:22] [PASSED] HDMI-A
[13:20:22] [PASSED] HDMI-B
[13:20:22] [PASSED] TV
[13:20:22] [PASSED] eDP
[13:20:22] [PASSED] Virtual
[13:20:22] [PASSED] DSI
[13:20:22] [PASSED] DPI
[13:20:22] [PASSED] Writeback
[13:20:22] [PASSED] SPI
[13:20:22] [PASSED] USB
[13:20:22] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[13:20:22] =========== [PASSED] drm_connector_dynamic_init ============
[13:20:22] ==== drm_connector_dynamic_register_early (4 subtests) =====
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[13:20:22] ====== [PASSED] drm_connector_dynamic_register_early =======
[13:20:22] ======= drm_connector_dynamic_register (7 subtests) ========
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[13:20:22] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[13:20:22] ========= [PASSED] drm_connector_dynamic_register ==========
[13:20:22] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:20:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:20:22] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:20:22] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:20:22] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:20:22] ========== drm_test_get_tv_mode_from_name_valid ===========
[13:20:22] [PASSED] NTSC
[13:20:22] [PASSED] NTSC-443
[13:20:22] [PASSED] NTSC-J
[13:20:22] [PASSED] PAL
[13:20:22] [PASSED] PAL-M
[13:20:22] [PASSED] PAL-N
[13:20:22] [PASSED] SECAM
[13:20:22] [PASSED] Mono
[13:20:22] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:20:22] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:20:22] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:20:22] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:20:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:20:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:20:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:20:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:20:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:20:22] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:20:22] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[13:20:22] [PASSED] VIC 96
[13:20:22] [PASSED] VIC 97
[13:20:22] [PASSED] VIC 101
[13:20:22] [PASSED] VIC 102
[13:20:22] [PASSED] VIC 106
[13:20:22] [PASSED] VIC 107
[13:20:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:20:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:20:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:20:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:20:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:20:22] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:20:22] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:20:22] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:20:22] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[13:20:22] [PASSED] Automatic
[13:20:22] [PASSED] Full
[13:20:22] [PASSED] Limited 16:235
[13:20:22] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:20:22] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:20:22] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:20:22] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:20:22] === drm_test_drm_hdmi_connector_get_output_format_name ====
[13:20:22] [PASSED] RGB
[13:20:22] [PASSED] YUV 4:2:0
[13:20:22] [PASSED] YUV 4:2:2
[13:20:22] [PASSED] YUV 4:4:4
[13:20:22] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:20:22] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:20:22] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:20:22] ============= drm_damage_helper (21 subtests) ==============
[13:20:22] [PASSED] drm_test_damage_iter_no_damage
[13:20:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:20:22] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:20:22] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:20:22] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:20:22] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:20:22] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:20:22] [PASSED] drm_test_damage_iter_simple_damage
[13:20:22] [PASSED] drm_test_damage_iter_single_damage
[13:20:22] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:20:22] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:20:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:20:22] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:20:22] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:20:22] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:20:22] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:20:22] [PASSED] drm_test_damage_iter_damage
[13:20:22] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:20:22] [PASSED] drm_test_damage_iter_damage_one_outside
[13:20:22] [PASSED] drm_test_damage_iter_damage_src_moved
[13:20:22] [PASSED] drm_test_damage_iter_damage_not_visible
[13:20:22] ================ [PASSED] drm_damage_helper ================
[13:20:22] ============== drm_dp_mst_helper (3 subtests) ==============
[13:20:22] ============== drm_test_dp_mst_calc_pbn_mode ==============
[13:20:22] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:20:22] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:20:22] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:20:22] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:20:22] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:20:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:20:22] ============== drm_test_dp_mst_calc_pbn_div ===============
[13:20:22] [PASSED] Link rate 2000000 lane count 4
[13:20:22] [PASSED] Link rate 2000000 lane count 2
[13:20:22] [PASSED] Link rate 2000000 lane count 1
[13:20:22] [PASSED] Link rate 1350000 lane count 4
[13:20:22] [PASSED] Link rate 1350000 lane count 2
[13:20:22] [PASSED] Link rate 1350000 lane count 1
[13:20:22] [PASSED] Link rate 1000000 lane count 4
[13:20:22] [PASSED] Link rate 1000000 lane count 2
[13:20:22] [PASSED] Link rate 1000000 lane count 1
[13:20:22] [PASSED] Link rate 810000 lane count 4
[13:20:22] [PASSED] Link rate 810000 lane count 2
[13:20:22] [PASSED] Link rate 810000 lane count 1
[13:20:22] [PASSED] Link rate 540000 lane count 4
[13:20:22] [PASSED] Link rate 540000 lane count 2
[13:20:22] [PASSED] Link rate 540000 lane count 1
[13:20:22] [PASSED] Link rate 270000 lane count 4
[13:20:22] [PASSED] Link rate 270000 lane count 2
[13:20:22] [PASSED] Link rate 270000 lane count 1
[13:20:22] [PASSED] Link rate 162000 lane count 4
[13:20:22] [PASSED] Link rate 162000 lane count 2
[13:20:22] [PASSED] Link rate 162000 lane count 1
[13:20:22] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:20:22] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[13:20:22] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:20:22] [PASSED] DP_POWER_UP_PHY with port number
[13:20:22] [PASSED] DP_POWER_DOWN_PHY with port number
[13:20:22] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:20:22] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:20:22] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:20:22] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:20:22] [PASSED] DP_QUERY_PAYLOAD with port number
[13:20:22] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:20:22] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:20:22] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:20:22] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:20:22] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:20:22] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:20:22] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:20:22] [PASSED] DP_REMOTE_I2C_READ with port number
[13:20:22] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:20:22] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:20:22] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:20:22] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:20:22] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:20:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:20:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:20:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:20:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:20:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:20:22] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:20:22] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:20:22] ================ [PASSED] drm_dp_mst_helper ================
[13:20:22] ================== drm_exec (7 subtests) ===================
[13:20:22] [PASSED] sanitycheck
[13:20:22] [PASSED] test_lock
[13:20:22] [PASSED] test_lock_unlock
[13:20:22] [PASSED] test_duplicates
[13:20:22] [PASSED] test_prepare
[13:20:22] [PASSED] test_prepare_array
[13:20:22] [PASSED] test_multiple_loops
[13:20:22] ==================== [PASSED] drm_exec =====================
[13:20:22] =========== drm_format_helper_test (17 subtests) ===========
[13:20:22] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:20:22] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:20:22] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:20:22] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:20:22] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:20:22] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:20:22] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:20:22] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[13:20:22] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:20:22] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:20:22] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:20:22] ============== drm_test_fb_xrgb8888_to_mono ===============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:20:22] ==================== drm_test_fb_swab =====================
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ================ [PASSED] drm_test_fb_swab =================
[13:20:22] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:20:22] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[13:20:22] [PASSED] single_pixel_source_buffer
[13:20:22] [PASSED] single_pixel_clip_rectangle
[13:20:22] [PASSED] well_known_colors
[13:20:22] [PASSED] destination_pitch
[13:20:22] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:20:22] ================= drm_test_fb_clip_offset =================
[13:20:22] [PASSED] pass through
[13:20:22] [PASSED] horizontal offset
[13:20:22] [PASSED] vertical offset
[13:20:22] [PASSED] horizontal and vertical offset
[13:20:22] [PASSED] horizontal offset (custom pitch)
[13:20:22] [PASSED] vertical offset (custom pitch)
[13:20:22] [PASSED] horizontal and vertical offset (custom pitch)
[13:20:22] ============= [PASSED] drm_test_fb_clip_offset =============
[13:20:22] =================== drm_test_fb_memcpy ====================
[13:20:22] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:20:22] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:20:22] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:20:22] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:20:22] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:20:22] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:20:22] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:20:22] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:20:22] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:20:22] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:20:22] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:20:22] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:20:22] =============== [PASSED] drm_test_fb_memcpy ================
[13:20:22] ============= [PASSED] drm_format_helper_test ==============
[13:20:22] ================= drm_format (18 subtests) =================
[13:20:22] [PASSED] drm_test_format_block_width_invalid
[13:20:22] [PASSED] drm_test_format_block_width_one_plane
[13:20:22] [PASSED] drm_test_format_block_width_two_plane
[13:20:22] [PASSED] drm_test_format_block_width_three_plane
[13:20:22] [PASSED] drm_test_format_block_width_tiled
[13:20:22] [PASSED] drm_test_format_block_height_invalid
[13:20:22] [PASSED] drm_test_format_block_height_one_plane
[13:20:22] [PASSED] drm_test_format_block_height_two_plane
[13:20:22] [PASSED] drm_test_format_block_height_three_plane
[13:20:22] [PASSED] drm_test_format_block_height_tiled
[13:20:22] [PASSED] drm_test_format_min_pitch_invalid
[13:20:22] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:20:22] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:20:22] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:20:22] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:20:22] [PASSED] drm_test_format_min_pitch_two_plane
[13:20:22] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:20:22] [PASSED] drm_test_format_min_pitch_tiled
[13:20:22] =================== [PASSED] drm_format ====================
[13:20:22] ============== drm_framebuffer (10 subtests) ===============
[13:20:22] ========== drm_test_framebuffer_check_src_coords ==========
[13:20:22] [PASSED] Success: source fits into fb
[13:20:22] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:20:22] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:20:22] [PASSED] Fail: overflowing fb with source width
[13:20:22] [PASSED] Fail: overflowing fb with source height
[13:20:22] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:20:22] [PASSED] drm_test_framebuffer_cleanup
[13:20:22] =============== drm_test_framebuffer_create ===============
[13:20:22] [PASSED] ABGR8888 normal sizes
[13:20:22] [PASSED] ABGR8888 max sizes
[13:20:22] [PASSED] ABGR8888 pitch greater than min required
[13:20:22] [PASSED] ABGR8888 pitch less than min required
[13:20:22] [PASSED] ABGR8888 Invalid width
[13:20:22] [PASSED] ABGR8888 Invalid buffer handle
[13:20:22] [PASSED] No pixel format
[13:20:22] [PASSED] ABGR8888 Width 0
[13:20:22] [PASSED] ABGR8888 Height 0
[13:20:22] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:20:22] [PASSED] ABGR8888 Large buffer offset
[13:20:22] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:20:22] [PASSED] ABGR8888 Invalid flag
[13:20:22] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:20:22] [PASSED] ABGR8888 Valid buffer modifier
[13:20:22] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:20:22] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:20:22] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:20:22] [PASSED] NV12 Normal sizes
[13:20:22] [PASSED] NV12 Max sizes
[13:20:22] [PASSED] NV12 Invalid pitch
[13:20:22] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:20:22] [PASSED] NV12 different modifier per-plane
[13:20:22] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:20:22] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:20:22] [PASSED] NV12 Modifier for inexistent plane
[13:20:22] [PASSED] NV12 Handle for inexistent plane
[13:20:22] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:20:22] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:20:22] [PASSED] YVU420 Normal sizes
[13:20:22] [PASSED] YVU420 Max sizes
[13:20:22] [PASSED] YVU420 Invalid pitch
[13:20:22] [PASSED] YVU420 Different pitches
[13:20:22] [PASSED] YVU420 Different buffer offsets/pitches
[13:20:22] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:20:22] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:20:22] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:20:22] [PASSED] YVU420 Valid modifier
[13:20:22] [PASSED] YVU420 Different modifiers per plane
[13:20:22] [PASSED] YVU420 Modifier for inexistent plane
[13:20:22] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:20:22] [PASSED] X0L2 Normal sizes
[13:20:22] [PASSED] X0L2 Max sizes
[13:20:22] [PASSED] X0L2 Invalid pitch
[13:20:22] [PASSED] X0L2 Pitch greater than minimum required
[13:20:22] [PASSED] X0L2 Handle for inexistent plane
[13:20:22] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:20:22] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:20:22] [PASSED] X0L2 Valid modifier
[13:20:22] [PASSED] X0L2 Modifier for inexistent plane
[13:20:22] =========== [PASSED] drm_test_framebuffer_create ===========
[13:20:22] [PASSED] drm_test_framebuffer_free
[13:20:22] [PASSED] drm_test_framebuffer_init
[13:20:22] [PASSED] drm_test_framebuffer_init_bad_format
[13:20:22] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:20:22] [PASSED] drm_test_framebuffer_lookup
[13:20:22] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:20:22] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:20:22] ================= [PASSED] drm_framebuffer =================
[13:20:22] ================ drm_gem_shmem (8 subtests) ================
[13:20:22] [PASSED] drm_gem_shmem_test_obj_create
[13:20:22] [PASSED] drm_gem_shmem_test_obj_create_private
[13:20:22] [PASSED] drm_gem_shmem_test_pin_pages
[13:20:22] [PASSED] drm_gem_shmem_test_vmap
[13:20:22] [PASSED] drm_gem_shmem_test_get_sg_table
[13:20:22] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:20:22] [PASSED] drm_gem_shmem_test_madvise
[13:20:22] [PASSED] drm_gem_shmem_test_purge
[13:20:22] ================== [PASSED] drm_gem_shmem ==================
[13:20:22] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:20:22] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[13:20:22] [PASSED] Automatic
[13:20:22] [PASSED] Full
[13:20:22] [PASSED] Limited 16:235
[13:20:22] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:20:22] [PASSED] drm_test_check_disable_connector
[13:20:22] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:20:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[13:20:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[13:20:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[13:20:22] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[13:20:22] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[13:20:22] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:20:22] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:20:22] [PASSED] drm_test_check_output_bpc_dvi
[13:20:22] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:20:22] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:20:22] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:20:22] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:20:22] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:20:22] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:20:22] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:20:22] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:20:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:20:22] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:20:22] [PASSED] drm_test_check_broadcast_rgb_value
[13:20:22] [PASSED] drm_test_check_bpc_8_value
[13:20:22] [PASSED] drm_test_check_bpc_10_value
[13:20:22] [PASSED] drm_test_check_bpc_12_value
[13:20:22] [PASSED] drm_test_check_format_value
[13:20:22] [PASSED] drm_test_check_tmds_char_value
[13:20:22] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:20:22] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[13:20:22] [PASSED] drm_test_check_mode_valid
[13:20:22] [PASSED] drm_test_check_mode_valid_reject
[13:20:22] [PASSED] drm_test_check_mode_valid_reject_rate
[13:20:22] [PASSED] drm_test_check_mode_valid_reject_max_clock
[13:20:22] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[13:20:22] ================= drm_managed (2 subtests) =================
[13:20:22] [PASSED] drm_test_managed_release_action
[13:20:22] [PASSED] drm_test_managed_run_action
[13:20:22] =================== [PASSED] drm_managed ===================
[13:20:22] =================== drm_mm (6 subtests) ====================
[13:20:22] [PASSED] drm_test_mm_init
[13:20:22] [PASSED] drm_test_mm_debug
[13:20:22] [PASSED] drm_test_mm_align32
[13:20:22] [PASSED] drm_test_mm_align64
[13:20:22] [PASSED] drm_test_mm_lowest
[13:20:22] [PASSED] drm_test_mm_highest
[13:20:22] ===================== [PASSED] drm_mm ======================
[13:20:22] ============= drm_modes_analog_tv (5 subtests) =============
[13:20:22] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:20:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:20:22] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:20:22] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:20:22] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:20:22] =============== [PASSED] drm_modes_analog_tv ===============
[13:20:22] ============== drm_plane_helper (2 subtests) ===============
[13:20:22] =============== drm_test_check_plane_state ================
[13:20:22] [PASSED] clipping_simple
[13:20:22] [PASSED] clipping_rotate_reflect
[13:20:22] [PASSED] positioning_simple
[13:20:22] [PASSED] upscaling
[13:20:22] [PASSED] downscaling
[13:20:22] [PASSED] rounding1
[13:20:22] [PASSED] rounding2
[13:20:22] [PASSED] rounding3
[13:20:22] [PASSED] rounding4
[13:20:22] =========== [PASSED] drm_test_check_plane_state ============
[13:20:22] =========== drm_test_check_invalid_plane_state ============
[13:20:22] [PASSED] positioning_invalid
[13:20:22] [PASSED] upscaling_invalid
[13:20:22] [PASSED] downscaling_invalid
[13:20:22] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:20:22] ================ [PASSED] drm_plane_helper =================
[13:20:22] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:20:22] ====== drm_test_connector_helper_tv_get_modes_check =======
[13:20:22] [PASSED] None
[13:20:22] [PASSED] PAL
[13:20:22] [PASSED] NTSC
[13:20:22] [PASSED] Both, NTSC Default
[13:20:22] [PASSED] Both, PAL Default
[13:20:22] [PASSED] Both, NTSC Default, with PAL on command-line
[13:20:22] [PASSED] Both, PAL Default, with NTSC on command-line
[13:20:22] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:20:22] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:20:22] ================== drm_rect (9 subtests) ===================
[13:20:22] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:20:22] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:20:22] [PASSED] drm_test_rect_clip_scaled_clipped
[13:20:22] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:20:22] ================= drm_test_rect_intersect =================
[13:20:22] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:20:22] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:20:22] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:20:22] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:20:22] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:20:22] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:20:22] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:20:22] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:20:22] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:20:22] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:20:22] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:20:22] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:20:22] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:20:22] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:20:22] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:20:22] ============= [PASSED] drm_test_rect_intersect =============
[13:20:22] ================ drm_test_rect_calc_hscale ================
[13:20:22] [PASSED] normal use
[13:20:22] [PASSED] out of max range
[13:20:22] [PASSED] out of min range
[13:20:22] [PASSED] zero dst
[13:20:22] [PASSED] negative src
[13:20:22] [PASSED] negative dst
[13:20:22] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:20:22] ================ drm_test_rect_calc_vscale ================
[13:20:22] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[13:20:22] [PASSED] out of max range
[13:20:22] [PASSED] out of min range
[13:20:22] [PASSED] zero dst
[13:20:22] [PASSED] negative src
[13:20:22] [PASSED] negative dst
[13:20:22] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:20:22] ================== drm_test_rect_rotate ===================
[13:20:22] [PASSED] reflect-x
[13:20:22] [PASSED] reflect-y
[13:20:22] [PASSED] rotate-0
[13:20:22] [PASSED] rotate-90
[13:20:22] [PASSED] rotate-180
[13:20:22] [PASSED] rotate-270
[13:20:22] ============== [PASSED] drm_test_rect_rotate ===============
[13:20:22] ================ drm_test_rect_rotate_inv =================
[13:20:22] [PASSED] reflect-x
[13:20:22] [PASSED] reflect-y
[13:20:22] [PASSED] rotate-0
[13:20:22] [PASSED] rotate-90
[13:20:22] [PASSED] rotate-180
[13:20:22] [PASSED] rotate-270
[13:20:22] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:20:22] ==================== [PASSED] drm_rect =====================
[13:20:22] ============ drm_sysfb_modeset_test (1 subtest) ============
[13:20:22] ============ drm_test_sysfb_build_fourcc_list =============
[13:20:22] [PASSED] no native formats
[13:20:22] [PASSED] XRGB8888 as native format
[13:20:22] [PASSED] remove duplicates
[13:20:22] [PASSED] convert alpha formats
[13:20:22] [PASSED] random formats
[13:20:22] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[13:20:22] ============= [PASSED] drm_sysfb_modeset_test ==============
[13:20:22] ================== drm_fixp (2 subtests) ===================
[13:20:22] [PASSED] drm_test_int2fixp
[13:20:22] [PASSED] drm_test_sm2fixp
[13:20:22] ==================== [PASSED] drm_fixp =====================
[13:20:22] ============================================================
[13:20:22] Testing complete. Ran 624 tests: passed: 624
[13:20:22] Elapsed time: 32.846s total, 1.634s configuring, 30.744s building, 0.406s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:20:22] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:20:23] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[13:20:33] Starting KUnit Kernel (1/1)...
[13:20:33] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:20:33] ================= ttm_device (5 subtests) ==================
[13:20:33] [PASSED] ttm_device_init_basic
[13:20:33] [PASSED] ttm_device_init_multiple
[13:20:33] [PASSED] ttm_device_fini_basic
[13:20:33] [PASSED] ttm_device_init_no_vma_man
[13:20:33] ================== ttm_device_init_pools ==================
[13:20:33] [PASSED] No DMA allocations, no DMA32 required
[13:20:33] [PASSED] DMA allocations, DMA32 required
[13:20:33] [PASSED] No DMA allocations, DMA32 required
[13:20:33] [PASSED] DMA allocations, no DMA32 required
[13:20:33] ============== [PASSED] ttm_device_init_pools ==============
[13:20:33] =================== [PASSED] ttm_device ====================
[13:20:33] ================== ttm_pool (8 subtests) ===================
[13:20:33] ================== ttm_pool_alloc_basic ===================
[13:20:33] [PASSED] One page
[13:20:33] [PASSED] More than one page
[13:20:33] [PASSED] Above the allocation limit
[13:20:33] [PASSED] One page, with coherent DMA mappings enabled
[13:20:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:20:33] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:20:33] ============== ttm_pool_alloc_basic_dma_addr ==============
[13:20:33] [PASSED] One page
[13:20:33] [PASSED] More than one page
[13:20:33] [PASSED] Above the allocation limit
[13:20:33] [PASSED] One page, with coherent DMA mappings enabled
[13:20:33] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:20:33] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:20:33] [PASSED] ttm_pool_alloc_order_caching_match
[13:20:33] [PASSED] ttm_pool_alloc_caching_mismatch
[13:20:33] [PASSED] ttm_pool_alloc_order_mismatch
[13:20:33] [PASSED] ttm_pool_free_dma_alloc
[13:20:33] [PASSED] ttm_pool_free_no_dma_alloc
[13:20:33] [PASSED] ttm_pool_fini_basic
[13:20:33] ==================== [PASSED] ttm_pool =====================
[13:20:33] ================ ttm_resource (8 subtests) =================
[13:20:33] ================= ttm_resource_init_basic =================
[13:20:33] [PASSED] Init resource in TTM_PL_SYSTEM
[13:20:33] [PASSED] Init resource in TTM_PL_VRAM
[13:20:33] [PASSED] Init resource in a private placement
[13:20:33] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:20:33] ============= [PASSED] ttm_resource_init_basic =============
[13:20:33] [PASSED] ttm_resource_init_pinned
[13:20:33] [PASSED] ttm_resource_fini_basic
[13:20:33] [PASSED] ttm_resource_manager_init_basic
[13:20:33] [PASSED] ttm_resource_manager_usage_basic
[13:20:33] [PASSED] ttm_resource_manager_set_used_basic
[13:20:33] [PASSED] ttm_sys_man_alloc_basic
[13:20:33] [PASSED] ttm_sys_man_free_basic
[13:20:33] ================== [PASSED] ttm_resource ===================
[13:20:33] =================== ttm_tt (15 subtests) ===================
[13:20:33] ==================== ttm_tt_init_basic ====================
[13:20:33] [PASSED] Page-aligned size
[13:20:33] [PASSED] Extra pages requested
[13:20:33] ================ [PASSED] ttm_tt_init_basic ================
[13:20:33] [PASSED] ttm_tt_init_misaligned
[13:20:33] [PASSED] ttm_tt_fini_basic
[13:20:33] [PASSED] ttm_tt_fini_sg
[13:20:33] [PASSED] ttm_tt_fini_shmem
[13:20:33] [PASSED] ttm_tt_create_basic
[13:20:33] [PASSED] ttm_tt_create_invalid_bo_type
[13:20:33] [PASSED] ttm_tt_create_ttm_exists
[13:20:33] [PASSED] ttm_tt_create_failed
[13:20:33] [PASSED] ttm_tt_destroy_basic
[13:20:33] [PASSED] ttm_tt_populate_null_ttm
[13:20:33] [PASSED] ttm_tt_populate_populated_ttm
[13:20:33] [PASSED] ttm_tt_unpopulate_basic
[13:20:33] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:20:33] [PASSED] ttm_tt_swapin_basic
[13:20:33] ===================== [PASSED] ttm_tt ======================
[13:20:33] =================== ttm_bo (14 subtests) ===================
[13:20:33] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[13:20:33] [PASSED] Cannot be interrupted and sleeps
[13:20:33] [PASSED] Cannot be interrupted, locks straight away
[13:20:33] [PASSED] Can be interrupted, sleeps
[13:20:33] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:20:33] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:20:33] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:20:33] [PASSED] ttm_bo_reserve_double_resv
[13:20:33] [PASSED] ttm_bo_reserve_interrupted
[13:20:33] [PASSED] ttm_bo_reserve_deadlock
[13:20:33] [PASSED] ttm_bo_unreserve_basic
[13:20:33] [PASSED] ttm_bo_unreserve_pinned
[13:20:33] [PASSED] ttm_bo_unreserve_bulk
[13:20:33] [PASSED] ttm_bo_fini_basic
[13:20:33] [PASSED] ttm_bo_fini_shared_resv
[13:20:33] [PASSED] ttm_bo_pin_basic
[13:20:33] [PASSED] ttm_bo_pin_unpin_resource
[13:20:33] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:20:33] ===================== [PASSED] ttm_bo ======================
[13:20:33] ============== ttm_bo_validate (21 subtests) ===============
[13:20:33] ============== ttm_bo_init_reserved_sys_man ===============
[13:20:33] [PASSED] Buffer object for userspace
[13:20:33] [PASSED] Kernel buffer object
[13:20:33] [PASSED] Shared buffer object
[13:20:33] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:20:33] ============== ttm_bo_init_reserved_mock_man ==============
[13:20:33] [PASSED] Buffer object for userspace
[13:20:33] [PASSED] Kernel buffer object
[13:20:33] [PASSED] Shared buffer object
[13:20:33] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:20:33] [PASSED] ttm_bo_init_reserved_resv
[13:20:33] ================== ttm_bo_validate_basic ==================
[13:20:33] [PASSED] Buffer object for userspace
[13:20:33] [PASSED] Kernel buffer object
[13:20:33] [PASSED] Shared buffer object
[13:20:33] ============== [PASSED] ttm_bo_validate_basic ==============
[13:20:33] [PASSED] ttm_bo_validate_invalid_placement
[13:20:33] ============= ttm_bo_validate_same_placement ==============
[13:20:33] [PASSED] System manager
[13:20:33] [PASSED] VRAM manager
[13:20:33] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:20:33] [PASSED] ttm_bo_validate_failed_alloc
[13:20:33] [PASSED] ttm_bo_validate_pinned
[13:20:33] [PASSED] ttm_bo_validate_busy_placement
[13:20:33] ================ ttm_bo_validate_multihop =================
[13:20:33] [PASSED] Buffer object for userspace
[13:20:33] [PASSED] Kernel buffer object
[13:20:33] [PASSED] Shared buffer object
[13:20:33] ============ [PASSED] ttm_bo_validate_multihop =============
[13:20:33] ========== ttm_bo_validate_no_placement_signaled ==========
[13:20:33] [PASSED] Buffer object in system domain, no page vector
[13:20:33] [PASSED] Buffer object in system domain with an existing page vector
[13:20:33] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:20:33] ======== ttm_bo_validate_no_placement_not_signaled ========
[13:20:33] [PASSED] Buffer object for userspace
[13:20:33] [PASSED] Kernel buffer object
[13:20:33] [PASSED] Shared buffer object
[13:20:33] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:20:33] [PASSED] ttm_bo_validate_move_fence_signaled
[13:20:33] ========= ttm_bo_validate_move_fence_not_signaled =========
[13:20:33] [PASSED] Waits for GPU
[13:20:33] [PASSED] Tries to lock straight away
[13:20:33] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:20:33] [PASSED] ttm_bo_validate_happy_evict
[13:20:33] [PASSED] ttm_bo_validate_all_pinned_evict
[13:20:33] [PASSED] ttm_bo_validate_allowed_only_evict
[13:20:33] [PASSED] ttm_bo_validate_deleted_evict
[13:20:33] [PASSED] ttm_bo_validate_busy_domain_evict
[13:20:33] [PASSED] ttm_bo_validate_evict_gutting
[13:20:33] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:20:33] ================= [PASSED] ttm_bo_validate =================
[13:20:33] ============================================================
[13:20:33] Testing complete. Ran 101 tests: passed: 101
[13:20:33] Elapsed time: 11.184s total, 1.631s configuring, 9.286s building, 0.228s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 13+ messages in thread* ✓ Xe.CI.BAT: success for drm/xe/hwmon: Expose new temperature attributes (rev5)
2026-01-08 13:03 [PATCH v4 0/4] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
` (4 preceding siblings ...)
2026-01-08 13:20 ` ✓ CI.KUnit: success for drm/xe/hwmon: Expose new temperature attributes (rev5) Patchwork
@ 2026-01-08 13:58 ` Patchwork
2026-01-08 19:02 ` ✓ Xe.CI.Full: " Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-01-08 13:58 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2295 bytes --]
== Series Details ==
Series: drm/xe/hwmon: Expose new temperature attributes (rev5)
URL : https://patchwork.freedesktop.org/series/158384/
State : success
== Summary ==
CI Bug Log - changes from xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0_BAT -> xe-pw-158384v5_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (12 -> 12)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-158384v5_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_waitfence@engine:
- bat-dg2-oem2: [PASS][1] -> [FAIL][2] ([Intel XE#6519])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/bat-dg2-oem2/igt@xe_waitfence@engine.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/bat-dg2-oem2/igt@xe_waitfence@engine.html
* igt@xe_waitfence@reltime:
- bat-dg2-oem2: [PASS][3] -> [FAIL][4] ([Intel XE#6520])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/bat-dg2-oem2/igt@xe_waitfence@reltime.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/bat-dg2-oem2/igt@xe_waitfence@reltime.html
#### Possible fixes ####
* igt@xe_waitfence@abstime:
- bat-dg2-oem2: [TIMEOUT][5] ([Intel XE#6506]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/bat-dg2-oem2/igt@xe_waitfence@abstime.html
[Intel XE#6506]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6506
[Intel XE#6519]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6519
[Intel XE#6520]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6520
Build changes
-------------
* Linux: xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0 -> xe-pw-158384v5
IGT_8692: 8692
xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0: d7d19ebd62e1a312e67f4484df9a4e2b407d93d0
xe-pw-158384v5: 158384v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/index.html
[-- Attachment #2: Type: text/html, Size: 2916 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread* ✓ Xe.CI.Full: success for drm/xe/hwmon: Expose new temperature attributes (rev5)
2026-01-08 13:03 [PATCH v4 0/4] drm/xe/hwmon: Expose new temperature attributes Karthik Poosa
` (5 preceding siblings ...)
2026-01-08 13:58 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-01-08 19:02 ` Patchwork
6 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2026-01-08 19:02 UTC (permalink / raw)
To: Karthik Poosa; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 35163 bytes --]
== Series Details ==
Series: drm/xe/hwmon: Expose new temperature attributes (rev5)
URL : https://patchwork.freedesktop.org/series/158384/
State : success
== Summary ==
CI Bug Log - changes from xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0_FULL -> xe-pw-158384v5_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-158384v5_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][1] ([Intel XE#2327]) +4 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-10/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][2] ([Intel XE#1124]) +8 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][3] ([Intel XE#2314] / [Intel XE#2894])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#367]) +2 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#3432]) +1 other test skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2887]) +12 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2252]) +11 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-bmg: NOTRUN -> [FAIL][8] ([Intel XE#3304]) +1 other test fail
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_content_protection@srm@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][9] ([Intel XE#1178] / [Intel XE#3304]) +1 other test fail
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-10/igt@kms_content_protection@srm@pipe-a-dp-2.html
* igt@kms_content_protection@uevent:
- shard-bmg: NOTRUN -> [FAIL][10] ([Intel XE#6707]) +1 other test fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-offscreen-128x42:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2320]) +4 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_cursor_crc@cursor-offscreen-128x42.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2321])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#1508])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#1340])
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-3.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#4331])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-10/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#4156])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-10/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_feature_discovery@display-3x:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#2373])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_feature_discovery@display-3x.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-lnl: [PASS][18] -> [FAIL][19] ([Intel XE#301]) +1 other test fail
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#2293] / [Intel XE#2380]) +4 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2293]) +6 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#2311]) +26 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#4141]) +13 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2352])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2313]) +27 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
* igt@kms_hdr@static-toggle@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [ABORT][26] ([Intel XE#6740]) +1 other test abort
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_hdr@static-toggle@pipe-a-dp-2.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#5021])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_pm_backlight@basic-brightness:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#870]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_rpm@package-g7:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#6814])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_pm_rpm@package-g7.html
* igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#1406] / [Intel XE#1489]) +8 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +8 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-10/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@kms_rotation_crc@sprite-rotation-90:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#3414] / [Intel XE#3904]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@kms_rotation_crc@sprite-rotation-90.html
* igt@kms_sharpness_filter@filter-basic:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#6503]) +1 other test skip
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-10/igt@kms_sharpness_filter@filter-basic.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#2426])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [PASS][35] -> [FAIL][36] ([Intel XE#4459]) +1 other test fail
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-lnl-5/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-lnl-1/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@kms_vrr@flip-suspend:
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#1499]) +2 other tests skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_vrr@flip-suspend.html
* igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1:
- shard-lnl: [PASS][38] -> [FAIL][39] ([Intel XE#2142]) +1 other test fail
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-lnl-5/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-lnl-1/igt@kms_vrr@seamless-rr-switch-virtual@pipe-a-edp-1.html
* igt@testdisplay:
- shard-bmg: NOTRUN -> [ABORT][40] ([Intel XE#6740] / [Intel XE#6976])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@testdisplay.html
* igt@xe_eudebug@discovery-race-vmbind:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#4837]) +6 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@xe_eudebug@discovery-race-vmbind.html
* igt@xe_eudebug_online@pagefault-write:
- shard-bmg: NOTRUN -> [SKIP][42] ([Intel XE#4837] / [Intel XE#6665]) +5 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_eudebug_online@pagefault-write.html
* igt@xe_eudebug_sriov@deny-sriov:
- shard-bmg: NOTRUN -> [SKIP][43] ([Intel XE#5793])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@xe_eudebug_sriov@deny-sriov.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: NOTRUN -> [INCOMPLETE][44] ([Intel XE#6321])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-10/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][45] ([Intel XE#2322]) +10 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-defer-bind.html
* igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#6874]) +28 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@xe_exec_multi_queue@many-execs-preempt-mode-fault-userptr-invalidate.html
* igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#5007])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@xe_exec_system_allocator@many-64k-mmap-new-huge-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge-nomemset:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#4943]) +20 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge-nomemset.html
* igt@xe_module_load@force-load:
- shard-bmg: NOTRUN -> [SKIP][49] ([Intel XE#2457])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@xe_module_load@force-load.html
* igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#6964]) +2 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_multigpu_svm@mgpu-concurrent-access-prefetch.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][51] ([Intel XE#2427] / [Intel XE#6953])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@xe_peer2peer@write.html
* igt@xe_pxp@display-pxp-fb:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#4733]) +2 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_pxp@display-pxp-fb.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#944]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-3/igt@xe_query@multigpu-query-mem-usage.html
#### Possible fixes ####
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-bmg: [SKIP][54] ([Intel XE#6703]) -> [PASS][55] +130 other tests pass
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_color@gamma:
- shard-bmg: [DMESG-WARN][56] -> [PASS][57] +1 other test pass
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_color@gamma.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_color@gamma.html
* igt@kms_color@gamma@pipe-a-dp-2:
- shard-bmg: [CRASH][58] -> [PASS][59] +7 other tests pass
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_color@gamma@pipe-a-dp-2.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_color@gamma@pipe-a-dp-2.html
* igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2:
- shard-bmg: [ABORT][60] ([Intel XE#6740]) -> [PASS][61] +1 other test pass
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-9/igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-1/igt@kms_hdr@static-toggle-dpms@pipe-a-dp-2.html
* igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-remap-ro-eocheck:
- shard-bmg: [SKIP][62] ([Intel XE#6557] / [Intel XE#6703]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-remap-ro-eocheck.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-remap-ro-eocheck.html
#### Warnings ####
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-bmg: [SKIP][64] ([Intel XE#6703]) -> [SKIP][65] ([Intel XE#1124]) +2 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-bmg: [SKIP][66] ([Intel XE#6703]) -> [SKIP][67] ([Intel XE#367])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs:
- shard-bmg: [SKIP][68] ([Intel XE#6703]) -> [SKIP][69] ([Intel XE#2887]) +3 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_ccs@crc-primary-rotation-180-y-tiled-ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-bmg: [SKIP][70] ([Intel XE#6703]) -> [SKIP][71] ([Intel XE#2724])
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_cdclk@plane-scaling.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium_frames@dp-crc-single:
- shard-bmg: [SKIP][72] ([Intel XE#6703]) -> [SKIP][73] ([Intel XE#2252]) +1 other test skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_chamelium_frames@dp-crc-single.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_chamelium_frames@dp-crc-single.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-bmg: [SKIP][74] ([Intel XE#6703]) -> [SKIP][75] ([Intel XE#2321])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
- shard-bmg: [SKIP][76] ([Intel XE#6703]) -> [DMESG-WARN][77] ([Intel XE#5354])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-bmg: [SKIP][78] ([Intel XE#6703]) -> [SKIP][79] ([Intel XE#4354])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_dp_link_training@non-uhbr-mst.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
- shard-bmg: [SKIP][80] ([Intel XE#6703]) -> [SKIP][81] ([Intel XE#2293] / [Intel XE#2380])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
- shard-bmg: [SKIP][82] ([Intel XE#6557] / [Intel XE#6703]) -> [SKIP][83] ([Intel XE#2293] / [Intel XE#2380])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt:
- shard-bmg: [SKIP][84] ([Intel XE#6703]) -> [SKIP][85] ([Intel XE#4141]) +2 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][86] ([Intel XE#6703]) -> [SKIP][87] ([Intel XE#2311]) +5 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-bmg: [SKIP][88] ([Intel XE#6703]) -> [SKIP][89] ([Intel XE#2313]) +5 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][90] ([Intel XE#6703]) -> [SKIP][91] ([Intel XE#1503])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_hdr@invalid-hdr.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-bmg: [SKIP][92] ([Intel XE#6703]) -> [SKIP][93] ([Intel XE#6911])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_pm_backlight@bad-brightness:
- shard-bmg: [SKIP][94] ([Intel XE#6703]) -> [SKIP][95] ([Intel XE#870])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_pm_backlight@bad-brightness.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
- shard-bmg: [SKIP][96] ([Intel XE#6693]) -> [SKIP][97] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#836])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
* igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area:
- shard-bmg: [SKIP][98] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][99] ([Intel XE#1406] / [Intel XE#1489]) +1 other test skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_psr2_sf@fbc-pr-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr2-primary-render:
- shard-bmg: [SKIP][100] ([Intel XE#1406] / [Intel XE#6703]) -> [SKIP][101] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_psr@fbc-psr2-primary-render.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_psr@fbc-psr2-primary-render.html
* igt@kms_rotation_crc@bad-tiling:
- shard-bmg: [SKIP][102] ([Intel XE#6703]) -> [SKIP][103] ([Intel XE#3414] / [Intel XE#3904])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_rotation_crc@bad-tiling.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_rotation_crc@bad-tiling.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-bmg: [SKIP][104] ([Intel XE#6703]) -> [SKIP][105] ([Intel XE#2330])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-bmg: [SKIP][106] ([Intel XE#6703]) -> [SKIP][107] ([Intel XE#1435])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_setmode@invalid-clone-exclusive-crtc.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [SKIP][108] ([Intel XE#6703]) -> [SKIP][109] ([Intel XE#2426])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_eudebug@discovery-race-sigint:
- shard-bmg: [SKIP][110] ([Intel XE#6703]) -> [SKIP][111] ([Intel XE#4837]) +2 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@xe_eudebug@discovery-race-sigint.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_eudebug@discovery-race-sigint.html
* igt@xe_eudebug_online@pagefault-one-of-many:
- shard-bmg: [SKIP][112] ([Intel XE#6703]) -> [SKIP][113] ([Intel XE#6665])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@xe_eudebug_online@pagefault-one-of-many.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_eudebug_online@pagefault-one-of-many.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind:
- shard-bmg: [SKIP][114] ([Intel XE#6703]) -> [SKIP][115] ([Intel XE#2322]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_exec_basic@multigpu-no-exec-basic-defer-bind.html
* igt@xe_exec_multi_queue@many-execs-basic-smem:
- shard-bmg: [SKIP][116] ([Intel XE#6703]) -> [SKIP][117] ([Intel XE#6874]) +6 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@xe_exec_multi_queue@many-execs-basic-smem.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_exec_multi_queue@many-execs-basic-smem.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-new-huge:
- shard-bmg: [SKIP][118] ([Intel XE#6703]) -> [SKIP][119] ([Intel XE#4943]) +3 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-new-huge.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-new-huge.html
* igt@xe_pxp@pxp-stale-queue-post-suspend:
- shard-bmg: [SKIP][120] ([Intel XE#6703]) -> [SKIP][121] ([Intel XE#4733])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0/shard-bmg-2/igt@xe_pxp@pxp-stale-queue-post-suspend.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/shard-bmg-9/igt@xe_pxp@pxp-stale-queue-post-suspend.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#2142]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2142
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4459]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4459
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5007
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
[Intel XE#5793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5793
[Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
[Intel XE#6665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6665
[Intel XE#6693]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6693
[Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
[Intel XE#6707]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6707
[Intel XE#6740]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6740
[Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6953
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6976]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6976
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0 -> xe-pw-158384v5
IGT_8692: 8692
xe-4346-d7d19ebd62e1a312e67f4484df9a4e2b407d93d0: d7d19ebd62e1a312e67f4484df9a4e2b407d93d0
xe-pw-158384v5: 158384v5
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-158384v5/index.html
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