[PATCH 0/5] Support run ticks for multi-queue use case

[PATCH 0/5] Support run ticks for multi-queue use case

[Umesh Nerlige Ramappa]

In single queue use cases, the CTX TIMESTAMP can be used to track
context run ticks. In multi-queue scenarios the CTX_TIMESTAMP represents
run ticks of all the queues. To determine individual queue run ticks, we
need to use QUEUE TIMESTAMP.

The series adds support to read out QUEUE TIMESTAMP for multi-queue use
cases.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Umesh Nerlige Ramappa (5):
  drm/xe/multi_queue: Store primary queue and position info in LRC
  drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc
  drm/xe/multi_queue: Capture queue run times for active queues
  drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for
    multi-queue
  drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register

 drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
 drivers/gpu/drm/xe/regs/xe_lrc_layout.h  |   3 +
 drivers/gpu/drm/xe/xe_exec_queue.c       |   8 +-
 drivers/gpu/drm/xe/xe_lrc.c              | 166 ++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_lrc.h              |   6 +
 drivers/gpu/drm/xe/xe_lrc_types.h        |  13 ++
 drivers/gpu/drm/xe/xe_reg_whitelist.c    |   6 +
 drivers/gpu/drm/xe/xe_ring_ops.c         |   8 +-
 drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 ++++
 9 files changed, 218 insertions(+), 23 deletions(-)

-- 
2.43.0

[PATCH 1/5] drm/xe/multi_queue: Store primary queue and position info in LRC

[Umesh Nerlige Ramappa]

Given an LRC belonging to the secondary queue, in order to check if its
context group is active, we need to check the LRC of the primary queue.
In addition to that we want to compare the secondary queue position to
CSMQDEBUG register to check if the queue itself is active.

To do so, store primary queue and position information int the LRC.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c |  8 +++++++-
 drivers/gpu/drm/xe/xe_lrc.h        |  5 +++++
 drivers/gpu/drm/xe/xe_lrc_types.h  | 10 ++++++++++
 3 files changed, 22 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index b287d0e0e60a..4fb02eda77b4 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -275,8 +275,14 @@ static void xe_exec_queue_set_lrc(struct xe_exec_queue *q, struct xe_lrc *lrc, u
 {
 	xe_assert(gt_to_xe(q->gt), idx < q->width);
 
-	scoped_guard(spinlock, &q->lrc_lookup_lock)
+	scoped_guard(spinlock, &q->lrc_lookup_lock) {
 		q->lrc[idx] = lrc;
+		if (xe_exec_queue_is_multi_queue(q)) {
+			lrc->multi_queue.primary = q->multi_queue.group->primary;
+			lrc->multi_queue.pos = q->multi_queue.pos;
+			lrc->multi_queue.valid = 1;
+		}
+	}
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index e7c975f9e2d9..b544c8169967 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -90,6 +90,11 @@ static inline size_t xe_lrc_ring_size(void)
 	return SZ_16K;
 }
 
+static inline bool xe_lrc_is_multi_queue(struct xe_lrc *lrc)
+{
+	return lrc->multi_queue.valid;
+}
+
 size_t xe_gt_lrc_hang_replay_size(struct xe_gt *gt, enum xe_engine_class class);
 size_t xe_gt_lrc_size(struct xe_gt *gt, enum xe_engine_class class);
 u32 xe_lrc_pphwsp_offset(struct xe_lrc *lrc);
diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
index 5a718f759ed6..93972536214a 100644
--- a/drivers/gpu/drm/xe/xe_lrc_types.h
+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
@@ -63,6 +63,16 @@ struct xe_lrc {
 
 	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
 	u64 ctx_timestamp;
+
+	/** @multi_queue: Multi queue LRC related information */
+	struct {
+		/** @multi_queue.primary: Primary queue corresponding to this LRC */
+		struct xe_exec_queue *primary;
+		/** @multi_queue.valid: LRC belongs to a multi queue group */
+		u8 valid;
+		/** @multi_queue.pos: Position of LRC within the multi-queue group */
+		u8 pos;
+	} multi_queue;
 };
 
 struct xe_lrc_snapshot;
-- 
2.43.0

Re: [PATCH 1/5] drm/xe/multi_queue: Store primary queue and position info in LRC

[Matthew Brost]

On Thu, Apr 09, 2026 at 01:37:16PM -0700, Umesh Nerlige Ramappa wrote:
> Given an LRC belonging to the secondary queue, in order to check if its
> context group is active, we need to check the LRC of the primary queue.
> In addition to that we want to compare the secondary queue position to
> CSMQDEBUG register to check if the queue itself is active.
> 
> To do so, store primary queue and position information int the LRC.
> 
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c |  8 +++++++-
>  drivers/gpu/drm/xe/xe_lrc.h        |  5 +++++
>  drivers/gpu/drm/xe/xe_lrc_types.h  | 10 ++++++++++
>  3 files changed, 22 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index b287d0e0e60a..4fb02eda77b4 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -275,8 +275,14 @@ static void xe_exec_queue_set_lrc(struct xe_exec_queue *q, struct xe_lrc *lrc, u
>  {
>  	xe_assert(gt_to_xe(q->gt), idx < q->width);
>  
> -	scoped_guard(spinlock, &q->lrc_lookup_lock)
> +	scoped_guard(spinlock, &q->lrc_lookup_lock) {
>  		q->lrc[idx] = lrc;
> +		if (xe_exec_queue_is_multi_queue(q)) {
> +			lrc->multi_queue.primary = q->multi_queue.group->primary;

Can you add a brief explanation of why this is memory‑safe? For example,
why is it OK and correct not to take a reference? This kind of thing
tends to trip up human reviewers in code reviews, and apparently AI
reviewers as well—I’ve seen a couple of AI reviews suggest that a
reference was missing when, in fact, omitting it was intentional to
avoid taking a reference.

Also, if we want to be really paranoid: in xe_exec_queue_group_cleanup,
before the primary drops the secondary references, it clears out these
fields in the LRC.

Overall, this looks sane enough, though.

Matt

> +			lrc->multi_queue.pos = q->multi_queue.pos;
> +			lrc->multi_queue.valid = 1;
> +		}
> +	}
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
> index e7c975f9e2d9..b544c8169967 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_lrc.h
> @@ -90,6 +90,11 @@ static inline size_t xe_lrc_ring_size(void)
>  	return SZ_16K;
>  }
>  
> +static inline bool xe_lrc_is_multi_queue(struct xe_lrc *lrc)
> +{
> +	return lrc->multi_queue.valid;
> +}
> +
>  size_t xe_gt_lrc_hang_replay_size(struct xe_gt *gt, enum xe_engine_class class);
>  size_t xe_gt_lrc_size(struct xe_gt *gt, enum xe_engine_class class);
>  u32 xe_lrc_pphwsp_offset(struct xe_lrc *lrc);
> diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
> index 5a718f759ed6..93972536214a 100644
> --- a/drivers/gpu/drm/xe/xe_lrc_types.h
> +++ b/drivers/gpu/drm/xe/xe_lrc_types.h
> @@ -63,6 +63,16 @@ struct xe_lrc {
>  
>  	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
>  	u64 ctx_timestamp;
> +
> +	/** @multi_queue: Multi queue LRC related information */
> +	struct {
> +		/** @multi_queue.primary: Primary queue corresponding to this LRC */
> +		struct xe_exec_queue *primary;
> +		/** @multi_queue.valid: LRC belongs to a multi queue group */
> +		u8 valid;
> +		/** @multi_queue.pos: Position of LRC within the multi-queue group */
> +		u8 pos;
> +	} multi_queue;
>  };
>  
>  struct xe_lrc_snapshot;
> -- 
> 2.43.0
> 

Re: [PATCH 1/5] drm/xe/multi_queue: Store primary queue and position info in LRC

[Umesh Nerlige Ramappa]

lost my previous response... resending

On Thu, Apr 09, 2026 at 01:59:55PM -0700, Matthew Brost wrote:
>On Thu, Apr 09, 2026 at 01:37:16PM -0700, Umesh Nerlige Ramappa wrote:
>> Given an LRC belonging to the secondary queue, in order to check if its
>> context group is active, we need to check the LRC of the primary queue.
>> In addition to that we want to compare the secondary queue position to
>> CSMQDEBUG register to check if the queue itself is active.
>>
>> To do so, store primary queue and position information int the LRC.
>>
>> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>> ---
>>  drivers/gpu/drm/xe/xe_exec_queue.c |  8 +++++++-
>>  drivers/gpu/drm/xe/xe_lrc.h        |  5 +++++
>>  drivers/gpu/drm/xe/xe_lrc_types.h  | 10 ++++++++++
>>  3 files changed, 22 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>> index b287d0e0e60a..4fb02eda77b4 100644
>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>> @@ -275,8 +275,14 @@ static void xe_exec_queue_set_lrc(struct xe_exec_queue *q, struct xe_lrc *lrc, u
>>  {
>>  	xe_assert(gt_to_xe(q->gt), idx < q->width);
>>
>> -	scoped_guard(spinlock, &q->lrc_lookup_lock)
>> +	scoped_guard(spinlock, &q->lrc_lookup_lock) {
>>  		q->lrc[idx] = lrc;
>> +		if (xe_exec_queue_is_multi_queue(q)) {
>> +			lrc->multi_queue.primary = q->multi_queue.group->primary;
>
>Can you add a brief explanation of why this is memory‑safe? For example,
>why is it OK and correct not to take a reference? This kind of thing
>tends to trip up human reviewers in code reviews, and apparently AI
>reviewers as well—I’ve seen a couple of AI reviews suggest that a
>reference was missing when, in fact, omitting it was intentional to
>avoid taking a reference.

These are the references taken

primary_q -> primary_lrc
secondary_q -> secondary_lrc

primary_q -> all secondary lrcs
secondary_q_1 -> primary_q
secondary_q_2 -> primary_q
secondary_q_3 -> primary_q
...

primary_q can be freed only when all secondary queues are freed/destroyed. All
secondary_lrcs will still remain in memory since the primary_q has a reference
to them.

When primary_q is destroyed, then it will destroy primary and secondary LRCs.

Hence no reference from LRC to primary_q needed. I think such a reference may
deadlock the freeing of these structures, so should not be done.

Thanks,
Umesh


>
>Also, if we want to be really paranoid: in xe_exec_queue_group_cleanup,
>before the primary drops the secondary references, it clears out these
>fields in the LRC.
>
>Overall, this looks sane enough, though.
>
>Matt
>
>> +			lrc->multi_queue.pos = q->multi_queue.pos;
>> +			lrc->multi_queue.valid = 1;
>> +		}
>> +	}
>>  }
>>
>>  /**
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>> index e7c975f9e2d9..b544c8169967 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.h
>> +++ b/drivers/gpu/drm/xe/xe_lrc.h
>> @@ -90,6 +90,11 @@ static inline size_t xe_lrc_ring_size(void)
>>  	return SZ_16K;
>>  }
>>
>> +static inline bool xe_lrc_is_multi_queue(struct xe_lrc *lrc)
>> +{
>> +	return lrc->multi_queue.valid;
>> +}
>> +
>>  size_t xe_gt_lrc_hang_replay_size(struct xe_gt *gt, enum xe_engine_class class);
>>  size_t xe_gt_lrc_size(struct xe_gt *gt, enum xe_engine_class class);
>>  u32 xe_lrc_pphwsp_offset(struct xe_lrc *lrc);
>> diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
>> index 5a718f759ed6..93972536214a 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc_types.h
>> +++ b/drivers/gpu/drm/xe/xe_lrc_types.h
>> @@ -63,6 +63,16 @@ struct xe_lrc {
>>
>>  	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
>>  	u64 ctx_timestamp;
>> +
>> +	/** @multi_queue: Multi queue LRC related information */
>> +	struct {
>> +		/** @multi_queue.primary: Primary queue corresponding to this LRC */
>> +		struct xe_exec_queue *primary;
>> +		/** @multi_queue.valid: LRC belongs to a multi queue group */
>> +		u8 valid;
>> +		/** @multi_queue.pos: Position of LRC within the multi-queue group */
>> +		u8 pos;
>> +	} multi_queue;
>>  };
>>
>>  struct xe_lrc_snapshot;
>> --
>> 2.43.0
>>

Re: [PATCH 1/5] drm/xe/multi_queue: Store primary queue and position info in LRC

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 01:37:16PM -0700, Umesh Nerlige Ramappa wrote:
>Given an LRC belonging to the secondary queue, in order to check if its
>context group is active, we need to check the LRC of the primary queue.
>In addition to that we want to compare the secondary queue position to
>CSMQDEBUG register to check if the queue itself is active.
>
>To do so, store primary queue and position information int the LRC.
>
>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/xe_exec_queue.c |  8 +++++++-
> drivers/gpu/drm/xe/xe_lrc.h        |  5 +++++
> drivers/gpu/drm/xe/xe_lrc_types.h  | 10 ++++++++++
> 3 files changed, 22 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>index b287d0e0e60a..4fb02eda77b4 100644
>--- a/drivers/gpu/drm/xe/xe_exec_queue.c
>+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>@@ -275,8 +275,14 @@ static void xe_exec_queue_set_lrc(struct xe_exec_queue *q, struct xe_lrc *lrc, u
> {
> 	xe_assert(gt_to_xe(q->gt), idx < q->width);
>
>-	scoped_guard(spinlock, &q->lrc_lookup_lock)
>+	scoped_guard(spinlock, &q->lrc_lookup_lock) {
> 		q->lrc[idx] = lrc;
>+		if (xe_exec_queue_is_multi_queue(q)) {
>+			lrc->multi_queue.primary = q->multi_queue.group->primary;
>+			lrc->multi_queue.pos = q->multi_queue.pos;
>+			lrc->multi_queue.valid = 1;
>+		}
>+	}
> }
>
> /**
>diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>index e7c975f9e2d9..b544c8169967 100644
>--- a/drivers/gpu/drm/xe/xe_lrc.h
>+++ b/drivers/gpu/drm/xe/xe_lrc.h
>@@ -90,6 +90,11 @@ static inline size_t xe_lrc_ring_size(void)
> 	return SZ_16K;
> }
>
>+static inline bool xe_lrc_is_multi_queue(struct xe_lrc *lrc)
>+{
>+	return lrc->multi_queue.valid;
>+}
>+
> size_t xe_gt_lrc_hang_replay_size(struct xe_gt *gt, enum xe_engine_class class);
> size_t xe_gt_lrc_size(struct xe_gt *gt, enum xe_engine_class class);
> u32 xe_lrc_pphwsp_offset(struct xe_lrc *lrc);
>diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
>index 5a718f759ed6..93972536214a 100644
>--- a/drivers/gpu/drm/xe/xe_lrc_types.h
>+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
>@@ -63,6 +63,16 @@ struct xe_lrc {
>
> 	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
> 	u64 ctx_timestamp;
>+
>+	/** @multi_queue: Multi queue LRC related information */
>+	struct {
>+		/** @multi_queue.primary: Primary queue corresponding to this LRC */
>+		struct xe_exec_queue *primary;

We don't really need the reference to primary queue here (as usually it is the
queue that has pointer to LRC).
We can just have pointer to primary queue's LRC (as primary_lrc).

>+		/** @multi_queue.valid: LRC belongs to a multi queue group */
>+		u8 valid;

NIT...We don't need the valid flag. We can check 'primary_lrc != NULL' instead.

Other than that, patch LGTM.
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>+		/** @multi_queue.pos: Position of LRC within the multi-queue group */
>+		u8 pos;
>+	} multi_queue;
> };
>
> struct xe_lrc_snapshot;
>-- 
>2.43.0
>

[PATCH 2/5] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc

[Umesh Nerlige Ramappa]

In secondary queue LRCs, the QUEUE TIMESTAMP register is saved and
restored allowing us to view the individual queue run times. Add helpers
to read this value from the LRC.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_lrc_layout.h |  3 ++
 drivers/gpu/drm/xe/xe_lrc.c             | 44 +++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_lrc.h             |  1 +
 drivers/gpu/drm/xe/xe_lrc_types.h       |  3 ++
 4 files changed, 51 insertions(+)

diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
index b5eff383902c..4ab86fc369fd 100644
--- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
+++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
@@ -34,6 +34,9 @@
 #define CTX_CS_INT_VEC_REG		0x5a
 #define CTX_CS_INT_VEC_DATA		(CTX_CS_INT_VEC_REG + 1)
 
+#define CTX_QUEUE_TIMESTAMP		(0xd0 + 1)
+#define CTX_QUEUE_TIMESTAMP_UDW		(0xd2 + 1)
+
 #define INDIRECT_CTX_RING_HEAD		(0x02 + 1)
 #define INDIRECT_CTX_RING_TAIL		(0x04 + 1)
 #define INDIRECT_CTX_RING_START		(0x06 + 1)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 9d12a0d2f0b5..be1030c74e21 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -788,6 +788,16 @@ static u32 __xe_lrc_ctx_timestamp_udw_offset(struct xe_lrc *lrc)
 	return __xe_lrc_regs_offset(lrc) + CTX_TIMESTAMP_UDW * sizeof(u32);
 }
 
+static u32 __xe_lrc_queue_timestamp_offset(struct xe_lrc *lrc)
+{
+	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP * sizeof(u32);
+}
+
+static u32 __xe_lrc_queue_timestamp_udw_offset(struct xe_lrc *lrc)
+{
+	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP_UDW * sizeof(u32);
+}
+
 static inline u32 __xe_lrc_indirect_ring_offset(struct xe_lrc *lrc)
 {
 	u32 offset = xe_bo_size(lrc->bo) - LRC_WA_BB_SIZE -
@@ -837,6 +847,8 @@ DECL_MAP_ADDR_HELPERS(ctx_timestamp_udw, lrc->bo)
 DECL_MAP_ADDR_HELPERS(parallel, lrc->bo)
 DECL_MAP_ADDR_HELPERS(indirect_ring, lrc->bo)
 DECL_MAP_ADDR_HELPERS(engine_id, lrc->bo)
+DECL_MAP_ADDR_HELPERS(queue_timestamp, lrc->bo)
+DECL_MAP_ADDR_HELPERS(queue_timestamp_udw, lrc->bo)
 
 #undef DECL_MAP_ADDR_HELPERS
 
@@ -885,6 +897,30 @@ static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc)
 	return (u64)udw << 32 | ldw;
 }
 
+/**
+ * xe_lrc_queue_timestamp() - Read queue timestamp value
+ * @lrc: Pointer to the lrc.
+ *
+ * Returns: queue timestamp value
+ */
+static u64 xe_lrc_queue_timestamp(struct xe_lrc *lrc)
+{
+	struct xe_device *xe = lrc_to_xe(lrc);
+	struct iosys_map map;
+	u32 ldw, udw = 0;
+
+	if (!xe_lrc_is_multi_queue(lrc))
+		return 0;
+
+	map = __xe_lrc_queue_timestamp_map(lrc);
+	ldw = xe_map_read32(xe, &map);
+
+	map = __xe_lrc_queue_timestamp_udw_map(lrc);
+	udw = xe_map_read32(xe, &map);
+
+	return (u64)udw << 32 | ldw;
+}
+
 /**
  * xe_lrc_ctx_job_timestamp_ggtt_addr() - Get ctx job timestamp GGTT address
  * @lrc: Pointer to the lrc.
@@ -1550,6 +1586,12 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
 	if (lrc_to_xe(lrc)->info.has_64bit_timestamp)
 		xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0);
 
+	if (xe_lrc_is_multi_queue(lrc)) {
+		lrc->queue_timestamp = 0;
+		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP, 0);
+		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP_UDW, 0);
+	}
+
 	if (xe->info.has_asid && vm)
 		xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
 
@@ -2476,6 +2518,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
 	snapshot->replay_size = lrc->replay_size;
 	snapshot->lrc_snapshot = NULL;
 	snapshot->ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(lrc));
+	snapshot->queue_timestamp = lower_32_bits(xe_lrc_queue_timestamp(lrc));
 	snapshot->ctx_job_timestamp = xe_lrc_ctx_job_timestamp(lrc);
 	return snapshot;
 }
@@ -2529,6 +2572,7 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer
 	drm_printf(p, "\tStart seqno: (memory) %d\n", snapshot->start_seqno);
 	drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno);
 	drm_printf(p, "\tTimestamp: 0x%08x\n", snapshot->ctx_timestamp);
+	drm_printf(p, "\tQueue Timestamp: 0x%08x\n", snapshot->queue_timestamp);
 	drm_printf(p, "\tJob Timestamp: 0x%08x\n", snapshot->ctx_job_timestamp);
 
 	if (!snapshot->lrc_snapshot)
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index b544c8169967..178d9519b196 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -38,6 +38,7 @@ struct xe_lrc_snapshot {
 	u32 start_seqno;
 	u32 seqno;
 	u32 ctx_timestamp;
+	u32 queue_timestamp;
 	u32 ctx_job_timestamp;
 };
 
diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
index 93972536214a..4bca394ff024 100644
--- a/drivers/gpu/drm/xe/xe_lrc_types.h
+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
@@ -64,6 +64,9 @@ struct xe_lrc {
 	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
 	u64 ctx_timestamp;
 
+	/** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */
+	u64 queue_timestamp;
+
 	/** @multi_queue: Multi queue LRC related information */
 	struct {
 		/** @multi_queue.primary: Primary queue corresponding to this LRC */
-- 
2.43.0

Re: [PATCH 2/5] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc

[Matthew Brost]

On Thu, Apr 09, 2026 at 01:37:17PM -0700, Umesh Nerlige Ramappa wrote:
> In secondary queue LRCs, the QUEUE TIMESTAMP register is saved and
> restored allowing us to view the individual queue run times. Add helpers
> to read this value from the LRC.
> 
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_lrc_layout.h |  3 ++
>  drivers/gpu/drm/xe/xe_lrc.c             | 44 +++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_lrc.h             |  1 +
>  drivers/gpu/drm/xe/xe_lrc_types.h       |  3 ++
>  4 files changed, 51 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> index b5eff383902c..4ab86fc369fd 100644
> --- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> +++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> @@ -34,6 +34,9 @@
>  #define CTX_CS_INT_VEC_REG		0x5a
>  #define CTX_CS_INT_VEC_DATA		(CTX_CS_INT_VEC_REG + 1)
>  
> +#define CTX_QUEUE_TIMESTAMP		(0xd0 + 1)
> +#define CTX_QUEUE_TIMESTAMP_UDW		(0xd2 + 1)
> +
>  #define INDIRECT_CTX_RING_HEAD		(0x02 + 1)
>  #define INDIRECT_CTX_RING_TAIL		(0x04 + 1)
>  #define INDIRECT_CTX_RING_START		(0x06 + 1)
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 9d12a0d2f0b5..be1030c74e21 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -788,6 +788,16 @@ static u32 __xe_lrc_ctx_timestamp_udw_offset(struct xe_lrc *lrc)
>  	return __xe_lrc_regs_offset(lrc) + CTX_TIMESTAMP_UDW * sizeof(u32);
>  }
>  
> +static u32 __xe_lrc_queue_timestamp_offset(struct xe_lrc *lrc)
> +{
> +	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP * sizeof(u32);
> +}
> +
> +static u32 __xe_lrc_queue_timestamp_udw_offset(struct xe_lrc *lrc)
> +{
> +	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP_UDW * sizeof(u32);
> +}
> +
>  static inline u32 __xe_lrc_indirect_ring_offset(struct xe_lrc *lrc)
>  {
>  	u32 offset = xe_bo_size(lrc->bo) - LRC_WA_BB_SIZE -
> @@ -837,6 +847,8 @@ DECL_MAP_ADDR_HELPERS(ctx_timestamp_udw, lrc->bo)
>  DECL_MAP_ADDR_HELPERS(parallel, lrc->bo)
>  DECL_MAP_ADDR_HELPERS(indirect_ring, lrc->bo)
>  DECL_MAP_ADDR_HELPERS(engine_id, lrc->bo)
> +DECL_MAP_ADDR_HELPERS(queue_timestamp, lrc->bo)
> +DECL_MAP_ADDR_HELPERS(queue_timestamp_udw, lrc->bo)
>  
>  #undef DECL_MAP_ADDR_HELPERS
>  
> @@ -885,6 +897,30 @@ static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc)
>  	return (u64)udw << 32 | ldw;
>  }
>  
> +/**
> + * xe_lrc_queue_timestamp() - Read queue timestamp value
> + * @lrc: Pointer to the lrc.
> + *
> + * Returns: queue timestamp value
> + */
> +static u64 xe_lrc_queue_timestamp(struct xe_lrc *lrc)
> +{
> +	struct xe_device *xe = lrc_to_xe(lrc);
> +	struct iosys_map map;
> +	u32 ldw, udw = 0;
> +
> +	if (!xe_lrc_is_multi_queue(lrc))
> +		return 0;
> +
> +	map = __xe_lrc_queue_timestamp_map(lrc);
> +	ldw = xe_map_read32(xe, &map);
> +
> +	map = __xe_lrc_queue_timestamp_udw_map(lrc);
> +	udw = xe_map_read32(xe, &map);
> +
> +	return (u64)udw << 32 | ldw;
> +}
> +
>  /**
>   * xe_lrc_ctx_job_timestamp_ggtt_addr() - Get ctx job timestamp GGTT address
>   * @lrc: Pointer to the lrc.
> @@ -1550,6 +1586,12 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
>  	if (lrc_to_xe(lrc)->info.has_64bit_timestamp)
>  		xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0);
>  
> +	if (xe_lrc_is_multi_queue(lrc)) {
> +		lrc->queue_timestamp = 0;
> +		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP, 0);
> +		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP_UDW, 0);
> +	}
> +
>  	if (xe->info.has_asid && vm)
>  		xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
>  
> @@ -2476,6 +2518,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
>  	snapshot->replay_size = lrc->replay_size;
>  	snapshot->lrc_snapshot = NULL;
>  	snapshot->ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(lrc));

This is an existing problem but it seems odd that snapshot for
ctx_timestamp isn't 64 bits... Since we are here, should we fix this?

> +	snapshot->queue_timestamp = lower_32_bits(xe_lrc_queue_timestamp(lrc));

Likewise here should we make this 64 bits?

Or next level for readability covert these values to MS too? I had patch
for this but it died as part of larger series [1].

Everything else in patch LGTM.

Matt

[1] https://patchwork.freedesktop.org/patch/696822/?series=159479&rev=2

>  	snapshot->ctx_job_timestamp = xe_lrc_ctx_job_timestamp(lrc);
>  	return snapshot;
>  }
> @@ -2529,6 +2572,7 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer
>  	drm_printf(p, "\tStart seqno: (memory) %d\n", snapshot->start_seqno);
>  	drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno);
>  	drm_printf(p, "\tTimestamp: 0x%08x\n", snapshot->ctx_timestamp);
> +	drm_printf(p, "\tQueue Timestamp: 0x%08x\n", snapshot->queue_timestamp);
>  	drm_printf(p, "\tJob Timestamp: 0x%08x\n", snapshot->ctx_job_timestamp);
>  
>  	if (!snapshot->lrc_snapshot)
> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
> index b544c8169967..178d9519b196 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_lrc.h
> @@ -38,6 +38,7 @@ struct xe_lrc_snapshot {
>  	u32 start_seqno;
>  	u32 seqno;
>  	u32 ctx_timestamp;
> +	u32 queue_timestamp;
>  	u32 ctx_job_timestamp;
>  };
>  
> diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
> index 93972536214a..4bca394ff024 100644
> --- a/drivers/gpu/drm/xe/xe_lrc_types.h
> +++ b/drivers/gpu/drm/xe/xe_lrc_types.h
> @@ -64,6 +64,9 @@ struct xe_lrc {
>  	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
>  	u64 ctx_timestamp;
>  
> +	/** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */
> +	u64 queue_timestamp;
> +
>  	/** @multi_queue: Multi queue LRC related information */
>  	struct {
>  		/** @multi_queue.primary: Primary queue corresponding to this LRC */
> -- 
> 2.43.0
> 

Re: [PATCH 2/5] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc

[Matthew Brost]

On Thu, Apr 09, 2026 at 01:37:17PM -0700, Umesh Nerlige Ramappa wrote:
> In secondary queue LRCs, the QUEUE TIMESTAMP register is saved and
> restored allowing us to view the individual queue run times. Add helpers
> to read this value from the LRC.
> 
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_lrc_layout.h |  3 ++
>  drivers/gpu/drm/xe/xe_lrc.c             | 44 +++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_lrc.h             |  1 +
>  drivers/gpu/drm/xe/xe_lrc_types.h       |  3 ++
>  4 files changed, 51 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> index b5eff383902c..4ab86fc369fd 100644
> --- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> +++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
> @@ -34,6 +34,9 @@
>  #define CTX_CS_INT_VEC_REG		0x5a
>  #define CTX_CS_INT_VEC_DATA		(CTX_CS_INT_VEC_REG + 1)
>  
> +#define CTX_QUEUE_TIMESTAMP		(0xd0 + 1)
> +#define CTX_QUEUE_TIMESTAMP_UDW		(0xd2 + 1)

Missed this - can we stick a Bspec reference(s) in the commit message?

Matt

> +
>  #define INDIRECT_CTX_RING_HEAD		(0x02 + 1)
>  #define INDIRECT_CTX_RING_TAIL		(0x04 + 1)
>  #define INDIRECT_CTX_RING_START		(0x06 + 1)
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index 9d12a0d2f0b5..be1030c74e21 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -788,6 +788,16 @@ static u32 __xe_lrc_ctx_timestamp_udw_offset(struct xe_lrc *lrc)
>  	return __xe_lrc_regs_offset(lrc) + CTX_TIMESTAMP_UDW * sizeof(u32);
>  }
>  
> +static u32 __xe_lrc_queue_timestamp_offset(struct xe_lrc *lrc)
> +{
> +	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP * sizeof(u32);
> +}
> +
> +static u32 __xe_lrc_queue_timestamp_udw_offset(struct xe_lrc *lrc)
> +{
> +	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP_UDW * sizeof(u32);
> +}
> +
>  static inline u32 __xe_lrc_indirect_ring_offset(struct xe_lrc *lrc)
>  {
>  	u32 offset = xe_bo_size(lrc->bo) - LRC_WA_BB_SIZE -
> @@ -837,6 +847,8 @@ DECL_MAP_ADDR_HELPERS(ctx_timestamp_udw, lrc->bo)
>  DECL_MAP_ADDR_HELPERS(parallel, lrc->bo)
>  DECL_MAP_ADDR_HELPERS(indirect_ring, lrc->bo)
>  DECL_MAP_ADDR_HELPERS(engine_id, lrc->bo)
> +DECL_MAP_ADDR_HELPERS(queue_timestamp, lrc->bo)
> +DECL_MAP_ADDR_HELPERS(queue_timestamp_udw, lrc->bo)
>  
>  #undef DECL_MAP_ADDR_HELPERS
>  
> @@ -885,6 +897,30 @@ static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc)
>  	return (u64)udw << 32 | ldw;
>  }
>  
> +/**
> + * xe_lrc_queue_timestamp() - Read queue timestamp value
> + * @lrc: Pointer to the lrc.
> + *
> + * Returns: queue timestamp value
> + */
> +static u64 xe_lrc_queue_timestamp(struct xe_lrc *lrc)
> +{
> +	struct xe_device *xe = lrc_to_xe(lrc);
> +	struct iosys_map map;
> +	u32 ldw, udw = 0;
> +
> +	if (!xe_lrc_is_multi_queue(lrc))
> +		return 0;
> +
> +	map = __xe_lrc_queue_timestamp_map(lrc);
> +	ldw = xe_map_read32(xe, &map);
> +
> +	map = __xe_lrc_queue_timestamp_udw_map(lrc);
> +	udw = xe_map_read32(xe, &map);
> +
> +	return (u64)udw << 32 | ldw;
> +}
> +
>  /**
>   * xe_lrc_ctx_job_timestamp_ggtt_addr() - Get ctx job timestamp GGTT address
>   * @lrc: Pointer to the lrc.
> @@ -1550,6 +1586,12 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
>  	if (lrc_to_xe(lrc)->info.has_64bit_timestamp)
>  		xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0);
>  
> +	if (xe_lrc_is_multi_queue(lrc)) {
> +		lrc->queue_timestamp = 0;
> +		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP, 0);
> +		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP_UDW, 0);
> +	}
> +
>  	if (xe->info.has_asid && vm)
>  		xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
>  
> @@ -2476,6 +2518,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
>  	snapshot->replay_size = lrc->replay_size;
>  	snapshot->lrc_snapshot = NULL;
>  	snapshot->ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(lrc));
> +	snapshot->queue_timestamp = lower_32_bits(xe_lrc_queue_timestamp(lrc));
>  	snapshot->ctx_job_timestamp = xe_lrc_ctx_job_timestamp(lrc);
>  	return snapshot;
>  }
> @@ -2529,6 +2572,7 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer
>  	drm_printf(p, "\tStart seqno: (memory) %d\n", snapshot->start_seqno);
>  	drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno);
>  	drm_printf(p, "\tTimestamp: 0x%08x\n", snapshot->ctx_timestamp);
> +	drm_printf(p, "\tQueue Timestamp: 0x%08x\n", snapshot->queue_timestamp);
>  	drm_printf(p, "\tJob Timestamp: 0x%08x\n", snapshot->ctx_job_timestamp);
>  
>  	if (!snapshot->lrc_snapshot)
> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
> index b544c8169967..178d9519b196 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_lrc.h
> @@ -38,6 +38,7 @@ struct xe_lrc_snapshot {
>  	u32 start_seqno;
>  	u32 seqno;
>  	u32 ctx_timestamp;
> +	u32 queue_timestamp;
>  	u32 ctx_job_timestamp;
>  };
>  
> diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
> index 93972536214a..4bca394ff024 100644
> --- a/drivers/gpu/drm/xe/xe_lrc_types.h
> +++ b/drivers/gpu/drm/xe/xe_lrc_types.h
> @@ -64,6 +64,9 @@ struct xe_lrc {
>  	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
>  	u64 ctx_timestamp;
>  
> +	/** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */
> +	u64 queue_timestamp;
> +
>  	/** @multi_queue: Multi queue LRC related information */
>  	struct {
>  		/** @multi_queue.primary: Primary queue corresponding to this LRC */
> -- 
> 2.43.0
> 

Re: [PATCH 2/5] drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 01:37:17PM -0700, Umesh Nerlige Ramappa wrote:
>In secondary queue LRCs, the QUEUE TIMESTAMP register is saved and
>restored allowing us to view the individual queue run times. Add helpers
>to read this value from the LRC.
>
>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/regs/xe_lrc_layout.h |  3 ++
> drivers/gpu/drm/xe/xe_lrc.c             | 44 +++++++++++++++++++++++++
> drivers/gpu/drm/xe/xe_lrc.h             |  1 +
> drivers/gpu/drm/xe/xe_lrc_types.h       |  3 ++
> 4 files changed, 51 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>index b5eff383902c..4ab86fc369fd 100644
>--- a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>+++ b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
>@@ -34,6 +34,9 @@
> #define CTX_CS_INT_VEC_REG		0x5a
> #define CTX_CS_INT_VEC_DATA		(CTX_CS_INT_VEC_REG + 1)
>
>+#define CTX_QUEUE_TIMESTAMP		(0xd0 + 1)
>+#define CTX_QUEUE_TIMESTAMP_UDW		(0xd2 + 1)
>+

Should we also add these to XE2_CTX_COMMON() in xe_lrc.c?

> #define INDIRECT_CTX_RING_HEAD		(0x02 + 1)
> #define INDIRECT_CTX_RING_TAIL		(0x04 + 1)
> #define INDIRECT_CTX_RING_START		(0x06 + 1)
>diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>index 9d12a0d2f0b5..be1030c74e21 100644
>--- a/drivers/gpu/drm/xe/xe_lrc.c
>+++ b/drivers/gpu/drm/xe/xe_lrc.c
>@@ -788,6 +788,16 @@ static u32 __xe_lrc_ctx_timestamp_udw_offset(struct xe_lrc *lrc)
> 	return __xe_lrc_regs_offset(lrc) + CTX_TIMESTAMP_UDW * sizeof(u32);
> }
>
>+static u32 __xe_lrc_queue_timestamp_offset(struct xe_lrc *lrc)
>+{
>+	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP * sizeof(u32);
>+}
>+
>+static u32 __xe_lrc_queue_timestamp_udw_offset(struct xe_lrc *lrc)
>+{
>+	return __xe_lrc_regs_offset(lrc) + CTX_QUEUE_TIMESTAMP_UDW * sizeof(u32);
>+}
>+
> static inline u32 __xe_lrc_indirect_ring_offset(struct xe_lrc *lrc)
> {
> 	u32 offset = xe_bo_size(lrc->bo) - LRC_WA_BB_SIZE -
>@@ -837,6 +847,8 @@ DECL_MAP_ADDR_HELPERS(ctx_timestamp_udw, lrc->bo)
> DECL_MAP_ADDR_HELPERS(parallel, lrc->bo)
> DECL_MAP_ADDR_HELPERS(indirect_ring, lrc->bo)
> DECL_MAP_ADDR_HELPERS(engine_id, lrc->bo)
>+DECL_MAP_ADDR_HELPERS(queue_timestamp, lrc->bo)
>+DECL_MAP_ADDR_HELPERS(queue_timestamp_udw, lrc->bo)
>
> #undef DECL_MAP_ADDR_HELPERS
>
>@@ -885,6 +897,30 @@ static u64 xe_lrc_ctx_timestamp(struct xe_lrc *lrc)
> 	return (u64)udw << 32 | ldw;
> }
>
>+/**
>+ * xe_lrc_queue_timestamp() - Read queue timestamp value
>+ * @lrc: Pointer to the lrc.
>+ *
>+ * Returns: queue timestamp value
>+ */
>+static u64 xe_lrc_queue_timestamp(struct xe_lrc *lrc)
>+{
>+	struct xe_device *xe = lrc_to_xe(lrc);
>+	struct iosys_map map;
>+	u32 ldw, udw = 0;
>+
>+	if (!xe_lrc_is_multi_queue(lrc))
>+		return 0;
>+
>+	map = __xe_lrc_queue_timestamp_map(lrc);
>+	ldw = xe_map_read32(xe, &map);
>+
>+	map = __xe_lrc_queue_timestamp_udw_map(lrc);
>+	udw = xe_map_read32(xe, &map);
>+
>+	return (u64)udw << 32 | ldw;
>+}

Should we make this function similar to xe_lrc_ctx_timestamp()
with the xe->info.has_64bit_timestamp check?

Other than these, patch LGTM.
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>+
> /**
>  * xe_lrc_ctx_job_timestamp_ggtt_addr() - Get ctx job timestamp GGTT address
>  * @lrc: Pointer to the lrc.
>@@ -1550,6 +1586,12 @@ static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct
> 	if (lrc_to_xe(lrc)->info.has_64bit_timestamp)
> 		xe_lrc_write_ctx_reg(lrc, CTX_TIMESTAMP_UDW, 0);
>
>+	if (xe_lrc_is_multi_queue(lrc)) {
>+		lrc->queue_timestamp = 0;
>+		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP, 0);
>+		xe_lrc_write_ctx_reg(lrc, CTX_QUEUE_TIMESTAMP_UDW, 0);
>+	}
>+
> 	if (xe->info.has_asid && vm)
> 		xe_lrc_write_ctx_reg(lrc, CTX_ASID, vm->usm.asid);
>
>@@ -2476,6 +2518,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc)
> 	snapshot->replay_size = lrc->replay_size;
> 	snapshot->lrc_snapshot = NULL;
> 	snapshot->ctx_timestamp = lower_32_bits(xe_lrc_ctx_timestamp(lrc));
>+	snapshot->queue_timestamp = lower_32_bits(xe_lrc_queue_timestamp(lrc));
> 	snapshot->ctx_job_timestamp = xe_lrc_ctx_job_timestamp(lrc);
> 	return snapshot;
> }
>@@ -2529,6 +2572,7 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer
> 	drm_printf(p, "\tStart seqno: (memory) %d\n", snapshot->start_seqno);
> 	drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno);
> 	drm_printf(p, "\tTimestamp: 0x%08x\n", snapshot->ctx_timestamp);
>+	drm_printf(p, "\tQueue Timestamp: 0x%08x\n", snapshot->queue_timestamp);
> 	drm_printf(p, "\tJob Timestamp: 0x%08x\n", snapshot->ctx_job_timestamp);
>
> 	if (!snapshot->lrc_snapshot)
>diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>index b544c8169967..178d9519b196 100644
>--- a/drivers/gpu/drm/xe/xe_lrc.h
>+++ b/drivers/gpu/drm/xe/xe_lrc.h
>@@ -38,6 +38,7 @@ struct xe_lrc_snapshot {
> 	u32 start_seqno;
> 	u32 seqno;
> 	u32 ctx_timestamp;
>+	u32 queue_timestamp;
> 	u32 ctx_job_timestamp;
> };
>
>diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
>index 93972536214a..4bca394ff024 100644
>--- a/drivers/gpu/drm/xe/xe_lrc_types.h
>+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
>@@ -64,6 +64,9 @@ struct xe_lrc {
> 	/** @ctx_timestamp: readout value of CTX_TIMESTAMP on last update */
> 	u64 ctx_timestamp;
>
>+	/** @queue_timestamp: value of QUEUE_TIMESTAMP on last update */
>+	u64 queue_timestamp;
>+
> 	/** @multi_queue: Multi queue LRC related information */
> 	struct {
> 		/** @multi_queue.primary: Primary queue corresponding to this LRC */
>-- 
>2.43.0
>

[PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Umesh Nerlige Ramappa]

If a queue is currently active on the CS, query the QUEUE TIMESTAMP
register to get an up to date value of the runtime. To do so, ensure
that the primary queue is active and then check if the secondary queue
is executing on the CS.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
 drivers/gpu/drm/xe/xe_lrc.c              | 122 +++++++++++++++++++----
 drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 +++++
 3 files changed, 133 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
index 1b4a7e9a703d..af6af6f3f5e8 100644
--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
@@ -170,6 +170,10 @@
 #define   GFX_MSIX_INTERRUPT_ENABLE		REG_BIT(13)
 
 #define RING_CSMQDEBUG(base)			XE_REG((base) + 0x2b0)
+#define   CURRENT_ACTIVE_QUEUE_ID_MASK		REG_GENMASK(7, 0)
+
+#define RING_QUEUE_TIMESTAMP(base)		XE_REG((base) + 0x4c0)
+#define RING_QUEUE_TIMESTAMP_UDW(base)		XE_REG((base) + 0x4c0 + 4)
 
 #define RING_TIMESTAMP(base)			XE_REG((base) + 0x358)
 
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index be1030c74e21..1e407a761076 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -21,6 +21,7 @@
 #include "xe_configfs.h"
 #include "xe_device.h"
 #include "xe_drm_client.h"
+#include "xe_exec_queue.h"
 #include "xe_exec_queue_types.h"
 #include "xe_gt.h"
 #include "xe_gt_printk.h"
@@ -2638,17 +2639,72 @@ static int get_ctx_timestamp(struct xe_lrc *lrc, u32 engine_id, u64 *reg_ctx_ts)
 	return 0;
 }
 
-/**
- * xe_lrc_timestamp() - Current ctx timestamp
- * @lrc: Pointer to the lrc.
- *
- * Return latest ctx timestamp. With support for active contexts, the
- * calculation may be slightly racy, so follow a read-again logic to ensure that
- * the context is still active before returning the right timestamp.
- *
- * Returns: New ctx timestamp value
- */
-u64 xe_lrc_timestamp(struct xe_lrc *lrc)
+static struct xe_hw_engine *get_hwe(struct xe_gt *gt, u32 engine_id)
+{
+	u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);
+	u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);
+	struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, class, instance, false);
+
+	if (xe_gt_WARN_ONCE(gt, !hwe || xe_hw_engine_is_reserved(hwe),
+			    "Unexpected engine class:instance %d:%d for context utilization\n",
+			    class, instance))
+		return NULL;
+
+	return hwe;
+}
+
+static u64 xe_lrc_multi_queue_timestamp(struct xe_lrc *lrc)
+{
+	struct xe_exec_queue *primary_q = lrc->multi_queue.primary;
+	struct xe_lrc *primary_lrc;
+	struct xe_hw_engine *hwe;
+	struct xe_mmio *mmio;
+	u32 engine_id, queue_id;
+	u64 reg_ts = lrc->queue_timestamp;
+
+	/* Ensure we are PF, primary context is active */
+	if (IS_SRIOV_VF(lrc_to_xe(lrc)) ||
+	    !primary_q || !primary_q->lrc[0] ||
+	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
+		return xe_lrc_queue_timestamp(lrc);
+
+	/* if primary queue is active, we have a valid engine id */
+	primary_lrc = primary_q->lrc[0];
+	engine_id = xe_lrc_engine_id(primary_lrc);
+	hwe = get_hwe(primary_lrc->gt, engine_id);
+	if (!hwe)
+		return xe_lrc_queue_timestamp(lrc);
+
+	mmio = &hwe->gt->mmio;
+	/* check if the queue is currently active and then read timestamp */
+	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
+				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
+	if (queue_id != lrc->multi_queue.pos)
+		return xe_lrc_queue_timestamp(lrc);
+
+	reg_ts = xe_mmio_read64_2x32(mmio, RING_QUEUE_TIMESTAMP(hwe->mmio_base));
+
+	/* double check queue and primary queue are still active */
+	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
+				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
+	if (queue_id != lrc->multi_queue.pos ||
+	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
+		return xe_lrc_queue_timestamp(lrc);
+
+	return reg_ts;
+}
+
+static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc, u64 *old_ts)
+{
+	*old_ts = lrc->queue_timestamp;
+	lrc->queue_timestamp = xe_lrc_multi_queue_timestamp(lrc);
+
+	trace_xe_lrc_update_queue_timestamp(lrc, *old_ts);
+
+	return lrc->queue_timestamp;
+}
+
+static u64 xe_lrc_single_queue_timestamp(struct xe_lrc *lrc)
 {
 	u64 lrc_ts, reg_ts, new_ts = lrc->ctx_timestamp;
 	u32 engine_id;
@@ -2680,24 +2736,50 @@ u64 xe_lrc_timestamp(struct xe_lrc *lrc)
 	return new_ts;
 }
 
+static u64 xe_lrc_update_ctx_timestamp(struct xe_lrc *lrc, u64 *old_ts)
+{
+	*old_ts = lrc->ctx_timestamp;
+	lrc->ctx_timestamp = xe_lrc_single_queue_timestamp(lrc);
+
+	trace_xe_lrc_update_timestamp(lrc, *old_ts);
+
+	return lrc->ctx_timestamp;
+}
+
+/**
+ * xe_lrc_timestamp() - Current lrc timestamp
+ * @lrc: Pointer to the lrc.
+ *
+ * Return latest lrc timestamp. With support for active contexts/queues, the
+ * calculation may be slightly racy, so follow a read-again logic to ensure that
+ * the context/queue is still active before returning the right timestamp.
+ *
+ * Returns: New lrc timestamp value
+ */
+u64 xe_lrc_timestamp(struct xe_lrc *lrc)
+{
+	if (xe_lrc_is_multi_queue(lrc))
+		return xe_lrc_multi_queue_timestamp(lrc);
+	else
+		return xe_lrc_single_queue_timestamp(lrc);
+}
+
 /**
- * xe_lrc_update_timestamp() - Update ctx timestamp
+ * xe_lrc_update_timestamp() - Update lrc timestamp
  * @lrc: Pointer to the lrc.
  * @old_ts: Old timestamp value
  *
- * Populate @old_ts current saved ctx timestamp, read new ctx timestamp and
+ * Populate @old_ts with current saved lrc timestamp, read new lrc timestamp and
  * update saved value.
  *
- * Returns: New ctx timestamp value
+ * Returns: New lrc timestamp value
  */
 u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts)
 {
-	*old_ts = lrc->ctx_timestamp;
-	lrc->ctx_timestamp = xe_lrc_timestamp(lrc);
-
-	trace_xe_lrc_update_timestamp(lrc, *old_ts);
-
-	return lrc->ctx_timestamp;
+	if (xe_lrc_is_multi_queue(lrc))
+		return xe_lrc_update_multi_queue_timestamp(lrc, old_ts);
+	else
+		return xe_lrc_update_ctx_timestamp(lrc, old_ts);
 }
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h b/drivers/gpu/drm/xe/xe_trace_lrc.h
index d525cbee1e34..988d360143dc 100644
--- a/drivers/gpu/drm/xe/xe_trace_lrc.h
+++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
@@ -12,6 +12,7 @@
 #include <linux/tracepoint.h>
 #include <linux/types.h>
 
+#include "xe_exec_queue_types.h"
 #include "xe_gt_types.h"
 #include "xe_lrc.h"
 #include "xe_lrc_types.h"
@@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
 		      __get_str(device_id))
 );
 
+TRACE_EVENT(xe_lrc_update_queue_timestamp,
+	    TP_PROTO(struct xe_lrc *lrc, uint64_t old),
+	    TP_ARGS(lrc, old),
+	    TP_STRUCT__entry(
+		     __field(struct xe_lrc *, lrc)
+		     __field(u8, pos)
+		     __field(u64, old)
+		     __field(u64, new)
+		     __string(name, lrc->fence_ctx.name)
+		     __string(device_id, __dev_name_lrc(lrc))
+	    ),
+
+	    TP_fast_assign(
+		   __entry->lrc	= lrc;
+		   __entry->pos = lrc->multi_queue.pos;
+		   __entry->old = old;
+		   __entry->new = lrc->queue_timestamp;
+		   __assign_str(name);
+		   __assign_str(device_id);
+		   ),
+	    TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu device_id:%s",
+		      __entry->lrc, __entry->pos, __get_str(name),
+		      __entry->old, __entry->new,
+		      __get_str(device_id))
+);
+
 #endif
 
 /* This part must be outside protection */
-- 
2.43.0

Re: [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Matthew Brost]

On Thu, Apr 09, 2026 at 01:37:18PM -0700, Umesh Nerlige Ramappa wrote:
> If a queue is currently active on the CS, query the QUEUE TIMESTAMP
> register to get an up to date value of the runtime. To do so, ensure
> that the primary queue is active and then check if the secondary queue
> is executing on the CS.
> 
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
>  drivers/gpu/drm/xe/xe_lrc.c              | 122 +++++++++++++++++++----
>  drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 +++++
>  3 files changed, 133 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 1b4a7e9a703d..af6af6f3f5e8 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -170,6 +170,10 @@
>  #define   GFX_MSIX_INTERRUPT_ENABLE		REG_BIT(13)
>  
>  #define RING_CSMQDEBUG(base)			XE_REG((base) + 0x2b0)
> +#define   CURRENT_ACTIVE_QUEUE_ID_MASK		REG_GENMASK(7, 0)
> +
> +#define RING_QUEUE_TIMESTAMP(base)		XE_REG((base) + 0x4c0)
> +#define RING_QUEUE_TIMESTAMP_UDW(base)		XE_REG((base) + 0x4c0 + 4)
>  
>  #define RING_TIMESTAMP(base)			XE_REG((base) + 0x358)
>  
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
> index be1030c74e21..1e407a761076 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -21,6 +21,7 @@
>  #include "xe_configfs.h"
>  #include "xe_device.h"
>  #include "xe_drm_client.h"
> +#include "xe_exec_queue.h"
>  #include "xe_exec_queue_types.h"
>  #include "xe_gt.h"
>  #include "xe_gt_printk.h"
> @@ -2638,17 +2639,72 @@ static int get_ctx_timestamp(struct xe_lrc *lrc, u32 engine_id, u64 *reg_ctx_ts)
>  	return 0;
>  }
>  
> -/**
> - * xe_lrc_timestamp() - Current ctx timestamp
> - * @lrc: Pointer to the lrc.
> - *
> - * Return latest ctx timestamp. With support for active contexts, the
> - * calculation may be slightly racy, so follow a read-again logic to ensure that
> - * the context is still active before returning the right timestamp.
> - *
> - * Returns: New ctx timestamp value
> - */
> -u64 xe_lrc_timestamp(struct xe_lrc *lrc)
> +static struct xe_hw_engine *get_hwe(struct xe_gt *gt, u32 engine_id)
> +{
> +	u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);
> +	u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);
> +	struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, class, instance, false);
> +
> +	if (xe_gt_WARN_ONCE(gt, !hwe || xe_hw_engine_is_reserved(hwe),
> +			    "Unexpected engine class:instance %d:%d for context utilization\n",
> +			    class, instance))
> +		return NULL;
> +
> +	return hwe;
> +}
> +
> +static u64 xe_lrc_multi_queue_timestamp(struct xe_lrc *lrc)

This function looks correct but it is little hard to follow.

Any change you can refactor this function so it more or less looks like
the original xe_lrc_timestamp, now xe_lrc_single_queue_timestamp?

e.g., A helper like get_ctx_timestamp -> get_queue_timestamp might this
easier to follow.

Matt

> +{
> +	struct xe_exec_queue *primary_q = lrc->multi_queue.primary;
> +	struct xe_lrc *primary_lrc;
> +	struct xe_hw_engine *hwe;
> +	struct xe_mmio *mmio;
> +	u32 engine_id, queue_id;
> +	u64 reg_ts = lrc->queue_timestamp;
> +
> +	/* Ensure we are PF, primary context is active */
> +	if (IS_SRIOV_VF(lrc_to_xe(lrc)) ||
> +	    !primary_q || !primary_q->lrc[0] ||
> +	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
> +		return xe_lrc_queue_timestamp(lrc);
> +
> +	/* if primary queue is active, we have a valid engine id */
> +	primary_lrc = primary_q->lrc[0];
> +	engine_id = xe_lrc_engine_id(primary_lrc);
> +	hwe = get_hwe(primary_lrc->gt, engine_id);
> +	if (!hwe)
> +		return xe_lrc_queue_timestamp(lrc);
> +
> +	mmio = &hwe->gt->mmio;
> +	/* check if the queue is currently active and then read timestamp */
> +	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
> +				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
> +	if (queue_id != lrc->multi_queue.pos)
> +		return xe_lrc_queue_timestamp(lrc);
> +
> +	reg_ts = xe_mmio_read64_2x32(mmio, RING_QUEUE_TIMESTAMP(hwe->mmio_base));
> +
> +	/* double check queue and primary queue are still active */
> +	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
> +				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
> +	if (queue_id != lrc->multi_queue.pos ||
> +	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
> +		return xe_lrc_queue_timestamp(lrc);
> +
> +	return reg_ts;
> +}
> +
> +static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc, u64 *old_ts)
> +{
> +	*old_ts = lrc->queue_timestamp;
> +	lrc->queue_timestamp = xe_lrc_multi_queue_timestamp(lrc);
> +
> +	trace_xe_lrc_update_queue_timestamp(lrc, *old_ts);
> +
> +	return lrc->queue_timestamp;
> +}
> +
> +static u64 xe_lrc_single_queue_timestamp(struct xe_lrc *lrc)
>  {
>  	u64 lrc_ts, reg_ts, new_ts = lrc->ctx_timestamp;
>  	u32 engine_id;
> @@ -2680,24 +2736,50 @@ u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>  	return new_ts;
>  }
>  
> +static u64 xe_lrc_update_ctx_timestamp(struct xe_lrc *lrc, u64 *old_ts)
> +{
> +	*old_ts = lrc->ctx_timestamp;
> +	lrc->ctx_timestamp = xe_lrc_single_queue_timestamp(lrc);
> +
> +	trace_xe_lrc_update_timestamp(lrc, *old_ts);
> +
> +	return lrc->ctx_timestamp;
> +}
> +
> +/**
> + * xe_lrc_timestamp() - Current lrc timestamp
> + * @lrc: Pointer to the lrc.
> + *
> + * Return latest lrc timestamp. With support for active contexts/queues, the
> + * calculation may be slightly racy, so follow a read-again logic to ensure that
> + * the context/queue is still active before returning the right timestamp.
> + *
> + * Returns: New lrc timestamp value
> + */
> +u64 xe_lrc_timestamp(struct xe_lrc *lrc)
> +{
> +	if (xe_lrc_is_multi_queue(lrc))
> +		return xe_lrc_multi_queue_timestamp(lrc);
> +	else
> +		return xe_lrc_single_queue_timestamp(lrc);
> +}
> +
>  /**
> - * xe_lrc_update_timestamp() - Update ctx timestamp
> + * xe_lrc_update_timestamp() - Update lrc timestamp
>   * @lrc: Pointer to the lrc.
>   * @old_ts: Old timestamp value
>   *
> - * Populate @old_ts current saved ctx timestamp, read new ctx timestamp and
> + * Populate @old_ts with current saved lrc timestamp, read new lrc timestamp and
>   * update saved value.
>   *
> - * Returns: New ctx timestamp value
> + * Returns: New lrc timestamp value
>   */
>  u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>  {
> -	*old_ts = lrc->ctx_timestamp;
> -	lrc->ctx_timestamp = xe_lrc_timestamp(lrc);
> -
> -	trace_xe_lrc_update_timestamp(lrc, *old_ts);
> -
> -	return lrc->ctx_timestamp;
> +	if (xe_lrc_is_multi_queue(lrc))
> +		return xe_lrc_update_multi_queue_timestamp(lrc, old_ts);
> +	else
> +		return xe_lrc_update_ctx_timestamp(lrc, old_ts);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h b/drivers/gpu/drm/xe/xe_trace_lrc.h
> index d525cbee1e34..988d360143dc 100644
> --- a/drivers/gpu/drm/xe/xe_trace_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
> @@ -12,6 +12,7 @@
>  #include <linux/tracepoint.h>
>  #include <linux/types.h>
>  
> +#include "xe_exec_queue_types.h"
>  #include "xe_gt_types.h"
>  #include "xe_lrc.h"
>  #include "xe_lrc_types.h"
> @@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
>  		      __get_str(device_id))
>  );
>  
> +TRACE_EVENT(xe_lrc_update_queue_timestamp,
> +	    TP_PROTO(struct xe_lrc *lrc, uint64_t old),
> +	    TP_ARGS(lrc, old),
> +	    TP_STRUCT__entry(
> +		     __field(struct xe_lrc *, lrc)
> +		     __field(u8, pos)
> +		     __field(u64, old)
> +		     __field(u64, new)
> +		     __string(name, lrc->fence_ctx.name)
> +		     __string(device_id, __dev_name_lrc(lrc))
> +	    ),
> +
> +	    TP_fast_assign(
> +		   __entry->lrc	= lrc;
> +		   __entry->pos = lrc->multi_queue.pos;
> +		   __entry->old = old;
> +		   __entry->new = lrc->queue_timestamp;
> +		   __assign_str(name);
> +		   __assign_str(device_id);
> +		   ),
> +	    TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu device_id:%s",
> +		      __entry->lrc, __entry->pos, __get_str(name),
> +		      __entry->old, __entry->new,
> +		      __get_str(device_id))
> +);
> +
>  #endif
>  
>  /* This part must be outside protection */
> -- 
> 2.43.0
> 

Re: [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Summers, Stuart]

On Thu, 2026-04-09 at 13:37 -0700, Umesh Nerlige Ramappa wrote:
> If a queue is currently active on the CS, query the QUEUE TIMESTAMP
> register to get an up to date value of the runtime. To do so, ensure
> that the primary queue is active and then check if the secondary
> queue
> is executing on the CS.
> 
> Signed-off-by: Umesh Nerlige Ramappa
> <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
>  drivers/gpu/drm/xe/xe_lrc.c              | 122 +++++++++++++++++++--
> --
>  drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 +++++
>  3 files changed, 133 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 1b4a7e9a703d..af6af6f3f5e8 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -170,6 +170,10 @@
>  #define   GFX_MSIX_INTERRUPT_ENABLE            REG_BIT(13)
>  
>  #define RING_CSMQDEBUG(base)                   XE_REG((base) +
> 0x2b0)
> +#define   CURRENT_ACTIVE_QUEUE_ID_MASK         REG_GENMASK(7, 0)
> +
> +#define RING_QUEUE_TIMESTAMP(base)             XE_REG((base) +
> 0x4c0)
> +#define RING_QUEUE_TIMESTAMP_UDW(base)         XE_REG((base) + 0x4c0
> + 4)

I'm looking in bspec (73988) for the queue timestamp vs the context
timestamp (60318) and the description is identical. Why do we need to
use this instead of overloading the context timestamp? These multi
queue queues are still contexts from the perspective of the CS. Does
the queue timestamp give us something unique for multi queue? Where is
that documented?

Thanks,
Stuart

>  
>  #define RING_TIMESTAMP(base)                   XE_REG((base) +
> 0x358)
>  
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c
> b/drivers/gpu/drm/xe/xe_lrc.c
> index be1030c74e21..1e407a761076 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -21,6 +21,7 @@
>  #include "xe_configfs.h"
>  #include "xe_device.h"
>  #include "xe_drm_client.h"
> +#include "xe_exec_queue.h"
>  #include "xe_exec_queue_types.h"
>  #include "xe_gt.h"
>  #include "xe_gt_printk.h"
> @@ -2638,17 +2639,72 @@ static int get_ctx_timestamp(struct xe_lrc
> *lrc, u32 engine_id, u64 *reg_ctx_ts)
>         return 0;
>  }
>  
> -/**
> - * xe_lrc_timestamp() - Current ctx timestamp
> - * @lrc: Pointer to the lrc.
> - *
> - * Return latest ctx timestamp. With support for active contexts,
> the
> - * calculation may be slightly racy, so follow a read-again logic to
> ensure that
> - * the context is still active before returning the right timestamp.
> - *
> - * Returns: New ctx timestamp value
> - */
> -u64 xe_lrc_timestamp(struct xe_lrc *lrc)
> +static struct xe_hw_engine *get_hwe(struct xe_gt *gt, u32 engine_id)
> +{
> +       u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);
> +       u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);
> +       struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, class,
> instance, false);
> +
> +       if (xe_gt_WARN_ONCE(gt, !hwe ||
> xe_hw_engine_is_reserved(hwe),
> +                           "Unexpected engine class:instance %d:%d
> for context utilization\n",
> +                           class, instance))
> +               return NULL;
> +
> +       return hwe;
> +}
> +
> +static u64 xe_lrc_multi_queue_timestamp(struct xe_lrc *lrc)
> +{
> +       struct xe_exec_queue *primary_q = lrc->multi_queue.primary;
> +       struct xe_lrc *primary_lrc;
> +       struct xe_hw_engine *hwe;
> +       struct xe_mmio *mmio;
> +       u32 engine_id, queue_id;
> +       u64 reg_ts = lrc->queue_timestamp;
> +
> +       /* Ensure we are PF, primary context is active */
> +       if (IS_SRIOV_VF(lrc_to_xe(lrc)) ||
> +           !primary_q || !primary_q->lrc[0] ||
> +           xe_lrc_ctx_timestamp(primary_q->lrc[0]) !=
> CONTEXT_ACTIVE)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       /* if primary queue is active, we have a valid engine id */
> +       primary_lrc = primary_q->lrc[0];
> +       engine_id = xe_lrc_engine_id(primary_lrc);
> +       hwe = get_hwe(primary_lrc->gt, engine_id);
> +       if (!hwe)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       mmio = &hwe->gt->mmio;
> +       /* check if the queue is currently active and then read
> timestamp */
> +       queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
> +                                xe_mmio_read32(mmio,
> RING_CSMQDEBUG(hwe->mmio_base)));
> +       if (queue_id != lrc->multi_queue.pos)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       reg_ts = xe_mmio_read64_2x32(mmio, RING_QUEUE_TIMESTAMP(hwe-
> >mmio_base));
> +
> +       /* double check queue and primary queue are still active */
> +       queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
> +                                xe_mmio_read32(mmio,
> RING_CSMQDEBUG(hwe->mmio_base)));
> +       if (queue_id != lrc->multi_queue.pos ||
> +           xe_lrc_ctx_timestamp(primary_q->lrc[0]) !=
> CONTEXT_ACTIVE)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       return reg_ts;
> +}
> +
> +static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc,
> u64 *old_ts)
> +{
> +       *old_ts = lrc->queue_timestamp;
> +       lrc->queue_timestamp = xe_lrc_multi_queue_timestamp(lrc);
> +
> +       trace_xe_lrc_update_queue_timestamp(lrc, *old_ts);
> +
> +       return lrc->queue_timestamp;
> +}
> +
> +static u64 xe_lrc_single_queue_timestamp(struct xe_lrc *lrc)
>  {
>         u64 lrc_ts, reg_ts, new_ts = lrc->ctx_timestamp;
>         u32 engine_id;
> @@ -2680,24 +2736,50 @@ u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>         return new_ts;
>  }
>  
> +static u64 xe_lrc_update_ctx_timestamp(struct xe_lrc *lrc, u64
> *old_ts)
> +{
> +       *old_ts = lrc->ctx_timestamp;
> +       lrc->ctx_timestamp = xe_lrc_single_queue_timestamp(lrc);
> +
> +       trace_xe_lrc_update_timestamp(lrc, *old_ts);
> +
> +       return lrc->ctx_timestamp;
> +}
> +
> +/**
> + * xe_lrc_timestamp() - Current lrc timestamp
> + * @lrc: Pointer to the lrc.
> + *
> + * Return latest lrc timestamp. With support for active
> contexts/queues, the
> + * calculation may be slightly racy, so follow a read-again logic to
> ensure that
> + * the context/queue is still active before returning the right
> timestamp.
> + *
> + * Returns: New lrc timestamp value
> + */
> +u64 xe_lrc_timestamp(struct xe_lrc *lrc)
> +{
> +       if (xe_lrc_is_multi_queue(lrc))
> +               return xe_lrc_multi_queue_timestamp(lrc);
> +       else
> +               return xe_lrc_single_queue_timestamp(lrc);
> +}
> +
>  /**
> - * xe_lrc_update_timestamp() - Update ctx timestamp
> + * xe_lrc_update_timestamp() - Update lrc timestamp
>   * @lrc: Pointer to the lrc.
>   * @old_ts: Old timestamp value
>   *
> - * Populate @old_ts current saved ctx timestamp, read new ctx
> timestamp and
> + * Populate @old_ts with current saved lrc timestamp, read new lrc
> timestamp and
>   * update saved value.
>   *
> - * Returns: New ctx timestamp value
> + * Returns: New lrc timestamp value
>   */
>  u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>  {
> -       *old_ts = lrc->ctx_timestamp;
> -       lrc->ctx_timestamp = xe_lrc_timestamp(lrc);
> -
> -       trace_xe_lrc_update_timestamp(lrc, *old_ts);
> -
> -       return lrc->ctx_timestamp;
> +       if (xe_lrc_is_multi_queue(lrc))
> +               return xe_lrc_update_multi_queue_timestamp(lrc,
> old_ts);
> +       else
> +               return xe_lrc_update_ctx_timestamp(lrc, old_ts);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h
> b/drivers/gpu/drm/xe/xe_trace_lrc.h
> index d525cbee1e34..988d360143dc 100644
> --- a/drivers/gpu/drm/xe/xe_trace_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
> @@ -12,6 +12,7 @@
>  #include <linux/tracepoint.h>
>  #include <linux/types.h>
>  
> +#include "xe_exec_queue_types.h"
>  #include "xe_gt_types.h"
>  #include "xe_lrc.h"
>  #include "xe_lrc_types.h"
> @@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
>                       __get_str(device_id))
>  );
>  
> +TRACE_EVENT(xe_lrc_update_queue_timestamp,
> +           TP_PROTO(struct xe_lrc *lrc, uint64_t old),
> +           TP_ARGS(lrc, old),
> +           TP_STRUCT__entry(
> +                    __field(struct xe_lrc *, lrc)
> +                    __field(u8, pos)
> +                    __field(u64, old)
> +                    __field(u64, new)
> +                    __string(name, lrc->fence_ctx.name)
> +                    __string(device_id, __dev_name_lrc(lrc))
> +           ),
> +
> +           TP_fast_assign(
> +                  __entry->lrc = lrc;
> +                  __entry->pos = lrc->multi_queue.pos;
> +                  __entry->old = old;
> +                  __entry->new = lrc->queue_timestamp;
> +                  __assign_str(name);
> +                  __assign_str(device_id);
> +                  ),
> +           TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu
> device_id:%s",
> +                     __entry->lrc, __entry->pos, __get_str(name),
> +                     __entry->old, __entry->new,
> +                     __get_str(device_id))
> +);
> +
>  #endif
>  
>  /* This part must be outside protection */

Re: [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Umesh Nerlige Ramappa]

On Thu, Apr 09, 2026 at 03:23:56PM -0700, Summers, Stuart wrote:
>On Thu, 2026-04-09 at 13:37 -0700, Umesh Nerlige Ramappa wrote:
>> If a queue is currently active on the CS, query the QUEUE TIMESTAMP
>> register to get an up to date value of the runtime. To do so, ensure
>> that the primary queue is active and then check if the secondary
>> queue
>> is executing on the CS.
>>
>> Signed-off-by: Umesh Nerlige Ramappa
>> <umesh.nerlige.ramappa@intel.com>
>> ---
>>  drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
>>  drivers/gpu/drm/xe/xe_lrc.c              | 122 +++++++++++++++++++--
>> --
>>  drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 +++++
>>  3 files changed, 133 insertions(+), 20 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>> b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>> index 1b4a7e9a703d..af6af6f3f5e8 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>> @@ -170,6 +170,10 @@
>>  #define   GFX_MSIX_INTERRUPT_ENABLE            REG_BIT(13)
>>  
>>  #define RING_CSMQDEBUG(base)                   XE_REG((base) +
>> 0x2b0)
>> +#define   CURRENT_ACTIVE_QUEUE_ID_MASK         REG_GENMASK(7, 0)
>> +
>> +#define RING_QUEUE_TIMESTAMP(base)             XE_REG((base) +
>> 0x4c0)
>> +#define RING_QUEUE_TIMESTAMP_UDW(base)         XE_REG((base) + 0x4c0
>> + 4)
>
>I'm looking in bspec (73988) for the queue timestamp vs the context
>timestamp (60318) and the description is identical. Why do we need to
>use this instead of overloading the context timestamp? These multi
>queue queues are still contexts from the perspective of the CS. Does
>the queue timestamp give us something unique for multi queue? Where is
>that documented?

For queues belonging to multi-queue, only the QUEUE_TIMESTAMP value in the LRC
is updated when the queues are switching. CTX_TIMESATMP is not updated since
the entire context is not switched out, just a subset of it.

Thanks,
Umesh

>
>Thanks,
>Stuart
>
>>  
>>  #define RING_TIMESTAMP(base)                   XE_REG((base) +
>> 0x358)
>>  
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.c
>> b/drivers/gpu/drm/xe/xe_lrc.c
>> index be1030c74e21..1e407a761076 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.c
>> +++ b/drivers/gpu/drm/xe/xe_lrc.c
>> @@ -21,6 +21,7 @@
>>  #include "xe_configfs.h"
>>  #include "xe_device.h"
>>  #include "xe_drm_client.h"
>> +#include "xe_exec_queue.h"
>>  #include "xe_exec_queue_types.h"
>>  #include "xe_gt.h"
>>  #include "xe_gt_printk.h"
>> @@ -2638,17 +2639,72 @@ static int get_ctx_timestamp(struct xe_lrc
>> *lrc, u32 engine_id, u64 *reg_ctx_ts)
>>         return 0;
>>  }
>>  
>> -/**
>> - * xe_lrc_timestamp() - Current ctx timestamp
>> - * @lrc: Pointer to the lrc.
>> - *
>> - * Return latest ctx timestamp. With support for active contexts,
>> the
>> - * calculation may be slightly racy, so follow a read-again logic to
>> ensure that
>> - * the context is still active before returning the right timestamp.
>> - *
>> - * Returns: New ctx timestamp value
>> - */
>> -u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>> +static struct xe_hw_engine *get_hwe(struct xe_gt *gt, u32 engine_id)
>> +{
>> +       u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);
>> +       u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);
>> +       struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, class,
>> instance, false);
>> +
>> +       if (xe_gt_WARN_ONCE(gt, !hwe ||
>> xe_hw_engine_is_reserved(hwe),
>> +                           "Unexpected engine class:instance %d:%d
>> for context utilization\n",
>> +                           class, instance))
>> +               return NULL;
>> +
>> +       return hwe;
>> +}
>> +
>> +static u64 xe_lrc_multi_queue_timestamp(struct xe_lrc *lrc)
>> +{
>> +       struct xe_exec_queue *primary_q = lrc->multi_queue.primary;
>> +       struct xe_lrc *primary_lrc;
>> +       struct xe_hw_engine *hwe;
>> +       struct xe_mmio *mmio;
>> +       u32 engine_id, queue_id;
>> +       u64 reg_ts = lrc->queue_timestamp;
>> +
>> +       /* Ensure we are PF, primary context is active */
>> +       if (IS_SRIOV_VF(lrc_to_xe(lrc)) ||
>> +           !primary_q || !primary_q->lrc[0] ||
>> +           xe_lrc_ctx_timestamp(primary_q->lrc[0]) !=
>> CONTEXT_ACTIVE)
>> +               return xe_lrc_queue_timestamp(lrc);
>> +
>> +       /* if primary queue is active, we have a valid engine id */
>> +       primary_lrc = primary_q->lrc[0];
>> +       engine_id = xe_lrc_engine_id(primary_lrc);
>> +       hwe = get_hwe(primary_lrc->gt, engine_id);
>> +       if (!hwe)
>> +               return xe_lrc_queue_timestamp(lrc);
>> +
>> +       mmio = &hwe->gt->mmio;
>> +       /* check if the queue is currently active and then read
>> timestamp */
>> +       queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
>> +                                xe_mmio_read32(mmio,
>> RING_CSMQDEBUG(hwe->mmio_base)));
>> +       if (queue_id != lrc->multi_queue.pos)
>> +               return xe_lrc_queue_timestamp(lrc);
>> +
>> +       reg_ts = xe_mmio_read64_2x32(mmio, RING_QUEUE_TIMESTAMP(hwe-
>> >mmio_base));
>> +
>> +       /* double check queue and primary queue are still active */
>> +       queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
>> +                                xe_mmio_read32(mmio,
>> RING_CSMQDEBUG(hwe->mmio_base)));
>> +       if (queue_id != lrc->multi_queue.pos ||
>> +           xe_lrc_ctx_timestamp(primary_q->lrc[0]) !=
>> CONTEXT_ACTIVE)
>> +               return xe_lrc_queue_timestamp(lrc);
>> +
>> +       return reg_ts;
>> +}
>> +
>> +static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc,
>> u64 *old_ts)
>> +{
>> +       *old_ts = lrc->queue_timestamp;
>> +       lrc->queue_timestamp = xe_lrc_multi_queue_timestamp(lrc);
>> +
>> +       trace_xe_lrc_update_queue_timestamp(lrc, *old_ts);
>> +
>> +       return lrc->queue_timestamp;
>> +}
>> +
>> +static u64 xe_lrc_single_queue_timestamp(struct xe_lrc *lrc)
>>  {
>>         u64 lrc_ts, reg_ts, new_ts = lrc->ctx_timestamp;
>>         u32 engine_id;
>> @@ -2680,24 +2736,50 @@ u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>>         return new_ts;
>>  }
>>  
>> +static u64 xe_lrc_update_ctx_timestamp(struct xe_lrc *lrc, u64
>> *old_ts)
>> +{
>> +       *old_ts = lrc->ctx_timestamp;
>> +       lrc->ctx_timestamp = xe_lrc_single_queue_timestamp(lrc);
>> +
>> +       trace_xe_lrc_update_timestamp(lrc, *old_ts);
>> +
>> +       return lrc->ctx_timestamp;
>> +}
>> +
>> +/**
>> + * xe_lrc_timestamp() - Current lrc timestamp
>> + * @lrc: Pointer to the lrc.
>> + *
>> + * Return latest lrc timestamp. With support for active
>> contexts/queues, the
>> + * calculation may be slightly racy, so follow a read-again logic to
>> ensure that
>> + * the context/queue is still active before returning the right
>> timestamp.
>> + *
>> + * Returns: New lrc timestamp value
>> + */
>> +u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>> +{
>> +       if (xe_lrc_is_multi_queue(lrc))
>> +               return xe_lrc_multi_queue_timestamp(lrc);
>> +       else
>> +               return xe_lrc_single_queue_timestamp(lrc);
>> +}
>> +
>>  /**
>> - * xe_lrc_update_timestamp() - Update ctx timestamp
>> + * xe_lrc_update_timestamp() - Update lrc timestamp
>>   * @lrc: Pointer to the lrc.
>>   * @old_ts: Old timestamp value
>>   *
>> - * Populate @old_ts current saved ctx timestamp, read new ctx
>> timestamp and
>> + * Populate @old_ts with current saved lrc timestamp, read new lrc
>> timestamp and
>>   * update saved value.
>>   *
>> - * Returns: New ctx timestamp value
>> + * Returns: New lrc timestamp value
>>   */
>>  u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>>  {
>> -       *old_ts = lrc->ctx_timestamp;
>> -       lrc->ctx_timestamp = xe_lrc_timestamp(lrc);
>> -
>> -       trace_xe_lrc_update_timestamp(lrc, *old_ts);
>> -
>> -       return lrc->ctx_timestamp;
>> +       if (xe_lrc_is_multi_queue(lrc))
>> +               return xe_lrc_update_multi_queue_timestamp(lrc,
>> old_ts);
>> +       else
>> +               return xe_lrc_update_ctx_timestamp(lrc, old_ts);
>>  }
>>  
>>  /**
>> diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h
>> b/drivers/gpu/drm/xe/xe_trace_lrc.h
>> index d525cbee1e34..988d360143dc 100644
>> --- a/drivers/gpu/drm/xe/xe_trace_lrc.h
>> +++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
>> @@ -12,6 +12,7 @@
>>  #include <linux/tracepoint.h>
>>  #include <linux/types.h>
>>  
>> +#include "xe_exec_queue_types.h"
>>  #include "xe_gt_types.h"
>>  #include "xe_lrc.h"
>>  #include "xe_lrc_types.h"
>> @@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
>>                       __get_str(device_id))
>>  );
>>  
>> +TRACE_EVENT(xe_lrc_update_queue_timestamp,
>> +           TP_PROTO(struct xe_lrc *lrc, uint64_t old),
>> +           TP_ARGS(lrc, old),
>> +           TP_STRUCT__entry(
>> +                    __field(struct xe_lrc *, lrc)
>> +                    __field(u8, pos)
>> +                    __field(u64, old)
>> +                    __field(u64, new)
>> +                    __string(name, lrc->fence_ctx.name)
>> +                    __string(device_id, __dev_name_lrc(lrc))
>> +           ),
>> +
>> +           TP_fast_assign(
>> +                  __entry->lrc = lrc;
>> +                  __entry->pos = lrc->multi_queue.pos;
>> +                  __entry->old = old;
>> +                  __entry->new = lrc->queue_timestamp;
>> +                  __assign_str(name);
>> +                  __assign_str(device_id);
>> +                  ),
>> +           TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu
>> device_id:%s",
>> +                     __entry->lrc, __entry->pos, __get_str(name),
>> +                     __entry->old, __entry->new,
>> +                     __get_str(device_id))
>> +);
>> +
>>  #endif
>>  
>>  /* This part must be outside protection */
>

Re: [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Summers, Stuart]

On Thu, 2026-04-09 at 13:37 -0700, Umesh Nerlige Ramappa wrote:
> If a queue is currently active on the CS, query the QUEUE TIMESTAMP
> register to get an up to date value of the runtime. To do so, ensure
> that the primary queue is active and then check if the secondary
> queue
> is executing on the CS.
> 
> Signed-off-by: Umesh Nerlige Ramappa
> <umesh.nerlige.ramappa@intel.com>
> ---
>  drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
>  drivers/gpu/drm/xe/xe_lrc.c              | 122 +++++++++++++++++++--
> --
>  drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 +++++
>  3 files changed, 133 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> index 1b4a7e9a703d..af6af6f3f5e8 100644
> --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
> @@ -170,6 +170,10 @@
>  #define   GFX_MSIX_INTERRUPT_ENABLE            REG_BIT(13)
>  
>  #define RING_CSMQDEBUG(base)                   XE_REG((base) +
> 0x2b0)
> +#define   CURRENT_ACTIVE_QUEUE_ID_MASK         REG_GENMASK(7, 0)
> +
> +#define RING_QUEUE_TIMESTAMP(base)             XE_REG((base) +
> 0x4c0)
> +#define RING_QUEUE_TIMESTAMP_UDW(base)         XE_REG((base) + 0x4c0
> + 4)
>  
>  #define RING_TIMESTAMP(base)                   XE_REG((base) +
> 0x358)
>  
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c
> b/drivers/gpu/drm/xe/xe_lrc.c
> index be1030c74e21..1e407a761076 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -21,6 +21,7 @@
>  #include "xe_configfs.h"
>  #include "xe_device.h"
>  #include "xe_drm_client.h"
> +#include "xe_exec_queue.h"
>  #include "xe_exec_queue_types.h"
>  #include "xe_gt.h"
>  #include "xe_gt_printk.h"
> @@ -2638,17 +2639,72 @@ static int get_ctx_timestamp(struct xe_lrc
> *lrc, u32 engine_id, u64 *reg_ctx_ts)
>         return 0;
>  }
>  
> -/**
> - * xe_lrc_timestamp() - Current ctx timestamp
> - * @lrc: Pointer to the lrc.
> - *
> - * Return latest ctx timestamp. With support for active contexts,
> the
> - * calculation may be slightly racy, so follow a read-again logic to
> ensure that
> - * the context is still active before returning the right timestamp.
> - *
> - * Returns: New ctx timestamp value
> - */
> -u64 xe_lrc_timestamp(struct xe_lrc *lrc)
> +static struct xe_hw_engine *get_hwe(struct xe_gt *gt, u32 engine_id)
> +{
> +       u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);
> +       u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);
> +       struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, class,
> instance, false);
> +
> +       if (xe_gt_WARN_ONCE(gt, !hwe ||
> xe_hw_engine_is_reserved(hwe),
> +                           "Unexpected engine class:instance %d:%d
> for context utilization\n",
> +                           class, instance))
> +               return NULL;
> +
> +       return hwe;
> +}
> +
> +static u64 xe_lrc_multi_queue_timestamp(struct xe_lrc *lrc)
> +{
> +       struct xe_exec_queue *primary_q = lrc->multi_queue.primary;
> +       struct xe_lrc *primary_lrc;
> +       struct xe_hw_engine *hwe;
> +       struct xe_mmio *mmio;
> +       u32 engine_id, queue_id;
> +       u64 reg_ts = lrc->queue_timestamp;
> +
> +       /* Ensure we are PF, primary context is active */
> +       if (IS_SRIOV_VF(lrc_to_xe(lrc)) ||
> +           !primary_q || !primary_q->lrc[0] ||
> +           xe_lrc_ctx_timestamp(primary_q->lrc[0]) !=
> CONTEXT_ACTIVE)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       /* if primary queue is active, we have a valid engine id */
> +       primary_lrc = primary_q->lrc[0];
> +       engine_id = xe_lrc_engine_id(primary_lrc);
> +       hwe = get_hwe(primary_lrc->gt, engine_id);
> +       if (!hwe)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       mmio = &hwe->gt->mmio;
> +       /* check if the queue is currently active and then read
> timestamp */
> +       queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
> +                                xe_mmio_read32(mmio,
> RING_CSMQDEBUG(hwe->mmio_base)));
> +       if (queue_id != lrc->multi_queue.pos)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       reg_ts = xe_mmio_read64_2x32(mmio, RING_QUEUE_TIMESTAMP(hwe-
> >mmio_base));
> +
> +       /* double check queue and primary queue are still active */
> +       queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
> +                                xe_mmio_read32(mmio,
> RING_CSMQDEBUG(hwe->mmio_base)));
> +       if (queue_id != lrc->multi_queue.pos ||
> +           xe_lrc_ctx_timestamp(primary_q->lrc[0]) !=
> CONTEXT_ACTIVE)
> +               return xe_lrc_queue_timestamp(lrc);
> +
> +       return reg_ts;
> +}
> +
> +static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc,
> u64 *old_ts)
> +{
> +       *old_ts = lrc->queue_timestamp;
> +       lrc->queue_timestamp = xe_lrc_multi_queue_timestamp(lrc);
> +
> +       trace_xe_lrc_update_queue_timestamp(lrc, *old_ts);
> +
> +       return lrc->queue_timestamp;
> +}
> +
> +static u64 xe_lrc_single_queue_timestamp(struct xe_lrc *lrc)
>  {
>         u64 lrc_ts, reg_ts, new_ts = lrc->ctx_timestamp;
>         u32 engine_id;
> @@ -2680,24 +2736,50 @@ u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>         return new_ts;
>  }
>  
> +static u64 xe_lrc_update_ctx_timestamp(struct xe_lrc *lrc, u64
> *old_ts)
> +{
> +       *old_ts = lrc->ctx_timestamp;
> +       lrc->ctx_timestamp = xe_lrc_single_queue_timestamp(lrc);
> +
> +       trace_xe_lrc_update_timestamp(lrc, *old_ts);
> +
> +       return lrc->ctx_timestamp;
> +}
> +
> +/**
> + * xe_lrc_timestamp() - Current lrc timestamp
> + * @lrc: Pointer to the lrc.
> + *
> + * Return latest lrc timestamp. With support for active
> contexts/queues, the
> + * calculation may be slightly racy, so follow a read-again logic to
> ensure that
> + * the context/queue is still active before returning the right
> timestamp.
> + *
> + * Returns: New lrc timestamp value
> + */
> +u64 xe_lrc_timestamp(struct xe_lrc *lrc)
> +{
> +       if (xe_lrc_is_multi_queue(lrc))
> +               return xe_lrc_multi_queue_timestamp(lrc);
> +       else
> +               return xe_lrc_single_queue_timestamp(lrc);
> +}
> +
>  /**
> - * xe_lrc_update_timestamp() - Update ctx timestamp
> + * xe_lrc_update_timestamp() - Update lrc timestamp
>   * @lrc: Pointer to the lrc.
>   * @old_ts: Old timestamp value
>   *
> - * Populate @old_ts current saved ctx timestamp, read new ctx
> timestamp and
> + * Populate @old_ts with current saved lrc timestamp, read new lrc
> timestamp and
>   * update saved value.
>   *
> - * Returns: New ctx timestamp value
> + * Returns: New lrc timestamp value
>   */
>  u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>  {
> -       *old_ts = lrc->ctx_timestamp;
> -       lrc->ctx_timestamp = xe_lrc_timestamp(lrc);
> -
> -       trace_xe_lrc_update_timestamp(lrc, *old_ts);
> -
> -       return lrc->ctx_timestamp;
> +       if (xe_lrc_is_multi_queue(lrc))
> +               return xe_lrc_update_multi_queue_timestamp(lrc,
> old_ts);
> +       else
> +               return xe_lrc_update_ctx_timestamp(lrc, old_ts);
>  }
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h
> b/drivers/gpu/drm/xe/xe_trace_lrc.h
> index d525cbee1e34..988d360143dc 100644
> --- a/drivers/gpu/drm/xe/xe_trace_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
> @@ -12,6 +12,7 @@
>  #include <linux/tracepoint.h>
>  #include <linux/types.h>
>  
> +#include "xe_exec_queue_types.h"
>  #include "xe_gt_types.h"
>  #include "xe_lrc.h"
>  #include "xe_lrc_types.h"
> @@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
>                       __get_str(device_id))
>  );
>  
> +TRACE_EVENT(xe_lrc_update_queue_timestamp,
> +           TP_PROTO(struct xe_lrc *lrc, uint64_t old),
> +           TP_ARGS(lrc, old),
> +           TP_STRUCT__entry(
> +                    __field(struct xe_lrc *, lrc)
> +                    __field(u8, pos)
> +                    __field(u64, old)
> +                    __field(u64, new)
> +                    __string(name, lrc->fence_ctx.name)
> +                    __string(device_id, __dev_name_lrc(lrc))
> +           ),
> +
> +           TP_fast_assign(
> +                  __entry->lrc = lrc;
> +                  __entry->pos = lrc->multi_queue.pos;
> +                  __entry->old = old;
> +                  __entry->new = lrc->queue_timestamp;
> +                  __assign_str(name);
> +                  __assign_str(device_id);
> +                  ),
> +           TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu
> device_id:%s",
> +                     __entry->lrc, __entry->pos, __get_str(name),
> +                     __entry->old, __entry->new,
> +                     __get_str(device_id))
> +);
> +

Nit: can you split the trace piece out into a separate patch? Just so
it's a little easier to track and we can apply fixes separately if
needed.

Thanks,
Stuart

>  #endif
>  
>  /* This part must be outside protection */

Re: [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 01:37:18PM -0700, Umesh Nerlige Ramappa wrote:
>If a queue is currently active on the CS, query the QUEUE TIMESTAMP
>register to get an up to date value of the runtime. To do so, ensure
>that the primary queue is active and then check if the secondary queue
>is executing on the CS.
>
>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
> drivers/gpu/drm/xe/xe_lrc.c              | 122 +++++++++++++++++++----
> drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 +++++
> 3 files changed, 133 insertions(+), 20 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>index 1b4a7e9a703d..af6af6f3f5e8 100644
>--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>@@ -170,6 +170,10 @@
> #define   GFX_MSIX_INTERRUPT_ENABLE		REG_BIT(13)
>
> #define RING_CSMQDEBUG(base)			XE_REG((base) + 0x2b0)
>+#define   CURRENT_ACTIVE_QUEUE_ID_MASK		REG_GENMASK(7, 0)
>+
>+#define RING_QUEUE_TIMESTAMP(base)		XE_REG((base) + 0x4c0)
>+#define RING_QUEUE_TIMESTAMP_UDW(base)		XE_REG((base) + 0x4c0 + 4)
>
> #define RING_TIMESTAMP(base)			XE_REG((base) + 0x358)
>
>diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>index be1030c74e21..1e407a761076 100644
>--- a/drivers/gpu/drm/xe/xe_lrc.c
>+++ b/drivers/gpu/drm/xe/xe_lrc.c
>@@ -21,6 +21,7 @@
> #include "xe_configfs.h"
> #include "xe_device.h"
> #include "xe_drm_client.h"
>+#include "xe_exec_queue.h"
> #include "xe_exec_queue_types.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
>@@ -2638,17 +2639,72 @@ static int get_ctx_timestamp(struct xe_lrc *lrc, u32 engine_id, u64 *reg_ctx_ts)
> 	return 0;
> }
>
>-/**
>- * xe_lrc_timestamp() - Current ctx timestamp
>- * @lrc: Pointer to the lrc.
>- *
>- * Return latest ctx timestamp. With support for active contexts, the
>- * calculation may be slightly racy, so follow a read-again logic to ensure that
>- * the context is still active before returning the right timestamp.
>- *
>- * Returns: New ctx timestamp value
>- */
>-u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>+static struct xe_hw_engine *get_hwe(struct xe_gt *gt, u32 engine_id)
>+{
>+	u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);
>+	u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);
>+	struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, class, instance, false);
>+
>+	if (xe_gt_WARN_ONCE(gt, !hwe || xe_hw_engine_is_reserved(hwe),
>+			    "Unexpected engine class:instance %d:%d for context utilization\n",
>+			    class, instance))
>+		return NULL;
>+
>+	return hwe;
>+}

Can we update get_ctx_timestamp() function to use this new one?

>+
>+static u64 xe_lrc_multi_queue_timestamp(struct xe_lrc *lrc)
>+{
>+	struct xe_exec_queue *primary_q = lrc->multi_queue.primary;
>+	struct xe_lrc *primary_lrc;
>+	struct xe_hw_engine *hwe;
>+	struct xe_mmio *mmio;
>+	u32 engine_id, queue_id;
>+	u64 reg_ts = lrc->queue_timestamp;
>+
>+	/* Ensure we are PF, primary context is active */
>+	if (IS_SRIOV_VF(lrc_to_xe(lrc)) ||
>+	    !primary_q || !primary_q->lrc[0] ||

This must be an assert if '!xe_lrc_is_multi_queue()'.

>+	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
>+		return xe_lrc_queue_timestamp(lrc);
>+
>+	/* if primary queue is active, we have a valid engine id */
>+	primary_lrc = primary_q->lrc[0];
>+	engine_id = xe_lrc_engine_id(primary_lrc);
>+	hwe = get_hwe(primary_lrc->gt, engine_id);
>+	if (!hwe)
>+		return xe_lrc_queue_timestamp(lrc);
>+
>+	mmio = &hwe->gt->mmio;
>+	/* check if the queue is currently active and then read timestamp */
>+	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
>+				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
>+	if (queue_id != lrc->multi_queue.pos)
>+		return xe_lrc_queue_timestamp(lrc);
>+
>+	reg_ts = xe_mmio_read64_2x32(mmio, RING_QUEUE_TIMESTAMP(hwe->mmio_base));
>+

NIT...Should we make it similar to get_ctx_timestamp() with has_64bit_timestamp check?

>+	/* double check queue and primary queue are still active */
>+	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
>+				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
>+	if (queue_id != lrc->multi_queue.pos ||
>+	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
>+		return xe_lrc_queue_timestamp(lrc);
>+
>+	return reg_ts;
>+}
>+
>+static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>+{
>+	*old_ts = lrc->queue_timestamp;
>+	lrc->queue_timestamp = xe_lrc_multi_queue_timestamp(lrc);
>+
>+	trace_xe_lrc_update_queue_timestamp(lrc, *old_ts);
>+
>+	return lrc->queue_timestamp;
>+}
>+
>+static u64 xe_lrc_single_queue_timestamp(struct xe_lrc *lrc)
> {
> 	u64 lrc_ts, reg_ts, new_ts = lrc->ctx_timestamp;
> 	u32 engine_id;
>@@ -2680,24 +2736,50 @@ u64 xe_lrc_timestamp(struct xe_lrc *lrc)
> 	return new_ts;
> }
>
>+static u64 xe_lrc_update_ctx_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>+{
>+	*old_ts = lrc->ctx_timestamp;
>+	lrc->ctx_timestamp = xe_lrc_single_queue_timestamp(lrc);
>+
>+	trace_xe_lrc_update_timestamp(lrc, *old_ts);
>+
>+	return lrc->ctx_timestamp;
>+}
>+
>+/**
>+ * xe_lrc_timestamp() - Current lrc timestamp
>+ * @lrc: Pointer to the lrc.
>+ *
>+ * Return latest lrc timestamp. With support for active contexts/queues, the
>+ * calculation may be slightly racy, so follow a read-again logic to ensure that
>+ * the context/queue is still active before returning the right timestamp.
>+ *
>+ * Returns: New lrc timestamp value
>+ */
>+u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>+{
>+	if (xe_lrc_is_multi_queue(lrc))
>+		return xe_lrc_multi_queue_timestamp(lrc);
>+	else
>+		return xe_lrc_single_queue_timestamp(lrc);
>+}
>+
> /**
>- * xe_lrc_update_timestamp() - Update ctx timestamp
>+ * xe_lrc_update_timestamp() - Update lrc timestamp
>  * @lrc: Pointer to the lrc.
>  * @old_ts: Old timestamp value
>  *
>- * Populate @old_ts current saved ctx timestamp, read new ctx timestamp and
>+ * Populate @old_ts with current saved lrc timestamp, read new lrc timestamp and
>  * update saved value.
>  *
>- * Returns: New ctx timestamp value
>+ * Returns: New lrc timestamp value
>  */
> u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts)
> {
>-	*old_ts = lrc->ctx_timestamp;
>-	lrc->ctx_timestamp = xe_lrc_timestamp(lrc);
>-
>-	trace_xe_lrc_update_timestamp(lrc, *old_ts);
>-
>-	return lrc->ctx_timestamp;
>+	if (xe_lrc_is_multi_queue(lrc))
>+		return xe_lrc_update_multi_queue_timestamp(lrc, old_ts);
>+	else
>+		return xe_lrc_update_ctx_timestamp(lrc, old_ts);
> }
>
> /**
>diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h b/drivers/gpu/drm/xe/xe_trace_lrc.h
>index d525cbee1e34..988d360143dc 100644
>--- a/drivers/gpu/drm/xe/xe_trace_lrc.h
>+++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
>@@ -12,6 +12,7 @@
> #include <linux/tracepoint.h>
> #include <linux/types.h>
>
>+#include "xe_exec_queue_types.h"
> #include "xe_gt_types.h"
> #include "xe_lrc.h"
> #include "xe_lrc_types.h"
>@@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
> 		      __get_str(device_id))
> );
>
>+TRACE_EVENT(xe_lrc_update_queue_timestamp,
>+	    TP_PROTO(struct xe_lrc *lrc, uint64_t old),
>+	    TP_ARGS(lrc, old),
>+	    TP_STRUCT__entry(
>+		     __field(struct xe_lrc *, lrc)
>+		     __field(u8, pos)
>+		     __field(u64, old)
>+		     __field(u64, new)
>+		     __string(name, lrc->fence_ctx.name)
>+		     __string(device_id, __dev_name_lrc(lrc))
>+	    ),
>+
>+	    TP_fast_assign(
>+		   __entry->lrc	= lrc;
>+		   __entry->pos = lrc->multi_queue.pos;
>+		   __entry->old = old;
>+		   __entry->new = lrc->queue_timestamp;
>+		   __assign_str(name);
>+		   __assign_str(device_id);
>+		   ),
>+	    TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu device_id:%s",
>+		      __entry->lrc, __entry->pos, __get_str(name),
>+		      __entry->old, __entry->new,
>+		      __get_str(device_id))
>+);

Hmm...I am not sure how to map this lrc trace message to the queue trace message
(which queue it belongs to).
We have a trace_xe_exec_queue_create_multi_queue() event, but unfortuanately that
is logged before lrc is created. So, can't add lrc there to match. Not sure if we
really need mapping. Also, not sure if position here helps us in any way for
debugging. May be we can drop this new trace event now (and use regular one) and
if required we can add this new one later?

Niranjana

>+
> #endif
>
> /* This part must be outside protection */
>-- 
>2.43.0
>

Re: [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Umesh Nerlige Ramappa]

On Mon, Apr 13, 2026 at 03:09:56PM -0700, Niranjana Vishwanathapura wrote:
>On Thu, Apr 09, 2026 at 01:37:18PM -0700, Umesh Nerlige Ramappa wrote:
>>If a queue is currently active on the CS, query the QUEUE TIMESTAMP
>>register to get an up to date value of the runtime. To do so, ensure
>>that the primary queue is active and then check if the secondary queue
>>is executing on the CS.
>>
>>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>>---
>>drivers/gpu/drm/xe/regs/xe_engine_regs.h |   4 +
>>drivers/gpu/drm/xe/xe_lrc.c              | 122 +++++++++++++++++++----
>>drivers/gpu/drm/xe/xe_trace_lrc.h        |  27 +++++
>>3 files changed, 133 insertions(+), 20 deletions(-)
>>
>>diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>>index 1b4a7e9a703d..af6af6f3f5e8 100644
>>--- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>>+++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h
>>@@ -170,6 +170,10 @@
>>#define   GFX_MSIX_INTERRUPT_ENABLE		REG_BIT(13)
>>
>>#define RING_CSMQDEBUG(base)			XE_REG((base) + 0x2b0)
>>+#define   CURRENT_ACTIVE_QUEUE_ID_MASK		REG_GENMASK(7, 0)
>>+
>>+#define RING_QUEUE_TIMESTAMP(base)		XE_REG((base) + 0x4c0)
>>+#define RING_QUEUE_TIMESTAMP_UDW(base)		XE_REG((base) + 0x4c0 + 4)
>>
>>#define RING_TIMESTAMP(base)			XE_REG((base) + 0x358)
>>
>>diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
>>index be1030c74e21..1e407a761076 100644
>>--- a/drivers/gpu/drm/xe/xe_lrc.c
>>+++ b/drivers/gpu/drm/xe/xe_lrc.c
>>@@ -21,6 +21,7 @@
>>#include "xe_configfs.h"
>>#include "xe_device.h"
>>#include "xe_drm_client.h"
>>+#include "xe_exec_queue.h"
>>#include "xe_exec_queue_types.h"
>>#include "xe_gt.h"
>>#include "xe_gt_printk.h"
>>@@ -2638,17 +2639,72 @@ static int get_ctx_timestamp(struct xe_lrc *lrc, u32 engine_id, u64 *reg_ctx_ts)
>>	return 0;
>>}
>>
>>-/**
>>- * xe_lrc_timestamp() - Current ctx timestamp
>>- * @lrc: Pointer to the lrc.
>>- *
>>- * Return latest ctx timestamp. With support for active contexts, the
>>- * calculation may be slightly racy, so follow a read-again logic to ensure that
>>- * the context is still active before returning the right timestamp.
>>- *
>>- * Returns: New ctx timestamp value
>>- */
>>-u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>>+static struct xe_hw_engine *get_hwe(struct xe_gt *gt, u32 engine_id)
>>+{
>>+	u16 class = REG_FIELD_GET(ENGINE_CLASS_ID, engine_id);
>>+	u16 instance = REG_FIELD_GET(ENGINE_INSTANCE_ID, engine_id);
>>+	struct xe_hw_engine *hwe = xe_gt_hw_engine(gt, class, instance, false);
>>+
>>+	if (xe_gt_WARN_ONCE(gt, !hwe || xe_hw_engine_is_reserved(hwe),
>>+			    "Unexpected engine class:instance %d:%d for context utilization\n",
>>+			    class, instance))
>>+		return NULL;
>>+
>>+	return hwe;
>>+}
>
>Can we update get_ctx_timestamp() function to use this new one?
>
>>+
>>+static u64 xe_lrc_multi_queue_timestamp(struct xe_lrc *lrc)
>>+{
>>+	struct xe_exec_queue *primary_q = lrc->multi_queue.primary;
>>+	struct xe_lrc *primary_lrc;
>>+	struct xe_hw_engine *hwe;
>>+	struct xe_mmio *mmio;
>>+	u32 engine_id, queue_id;
>>+	u64 reg_ts = lrc->queue_timestamp;
>>+
>>+	/* Ensure we are PF, primary context is active */
>>+	if (IS_SRIOV_VF(lrc_to_xe(lrc)) ||
>>+	    !primary_q || !primary_q->lrc[0] ||
>
>This must be an assert if '!xe_lrc_is_multi_queue()'.
>
>>+	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
>>+		return xe_lrc_queue_timestamp(lrc);
>>+
>>+	/* if primary queue is active, we have a valid engine id */
>>+	primary_lrc = primary_q->lrc[0];
>>+	engine_id = xe_lrc_engine_id(primary_lrc);
>>+	hwe = get_hwe(primary_lrc->gt, engine_id);
>>+	if (!hwe)
>>+		return xe_lrc_queue_timestamp(lrc);
>>+
>>+	mmio = &hwe->gt->mmio;
>>+	/* check if the queue is currently active and then read timestamp */
>>+	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
>>+				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
>>+	if (queue_id != lrc->multi_queue.pos)
>>+		return xe_lrc_queue_timestamp(lrc);
>>+
>>+	reg_ts = xe_mmio_read64_2x32(mmio, RING_QUEUE_TIMESTAMP(hwe->mmio_base));
>>+
>
>NIT...Should we make it similar to get_ctx_timestamp() with has_64bit_timestamp check?
>
>>+	/* double check queue and primary queue are still active */
>>+	queue_id = REG_FIELD_GET(CURRENT_ACTIVE_QUEUE_ID_MASK,
>>+				 xe_mmio_read32(mmio, RING_CSMQDEBUG(hwe->mmio_base)));
>>+	if (queue_id != lrc->multi_queue.pos ||
>>+	    xe_lrc_ctx_timestamp(primary_q->lrc[0]) != CONTEXT_ACTIVE)
>>+		return xe_lrc_queue_timestamp(lrc);
>>+
>>+	return reg_ts;
>>+}
>>+
>>+static u64 xe_lrc_update_multi_queue_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>>+{
>>+	*old_ts = lrc->queue_timestamp;
>>+	lrc->queue_timestamp = xe_lrc_multi_queue_timestamp(lrc);
>>+
>>+	trace_xe_lrc_update_queue_timestamp(lrc, *old_ts);
>>+
>>+	return lrc->queue_timestamp;
>>+}
>>+
>>+static u64 xe_lrc_single_queue_timestamp(struct xe_lrc *lrc)
>>{
>>	u64 lrc_ts, reg_ts, new_ts = lrc->ctx_timestamp;
>>	u32 engine_id;
>>@@ -2680,24 +2736,50 @@ u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>>	return new_ts;
>>}
>>
>>+static u64 xe_lrc_update_ctx_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>>+{
>>+	*old_ts = lrc->ctx_timestamp;
>>+	lrc->ctx_timestamp = xe_lrc_single_queue_timestamp(lrc);
>>+
>>+	trace_xe_lrc_update_timestamp(lrc, *old_ts);
>>+
>>+	return lrc->ctx_timestamp;
>>+}
>>+
>>+/**
>>+ * xe_lrc_timestamp() - Current lrc timestamp
>>+ * @lrc: Pointer to the lrc.
>>+ *
>>+ * Return latest lrc timestamp. With support for active contexts/queues, the
>>+ * calculation may be slightly racy, so follow a read-again logic to ensure that
>>+ * the context/queue is still active before returning the right timestamp.
>>+ *
>>+ * Returns: New lrc timestamp value
>>+ */
>>+u64 xe_lrc_timestamp(struct xe_lrc *lrc)
>>+{
>>+	if (xe_lrc_is_multi_queue(lrc))
>>+		return xe_lrc_multi_queue_timestamp(lrc);
>>+	else
>>+		return xe_lrc_single_queue_timestamp(lrc);
>>+}
>>+
>>/**
>>- * xe_lrc_update_timestamp() - Update ctx timestamp
>>+ * xe_lrc_update_timestamp() - Update lrc timestamp
>> * @lrc: Pointer to the lrc.
>> * @old_ts: Old timestamp value
>> *
>>- * Populate @old_ts current saved ctx timestamp, read new ctx timestamp and
>>+ * Populate @old_ts with current saved lrc timestamp, read new lrc timestamp and
>> * update saved value.
>> *
>>- * Returns: New ctx timestamp value
>>+ * Returns: New lrc timestamp value
>> */
>>u64 xe_lrc_update_timestamp(struct xe_lrc *lrc, u64 *old_ts)
>>{
>>-	*old_ts = lrc->ctx_timestamp;
>>-	lrc->ctx_timestamp = xe_lrc_timestamp(lrc);
>>-
>>-	trace_xe_lrc_update_timestamp(lrc, *old_ts);
>>-
>>-	return lrc->ctx_timestamp;
>>+	if (xe_lrc_is_multi_queue(lrc))
>>+		return xe_lrc_update_multi_queue_timestamp(lrc, old_ts);
>>+	else
>>+		return xe_lrc_update_ctx_timestamp(lrc, old_ts);
>>}
>>
>>/**
>>diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h b/drivers/gpu/drm/xe/xe_trace_lrc.h
>>index d525cbee1e34..988d360143dc 100644
>>--- a/drivers/gpu/drm/xe/xe_trace_lrc.h
>>+++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
>>@@ -12,6 +12,7 @@
>>#include <linux/tracepoint.h>
>>#include <linux/types.h>
>>
>>+#include "xe_exec_queue_types.h"
>>#include "xe_gt_types.h"
>>#include "xe_lrc.h"
>>#include "xe_lrc_types.h"
>>@@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
>>		      __get_str(device_id))
>>);
>>
>>+TRACE_EVENT(xe_lrc_update_queue_timestamp,
>>+	    TP_PROTO(struct xe_lrc *lrc, uint64_t old),
>>+	    TP_ARGS(lrc, old),
>>+	    TP_STRUCT__entry(
>>+		     __field(struct xe_lrc *, lrc)
>>+		     __field(u8, pos)
>>+		     __field(u64, old)
>>+		     __field(u64, new)
>>+		     __string(name, lrc->fence_ctx.name)
>>+		     __string(device_id, __dev_name_lrc(lrc))
>>+	    ),
>>+
>>+	    TP_fast_assign(
>>+		   __entry->lrc	= lrc;
>>+		   __entry->pos = lrc->multi_queue.pos;
>>+		   __entry->old = old;
>>+		   __entry->new = lrc->queue_timestamp;
>>+		   __assign_str(name);
>>+		   __assign_str(device_id);
>>+		   ),
>>+	    TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu device_id:%s",
>>+		      __entry->lrc, __entry->pos, __get_str(name),
>>+		      __entry->old, __entry->new,
>>+		      __get_str(device_id))
>>+);
>
>Hmm...I am not sure how to map this lrc trace message to the queue trace message
>(which queue it belongs to).
>We have a trace_xe_exec_queue_create_multi_queue() event, but unfortuanately that
>is logged before lrc is created. So, can't add lrc there to match. Not sure if we
>really need mapping. Also, not sure if position here helps us in any way for
>debugging. May be we can drop this new trace event now (and use regular one) and
>if required we can add this new one later?

The trace does help especially debug the drm_fdinfo side of things. The 
position also helps indicate that this belongs to multi-queue and uses a 
different logic/register for calculations.

Do you think we can add the position field to 
trace_xe_exec_queue_create_multi_queue()?

That should help correlate the queue to lrc if needed.

Thanks,
Umesh

>
>Niranjana
>
>>+
>>#endif
>>
>>/* This part must be outside protection */
>>-- 
>>2.43.0
>>

Re: [PATCH 3/5] drm/xe/multi_queue: Capture queue run times for active queues

[Niranjana Vishwanathapura]

On Mon, Apr 13, 2026 at 03:19:41PM -0700, Umesh Nerlige Ramappa wrote:
>On Mon, Apr 13, 2026 at 03:09:56PM -0700, Niranjana Vishwanathapura wrote:
>>On Thu, Apr 09, 2026 at 01:37:18PM -0700, Umesh Nerlige Ramappa wrote:
>>>If a queue is currently active on the CS, query the QUEUE TIMESTAMP
>>>register to get an up to date value of the runtime. To do so, ensure
>>>that the primary queue is active and then check if the secondary queue
>>>is executing on the CS.
>>>
>>>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

<snip>

>>>diff --git a/drivers/gpu/drm/xe/xe_trace_lrc.h b/drivers/gpu/drm/xe/xe_trace_lrc.h
>>>index d525cbee1e34..988d360143dc 100644
>>>--- a/drivers/gpu/drm/xe/xe_trace_lrc.h
>>>+++ b/drivers/gpu/drm/xe/xe_trace_lrc.h
>>>@@ -12,6 +12,7 @@
>>>#include <linux/tracepoint.h>
>>>#include <linux/types.h>
>>>
>>>+#include "xe_exec_queue_types.h"
>>>#include "xe_gt_types.h"
>>>#include "xe_lrc.h"
>>>#include "xe_lrc_types.h"
>>>@@ -42,6 +43,32 @@ TRACE_EVENT(xe_lrc_update_timestamp,
>>>		      __get_str(device_id))
>>>);
>>>
>>>+TRACE_EVENT(xe_lrc_update_queue_timestamp,
>>>+	    TP_PROTO(struct xe_lrc *lrc, uint64_t old),
>>>+	    TP_ARGS(lrc, old),
>>>+	    TP_STRUCT__entry(
>>>+		     __field(struct xe_lrc *, lrc)
>>>+		     __field(u8, pos)
>>>+		     __field(u64, old)
>>>+		     __field(u64, new)
>>>+		     __string(name, lrc->fence_ctx.name)
>>>+		     __string(device_id, __dev_name_lrc(lrc))
>>>+	    ),
>>>+
>>>+	    TP_fast_assign(
>>>+		   __entry->lrc	= lrc;
>>>+		   __entry->pos = lrc->multi_queue.pos;
>>>+		   __entry->old = old;
>>>+		   __entry->new = lrc->queue_timestamp;
>>>+		   __assign_str(name);
>>>+		   __assign_str(device_id);
>>>+		   ),
>>>+	    TP_printk("lrc=:%p pos=%d lrc->name=%s old=%llu new=%llu device_id:%s",
>>>+		      __entry->lrc, __entry->pos, __get_str(name),
>>>+		      __entry->old, __entry->new,
>>>+		      __get_str(device_id))
>>>+);
>>
>>Hmm...I am not sure how to map this lrc trace message to the queue trace message
>>(which queue it belongs to).
>>We have a trace_xe_exec_queue_create_multi_queue() event, but unfortuanately that
>>is logged before lrc is created. So, can't add lrc there to match. Not sure if we
>>really need mapping. Also, not sure if position here helps us in any way for
>>debugging. May be we can drop this new trace event now (and use regular one) and
>>if required we can add this new one later?
>
>The trace does help especially debug the drm_fdinfo side of things. 
>The position also helps indicate that this belongs to multi-queue and 
>uses a different logic/register for calculations.
>

I mean, position itself doesn't add much value, but yah, multi-queue or not
will help. I would suggest printing primary_lrc that way we know it is a
multi-queue and we know which group it belong to.

>Do you think we can add the position field to 
>trace_xe_exec_queue_create_multi_queue()?
>
>That should help correlate the queue to lrc if needed.
>

As there can be multiple multi-queue groups, position doesn't help here.

It would have been good to match queue trace event and lrc trace event,
but I see even currently, there is no way. So, we are not breaking things
here.

Niranjana

>Thanks,
>Umesh
>
>>
>>Niranjana
>>
>>>+
>>>#endif
>>>
>>>/* This part must be outside protection */
>>>-- 
>>>2.43.0
>>>

[PATCH 4/5] drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for multi-queue

[Umesh Nerlige Ramappa]

Each queue in a multi queue group has a dedicated timestamp counter. Use
this QUEUE TIMESTAMP register to capture the start timestamp for the
job.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index cfeb4fc7d217..0eea37c0b4b2 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -269,8 +269,12 @@ static u32 get_ppgtt_flag(struct xe_sched_job *job)
 static int emit_copy_timestamp(struct xe_device *xe, struct xe_lrc *lrc,
 			       u32 *dw, int i)
 {
+	const struct xe_reg reg = lrc->multi_queue.valid ?
+				   RING_QUEUE_TIMESTAMP(0) :
+				   RING_CTX_TIMESTAMP(0);
+
 	dw[i++] = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT | MI_SRM_ADD_CS_OFFSET;
-	dw[i++] = RING_CTX_TIMESTAMP(0).addr;
+	dw[i++] = reg.addr;
 	dw[i++] = xe_lrc_ctx_job_timestamp_ggtt_addr(lrc);
 	dw[i++] = 0;
 
@@ -281,7 +285,7 @@ static int emit_copy_timestamp(struct xe_device *xe, struct xe_lrc *lrc,
 	if (IS_SRIOV_VF(xe)) {
 		dw[i++] = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT |
 			MI_SRM_ADD_CS_OFFSET;
-		dw[i++] = RING_CTX_TIMESTAMP(0).addr;
+		dw[i++] = reg.addr;
 		dw[i++] = xe_lrc_ctx_timestamp_ggtt_addr(lrc);
 		dw[i++] = 0;
 	}
-- 
2.43.0

Re: [PATCH 4/5] drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for multi-queue

[Matthew Brost]

On Thu, Apr 09, 2026 at 01:37:19PM -0700, Umesh Nerlige Ramappa wrote:
> Each queue in a multi queue group has a dedicated timestamp counter. Use
> this QUEUE TIMESTAMP register to capture the start timestamp for the
> job.
> 
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index cfeb4fc7d217..0eea37c0b4b2 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -269,8 +269,12 @@ static u32 get_ppgtt_flag(struct xe_sched_job *job)
>  static int emit_copy_timestamp(struct xe_device *xe, struct xe_lrc *lrc,
>  			       u32 *dw, int i)
>  {
> +	const struct xe_reg reg = lrc->multi_queue.valid ?
> +				   RING_QUEUE_TIMESTAMP(0) :
> +				   RING_CTX_TIMESTAMP(0);
> +
>  	dw[i++] = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT | MI_SRM_ADD_CS_OFFSET;
> -	dw[i++] = RING_CTX_TIMESTAMP(0).addr;
> +	dw[i++] = reg.addr;
>  	dw[i++] = xe_lrc_ctx_job_timestamp_ggtt_addr(lrc);
>  	dw[i++] = 0;
>  
> @@ -281,7 +285,7 @@ static int emit_copy_timestamp(struct xe_device *xe, struct xe_lrc *lrc,
>  	if (IS_SRIOV_VF(xe)) {
>  		dw[i++] = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT |
>  			MI_SRM_ADD_CS_OFFSET;
> -		dw[i++] = RING_CTX_TIMESTAMP(0).addr;
> +		dw[i++] = reg.addr;
>  		dw[i++] = xe_lrc_ctx_timestamp_ggtt_addr(lrc);
>  		dw[i++] = 0;
>  	}
> -- 
> 2.43.0
> 

Re: [PATCH 4/5] drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for multi-queue

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 01:37:19PM -0700, Umesh Nerlige Ramappa wrote:
>Each queue in a multi queue group has a dedicated timestamp counter. Use
>this QUEUE TIMESTAMP register to capture the start timestamp for the
>job.
>
>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/xe_ring_ops.c | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
>index cfeb4fc7d217..0eea37c0b4b2 100644
>--- a/drivers/gpu/drm/xe/xe_ring_ops.c
>+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
>@@ -269,8 +269,12 @@ static u32 get_ppgtt_flag(struct xe_sched_job *job)
> static int emit_copy_timestamp(struct xe_device *xe, struct xe_lrc *lrc,
> 			       u32 *dw, int i)
> {
>+	const struct xe_reg reg = lrc->multi_queue.valid ?

Use xe_lrc_is_multi_queue() instead.

Otherwise, patch LGTM.
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

>+				   RING_QUEUE_TIMESTAMP(0) :
>+				   RING_CTX_TIMESTAMP(0);
>+
> 	dw[i++] = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT | MI_SRM_ADD_CS_OFFSET;
>-	dw[i++] = RING_CTX_TIMESTAMP(0).addr;
>+	dw[i++] = reg.addr;
> 	dw[i++] = xe_lrc_ctx_job_timestamp_ggtt_addr(lrc);
> 	dw[i++] = 0;
>
>@@ -281,7 +285,7 @@ static int emit_copy_timestamp(struct xe_device *xe, struct xe_lrc *lrc,
> 	if (IS_SRIOV_VF(xe)) {
> 		dw[i++] = MI_STORE_REGISTER_MEM | MI_SRM_USE_GGTT |
> 			MI_SRM_ADD_CS_OFFSET;
>-		dw[i++] = RING_CTX_TIMESTAMP(0).addr;
>+		dw[i++] = reg.addr;
> 		dw[i++] = xe_lrc_ctx_timestamp_ggtt_addr(lrc);
> 		dw[i++] = 0;
> 	}
>-- 
>2.43.0
>

[PATCH 5/5] drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register

[Umesh Nerlige Ramappa]

In a multi-queue use case, when a job is running on the secondary queue,
the CTX_TIMESTAMP does not reflect the queues run ticks. Instead, we use
the QUEUE TIMESTAMP to check how long the job ran. For user space to see
the run ticks for a secondary queue, whitelist the QUEUE_TIMESTAMP
register.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/gpu/drm/xe/xe_reg_whitelist.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
index 80577e4b7437..4517465ad423 100644
--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
@@ -54,6 +54,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
 				RING_FORCE_TO_NONPRIV_ACCESS_RD,
 				XE_RTP_ACTION_FLAG(ENGINE_BASE)))
 	},
+	{ XE_RTP_NAME("allow_read_queue_timestamp"),
+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3500, 3511), FUNC(match_not_render)),
+	  XE_RTP_ACTIONS(WHITELIST(RING_QUEUE_TIMESTAMP(0),
+				   RING_FORCE_TO_NONPRIV_ACCESS_RD,
+				   XE_RTP_ACTION_FLAG(ENGINE_BASE)))
+	},
 	{ XE_RTP_NAME("16014440446"),
 	  XE_RTP_RULES(PLATFORM(PVC)),
 	  XE_RTP_ACTIONS(WHITELIST(XE_REG(0x4400),
-- 
2.43.0

Re: [PATCH 5/5] drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register

[Niranjana Vishwanathapura]

On Thu, Apr 09, 2026 at 01:37:20PM -0700, Umesh Nerlige Ramappa wrote:
>In a multi-queue use case, when a job is running on the secondary queue,
>the CTX_TIMESTAMP does not reflect the queues run ticks. Instead, we use
>the QUEUE TIMESTAMP to check how long the job ran. For user space to see
>the run ticks for a secondary queue, whitelist the QUEUE_TIMESTAMP
>register.
>
>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>---
> drivers/gpu/drm/xe/xe_reg_whitelist.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
>diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
>index 80577e4b7437..4517465ad423 100644
>--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
>+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
>@@ -54,6 +54,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
> 				RING_FORCE_TO_NONPRIV_ACCESS_RD,
> 				XE_RTP_ACTION_FLAG(ENGINE_BASE)))
> 	},
>+	{ XE_RTP_NAME("allow_read_queue_timestamp"),
>+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3500, 3511), FUNC(match_not_render)),
>+	  XE_RTP_ACTIONS(WHITELIST(RING_QUEUE_TIMESTAMP(0),
>+				   RING_FORCE_TO_NONPRIV_ACCESS_RD,
>+				   XE_RTP_ACTION_FLAG(ENGINE_BASE)))
>+	},

NIT...We need this for multi-queue case which only applies for BCS and CCS engines.
So, may be we should put that rule instead of match_not_render()?

In either case,
Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

> 	{ XE_RTP_NAME("16014440446"),
> 	  XE_RTP_RULES(PLATFORM(PVC)),
> 	  XE_RTP_ACTIONS(WHITELIST(XE_REG(0x4400),
>-- 
>2.43.0
>

Re: [PATCH 5/5] drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register

[Umesh Nerlige Ramappa]

On Mon, Apr 13, 2026 at 11:17:26AM -0700, Niranjana Vishwanathapura wrote:
>On Thu, Apr 09, 2026 at 01:37:20PM -0700, Umesh Nerlige Ramappa wrote:
>>In a multi-queue use case, when a job is running on the secondary queue,
>>the CTX_TIMESTAMP does not reflect the queues run ticks. Instead, we use
>>the QUEUE TIMESTAMP to check how long the job ran. For user space to see
>>the run ticks for a secondary queue, whitelist the QUEUE_TIMESTAMP
>>register.
>>
>>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>>---
>>drivers/gpu/drm/xe/xe_reg_whitelist.c | 6 ++++++
>>1 file changed, 6 insertions(+)
>>
>>diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c
>>index 80577e4b7437..4517465ad423 100644
>>--- a/drivers/gpu/drm/xe/xe_reg_whitelist.c
>>+++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c
>>@@ -54,6 +54,12 @@ static const struct xe_rtp_entry_sr register_whitelist[] = {
>>				RING_FORCE_TO_NONPRIV_ACCESS_RD,
>>				XE_RTP_ACTION_FLAG(ENGINE_BASE)))
>>	},
>>+	{ XE_RTP_NAME("allow_read_queue_timestamp"),
>>+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3500, 3511), FUNC(match_not_render)),
>>+	  XE_RTP_ACTIONS(WHITELIST(RING_QUEUE_TIMESTAMP(0),
>>+				   RING_FORCE_TO_NONPRIV_ACCESS_RD,
>>+				   XE_RTP_ACTION_FLAG(ENGINE_BASE)))
>>+	},
>
>NIT...We need this for multi-queue case which only applies for BCS and CCS engines.
>So, may be we should put that rule instead of match_not_render()?
>
>In either case,
>Reviewed-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>

Dropping this patch for now, since it needs some more vetting.

Regards,
Umesh
>
>>	{ XE_RTP_NAME("16014440446"),
>>	  XE_RTP_RULES(PLATFORM(PVC)),
>>	  XE_RTP_ACTIONS(WHITELIST(XE_REG(0x4400),
>>-- 
>>2.43.0
>>

✗ CI.checkpatch: warning for Support run ticks for multi-queue use case

[Patchwork]

== Series Details ==

Series: Support run ticks for multi-queue use case
URL   : https://patchwork.freedesktop.org/series/164654/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
1f57ba1afceae32108bd24770069f764d940a0e4
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 2a6d0859ef29e0d8874c6f00e9264f7f07ad639c
Author: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Date:   Thu Apr 9 13:37:20 2026 -0700

    drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register
    
    In a multi-queue use case, when a job is running on the secondary queue,
    the CTX_TIMESTAMP does not reflect the queues run ticks. Instead, we use
    the QUEUE TIMESTAMP to check how long the job ran. For user space to see
    the run ticks for a secondary queue, whitelist the QUEUE_TIMESTAMP
    register.
    
    Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
+ /mt/dim checkpatch 9b74368dca168b577da3ae4d3fda612807a86132 drm-intel
4b0dd9045487 drm/xe/multi_queue: Store primary queue and position info in LRC
964f23ed0ea5 drm/xe/multi_queue: Add helpers to access CS QUEUE TIMESTAMP from lrc
eaafa1502cef drm/xe/multi_queue: Capture queue run times for active queues
-:203: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#203: FILE: drivers/gpu/drm/xe/xe_trace_lrc.h:49:
+	    TP_STRUCT__entry(

-:212: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#212: FILE: drivers/gpu/drm/xe/xe_trace_lrc.h:58:
+	    TP_fast_assign(

total: 0 errors, 0 warnings, 2 checks, 198 lines checked
6425bf0714c5 drm/xe/multi_queue: Use QUEUE_TIMESTAMP as job timestamp for multi-queue
2a6d0859ef29 drm/xe/multi_queue: Whitelist QUEUE_TIMESTAMP register

✗ CI.KUnit: failure for Support run ticks for multi-queue use case

[Patchwork]

== Series Details ==

Series: Support run ticks for multi-queue use case
URL   : https://patchwork.freedesktop.org/series/164654/
State : failure

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[20:42:58] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:43:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:43:34] Starting KUnit Kernel (1/1)...
[20:43:34] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:43:34] ================== guc_buf (11 subtests) ===================
[20:43:34] [PASSED] test_smallest
[20:43:34] [PASSED] test_largest
[20:43:34] [PASSED] test_granular
[20:43:34] [PASSED] test_unique
[20:43:34] [PASSED] test_overlap
[20:43:34] [PASSED] test_reusable
[20:43:34] [PASSED] test_too_big
[20:43:34] [PASSED] test_flush
[20:43:34] [PASSED] test_lookup
[20:43:34] [PASSED] test_data
[20:43:34] [PASSED] test_class
[20:43:34] ===================== [PASSED] guc_buf =====================
[20:43:34] =================== guc_dbm (7 subtests) ===================
[20:43:34] [PASSED] test_empty
[20:43:34] [PASSED] test_default
[20:43:34] ======================== test_size  ========================
[20:43:34] [PASSED] 4
[20:43:34] [PASSED] 8
[20:43:34] [PASSED] 32
[20:43:34] [PASSED] 256
[20:43:34] ==================== [PASSED] test_size ====================
[20:43:34] ======================= test_reuse  ========================
[20:43:34] [PASSED] 4
[20:43:34] [PASSED] 8
[20:43:34] [PASSED] 32
[20:43:34] [PASSED] 256
[20:43:34] =================== [PASSED] test_reuse ====================
[20:43:34] =================== test_range_overlap  ====================
[20:43:34] [PASSED] 4
[20:43:34] [PASSED] 8
[20:43:34] [PASSED] 32
[20:43:34] [PASSED] 256
[20:43:34] =============== [PASSED] test_range_overlap ================
[20:43:34] =================== test_range_compact  ====================
[20:43:34] [PASSED] 4
[20:43:34] [PASSED] 8
[20:43:34] [PASSED] 32
[20:43:34] [PASSED] 256
[20:43:34] =============== [PASSED] test_range_compact ================
[20:43:34] ==================== test_range_spare  =====================
[20:43:34] [PASSED] 4
[20:43:34] [PASSED] 8
[20:43:34] [PASSED] 32
[20:43:34] [PASSED] 256
[20:43:34] ================ [PASSED] test_range_spare =================
[20:43:34] ===================== [PASSED] guc_dbm =====================
[20:43:34] =================== guc_idm (6 subtests) ===================
[20:43:34] [PASSED] bad_init
[20:43:34] [PASSED] no_init
[20:43:34] [PASSED] init_fini
[20:43:34] [PASSED] check_used
[20:43:34] [PASSED] check_quota
[20:43:34] [PASSED] check_all
[20:43:34] ===================== [PASSED] guc_idm =====================
[20:43:34] ================== no_relay (3 subtests) ===================
[20:43:34] [PASSED] xe_drops_guc2pf_if_not_ready
[20:43:34] [PASSED] xe_drops_guc2vf_if_not_ready
[20:43:34] [PASSED] xe_rejects_send_if_not_ready
[20:43:34] ==================== [PASSED] no_relay =====================
[20:43:34] ================== pf_relay (14 subtests) ==================
[20:43:34] [PASSED] pf_rejects_guc2pf_too_short
[20:43:34] [PASSED] pf_rejects_guc2pf_too_long
[20:43:34] [PASSED] pf_rejects_guc2pf_no_payload
[20:43:34] [PASSED] pf_fails_no_payload
[20:43:34] [PASSED] pf_fails_bad_origin
[20:43:34] [PASSED] pf_fails_bad_type
[20:43:34] [PASSED] pf_txn_reports_error
[20:43:34] [PASSED] pf_txn_sends_pf2guc
[20:43:34] [PASSED] pf_sends_pf2guc
[20:43:34] [SKIPPED] pf_loopback_nop
[20:43:34] [SKIPPED] pf_loopback_echo
[20:43:34] [SKIPPED] pf_loopback_fail
[20:43:34] [SKIPPED] pf_loopback_busy
[20:43:34] [SKIPPED] pf_loopback_retry
[20:43:34] ==================== [PASSED] pf_relay =====================
[20:43:34] ================== vf_relay (3 subtests) ===================
[20:43:34] [PASSED] vf_rejects_guc2vf_too_short
[20:43:34] [PASSED] vf_rejects_guc2vf_too_long
[20:43:34] [PASSED] vf_rejects_guc2vf_no_payload
[20:43:34] ==================== [PASSED] vf_relay =====================
[20:43:34] ================ pf_gt_config (9 subtests) =================
[20:43:34] [PASSED] fair_contexts_1vf
[20:43:34] [PASSED] fair_doorbells_1vf
[20:43:34] [PASSED] fair_ggtt_1vf
[20:43:34] ====================== fair_vram_1vf  ======================
[20:43:34] [PASSED] 3.50 GiB
[20:43:34] [PASSED] 11.5 GiB
[20:43:34] [PASSED] 15.5 GiB
[20:43:34] [PASSED] 31.5 GiB
[20:43:34] [PASSED] 63.5 GiB
[20:43:34] [PASSED] 1.91 GiB
[20:43:34] ================== [PASSED] fair_vram_1vf ==================
[20:43:34] ================ fair_vram_1vf_admin_only  =================
[20:43:34] [PASSED] 3.50 GiB
[20:43:34] [PASSED] 11.5 GiB
[20:43:34] [PASSED] 15.5 GiB
[20:43:34] [PASSED] 31.5 GiB
[20:43:34] [PASSED] 63.5 GiB
[20:43:34] [PASSED] 1.91 GiB
[20:43:34] ============ [PASSED] fair_vram_1vf_admin_only =============
[20:43:34] ====================== fair_contexts  ======================
[20:43:34] [PASSED] 1 VF
[20:43:34] [PASSED] 2 VFs
[20:43:34] [PASSED] 3 VFs
[20:43:34] [PASSED] 4 VFs
[20:43:34] [PASSED] 5 VFs
[20:43:34] [PASSED] 6 VFs
[20:43:34] [PASSED] 7 VFs
[20:43:34] [PASSED] 8 VFs
[20:43:34] [PASSED] 9 VFs
[20:43:34] [PASSED] 10 VFs
[20:43:34] [PASSED] 11 VFs
[20:43:34] [PASSED] 12 VFs
[20:43:34] [PASSED] 13 VFs
[20:43:34] [PASSED] 14 VFs
[20:43:34] [PASSED] 15 VFs
[20:43:34] [PASSED] 16 VFs
[20:43:34] [PASSED] 17 VFs
[20:43:34] [PASSED] 18 VFs
[20:43:34] [PASSED] 19 VFs
[20:43:34] [PASSED] 20 VFs
[20:43:34] [PASSED] 21 VFs
[20:43:34] [PASSED] 22 VFs
[20:43:34] [PASSED] 23 VFs
[20:43:34] [PASSED] 24 VFs
[20:43:34] [PASSED] 25 VFs
[20:43:34] [PASSED] 26 VFs
[20:43:34] [PASSED] 27 VFs
[20:43:34] [PASSED] 28 VFs
[20:43:34] [PASSED] 29 VFs
[20:43:34] [PASSED] 30 VFs
[20:43:34] [PASSED] 31 VFs
[20:43:34] [PASSED] 32 VFs
[20:43:34] [PASSED] 33 VFs
[20:43:34] [PASSED] 34 VFs
[20:43:34] [PASSED] 35 VFs
[20:43:34] [PASSED] 36 VFs
[20:43:34] [PASSED] 37 VFs
[20:43:34] [PASSED] 38 VFs
[20:43:34] [PASSED] 39 VFs
[20:43:34] [PASSED] 40 VFs
[20:43:34] [PASSED] 41 VFs
[20:43:34] [PASSED] 42 VFs
[20:43:34] [PASSED] 43 VFs
[20:43:34] [PASSED] 44 VFs
[20:43:34] [PASSED] 45 VFs
[20:43:34] [PASSED] 46 VFs
[20:43:34] [PASSED] 47 VFs
[20:43:34] [PASSED] 48 VFs
[20:43:34] [PASSED] 49 VFs
[20:43:34] [PASSED] 50 VFs
[20:43:34] [PASSED] 51 VFs
[20:43:34] [PASSED] 52 VFs
[20:43:34] [PASSED] 53 VFs
[20:43:34] [PASSED] 54 VFs
[20:43:34] [PASSED] 55 VFs
[20:43:34] [PASSED] 56 VFs
[20:43:34] [PASSED] 57 VFs
[20:43:34] [PASSED] 58 VFs
[20:43:34] [PASSED] 59 VFs
[20:43:34] [PASSED] 60 VFs
[20:43:34] [PASSED] 61 VFs
[20:43:34] [PASSED] 62 VFs
[20:43:34] [PASSED] 63 VFs
[20:43:34] ================== [PASSED] fair_contexts ==================
[20:43:34] ===================== fair_doorbells  ======================
[20:43:34] [PASSED] 1 VF
[20:43:34] [PASSED] 2 VFs
[20:43:34] [PASSED] 3 VFs
[20:43:34] [PASSED] 4 VFs
[20:43:34] [PASSED] 5 VFs
[20:43:34] [PASSED] 6 VFs
[20:43:34] [PASSED] 7 VFs
[20:43:34] [PASSED] 8 VFs
[20:43:34] [PASSED] 9 VFs
[20:43:34] [PASSED] 10 VFs
[20:43:34] [PASSED] 11 VFs
[20:43:34] [PASSED] 12 VFs
[20:43:34] [PASSED] 13 VFs
[20:43:34] [PASSED] 14 VFs
[20:43:34] [PASSED] 15 VFs
[20:43:34] [PASSED] 16 VFs
[20:43:34] [PASSED] 17 VFs
[20:43:34] [PASSED] 18 VFs
[20:43:34] [PASSED] 19 VFs
[20:43:34] [PASSED] 20 VFs
[20:43:34] [PASSED] 21 VFs
[20:43:34] [PASSED] 22 VFs
[20:43:34] [PASSED] 23 VFs
[20:43:34] [PASSED] 24 VFs
[20:43:34] [PASSED] 25 VFs
[20:43:34] [PASSED] 26 VFs
[20:43:34] [PASSED] 27 VFs
[20:43:34] [PASSED] 28 VFs
[20:43:34] [PASSED] 29 VFs
[20:43:34] [PASSED] 30 VFs
[20:43:34] [PASSED] 31 VFs
[20:43:34] [PASSED] 32 VFs
[20:43:34] [PASSED] 33 VFs
[20:43:34] [PASSED] 34 VFs
[20:43:34] [PASSED] 35 VFs
[20:43:34] [PASSED] 36 VFs
[20:43:34] [PASSED] 37 VFs
[20:43:34] [PASSED] 38 VFs
[20:43:34] [PASSED] 39 VFs
[20:43:34] [PASSED] 40 VFs
[20:43:34] [PASSED] 41 VFs
[20:43:34] [PASSED] 42 VFs
[20:43:34] [PASSED] 43 VFs
[20:43:34] [PASSED] 44 VFs
[20:43:34] [PASSED] 45 VFs
[20:43:34] [PASSED] 46 VFs
[20:43:34] [PASSED] 47 VFs
[20:43:34] [PASSED] 48 VFs
[20:43:34] [PASSED] 49 VFs
[20:43:34] [PASSED] 50 VFs
[20:43:34] [PASSED] 51 VFs
[20:43:34] [PASSED] 52 VFs
[20:43:34] [PASSED] 53 VFs
[20:43:34] [PASSED] 54 VFs
[20:43:34] [PASSED] 55 VFs
[20:43:34] [PASSED] 56 VFs
[20:43:34] [PASSED] 57 VFs
[20:43:34] [PASSED] 58 VFs
[20:43:34] [PASSED] 59 VFs
[20:43:34] [PASSED] 60 VFs
[20:43:34] [PASSED] 61 VFs
[20:43:34] [PASSED] 62 VFs
[20:43:34] [PASSED] 63 VFs
[20:43:34] ================= [PASSED] fair_doorbells ==================
[20:43:34] ======================== fair_ggtt  ========================
[20:43:34] [PASSED] 1 VF
[20:43:34] [PASSED] 2 VFs
[20:43:34] [PASSED] 3 VFs
[20:43:34] [PASSED] 4 VFs
[20:43:34] [PASSED] 5 VFs
[20:43:34] [PASSED] 6 VFs
[20:43:34] [PASSED] 7 VFs
[20:43:34] [PASSED] 8 VFs
[20:43:34] [PASSED] 9 VFs
[20:43:34] [PASSED] 10 VFs
[20:43:34] [PASSED] 11 VFs
[20:43:34] [PASSED] 12 VFs
[20:43:34] [PASSED] 13 VFs
[20:43:34] [PASSED] 14 VFs
[20:43:34] [PASSED] 15 VFs
[20:43:34] [PASSED] 16 VFs
[20:43:34] [PASSED] 17 VFs
[20:43:34] [PASSED] 18 VFs
[20:43:34] [PASSED] 19 VFs
[20:43:34] [PASSED] 20 VFs
[20:43:34] [PASSED] 21 VFs
[20:43:34] [PASSED] 22 VFs
[20:43:34] [PASSED] 23 VFs
[20:43:34] [PASSED] 24 VFs
[20:43:34] [PASSED] 25 VFs
[20:43:34] [PASSED] 26 VFs
[20:43:34] [PASSED] 27 VFs
[20:43:34] [PASSED] 28 VFs
[20:43:34] [PASSED] 29 VFs
[20:43:34] [PASSED] 30 VFs
[20:43:34] [PASSED] 31 VFs
[20:43:34] [PASSED] 32 VFs
[20:43:34] [PASSED] 33 VFs
[20:43:34] [PASSED] 34 VFs
[20:43:34] [PASSED] 35 VFs
[20:43:34] [PASSED] 36 VFs
[20:43:34] [PASSED] 37 VFs
[20:43:34] [PASSED] 38 VFs
[20:43:34] [PASSED] 39 VFs
[20:43:34] [PASSED] 40 VFs
[20:43:34] [PASSED] 41 VFs
[20:43:34] [PASSED] 42 VFs
[20:43:34] [PASSED] 43 VFs
[20:43:35] [PASSED] 44 VFs
[20:43:35] [PASSED] 45 VFs
[20:43:35] [PASSED] 46 VFs
[20:43:35] [PASSED] 47 VFs
[20:43:35] [PASSED] 48 VFs
[20:43:35] [PASSED] 49 VFs
[20:43:35] [PASSED] 50 VFs
[20:43:35] [PASSED] 51 VFs
[20:43:35] [PASSED] 52 VFs
[20:43:35] [PASSED] 53 VFs
[20:43:35] [PASSED] 54 VFs
[20:43:35] [PASSED] 55 VFs
[20:43:35] [PASSED] 56 VFs
[20:43:35] [PASSED] 57 VFs
[20:43:35] [PASSED] 58 VFs
[20:43:35] [PASSED] 59 VFs
[20:43:35] [PASSED] 60 VFs
[20:43:35] [PASSED] 61 VFs
[20:43:35] [PASSED] 62 VFs
[20:43:35] [PASSED] 63 VFs
[20:43:35] ==================== [PASSED] fair_ggtt ====================
[20:43:35] ======================== fair_vram  ========================
[20:43:35] [PASSED] 1 VF
[20:43:35] [PASSED] 2 VFs
[20:43:35] [PASSED] 3 VFs
[20:43:35] [PASSED] 4 VFs
[20:43:35] [PASSED] 5 VFs
[20:43:35] [PASSED] 6 VFs
[20:43:35] [PASSED] 7 VFs
[20:43:35] [PASSED] 8 VFs
[20:43:35] [PASSED] 9 VFs
[20:43:35] [PASSED] 10 VFs
[20:43:35] [PASSED] 11 VFs
[20:43:35] [PASSED] 12 VFs
[20:43:35] [PASSED] 13 VFs
[20:43:35] [PASSED] 14 VFs
[20:43:35] [PASSED] 15 VFs
[20:43:35] [PASSED] 16 VFs
[20:43:35] [PASSED] 17 VFs
[20:43:35] [PASSED] 18 VFs
[20:43:35] [PASSED] 19 VFs
[20:43:35] [PASSED] 20 VFs
[20:43:35] [PASSED] 21 VFs
[20:43:35] [PASSED] 22 VFs
[20:43:35] [PASSED] 23 VFs
[20:43:35] [PASSED] 24 VFs
[20:43:35] [PASSED] 25 VFs
[20:43:35] [PASSED] 26 VFs
[20:43:35] [PASSED] 27 VFs
[20:43:35] [PASSED] 28 VFs
[20:43:35] [PASSED] 29 VFs
[20:43:35] [PASSED] 30 VFs
[20:43:35] [PASSED] 31 VFs
[20:43:35] [PASSED] 32 VFs
[20:43:35] [PASSED] 33 VFs
[20:43:35] [PASSED] 34 VFs
[20:43:35] [PASSED] 35 VFs
[20:43:35] [PASSED] 36 VFs
[20:43:35] [PASSED] 37 VFs
[20:43:35] [PASSED] 38 VFs
[20:43:35] [PASSED] 39 VFs
[20:43:35] [PASSED] 40 VFs
[20:43:35] [PASSED] 41 VFs
[20:43:35] [PASSED] 42 VFs
[20:43:35] [PASSED] 43 VFs
[20:43:35] [PASSED] 44 VFs
[20:43:35] [PASSED] 45 VFs
[20:43:35] [PASSED] 46 VFs
[20:43:35] [PASSED] 47 VFs
[20:43:35] [PASSED] 48 VFs
[20:43:35] [PASSED] 49 VFs
[20:43:35] [PASSED] 50 VFs
[20:43:35] [PASSED] 51 VFs
[20:43:35] [PASSED] 52 VFs
[20:43:35] [PASSED] 53 VFs
[20:43:35] [PASSED] 54 VFs
[20:43:35] [PASSED] 55 VFs
[20:43:35] [PASSED] 56 VFs
[20:43:35] [PASSED] 57 VFs
[20:43:35] [PASSED] 58 VFs
[20:43:35] [PASSED] 59 VFs
[20:43:35] [PASSED] 60 VFs
[20:43:35] [PASSED] 61 VFs
[20:43:35] [PASSED] 62 VFs
[20:43:35] [PASSED] 63 VFs
[20:43:35] ==================== [PASSED] fair_vram ====================
[20:43:35] ================== [PASSED] pf_gt_config ===================
[20:43:35] ===================== lmtt (1 subtest) =====================
[20:43:35] ======================== test_ops  =========================
[20:43:35] [PASSED] 2-level
[20:43:35] [PASSED] multi-level
[20:43:35] ==================== [PASSED] test_ops =====================
[20:43:35] ====================== [PASSED] lmtt =======================
[20:43:35] ================= pf_service (11 subtests) =================
[20:43:35] [PASSED] pf_negotiate_any
[20:43:35] [PASSED] pf_negotiate_base_match
[20:43:35] [PASSED] pf_negotiate_base_newer
[20:43:35] [PASSED] pf_negotiate_base_next
[20:43:35] [SKIPPED] pf_negotiate_base_older
[20:43:35] [PASSED] pf_negotiate_base_prev
[20:43:35] [PASSED] pf_negotiate_latest_match
[20:43:35] [PASSED] pf_negotiate_latest_newer
[20:43:35] [PASSED] pf_negotiate_latest_next
[20:43:35] [SKIPPED] pf_negotiate_latest_older
[20:43:35] [SKIPPED] pf_negotiate_latest_prev
[20:43:35] =================== [PASSED] pf_service ====================
[20:43:35] ================= xe_guc_g2g (2 subtests) ==================
[20:43:35] ============== xe_live_guc_g2g_kunit_default  ==============
[20:43:35] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[20:43:35] ============== xe_live_guc_g2g_kunit_allmem  ===============
[20:43:35] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[20:43:35] =================== [SKIPPED] xe_guc_g2g ===================
[20:43:35] =================== xe_mocs (2 subtests) ===================
[20:43:35] ================ xe_live_mocs_kernel_kunit  ================
[20:43:35] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[20:43:35] ================ xe_live_mocs_reset_kunit  =================
[20:43:35] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[20:43:35] ==================== [SKIPPED] xe_mocs =====================
[20:43:35] ================= xe_migrate (2 subtests) ==================
[20:43:35] ================= xe_migrate_sanity_kunit  =================
[20:43:35] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[20:43:35] ================== xe_validate_ccs_kunit  ==================
[20:43:35] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[20:43:35] =================== [SKIPPED] xe_migrate ===================
[20:43:35] ================== xe_dma_buf (1 subtest) ==================
[20:43:35] ==================== xe_dma_buf_kunit  =====================
[20:43:35] ================ [SKIPPED] xe_dma_buf_kunit ================
[20:43:35] =================== [SKIPPED] xe_dma_buf ===================
[20:43:35] ================= xe_bo_shrink (1 subtest) =================
[20:43:35] =================== xe_bo_shrink_kunit  ====================
[20:43:35] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[20:43:35] ================== [SKIPPED] xe_bo_shrink ==================
[20:43:35] ==================== xe_bo (2 subtests) ====================
[20:43:35] ================== xe_ccs_migrate_kunit  ===================
[20:43:35] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[20:43:35] ==================== xe_bo_evict_kunit  ====================
[20:43:35] =============== [SKIPPED] xe_bo_evict_kunit ================
[20:43:35] ===================== [SKIPPED] xe_bo ======================
[20:43:35] ==================== args (13 subtests) ====================
[20:43:35] [PASSED] count_args_test
[20:43:35] [PASSED] call_args_example
[20:43:35] [PASSED] call_args_test
[20:43:35] [PASSED] drop_first_arg_example
[20:43:35] [PASSED] drop_first_arg_test
[20:43:35] [PASSED] first_arg_example
[20:43:35] [PASSED] first_arg_test
[20:43:35] [PASSED] last_arg_example
[20:43:35] [PASSED] last_arg_test
[20:43:35] [PASSED] pick_arg_example
[20:43:35] [PASSED] if_args_example
[20:43:35] [PASSED] if_args_test
[20:43:35] [PASSED] sep_comma_example
[20:43:35] ====================== [PASSED] args =======================
[20:43:35] =================== xe_pci (3 subtests) ====================
[20:43:35] ==================== check_graphics_ip  ====================
[20:43:35] [PASSED] 12.00 Xe_LP
[20:43:35] [PASSED] 12.10 Xe_LP+
[20:43:35] [PASSED] 12.55 Xe_HPG
[20:43:35] [PASSED] 12.60 Xe_HPC
[20:43:35] [PASSED] 12.70 Xe_LPG
[20:43:35] [PASSED] 12.71 Xe_LPG
[20:43:35] [PASSED] 12.74 Xe_LPG+
[20:43:35] [PASSED] 20.01 Xe2_HPG
[20:43:35] [PASSED] 20.02 Xe2_HPG
[20:43:35] [PASSED] 20.04 Xe2_LPG
[20:43:35] [PASSED] 30.00 Xe3_LPG
[20:43:35] [PASSED] 30.01 Xe3_LPG
[20:43:35] [PASSED] 30.03 Xe3_LPG
[20:43:35] [PASSED] 30.04 Xe3_LPG
[20:43:35] [PASSED] 30.05 Xe3_LPG
[20:43:35] [PASSED] 35.10 Xe3p_LPG
[20:43:35] [PASSED] 35.11 Xe3p_XPC
[20:43:35] ================ [PASSED] check_graphics_ip ================
[20:43:35] ===================== check_media_ip  ======================
[20:43:35] [PASSED] 12.00 Xe_M
[20:43:35] [PASSED] 12.55 Xe_HPM
[20:43:35] [PASSED] 13.00 Xe_LPM+
[20:43:35] [PASSED] 13.01 Xe2_HPM
[20:43:35] [PASSED] 20.00 Xe2_LPM
[20:43:35] [PASSED] 30.00 Xe3_LPM
[20:43:35] [PASSED] 30.02 Xe3_LPM
[20:43:35] [PASSED] 35.00 Xe3p_LPM
[20:43:35] [PASSED] 35.03 Xe3p_HPM
[20:43:35] ================= [PASSED] check_media_ip ==================
[20:43:35] =================== check_platform_desc  ===================
[20:43:35] [PASSED] 0x9A60 (TIGERLAKE)
[20:43:35] [PASSED] 0x9A68 (TIGERLAKE)
[20:43:35] [PASSED] 0x9A70 (TIGERLAKE)
[20:43:35] [PASSED] 0x9A40 (TIGERLAKE)
[20:43:35] [PASSED] 0x9A49 (TIGERLAKE)
[20:43:35] [PASSED] 0x9A59 (TIGERLAKE)
[20:43:35] [PASSED] 0x9A78 (TIGERLAKE)
[20:43:35] [PASSED] 0x9AC0 (TIGERLAKE)
[20:43:35] [PASSED] 0x9AC9 (TIGERLAKE)
[20:43:35] [PASSED] 0x9AD9 (TIGERLAKE)
[20:43:35] [PASSED] 0x9AF8 (TIGERLAKE)
[20:43:35] [PASSED] 0x4C80 (ROCKETLAKE)
[20:43:35] [PASSED] 0x4C8A (ROCKETLAKE)
[20:43:35] [PASSED] 0x4C8B (ROCKETLAKE)
[20:43:35] [PASSED] 0x4C8C (ROCKETLAKE)
[20:43:35] [PASSED] 0x4C90 (ROCKETLAKE)
[20:43:35] [PASSED] 0x4C9A (ROCKETLAKE)
[20:43:35] [PASSED] 0x4680 (ALDERLAKE_S)
[20:43:35] [PASSED] 0x4682 (ALDERLAKE_S)
[20:43:35] [PASSED] 0x4688 (ALDERLAKE_S)
[20:43:35] [PASSED] 0x468A (ALDERLAKE_S)
[20:43:35] [PASSED] 0x468B (ALDERLAKE_S)
[20:43:35] [PASSED] 0x4690 (ALDERLAKE_S)
[20:43:35] [PASSED] 0x4692 (ALDERLAKE_S)
[20:43:35] [PASSED] 0x4693 (ALDERLAKE_S)
[20:43:35] [PASSED] 0x46A0 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46A1 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46A2 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46A3 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46A6 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46A8 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46AA (ALDERLAKE_P)
[20:43:35] [PASSED] 0x462A (ALDERLAKE_P)
[20:43:35] [PASSED] 0x4626 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x4628 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46B0 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46B1 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46B2 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46B3 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46C0 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46C1 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46C2 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46C3 (ALDERLAKE_P)
[20:43:35] [PASSED] 0x46D0 (ALDERLAKE_N)
[20:43:35] [PASSED] 0x46D1 (ALDERLAKE_N)
[20:43:35] [PASSED] 0x46D2 (ALDERLAKE_N)
[20:43:35] [PASSED] 0x46D3 (ALDERLAKE_N)
[20:43:35] [PASSED] 0x46D4 (ALDERLAKE_N)
[20:43:35] [PASSED] 0xA721 (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7A1 (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7A9 (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7AC (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7AD (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA720 (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7A0 (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7A8 (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7AA (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA7AB (ALDERLAKE_P)
[20:43:35] [PASSED] 0xA780 (ALDERLAKE_S)
[20:43:35] [PASSED] 0xA781 (ALDERLAKE_S)
[20:43:35] [PASSED] 0xA782 (ALDERLAKE_S)
[20:43:35] [PASSED] 0xA783 (ALDERLAKE_S)
[20:43:35] [PASSED] 0xA788 (ALDERLAKE_S)
[20:43:35] [PASSED] 0xA789 (ALDERLAKE_S)
[20:43:35] [PASSED] 0xA78A (ALDERLAKE_S)
[20:43:35] [PASSED] 0xA78B (ALDERLAKE_S)
[20:43:35] [PASSED] 0x4905 (DG1)
[20:43:35] [PASSED] 0x4906 (DG1)
[20:43:35] [PASSED] 0x4907 (DG1)
[20:43:35] [PASSED] 0x4908 (DG1)
[20:43:35] [PASSED] 0x4909 (DG1)
[20:43:35] [PASSED] 0x56C0 (DG2)
[20:43:35] [PASSED] 0x56C2 (DG2)
[20:43:35] [PASSED] 0x56C1 (DG2)
[20:43:35] [PASSED] 0x7D51 (METEORLAKE)
[20:43:35] [PASSED] 0x7DD1 (METEORLAKE)
[20:43:35] [PASSED] 0x7D41 (METEORLAKE)
[20:43:35] [PASSED] 0x7D67 (METEORLAKE)
[20:43:35] [PASSED] 0xB640 (METEORLAKE)
[20:43:35] [PASSED] 0x56A0 (DG2)
[20:43:35] [PASSED] 0x56A1 (DG2)
[20:43:35] [PASSED] 0x56A2 (DG2)
[20:43:35] [PASSED] 0x56BE (DG2)
[20:43:35] [PASSED] 0x56BF (DG2)
[20:43:35] [PASSED] 0x5690 (DG2)
[20:43:35] [PASSED] 0x5691 (DG2)
[20:43:35] [PASSED] 0x5692 (DG2)
[20:43:35] [PASSED] 0x56A5 (DG2)
[20:43:35] [PASSED] 0x56A6 (DG2)
[20:43:35] [PASSED] 0x56B0 (DG2)
[20:43:35] [PASSED] 0x56B1 (DG2)
[20:43:35] [PASSED] 0x56BA (DG2)
[20:43:35] [PASSED] 0x56BB (DG2)
[20:43:35] [PASSED] 0x56BC (DG2)
[20:43:35] [PASSED] 0x56BD (DG2)
[20:43:35] [PASSED] 0x5693 (DG2)
[20:43:35] [PASSED] 0x5694 (DG2)
[20:43:35] [PASSED] 0x5695 (DG2)
[20:43:35] [PASSED] 0x56A3 (DG2)
[20:43:35] [PASSED] 0x56A4 (DG2)
[20:43:35] [PASSED] 0x56B2 (DG2)
[20:43:35] [PASSED] 0x56B3 (DG2)
[20:43:35] [PASSED] 0x5696 (DG2)
[20:43:35] [PASSED] 0x5697 (DG2)
[20:43:35] [PASSED] 0xB69 (PVC)
[20:43:35] [PASSED] 0xB6E (PVC)
[20:43:35] [PASSED] 0xBD4 (PVC)
[20:43:35] [PASSED] 0xBD5 (PVC)
[20:43:35] [PASSED] 0xBD6 (PVC)
[20:43:35] [PASSED] 0xBD7 (PVC)
[20:43:35] [PASSED] 0xBD8 (PVC)
[20:43:35] [PASSED] 0xBD9 (PVC)
[20:43:35] [PASSED] 0xBDA (PVC)
[20:43:35] [PASSED] 0xBDB (PVC)
[20:43:35] [PASSED] 0xBE0 (PVC)
[20:43:35] [PASSED] 0xBE1 (PVC)
[20:43:35] [PASSED] 0xBE5 (PVC)
[20:43:35] [PASSED] 0x7D40 (METEORLAKE)
[20:43:35] [PASSED] 0x7D45 (METEORLAKE)
[20:43:35] [PASSED] 0x7D55 (METEORLAKE)
[20:43:35] [PASSED] 0x7D60 (METEORLAKE)
[20:43:35] [PASSED] 0x7DD5 (METEORLAKE)
[20:43:35] [PASSED] 0x6420 (LUNARLAKE)
[20:43:35] [PASSED] 0x64A0 (LUNARLAKE)
[20:43:35] [PASSED] 0x64B0 (LUNARLAKE)
[20:43:35] [PASSED] 0xE202 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE209 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE20B (BATTLEMAGE)
[20:43:35] [PASSED] 0xE20C (BATTLEMAGE)
[20:43:35] [PASSED] 0xE20D (BATTLEMAGE)
[20:43:35] [PASSED] 0xE210 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE211 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE212 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE216 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE220 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE221 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE222 (BATTLEMAGE)
[20:43:35] [PASSED] 0xE223 (BATTLEMAGE)
[20:43:35] [PASSED] 0xB080 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB081 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB082 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB083 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB084 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB085 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB086 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB087 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB08F (PANTHERLAKE)
[20:43:35] [PASSED] 0xB090 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB0A0 (PANTHERLAKE)
[20:43:35] [PASSED] 0xB0B0 (PANTHERLAKE)
[20:43:35] [PASSED] 0xFD80 (PANTHERLAKE)
[20:43:35] [PASSED] 0xFD81 (PANTHERLAKE)
[20:43:35] [PASSED] 0xD740 (NOVALAKE_S)
[20:43:35] [PASSED] 0xD741 (NOVALAKE_S)
[20:43:35] [PASSED] 0xD742 (NOVALAKE_S)
[20:43:35] [PASSED] 0xD743 (NOVALAKE_S)
[20:43:35] [PASSED] 0xD744 (NOVALAKE_S)
[20:43:35] [PASSED] 0xD745 (NOVALAKE_S)
[20:43:35] [PASSED] 0x674C (CRESCENTISLAND)
[20:43:35] [PASSED] 0xD750 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD751 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD752 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD753 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD754 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD755 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD756 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD757 (NOVALAKE_P)
[20:43:35] [PASSED] 0xD75F (NOVALAKE_P)
[20:43:35] =============== [PASSED] check_platform_desc ===============
[20:43:35] ===================== [PASSED] xe_pci ======================
[20:43:35] =================== xe_rtp (2 subtests) ====================
[20:43:35] =============== xe_rtp_process_to_sr_tests  ================
[20:43:35] [PASSED] coalesce-same-reg
[20:43:35] [PASSED] no-match-no-add
[20:43:35] [PASSED] match-or
[20:43:35] [PASSED] match-or-xfail
[20:43:35] [PASSED] no-match-no-add-multiple-rules
[20:43:35] [PASSED] two-regs-two-entries
[20:43:35] [PASSED] clr-one-set-other
[20:43:35] [PASSED] set-field
[20:43:35] [PASSED] conflict-duplicate
stty: 'standard input': Inappropriate ioctl for device
[20:43:35] [PASSED] conflict-not-disjoint
[20:43:35] [PASSED] conflict-reg-type
[20:43:35] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[20:43:35] ================== xe_rtp_process_tests  ===================
[20:43:35] [PASSED] active1
[20:43:35] [PASSED] active2
[20:43:35] [PASSED] active-inactive
[20:43:35] [PASSED] inactive-active
[20:43:35] [PASSED] inactive-1st_or_active-inactive
[20:43:35] [PASSED] inactive-2nd_or_active-inactive
[20:43:35] [PASSED] inactive-last_or_active-inactive
[20:43:35] [PASSED] inactive-no_or_active-inactive
[20:43:35] ============== [PASSED] xe_rtp_process_tests ===============
[20:43:35] ===================== [PASSED] xe_rtp ======================
[20:43:35] ==================== xe_wa (1 subtest) =====================
[20:43:35] ======================== xe_wa_gt  =========================
[20:43:35] [PASSED] TIGERLAKE B0
[20:43:35] [PASSED] DG1 A0
[20:43:35] [PASSED] DG1 B0
[20:43:35] [PASSED] ALDERLAKE_S A0
[20:43:35] [PASSED] ALDERLAKE_S B0
[20:43:35] [PASSED] ALDERLAKE_S C0
[20:43:35] [PASSED] ALDERLAKE_S D0
[20:43:35] [PASSED] ALDERLAKE_P A0
[20:43:35] [PASSED] ALDERLAKE_P B0
[20:43:35] [PASSED] ALDERLAKE_P C0
[20:43:35] [PASSED] ALDERLAKE_S RPLS D0
[20:43:35] [PASSED] ALDERLAKE_P RPLU E0
[20:43:35] [PASSED] DG2 G10 C0
[20:43:35] [PASSED] DG2 G11 B1
[20:43:35] [PASSED] DG2 G12 A1
[20:43:35] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:43:35] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[20:43:35] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[20:43:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[20:43:35] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[20:43:35] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[20:43:35] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[20:43:35] ==================== [PASSED] xe_wa_gt =====================
[20:43:35] ====================== [PASSED] xe_wa ======================
[20:43:35] ============================================================
[20:43:35] Testing complete. Ran 597 tests: passed: 579, skipped: 18
[20:43:35] Elapsed time: 36.387s total, 4.233s configuring, 31.487s building, 0.620s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[20:43:35] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:43:37] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:44:01] Starting KUnit Kernel (1/1)...
[20:44:01] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:44:01] ============ drm_test_pick_cmdline (2 subtests) ============
[20:44:01] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[20:44:01] =============== drm_test_pick_cmdline_named  ===============
[20:44:01] [PASSED] NTSC
[20:44:01] [PASSED] NTSC-J
[20:44:01] [PASSED] PAL
[20:44:01] [PASSED] PAL-M
[20:44:01] =========== [PASSED] drm_test_pick_cmdline_named ===========
[20:44:01] ============== [PASSED] drm_test_pick_cmdline ==============
[20:44:01] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[20:44:01] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[20:44:01] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[20:44:01] =========== drm_validate_clone_mode (2 subtests) ===========
[20:44:01] ============== drm_test_check_in_clone_mode  ===============
[20:44:01] [PASSED] in_clone_mode
[20:44:01] [PASSED] not_in_clone_mode
[20:44:01] ========== [PASSED] drm_test_check_in_clone_mode ===========
[20:44:01] =============== drm_test_check_valid_clones  ===============
[20:44:01] [PASSED] not_in_clone_mode
[20:44:01] [PASSED] valid_clone
[20:44:01] [PASSED] invalid_clone
[20:44:01] =========== [PASSED] drm_test_check_valid_clones ===========
[20:44:01] ============= [PASSED] drm_validate_clone_mode =============
[20:44:01] ============= drm_validate_modeset (1 subtest) =============
[20:44:01] [PASSED] drm_test_check_connector_changed_modeset
[20:44:01] ============== [PASSED] drm_validate_modeset ===============
[20:44:01] ====== drm_test_bridge_get_current_state (2 subtests) ======
[20:44:01] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[20:44:01] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[20:44:01] ======== [PASSED] drm_test_bridge_get_current_state ========
[20:44:01] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[20:44:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[20:44:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[20:44:01] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[20:44:01] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[20:44:01] ============== drm_bridge_alloc (2 subtests) ===============
[20:44:01] [PASSED] drm_test_drm_bridge_alloc_basic
[20:44:01] [PASSED] drm_test_drm_bridge_alloc_get_put
[20:44:01] ================ [PASSED] drm_bridge_alloc =================
[20:44:01] ============= drm_cmdline_parser (40 subtests) =============
[20:44:01] [PASSED] drm_test_cmdline_force_d_only
[20:44:01] [PASSED] drm_test_cmdline_force_D_only_dvi
[20:44:01] [PASSED] drm_test_cmdline_force_D_only_hdmi
[20:44:01] [PASSED] drm_test_cmdline_force_D_only_not_digital
[20:44:01] [PASSED] drm_test_cmdline_force_e_only
[20:44:01] [PASSED] drm_test_cmdline_res
[20:44:01] [PASSED] drm_test_cmdline_res_vesa
[20:44:01] [PASSED] drm_test_cmdline_res_vesa_rblank
[20:44:01] [PASSED] drm_test_cmdline_res_rblank
[20:44:01] [PASSED] drm_test_cmdline_res_bpp
[20:44:01] [PASSED] drm_test_cmdline_res_refresh
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[20:44:01] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[20:44:01] [PASSED] drm_test_cmdline_res_margins_force_on
[20:44:01] [PASSED] drm_test_cmdline_res_vesa_margins
[20:44:01] [PASSED] drm_test_cmdline_name
[20:44:01] [PASSED] drm_test_cmdline_name_bpp
[20:44:01] [PASSED] drm_test_cmdline_name_option
[20:44:01] [PASSED] drm_test_cmdline_name_bpp_option
[20:44:01] [PASSED] drm_test_cmdline_rotate_0
[20:44:01] [PASSED] drm_test_cmdline_rotate_90
[20:44:01] [PASSED] drm_test_cmdline_rotate_180
[20:44:01] [PASSED] drm_test_cmdline_rotate_270
[20:44:01] [PASSED] drm_test_cmdline_hmirror
[20:44:01] [PASSED] drm_test_cmdline_vmirror
[20:44:01] [PASSED] drm_test_cmdline_margin_options
[20:44:01] [PASSED] drm_test_cmdline_multiple_options
[20:44:01] [PASSED] drm_test_cmdline_bpp_extra_and_option
[20:44:01] [PASSED] drm_test_cmdline_extra_and_option
[20:44:01] [PASSED] drm_test_cmdline_freestanding_options
[20:44:01] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[20:44:01] [PASSED] drm_test_cmdline_panel_orientation
[20:44:01] ================ drm_test_cmdline_invalid  =================
[20:44:01] [PASSED] margin_only
[20:44:01] [PASSED] interlace_only
[20:44:01] [PASSED] res_missing_x
[20:44:01] [PASSED] res_missing_y
[20:44:01] [PASSED] res_bad_y
[20:44:01] [PASSED] res_missing_y_bpp
[20:44:01] [PASSED] res_bad_bpp
[20:44:01] [PASSED] res_bad_refresh
[20:44:01] [PASSED] res_bpp_refresh_force_on_off
[20:44:01] [PASSED] res_invalid_mode
[20:44:01] [PASSED] res_bpp_wrong_place_mode
[20:44:01] [PASSED] name_bpp_refresh
[20:44:01] [PASSED] name_refresh
[20:44:01] [PASSED] name_refresh_wrong_mode
[20:44:01] [PASSED] name_refresh_invalid_mode
[20:44:01] [PASSED] rotate_multiple
[20:44:01] [PASSED] rotate_invalid_val
[20:44:01] [PASSED] rotate_truncated
[20:44:01] [PASSED] invalid_option
[20:44:01] [PASSED] invalid_tv_option
[20:44:01] [PASSED] truncated_tv_option
[20:44:01] ============ [PASSED] drm_test_cmdline_invalid =============
[20:44:01] =============== drm_test_cmdline_tv_options  ===============
[20:44:01] [PASSED] NTSC
[20:44:01] [PASSED] NTSC_443
[20:44:01] [PASSED] NTSC_J
[20:44:01] [PASSED] PAL
[20:44:01] [PASSED] PAL_M
[20:44:01] [PASSED] PAL_N
[20:44:01] [PASSED] SECAM
[20:44:01] [PASSED] MONO_525
[20:44:01] [PASSED] MONO_625
[20:44:01] =========== [PASSED] drm_test_cmdline_tv_options ===========
[20:44:01] =============== [PASSED] drm_cmdline_parser ================
[20:44:01] ========== drmm_connector_hdmi_init (20 subtests) ==========
[20:44:01] [PASSED] drm_test_connector_hdmi_init_valid
[20:44:01] [PASSED] drm_test_connector_hdmi_init_bpc_8
[20:44:01] [PASSED] drm_test_connector_hdmi_init_bpc_10
[20:44:01] [PASSED] drm_test_connector_hdmi_init_bpc_12
[20:44:01] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[20:44:01] [PASSED] drm_test_connector_hdmi_init_bpc_null
[20:44:01] [PASSED] drm_test_connector_hdmi_init_formats_empty
[20:44:01] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[20:44:01] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[20:44:01] [PASSED] supported_formats=0x9 yuv420_allowed=1
[20:44:01] [PASSED] supported_formats=0x9 yuv420_allowed=0
[20:44:01] [PASSED] supported_formats=0x5 yuv420_allowed=1
[20:44:01] [PASSED] supported_formats=0x5 yuv420_allowed=0
[20:44:01] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[20:44:01] [PASSED] drm_test_connector_hdmi_init_null_ddc
[20:44:01] [PASSED] drm_test_connector_hdmi_init_null_product
[20:44:01] [PASSED] drm_test_connector_hdmi_init_null_vendor
[20:44:01] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[20:44:01] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[20:44:01] [PASSED] drm_test_connector_hdmi_init_product_valid
[20:44:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[20:44:01] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[20:44:01] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[20:44:01] ========= drm_test_connector_hdmi_init_type_valid  =========
[20:44:01] [PASSED] HDMI-A
[20:44:01] [PASSED] HDMI-B
[20:44:01] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[20:44:01] ======== drm_test_connector_hdmi_init_type_invalid  ========
[20:44:01] [PASSED] Unknown
[20:44:01] [PASSED] VGA
[20:44:01] [PASSED] DVI-I
[20:44:01] [PASSED] DVI-D
[20:44:01] [PASSED] DVI-A
[20:44:01] [PASSED] Composite
[20:44:01] [PASSED] SVIDEO
[20:44:01] [PASSED] LVDS
[20:44:01] [PASSED] Component
[20:44:01] [PASSED] DIN
[20:44:01] [PASSED] DP
[20:44:01] [PASSED] TV
[20:44:01] [PASSED] eDP
[20:44:01] [PASSED] Virtual
[20:44:01] [PASSED] DSI
[20:44:01] [PASSED] DPI
[20:44:01] [PASSED] Writeback
[20:44:01] [PASSED] SPI
[20:44:01] [PASSED] USB
[20:44:01] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[20:44:01] ============ [PASSED] drmm_connector_hdmi_init =============
[20:44:01] ============= drmm_connector_init (3 subtests) =============
[20:44:01] [PASSED] drm_test_drmm_connector_init
[20:44:01] [PASSED] drm_test_drmm_connector_init_null_ddc
[20:44:01] ========= drm_test_drmm_connector_init_type_valid  =========
[20:44:01] [PASSED] Unknown
[20:44:01] [PASSED] VGA
[20:44:01] [PASSED] DVI-I
[20:44:01] [PASSED] DVI-D
[20:44:01] [PASSED] DVI-A
[20:44:01] [PASSED] Composite
[20:44:01] [PASSED] SVIDEO
[20:44:01] [PASSED] LVDS
[20:44:01] [PASSED] Component
[20:44:01] [PASSED] DIN
[20:44:01] [PASSED] DP
[20:44:01] [PASSED] HDMI-A
[20:44:01] [PASSED] HDMI-B
[20:44:01] [PASSED] TV
[20:44:01] [PASSED] eDP
[20:44:01] [PASSED] Virtual
[20:44:01] [PASSED] DSI
[20:44:01] [PASSED] DPI
[20:44:01] [PASSED] Writeback
[20:44:01] [PASSED] SPI
[20:44:01] [PASSED] USB
[20:44:01] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[20:44:01] =============== [PASSED] drmm_connector_init ===============
[20:44:01] ========= drm_connector_dynamic_init (6 subtests) ==========
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_init
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_init_properties
[20:44:01] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[20:44:01] [PASSED] Unknown
[20:44:01] [PASSED] VGA
[20:44:01] [PASSED] DVI-I
[20:44:01] [PASSED] DVI-D
[20:44:01] [PASSED] DVI-A
[20:44:01] [PASSED] Composite
[20:44:01] [PASSED] SVIDEO
[20:44:01] [PASSED] LVDS
[20:44:01] [PASSED] Component
[20:44:01] [PASSED] DIN
[20:44:01] [PASSED] DP
[20:44:01] [PASSED] HDMI-A
[20:44:01] [PASSED] HDMI-B
[20:44:01] [PASSED] TV
[20:44:01] [PASSED] eDP
[20:44:01] [PASSED] Virtual
[20:44:01] [PASSED] DSI
[20:44:01] [PASSED] DPI
[20:44:01] [PASSED] Writeback
[20:44:01] [PASSED] SPI
[20:44:01] [PASSED] USB
[20:44:01] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[20:44:01] ======== drm_test_drm_connector_dynamic_init_name  =========
[20:44:01] [PASSED] Unknown
[20:44:01] [PASSED] VGA
[20:44:01] [PASSED] DVI-I
[20:44:01] [PASSED] DVI-D
[20:44:01] [PASSED] DVI-A
[20:44:01] [PASSED] Composite
[20:44:01] [PASSED] SVIDEO
[20:44:01] [PASSED] LVDS
[20:44:01] [PASSED] Component
[20:44:01] [PASSED] DIN
[20:44:01] [PASSED] DP
[20:44:01] [PASSED] HDMI-A
[20:44:01] [PASSED] HDMI-B
[20:44:01] [PASSED] TV
[20:44:01] [PASSED] eDP
[20:44:01] [PASSED] Virtual
[20:44:01] [PASSED] DSI
[20:44:01] [PASSED] DPI
[20:44:01] [PASSED] Writeback
[20:44:01] [PASSED] SPI
[20:44:01] [PASSED] USB
[20:44:01] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[20:44:01] =========== [PASSED] drm_connector_dynamic_init ============
[20:44:01] ==== drm_connector_dynamic_register_early (4 subtests) =====
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[20:44:01] ====== [PASSED] drm_connector_dynamic_register_early =======
[20:44:01] ======= drm_connector_dynamic_register (7 subtests) ========
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[20:44:01] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[20:44:01] ========= [PASSED] drm_connector_dynamic_register ==========
[20:44:01] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[20:44:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[20:44:01] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[20:44:01] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[20:44:01] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[20:44:01] ========== drm_test_get_tv_mode_from_name_valid  ===========
[20:44:01] [PASSED] NTSC
[20:44:01] [PASSED] NTSC-443
[20:44:01] [PASSED] NTSC-J
[20:44:01] [PASSED] PAL
[20:44:01] [PASSED] PAL-M
[20:44:01] [PASSED] PAL-N
[20:44:01] [PASSED] SECAM
[20:44:01] [PASSED] Mono
[20:44:01] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[20:44:01] [PASSED] drm_test_get_tv_mode_from_name_truncated
[20:44:01] ============ [PASSED] drm_get_tv_mode_from_name ============
[20:44:01] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[20:44:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[20:44:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[20:44:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[20:44:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[20:44:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[20:44:01] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[20:44:01] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[20:44:01] [PASSED] VIC 96
[20:44:01] [PASSED] VIC 97
[20:44:01] [PASSED] VIC 101
[20:44:01] [PASSED] VIC 102
[20:44:01] [PASSED] VIC 106
[20:44:01] [PASSED] VIC 107
[20:44:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[20:44:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[20:44:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[20:44:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[20:44:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[20:44:01] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[20:44:01] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[20:44:01] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[20:44:01] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[20:44:01] [PASSED] Automatic
[20:44:01] [PASSED] Full
[20:44:01] [PASSED] Limited 16:235
[20:44:01] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[20:44:01] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[20:44:01] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[20:44:01] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[20:44:01] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[20:44:01] [PASSED] RGB
[20:44:01] [PASSED] YUV 4:2:0
[20:44:01] [PASSED] YUV 4:2:2
[20:44:01] [PASSED] YUV 4:4:4
[20:44:01] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[20:44:01] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[20:44:01] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[20:44:01] ============= drm_damage_helper (21 subtests) ==============
[20:44:01] [PASSED] drm_test_damage_iter_no_damage
[20:44:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[20:44:01] [PASSED] drm_test_damage_iter_no_damage_src_moved
[20:44:01] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[20:44:01] [PASSED] drm_test_damage_iter_no_damage_not_visible
[20:44:01] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[20:44:01] [PASSED] drm_test_damage_iter_no_damage_no_fb
[20:44:01] [PASSED] drm_test_damage_iter_simple_damage
[20:44:01] [PASSED] drm_test_damage_iter_single_damage
[20:44:01] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[20:44:01] [PASSED] drm_test_damage_iter_single_damage_outside_src
[20:44:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[20:44:01] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[20:44:01] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[20:44:01] [PASSED] drm_test_damage_iter_single_damage_src_moved
[20:44:01] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[20:44:01] [PASSED] drm_test_damage_iter_damage
[20:44:01] [PASSED] drm_test_damage_iter_damage_one_intersect
[20:44:01] [PASSED] drm_test_damage_iter_damage_one_outside
[20:44:01] [PASSED] drm_test_damage_iter_damage_src_moved
[20:44:01] [PASSED] drm_test_damage_iter_damage_not_visible
[20:44:01] ================ [PASSED] drm_damage_helper ================
[20:44:01] ============== drm_dp_mst_helper (3 subtests) ==============
[20:44:01] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[20:44:01] [PASSED] Clock 154000 BPP 30 DSC disabled
[20:44:01] [PASSED] Clock 234000 BPP 30 DSC disabled
[20:44:01] [PASSED] Clock 297000 BPP 24 DSC disabled
[20:44:01] [PASSED] Clock 332880 BPP 24 DSC enabled
[20:44:01] [PASSED] Clock 324540 BPP 24 DSC enabled
[20:44:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[20:44:01] ============== drm_test_dp_mst_calc_pbn_div  ===============
[20:44:01] [PASSED] Link rate 2000000 lane count 4
[20:44:01] [PASSED] Link rate 2000000 lane count 2
[20:44:01] [PASSED] Link rate 2000000 lane count 1
[20:44:01] [PASSED] Link rate 1350000 lane count 4
[20:44:01] [PASSED] Link rate 1350000 lane count 2
[20:44:01] [PASSED] Link rate 1350000 lane count 1
[20:44:01] [PASSED] Link rate 1000000 lane count 4
[20:44:01] [PASSED] Link rate 1000000 lane count 2
[20:44:01] [PASSED] Link rate 1000000 lane count 1
[20:44:01] [PASSED] Link rate 810000 lane count 4
[20:44:01] [PASSED] Link rate 810000 lane count 2
[20:44:01] [PASSED] Link rate 810000 lane count 1
[20:44:01] [PASSED] Link rate 540000 lane count 4
[20:44:01] [PASSED] Link rate 540000 lane count 2
[20:44:01] [PASSED] Link rate 540000 lane count 1
[20:44:01] [PASSED] Link rate 270000 lane count 4
[20:44:01] [PASSED] Link rate 270000 lane count 2
[20:44:01] [PASSED] Link rate 270000 lane count 1
[20:44:01] [PASSED] Link rate 162000 lane count 4
[20:44:01] [PASSED] Link rate 162000 lane count 2
[20:44:01] [PASSED] Link rate 162000 lane count 1
[20:44:01] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[20:44:01] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[20:44:01] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[20:44:01] [PASSED] DP_POWER_UP_PHY with port number
[20:44:01] [PASSED] DP_POWER_DOWN_PHY with port number
[20:44:01] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[20:44:01] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[20:44:01] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[20:44:01] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[20:44:01] [PASSED] DP_QUERY_PAYLOAD with port number
[20:44:01] [PASSED] DP_QUERY_PAYLOAD with VCPI
[20:44:01] [PASSED] DP_REMOTE_DPCD_READ with port number
[20:44:01] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[20:44:01] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[20:44:01] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[20:44:01] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[20:44:01] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[20:44:01] [PASSED] DP_REMOTE_I2C_READ with port number
[20:44:01] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[20:44:01] [PASSED] DP_REMOTE_I2C_READ with transactions array
[20:44:01] [PASSED] DP_REMOTE_I2C_WRITE with port number
[20:44:01] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[20:44:01] [PASSED] DP_REMOTE_I2C_WRITE with data array
[20:44:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[20:44:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[20:44:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[20:44:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[20:44:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[20:44:01] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[20:44:01] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[20:44:01] ================ [PASSED] drm_dp_mst_helper ================
[20:44:01] ================== drm_exec (7 subtests) ===================
[20:44:01] [PASSED] sanitycheck
[20:44:01] [PASSED] test_lock
[20:44:01] [PASSED] test_lock_unlock
[20:44:01] [PASSED] test_duplicates
[20:44:01] [PASSED] test_prepare
[20:44:01] [PASSED] test_prepare_array
[20:44:01] [PASSED] test_multiple_loops
[20:44:01] ==================== [PASSED] drm_exec =====================
[20:44:01] =========== drm_format_helper_test (17 subtests) ===========
[20:44:01] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[20:44:01] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[20:44:01] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[20:44:01] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[20:44:01] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[20:44:01] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[20:44:01] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[20:44:01] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[20:44:01] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[20:44:01] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[20:44:01] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[20:44:01] ============== drm_test_fb_xrgb8888_to_mono  ===============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[20:44:01] ==================== drm_test_fb_swab  =====================
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ================ [PASSED] drm_test_fb_swab =================
[20:44:01] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[20:44:01] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[20:44:01] [PASSED] single_pixel_source_buffer
[20:44:01] [PASSED] single_pixel_clip_rectangle
[20:44:01] [PASSED] well_known_colors
[20:44:01] [PASSED] destination_pitch
[20:44:01] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[20:44:01] ================= drm_test_fb_clip_offset  =================
[20:44:01] [PASSED] pass through
[20:44:01] [PASSED] horizontal offset
[20:44:01] [PASSED] vertical offset
[20:44:01] [PASSED] horizontal and vertical offset
[20:44:01] [PASSED] horizontal offset (custom pitch)
[20:44:01] [PASSED] vertical offset (custom pitch)
[20:44:01] [PASSED] horizontal and vertical offset (custom pitch)
[20:44:01] ============= [PASSED] drm_test_fb_clip_offset =============
[20:44:01] =================== drm_test_fb_memcpy  ====================
[20:44:01] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[20:44:01] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[20:44:01] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[20:44:01] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[20:44:01] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[20:44:01] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[20:44:01] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[20:44:01] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[20:44:01] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[20:44:01] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[20:44:01] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[20:44:01] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[20:44:01] =============== [PASSED] drm_test_fb_memcpy ================
[20:44:01] ============= [PASSED] drm_format_helper_test ==============
[20:44:01] ================= drm_format (18 subtests) =================
[20:44:01] [PASSED] drm_test_format_block_width_invalid
[20:44:01] [PASSED] drm_test_format_block_width_one_plane
[20:44:01] [PASSED] drm_test_format_block_width_two_plane
[20:44:01] [PASSED] drm_test_format_block_width_three_plane
[20:44:01] [PASSED] drm_test_format_block_width_tiled
[20:44:01] [PASSED] drm_test_format_block_height_invalid
[20:44:01] [PASSED] drm_test_format_block_height_one_plane
[20:44:01] [PASSED] drm_test_format_block_height_two_plane
[20:44:01] [PASSED] drm_test_format_block_height_three_plane
[20:44:01] [PASSED] drm_test_format_block_height_tiled
[20:44:01] [PASSED] drm_test_format_min_pitch_invalid
[20:44:01] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[20:44:01] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[20:44:01] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[20:44:01] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[20:44:01] [PASSED] drm_test_format_min_pitch_two_plane
[20:44:01] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[20:44:01] [PASSED] drm_test_format_min_pitch_tiled
[20:44:01] =================== [PASSED] drm_format ====================
[20:44:01] ============== drm_framebuffer (10 subtests) ===============
[20:44:01] ========== drm_test_framebuffer_check_src_coords  ==========
[20:44:01] [PASSED] Success: source fits into fb
[20:44:01] [PASSED] Fail: overflowing fb with x-axis coordinate
[20:44:01] [PASSED] Fail: overflowing fb with y-axis coordinate
[20:44:01] [PASSED] Fail: overflowing fb with source width
[20:44:01] [PASSED] Fail: overflowing fb with source height
[20:44:01] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[20:44:01] [PASSED] drm_test_framebuffer_cleanup
[20:44:01] =============== drm_test_framebuffer_create  ===============
[20:44:01] [PASSED] ABGR8888 normal sizes
[20:44:01] [PASSED] ABGR8888 max sizes
[20:44:01] [PASSED] ABGR8888 pitch greater than min required
[20:44:01] [PASSED] ABGR8888 pitch less than min required
[20:44:01] [PASSED] ABGR8888 Invalid width
[20:44:01] [PASSED] ABGR8888 Invalid buffer handle
[20:44:01] [PASSED] No pixel format
[20:44:01] [PASSED] ABGR8888 Width 0
[20:44:01] [PASSED] ABGR8888 Height 0
[20:44:01] [PASSED] ABGR8888 Out of bound height * pitch combination
[20:44:01] [PASSED] ABGR8888 Large buffer offset
[20:44:01] [PASSED] ABGR8888 Buffer offset for inexistent plane
[20:44:01] [PASSED] ABGR8888 Invalid flag
[20:44:01] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[20:44:01] [PASSED] ABGR8888 Valid buffer modifier
[20:44:01] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[20:44:01] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[20:44:01] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[20:44:01] [PASSED] NV12 Normal sizes
[20:44:01] [PASSED] NV12 Max sizes
[20:44:01] [PASSED] NV12 Invalid pitch
[20:44:01] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[20:44:01] [PASSED] NV12 different  modifier per-plane
[20:44:01] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[20:44:01] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[20:44:01] [PASSED] NV12 Modifier for inexistent plane
[20:44:01] [PASSED] NV12 Handle for inexistent plane
[20:44:01] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[20:44:01] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[20:44:01] [PASSED] YVU420 Normal sizes
[20:44:01] [PASSED] YVU420 Max sizes
[20:44:01] [PASSED] YVU420 Invalid pitch
[20:44:01] [PASSED] YVU420 Different pitches
[20:44:01] [PASSED] YVU420 Different buffer offsets/pitches
[20:44:01] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[20:44:01] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[20:44:01] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[20:44:01] [PASSED] YVU420 Valid modifier
[20:44:01] [PASSED] YVU420 Different modifiers per plane
[20:44:01] [PASSED] YVU420 Modifier for inexistent plane
[20:44:01] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[20:44:01] [PASSED] X0L2 Normal sizes
[20:44:01] [PASSED] X0L2 Max sizes
[20:44:01] [PASSED] X0L2 Invalid pitch
[20:44:01] [PASSED] X0L2 Pitch greater than minimum required
[20:44:01] [PASSED] X0L2 Handle for inexistent plane
[20:44:01] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[20:44:01] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[20:44:01] [PASSED] X0L2 Valid modifier
[20:44:01] [PASSED] X0L2 Modifier for inexistent plane
[20:44:01] =========== [PASSED] drm_test_framebuffer_create ===========
[20:44:01] [PASSED] drm_test_framebuffer_free
[20:44:01] [PASSED] drm_test_framebuffer_init
[20:44:01] [PASSED] drm_test_framebuffer_init_bad_format
[20:44:01] [PASSED] drm_test_framebuffer_init_dev_mismatch
[20:44:01] [PASSED] drm_test_framebuffer_lookup
[20:44:01] [PASSED] drm_test_framebuffer_lookup_inexistent
[20:44:01] [PASSED] drm_test_framebuffer_modifiers_not_supported
[20:44:01] ================= [PASSED] drm_framebuffer =================
[20:44:01] ================ drm_gem_shmem (8 subtests) ================
[20:44:01] [PASSED] drm_gem_shmem_test_obj_create
[20:44:01] [PASSED] drm_gem_shmem_test_obj_create_private
[20:44:01] [PASSED] drm_gem_shmem_test_pin_pages
[20:44:01] [PASSED] drm_gem_shmem_test_vmap
[20:44:01] [PASSED] drm_gem_shmem_test_get_sg_table
[20:44:01] [PASSED] drm_gem_shmem_test_get_pages_sgt
[20:44:01] [PASSED] drm_gem_shmem_test_madvise
[20:44:01] [PASSED] drm_gem_shmem_test_purge
[20:44:01] ================== [PASSED] drm_gem_shmem ==================
[20:44:01] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[20:44:01] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[20:44:01] [PASSED] Automatic
[20:44:01] [PASSED] Full
[20:44:01] [PASSED] Limited 16:235
[20:44:01] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[20:44:01] [PASSED] drm_test_check_disable_connector
[20:44:01] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[20:44:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[20:44:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[20:44:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[20:44:01] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[20:44:01] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[20:44:01] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[20:44:01] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[20:44:01] [PASSED] drm_test_check_output_bpc_dvi
[20:44:01] [PASSED] drm_test_check_output_bpc_format_vic_1
[20:44:01] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[20:44:01] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[20:44:01] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[20:44:01] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[20:44:01] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[20:44:01] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[20:44:01] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[20:44:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[20:44:01] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[20:44:01] [PASSED] drm_test_check_broadcast_rgb_value
[20:44:01] [PASSED] drm_test_check_bpc_8_value
[20:44:01] [PASSED] drm_test_check_bpc_10_value
[20:44:01] [PASSED] drm_test_check_bpc_12_value
[20:44:01] [PASSED] drm_test_check_format_value
[20:44:01] [PASSED] drm_test_check_tmds_char_value
[20:44:01] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[20:44:01] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[20:44:01] [PASSED] drm_test_check_mode_valid
[20:44:01] [PASSED] drm_test_check_mode_valid_reject
[20:44:01] [PASSED] drm_test_check_mode_valid_reject_rate
[20:44:01] [PASSED] drm_test_check_mode_valid_reject_max_clock
[20:44:01] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[20:44:01] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[20:44:01] [PASSED] drm_test_check_infoframes
[20:44:01] [PASSED] drm_test_check_reject_avi_infoframe
[20:44:01] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[20:44:01] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[20:44:01] [PASSED] drm_test_check_reject_audio_infoframe
[20:44:01] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[20:44:01] ================= drm_managed (2 subtests) =================
[20:44:01] [PASSED] drm_test_managed_release_action
[20:44:01] [PASSED] drm_test_managed_run_action
[20:44:01] =================== [PASSED] drm_managed ===================
[20:44:01] =================== drm_mm (6 subtests) ====================
[20:44:01] [PASSED] drm_test_mm_init
[20:44:01] [PASSED] drm_test_mm_debug
[20:44:01] [PASSED] drm_test_mm_align32
[20:44:01] [PASSED] drm_test_mm_align64
[20:44:01] [PASSED] drm_test_mm_lowest
[20:44:01] [PASSED] drm_test_mm_highest
[20:44:01] ===================== [PASSED] drm_mm ======================
[20:44:01] ============= drm_modes_analog_tv (5 subtests) =============
[20:44:01] [PASSED] drm_test_modes_analog_tv_mono_576i
[20:44:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[20:44:01] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[20:44:01] [PASSED] drm_test_modes_analog_tv_pal_576i
[20:44:01] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[20:44:01] =============== [PASSED] drm_modes_analog_tv ===============
[20:44:01] ============== drm_plane_helper (2 subtests) ===============
[20:44:01] =============== drm_test_check_plane_state  ================
[20:44:01] [PASSED] clipping_simple
[20:44:01] [PASSED] clipping_rotate_reflect
[20:44:01] [PASSED] positioning_simple
[20:44:01] [PASSED] upscaling
[20:44:01] [PASSED] downscaling
[20:44:01] [PASSED] rounding1
[20:44:01] [PASSED] rounding2
[20:44:01] [PASSED] rounding3
[20:44:01] [PASSED] rounding4
[20:44:01] =========== [PASSED] drm_test_check_plane_state ============
[20:44:01] =========== drm_test_check_invalid_plane_state  ============
[20:44:01] [PASSED] positioning_invalid
[20:44:01] [PASSED] upscaling_invalid
[20:44:01] [PASSED] downscaling_invalid
[20:44:01] ======= [PASSED] drm_test_check_invalid_plane_state ========
[20:44:01] ================ [PASSED] drm_plane_helper =================
[20:44:01] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[20:44:01] ====== drm_test_connector_helper_tv_get_modes_check  =======
[20:44:01] [PASSED] None
[20:44:01] [PASSED] PAL
[20:44:01] [PASSED] NTSC
[20:44:01] [PASSED] Both, NTSC Default
[20:44:01] [PASSED] Both, PAL Default
[20:44:01] [PASSED] Both, NTSC Default, with PAL on command-line
[20:44:01] [PASSED] Both, PAL Default, with NTSC on command-line
[20:44:01] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[20:44:01] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[20:44:01] ================== drm_rect (9 subtests) ===================
[20:44:01] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[20:44:01] [PASSED] drm_test_rect_clip_scaled_not_clipped
[20:44:01] [PASSED] drm_test_rect_clip_scaled_clipped
[20:44:01] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[20:44:01] ================= drm_test_rect_intersect  =================
[20:44:01] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[20:44:01] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[20:44:01] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[20:44:01] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[20:44:01] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[20:44:01] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[20:44:01] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[20:44:01] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[20:44:01] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[20:44:01] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[20:44:01] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[20:44:01] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[20:44:01] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[20:44:01] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[20:44:01] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[20:44:01] ============= [PASSED] drm_test_rect_intersect =============
[20:44:01] ================ drm_test_rect_calc_hscale  ================
[20:44:01] [PASSED] normal use
[20:44:01] [PASSED] out of max range
[20:44:01] [PASSED] out of min range
[20:44:01] [PASSED] zero dst
[20:44:01] [PASSED] negative src
[20:44:01] [PASSED] negative dst
[20:44:01] ============ [PASSED] drm_test_rect_calc_hscale ============
[20:44:01] ================ drm_test_rect_calc_vscale  ================
[20:44:01] [PASSED] normal use
[20:44:01] [PASSED] out of max range
[20:44:01] [PASSED] out of min range
[20:44:01] [PASSED] zero dst
[20:44:01] [PASSED] negative src
[20:44:01] [PASSED] negative dst
stty: 'standard input': Inappropriate ioctl for device
[20:44:01] ============ [PASSED] drm_test_rect_calc_vscale ============
[20:44:01] ================== drm_test_rect_rotate  ===================
[20:44:01] [PASSED] reflect-x
[20:44:01] [PASSED] reflect-y
[20:44:01] [PASSED] rotate-0
[20:44:01] [PASSED] rotate-90
[20:44:01] [PASSED] rotate-180
[20:44:01] [PASSED] rotate-270
[20:44:01] ============== [PASSED] drm_test_rect_rotate ===============
[20:44:01] ================ drm_test_rect_rotate_inv  =================
[20:44:01] [PASSED] reflect-x
[20:44:01] [PASSED] reflect-y
[20:44:01] [PASSED] rotate-0
[20:44:01] [PASSED] rotate-90
[20:44:01] [PASSED] rotate-180
[20:44:01] [PASSED] rotate-270
[20:44:01] ============ [PASSED] drm_test_rect_rotate_inv =============
[20:44:01] ==================== [PASSED] drm_rect =====================
[20:44:01] ============ drm_sysfb_modeset_test (1 subtest) ============
[20:44:01] ============ drm_test_sysfb_build_fourcc_list  =============
[20:44:01] [PASSED] no native formats
[20:44:01] [PASSED] XRGB8888 as native format
[20:44:01] [PASSED] remove duplicates
[20:44:01] [PASSED] convert alpha formats
[20:44:01] [PASSED] random formats
[20:44:01] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[20:44:01] ============= [PASSED] drm_sysfb_modeset_test ==============
[20:44:01] ================== drm_fixp (2 subtests) ===================
[20:44:01] [PASSED] drm_test_int2fixp
[20:44:01] [PASSED] drm_test_sm2fixp
[20:44:01] ==================== [PASSED] drm_fixp =====================
[20:44:01] ============================================================
[20:44:01] Testing complete. Ran 621 tests: passed: 621
[20:44:01] Elapsed time: 26.466s total, 1.759s configuring, 24.490s building, 0.175s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
stty: 'standard input': Inappropriate ioctl for device
[20:44:01] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[20:44:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[20:44:13] Starting KUnit Kernel (1/1)...
[20:44:13] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[20:44:13] ================= ttm_device (5 subtests) ==================
[20:44:13] [PASSED] ttm_device_init_basic
[20:44:13] [PASSED] ttm_device_init_multiple
[20:44:13] [PASSED] ttm_device_fini_basic
[20:44:13] [PASSED] ttm_device_init_no_vma_man
[20:44:13] ================== ttm_device_init_pools  ==================
[20:44:13] [PASSED] No DMA allocations, no DMA32 required
[20:44:13] # ttm_device_init_pools: ASSERTION FAILED at drivers/gpu/drm/ttm/tests/ttm_device_test.c:178
[20:44:13] Expected !list_lru_count(&pt.pages) to be false, but is true
[20:44:13] [FAILED] DMA allocations, DMA32 required
[20:44:13] [PASSED] No DMA allocations, DMA32 required
[20:44:13]     # ttm_device_init_pools: ASSERTION FAILED at drivers/gpu/drm/ttm/tests/ttm_device_test.c:178
[20:44:13]     Expected !list_lru_count(&pt.pages) to be false, but is true
[20:44:13] ------------[ cut here ]------------
[20:44:13] WARNING: lib/refcount.c:28 at devres_release_all+0xaa/0x100, CPU#0: kunit_try_catch/46
[20:44:13] refcount_t: underflow; use-after-free.
[20:44:13] CPU: 0 UID: 0 PID: 46 Comm: kunit_try_catch Tainted: G        W        N  7.0.0-rc7-g2a6d0859ef29 #3 VOLUNTARY
[20:44:13] Tainted: [W]=WARN, [N]=TEST
[20:44:13] Stack:
[20:44:13]  6044ed8b 00000000 00000000 00000001
[20:44:13]  ffffff00 6044ed8b 6032367a 00000009
[20:44:13]  0000001c 60043e88 6002381c d28cbd40
[20:44:13] Call Trace:
[20:44:13]  [<6032367a>] ? devres_release_all+0xaa/0x100
[20:44:13]  [<60043e88>] ? dump_stack_lvl+0x5e/0x7a
[20:44:13]  [<6002381c>] ? _printk+0x0/0x65
[20:44:13]  [<6001f09f>] ? __warn.cold+0x79/0x11f
[20:44:13]  [<6001f1d9>] ? warn_slowpath_fmt+0x94/0xa1
[20:44:13]  [<601ef1a0>] ? kernfs_free_rcu+0x0/0x70
[20:44:13]  [<60052e36>] ? um_set_signals+0x36/0x60
[20:44:13]  [<600c5a42>] ? call_rcu+0x52/0x90
[20:44:13]  [<6001f145>] ? warn_slowpath_fmt+0x0/0xa1
[20:44:13]  [<60147f50>] ? kfree+0x0/0x250
[20:44:13]  [<6032367a>] ? devres_release_all+0xaa/0x100
[20:44:13]  [<60396bb0>] ? mutex_unlock+0x0/0x30
[20:44:13]  [<6031c3c0>] ? bus_notify+0x0/0x60
[20:44:13]  [<60396bb0>] ? mutex_unlock+0x0/0x30
[20:44:13]  [<60398620>] ? mutex_lock+0x0/0x40
[20:44:13]  [<6031ca24>] ? device_unbind_cleanup+0x14/0xb0
[20:44:13]  [<6031e1f6>] ? device_release_driver_internal+0x256/0x2b0
[20:44:13]  [<60372210>] ? kobject_put+0x0/0x150
[20:44:13]  [<601f3d40>] ? sysfs_remove_file_ns+0x0/0x20
[20:44:13]  [<6031c00f>] ? bus_remove_device+0x10f/0x1a0
[20:44:13]  [<601f3d40>] ? sysfs_remove_file_ns+0x0/0x20
[20:44:13]  [<601f17b8>] ? kernfs_remove_by_name_ns+0x98/0x130
[20:44:13]  [<60315a8c>] ? device_del+0x1bc/0x600
[20:44:13]  [<60052e00>] ? um_set_signals+0x0/0x60
[20:44:13]  [<6025b2a0>] ? device_unregister_wrapper+0x0/0x10
[20:44:13]  [<60052e00>] ? um_set_signals+0x0/0x60
[20:44:13]  [<60315ee4>] ? device_unregister+0x14/0x40
[20:44:13]  [<60257e66>] ? kunit_release_action+0xf6/0x170
[20:44:13]  [<60257d70>] ? kunit_release_action+0x0/0x170
[20:44:13]  [<6025b2e2>] ? kunit_device_unregister+0x32/0x80
[20:44:13]  [<60259890>] ? kunit_generic_run_threadfn_adapter+0x0/0x30
[20:44:13]  [<6025748e>] ? kunit_try_run_case_cleanup+0x2e/0x40
[20:44:13]  [<602598a6>] ? kunit_generic_run_threadfn_adapter+0x16/0x30
[20:44:13]  [<60081e36>] ? kthread+0xe6/0x150
[20:44:13]  [<60046435>] ? new_thread_handler+0x45/0x60
[20:44:13] ---[ end trace 0000000000000000 ]---
[20:44:13] [FAILED] DMA allocations, no DMA32 required
[20:44:13] # ttm_device_init_pools: pass:2 fail:2 skip:0 total:4
[20:44:13] ============== [FAILED] ttm_device_init_pools ==============
[20:44:13]     # module: ttm_device_test
[20:44:13] # ttm_device: pass:4 fail:1 skip:0 total:5
[20:44:13] # Totals: pass:6 fail:2 skip:0 total:8
[20:44:13] =================== [FAILED] ttm_device ====================
[20:44:13] ================== ttm_pool (8 subtests) ===================
[20:44:13] ================== ttm_pool_alloc_basic  ===================
[20:44:13] [PASSED] One page
[20:44:13] [PASSED] More than one page
[20:44:13] [PASSED] Above the allocation limit
[20:44:13] [PASSED] One page, with coherent DMA mappings enabled
[20:44:13] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:44:13] ============== [PASSED] ttm_pool_alloc_basic ===============
[20:44:13] ============== ttm_pool_alloc_basic_dma_addr  ==============
[20:44:13] [PASSED] One page
[20:44:13] [PASSED] More than one page
[20:44:13] [PASSED] Above the allocation limit
[20:44:13] [PASSED] One page, with coherent DMA mappings enabled
[20:44:13] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[20:44:13] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[20:44:13] [PASSED] ttm_pool_alloc_order_caching_match
[20:44:13] [PASSED] ttm_pool_alloc_caching_mismatch
[20:44:13] [PASSED] ttm_pool_alloc_order_mismatch
[20:44:13] [PASSED] ttm_pool_free_dma_alloc
[20:44:13] [ERROR] Test: ttm_pool: missing expected subtest!
[20:44:13] 
[20:44:13] Pid: 75, comm: kunit_try_catch Tainted: G        W        N  7.0.0-rc7-g2a6d0859ef29
[20:44:13] RIP: 0033:list_lru_count_node+0xe/0x20
[20:44:13] RSP: 00000000d28cbed8  EFLAGS: 00010246
[20:44:13] RAX: 0000000000000000 RBX: 00000000d2803c90 RCX: 0000000092a4c7d8
[20:44:13] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 0000000092886880
[20:44:13] RBP: 0000000092886800 R08: 00000000d137ac28 R09: 0000000092850c80
[20:44:13] R10: 0000000000000000 R11: 0000000000000000 R12: 0000000092850c80
[20:44:13] R13: 0000000060440770 R14: 000000006010eb50 R15: 0000000092886880
[20:44:13] Kernel panic - not syncing: Segfault with no mm
[20:44:13] [CRASHED] 
[20:44:13] [ERROR] Test: ttm_pool: missing expected subtest!
[20:44:13] [CRASHED] 
[20:44:13] [ERROR] Test: ttm_pool: missing subtest result line!
[20:44:13] # module: ttm_pool_test
[20:44:13] ==================== [CRASHED] ttm_pool ====================
[20:44:13] [ERROR] Test: main: missing expected subtest!
[20:44:13] [CRASHED] 
[20:44:13] [ERROR] Test: main: missing expected subtest!
[20:44:13] [CRASHED] 
[20:44:13] [ERROR] Test: main: missing expected subtest!
[20:44:13] [CRASHED] 
[20:44:13] [ERROR] Test: main: missing expected subtest!
[20:44:13] [CRASHED] 
[20:44:13] ============================================================
[20:44:13] Testing complete. Ran 28 tests: passed: 20, failed: 2, crashed: 6, errors: 7
The kernel seems to have crashed; you can decode the stack traces with:
$ scripts/decode_stacktrace.sh .kunit/vmlinux .kunit < .kunit/test.log | tee .kunit/decoded.log | /kernel/tools/testing/kunit/kunit.py parse
[20:44:13] Elapsed time: 11.555s total, 1.696s configuring, 9.592s building, 0.266s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel