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From: Raag Jadav <raag.jadav@intel.com>
To: Riana Tauro <riana.tauro@intel.com>
Cc: intel-xe@lists.freedesktop.org, anshuman.gupta@intel.com,
	rodrigo.vivi@intel.com, aravind.iddamsetty@linux.intel.com,
	badal.nilawar@intel.com, ravi.kishore.koppuravuri@intel.com,
	mallesh.koujalagi@intel.com, soham.purkait@intel.com
Subject: Re: [PATCH v3 3/5] drm/xe/xe_ras: Add helper to clear error counter
Date: Thu, 23 Apr 2026 13:01:42 +0200	[thread overview]
Message-ID: <aen8FiaftUl2o9uj@black.igk.intel.com> (raw)
In-Reply-To: <20260421145056.253300-10-riana.tauro@intel.com>

On Tue, Apr 21, 2026 at 08:20:59PM +0530, Riana Tauro wrote:
> Add structures and helper function to clear error counter value.

...

> +/**
> + * xe_ras_clear_error_counter() - Clear error counter value
> + * @xe: xe device instance
> + * @severity: Error severity level to be cleared
> + * @error_id: Error component to be cleared
> + *
> + * This function clears the value of a specific RAS error counter based on
> + * the provided severity and component.
> + *
> + * Return: 0 on success, negative error code on failure.
> + */
> +int xe_ras_clear_error_counter(struct xe_device *xe, enum drm_xe_ras_error_severity severity,

Same comment as last patch.

> +			       u32 error_id)
> +{
> +	struct xe_ras_clear_counter_response response = {0};
> +	struct xe_ras_clear_counter_request request = {0};
> +	struct xe_sysctrl_mailbox_command command = {0};
> +	struct xe_ras_error_class *error_class = &request.error_class;
> +	enum xe_sysctrl_gfsp_cmd cmd = XE_SYSCTRL_CMD_CLEAR_COUNTER;
> +	size_t rlen;
> +	u32 status;

Shouldn't this be int? Or why not just reuse ret?

> +	int ret;
> +
> +	error_class->common.severity = drm_to_xe_ras_severity[severity];
> +	error_class->common.component = drm_to_xe_ras_component[error_id];
> +
> +	prepare_sysctrl_command(&command, cmd, &request, sizeof(request),
> +				&response, sizeof(response));
> +
> +	guard(xe_pm_runtime)(xe);
> +	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
> +	if (ret) {
> +		xe_err(xe, "sysctrl: cmd %d error ret %d\n", cmd, ret);
> +		return ret;
> +	}
> +
> +	if (rlen != sizeof(response)) {
> +		xe_err(xe, "sysctrl: cmd %d response size mismatch. Expected %zu, got %zu\n",
> +		       cmd, sizeof(response), rlen);
> +		return -EIO;
> +	}
> +
> +	status = xe_ras_status_to_errno[response.status];
> +	if (status) {
> +		xe_err(xe, "sysctrl: cmd %d failed %d\n", cmd, status);
> +		return status;

Hm, so I'm wondering if this is useful to end user? Note, anything exposed
to the user will be hard to change once in place.

> +	}
> +
> +	return 0;
> +}

...

> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -14,9 +14,11 @@
>   * enum xe_sysctrl_gfsp_cmd  - Sysctrl Command ID's for GFSP group
>   *
>   * @XE_SYSCTRL_CMD_GET_COUNTER: Get error counter value
> + * @XE_SYSCTRL_CMD_CLEAR_COUNTER: Clear error counter value
>   */
>  enum xe_sysctrl_gfsp_cmd  {
> -	XE_SYSCTRL_CMD_GET_COUNTER = 0x03
> +	XE_SYSCTRL_CMD_GET_COUNTER = 0x03,

Redundant churn. Please add comma in original patch.

> +	XE_SYSCTRL_CMD_CLEAR_COUNTER = 0x04

Also please align with tabs for readability.

Raag

>  };
>  
>  enum xe_sysctrl_group {
> -- 
> 2.47.1
> 

  reply	other threads:[~2026-04-23 11:01 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-21 14:50 [PATCH v3 0/5] Add get-error-counter and clear-error-counter support for CRI Riana Tauro
2026-04-21 14:26 ` ✗ CI.checkpatch: warning for Add get-error-counter and clear-error-counter support for CRI (rev2) Patchwork
2026-04-21 14:27 ` ✓ CI.KUnit: success " Patchwork
2026-04-21 14:50 ` [PATCH v3 1/5] drm/xe/uapi: Add additional error components to XE drm_ras Riana Tauro
2026-04-21 14:50 ` [PATCH v3 2/5] drm/xe/xe_ras: Add support to get error counter in CRI Riana Tauro
2026-04-23 10:51   ` Raag Jadav
2026-04-23 11:22     ` Tauro, Riana
2026-04-21 14:50 ` [PATCH v3 3/5] drm/xe/xe_ras: Add helper to clear error counter Riana Tauro
2026-04-23 11:01   ` Raag Jadav [this message]
2026-04-23 11:16     ` Tauro, Riana
2026-04-23 12:21       ` Raag Jadav
2026-04-21 14:51 ` [PATCH v3 4/5] drm/xe/xe_drm_ras: Wire get-counter support into xe_drm_ras for CRI Riana Tauro
2026-04-23 11:09   ` Raag Jadav
2026-04-23 11:18     ` Tauro, Riana
2026-04-21 14:51 ` [PATCH v3 5/5] drm/xe/ras: Add flag for Xe RAS Riana Tauro
2026-04-21 15:45 ` ✓ Xe.CI.BAT: success for Add get-error-counter and clear-error-counter support for CRI (rev2) Patchwork
2026-04-21 18:06 ` ✗ Xe.CI.FULL: failure " Patchwork

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