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* [PATCH v2 0/1] Do not include LRC indirect ring state size in engine state size
@ 2026-05-04  9:49 Satyanarayana K V P
  2026-05-04  9:49 ` [PATCH v2 1/1] drm/xe/guc: Exclude indirect ring state page from ADS " Satyanarayana K V P
                   ` (7 more replies)
  0 siblings, 8 replies; 12+ messages in thread
From: Satyanarayana K V P @ 2026-05-04  9:49 UTC (permalink / raw)
  To: intel-xe; +Cc: Satyanarayana K V P

The LRC BO layout is as shown below.

| Region                       Size
+============================+=================================+ <- __xe_lrc_ring_offset()
| Ring                       | ring_size, see                  |
|                            | xe_lrc_init()                   |
+============================+=================================+ <- __xe_lrc_pphwsp_offset()
| PPHWSP (includes SW state) | 4K                              |
+----------------------------+---------------------------------+ <- __xe_lrc_regs_offset()
| Engine Context Image       | n * 4K, see                     |
|                            | xe_gt_lrc_size()                |
+----------------------------+---------------------------------+ <- __xe_lrc_indirect_ring_offset()
| Indirect Ring State Page   | 0 or 4k, see                    |
|                            | XE_LRC_FLAG_INDIRECT_RING_STATE |
+============================+=================================+ <- __xe_lrc_indirect_ctx_offset()
| Indirect Context Page      | 0 or 4k, see                    |
|                            | XE_LRC_FLAG_INDIRECT_CTX        |
+============================+=================================+ <- __xe_lrc_wa_bb_offset()
| WA BB Per Ctx              | 4k                              |
+============================+=================================+ <- xe_bo_size(lrc->bo)

We need to pass the base address of the full golden context and the size
of just the engine state to Guc, which is the section of the context image
that starts after the execlists LRC registers. This is required to allow the
GuC to restore just the engine state when a watchdog reset occurs.

Instead of deriving engine state size by subtracting pphwsp and indirect ring
state size from the xe_gt_lrc_size(), we can directly caluculate the engine
state size by subtracting xe_lrc_reg_size() from xe_gt_lrc_hang_replay_size().


Satyanarayana K V P (1):
  drm/xe/guc: Exclude indirect ring state page from ADS engine state
    size

 drivers/gpu/drm/xe/xe_guc_ads.c |  5 +----
 drivers/gpu/drm/xe/xe_lrc.c     | 11 +++++++++--
 drivers/gpu/drm/xe/xe_lrc.h     |  2 +-
 3 files changed, 11 insertions(+), 7 deletions(-)

-- 
2.43.0


^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2026-05-05 17:38 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-04  9:49 [PATCH v2 0/1] Do not include LRC indirect ring state size in engine state size Satyanarayana K V P
2026-05-04  9:49 ` [PATCH v2 1/1] drm/xe/guc: Exclude indirect ring state page from ADS " Satyanarayana K V P
2026-05-04 15:46   ` Matthew Brost
2026-05-04 23:59   ` Daniele Ceraolo Spurio
2026-05-04 10:04 ` ✓ CI.KUnit: success for Do not include LRC indirect ring state size in engine state size (rev2) Patchwork
2026-05-04 11:00 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-05-04 12:22 ` ✓ Xe.CI.FULL: success " Patchwork
2026-05-05  6:31 ` ✓ CI.KUnit: success for Do not include LRC indirect ring state size in engine state size (rev3) Patchwork
2026-05-05  8:03 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-05 12:51 ` ✓ Xe.CI.BAT: success for Do not include LRC indirect ring state size in engine state size (rev2) Patchwork
2026-05-05 15:31 ` ✗ Xe.CI.FULL: failure for Do not include LRC indirect ring state size in engine state size (rev3) Patchwork
2026-05-05 17:38   ` K V P, Satyanarayana

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