[PATCH v5 00/14] Introduce Xe Uncorrectable Error Handling

[PATCH v5 00/14] Introduce Xe Uncorrectable Error Handling

[Riana Tauro]

This series adds support for XE Uncorrectable Error Handling

The first four patches implement PCI error recovery callbacks for AER events.
On fatal errors, the device is wedged in error_detected and a Secondary
Bus reset (SBR) is requested from PCI core by returning
PCI_ERS_RESULT_NEED_RESET.

On non-fatal errors, the mmio_enabled callback is invoked to query the
error and attempt the required recovery.

This series adds support for handling Uncorrectable core compute,
SoC internal and device memory errors.

Core Compute Errors: Uncorrectable Core-Compute errors are classified
into Global and Local errors.
Global error is an error that affects the entire device requiring
a reset to recover. When an AER is reported and error_detected is invoked
return PCI_ERS_RESULT_NEED_RESET.
A Local error is confined to a specific component or context like a
engine. These errors can be contained and recovered by resetting
only the affected part without distrupting the rest of the device.

SoC Internal errors: Most of the uncorrectable SoC internal errors
are recovered using a SBR apart from CSC firmware and Punit errors.
CSC firmware errors requires a firmware flash to be recovered whereas
Punit error requires cold-reset.

Device memory errors: Most of the uncorrectable memory errors are
recovered using a SBR. However, double-bit ecc errors require page
offlining in both s/w (done in a later patch) and firmware.
Add helper to send offline/decline command to firmware. 
These pages are also saved by firmware in flash and need to be offlined
by software on module load. Add helpers to retrieve the list and queue
from firmware.

Rev2: Add support for SoC internal errors
      fix review comments

Rev3: remove in_recovery flag for disconnect error
      prevent sysctrl flooding
      use minimal logging
      simplify soc structures
      add error_count to GT structures

Rev4: add device memory errors
      add helpers for memory errors
      fix cosmetic review comments

Rev5: simplify structures in all patches
      disconnect on wedged or survivability mode
      rename in_recovery to in_reset
      add minimal integration patch for device memory errors
      rename system controller flooding macro
      fix comments

Riana Tauro (14):
  drm/xe/xe_survivability: Decouple survivability info from boot
    survivability
  drm/xe/xe_sysctrl: Make sysctrl flood limit reusable
  drm/xe/xe_pci_error: Implement PCI error recovery callbacks
  drm/xe/xe_pci_error: Group all devres to release them on PCIe slot
    reset
  drm/xe: Skip device access during PCI error recovery
  drm/xe/xe_ras: Initialize Uncorrectable AER Registers
  drm/xe/xe_ras: Add support for uncorrectable core-compute errors
  drm/xe/xe_ras: Handle uncorrectable SoC Internal errors
  drm/xe/xe_ras: Add initial device memory error processing
  drm/xe/xe_ras: Add support to query page offline queue and list
  drm/xe/xe_ras: Query errors from system controller on probe
  drm/xe/xe_pci_error: Process errors in mmio_enabled
  drm/xe/xe_ras: Add support to offline/decline a page address
  drm/xe/xe_ras: Process pages from offlined list and queue

 drivers/gpu/drm/xe/Makefile                   |   1 +
 drivers/gpu/drm/xe/xe_device.c                |  19 +-
 drivers/gpu/drm/xe/xe_device.h                |  15 +
 drivers/gpu/drm/xe/xe_device_types.h          |   6 +
 drivers/gpu/drm/xe/xe_gt.c                    |  14 +-
 drivers/gpu/drm/xe/xe_guc_submit.c            |   9 +-
 drivers/gpu/drm/xe/xe_pci.c                   |  10 +
 drivers/gpu/drm/xe/xe_pci_error.c             | 138 +++++
 drivers/gpu/drm/xe/xe_ras.c                   | 488 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |   5 +-
 drivers/gpu/drm/xe/xe_ras_types.h             | 215 ++++++++
 drivers/gpu/drm/xe/xe_survivability_mode.c    |  13 +-
 drivers/gpu/drm/xe/xe_sysctrl_event.c         |   2 +-
 drivers/gpu/drm/xe/xe_sysctrl_event_types.h   |   2 +-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  11 +
 15 files changed, 928 insertions(+), 20 deletions(-)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

-- 
2.47.1

[PATCH v5 01/14] drm/xe/xe_survivability: Decouple survivability info from boot survivability

[Riana Tauro]

On CSC runtime firmware errors that requires firmware flash through SPI,
PCODE sets the FDO mode bit in the Capability register.
Currently the survivability_info group is created only for boot
survivability.

Create survivability_info group even for runtime survivability to allow
userspace to check FDO mode sysfs.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: Fix typo (Mallesh)

v3: use tab (Mallesh)
---
 drivers/gpu/drm/xe/xe_survivability_mode.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_survivability_mode.c b/drivers/gpu/drm/xe/xe_survivability_mode.c
index 427afd144f3a..4c506027fa94 100644
--- a/drivers/gpu/drm/xe/xe_survivability_mode.c
+++ b/drivers/gpu/drm/xe/xe_survivability_mode.c
@@ -54,7 +54,6 @@
  *	# cat /sys/bus/pci/devices/<device>/survivability_mode
  *	  Boot
  *
- *
  * Any additional debug information if present will be visible under the directory
  * ``survivability_info``::
  *
@@ -98,6 +97,15 @@
  *	# cat /sys/bus/pci/devices/<device>/survivability_mode
  *	  Runtime
  *
+ * On some CSC firmware errors, PCODE sets FDO mode and the only recovery possible is through
+ * firmware flash using SPI driver. Userspace can check if FDO mode is set by checking the below
+ * sysfs entry.
+ *
+ * .. code-block:: shell
+ *
+ *	# cat /sys/bus/pci/devices/<device>/survivability_info/fdo_mode
+ *	  enabled
+ *
  * When such errors occur, userspace is notified with the drm device wedged uevent and runtime
  * survivability mode. User can then initiate a firmware flash using userspace tools like fwupd
  * to restore device to normal operation.
@@ -296,7 +304,8 @@ static int create_survivability_sysfs(struct pci_dev *pdev)
 	if (ret)
 		return ret;
 
-	if (check_boot_failure(xe)) {
+	/* Survivability info is not required if enabled via configfs */
+	if (!xe_configfs_get_survivability_mode(pdev)) {
 		ret = devm_device_add_group(dev, &survivability_info_group);
 		if (ret)
 			return ret;
-- 
2.47.1

[PATCH v5 02/14] drm/xe/xe_sysctrl: Make sysctrl flood limit reusable

[Riana Tauro]

The sysctrl command flood limit was defined in an event specific header,
restricting its usage to event handling. Move it to the shared header
with a generic name so it can be re-used across all files
using system controller commands.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_sysctrl_event.c         | 2 +-
 drivers/gpu/drm/xe/xe_sysctrl_event_types.h   | 2 +-
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 3 +++
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event.c b/drivers/gpu/drm/xe/xe_sysctrl_event.c
index b4d17329af6c..faf6ba89ce98 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_event.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event.c
@@ -16,7 +16,7 @@ static void get_pending_event(struct xe_sysctrl *sc, struct xe_sysctrl_mailbox_c
 {
 	struct xe_sysctrl_event_response *response = command->data_out;
 	struct xe_device *xe = sc_to_xe(sc);
-	u32 count = XE_SYSCTRL_EVENT_FLOOD;
+	u32 count = XE_SYSCTRL_FLOOD;
 	size_t len;
 	int ret;
 
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
index c16c66b9fa7f..d236e22fe9dd 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
@@ -11,7 +11,7 @@
 #define XE_SYSCTRL_EVENT_DATA_LEN		59
 
 /* Modify as needed */
-#define XE_SYSCTRL_EVENT_FLOOD			16
+#define XE_SYSCTRL_FLOOD			16
 
 /**
  * enum xe_sysctrl_event - Events reported by System Controller
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 84d7c647e743..0fa786a9e8c8 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -48,6 +48,9 @@ struct xe_sysctrl_mailbox_command {
 	size_t data_out_len;
 };
 
+/* Modify as needed */
+#define XE_SYSCTRL_FLOOD			16
+
 #define XE_SYSCTRL_MB_FRAME_SIZE	16
 #define XE_SYSCTRL_MB_MAX_FRAMES	64
 #define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE	\
-- 
2.47.1

[PATCH v5 03/14] drm/xe/xe_pci_error: Implement PCI error recovery callbacks

[Riana Tauro]

Add error_detected, mmio_enabled, slot_reset and resume recovery callbacks
to handle PCIe Advanced Error Reporting (AER) errors.

For fatal errors, the device is wedged and becomes inaccessible. Return
PCI_ERS_RESULT_SLOT_RESET from error_detected to request a Secondary
Bus Reset (SBR).

For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
error_detected to trigger the mmio_enabled callback. In this callback, the
device is queried to determine the error cause and attempt recovery based
on the error type.

Once the secondary bus reset(SBR) is completed the slot_reset callback
cleanly removes and reprobe the device to restore functionality.

Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: re-order linux headers
    reword error messages
    do not clear in_recovery after remove
    return PCI_ERS_RESULT_DISCONNECT if probe fails (Michal)
    only wedge device do not send uevent (Raag)
    set recovery flag in error_detected and clear on resume
    add default switch case (Mallesh)

v3: do not set in_recovery for disconnect (Mallesh)
    return if already wedged or in survivability mode

v4: Add comment (Matthew)
    Fix tab (Mallesh)

v5: remove in_reset
    disconnect if already in survivability mode or wedged
    block I/O operations in slot reset (Raag)

Note: The re-probe in this patch will be replaced by
minimal re-initalization once below patch is merged
 https://lore.kernel.org/intel-xe/f642453c-f657-41c7-a01b-5a0baf886cd3@intel.com/

---
 drivers/gpu/drm/xe/Makefile       |   1 +
 drivers/gpu/drm/xe/xe_pci.c       |   3 +
 drivers/gpu/drm/xe/xe_pci_error.c | 115 ++++++++++++++++++++++++++++++
 3 files changed, 119 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 09661f079d03..091872771e98 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -101,6 +101,7 @@ xe-y += xe_bb.o \
 	xe_page_reclaim.o \
 	xe_pat.o \
 	xe_pci.o \
+	xe_pci_error.o \
 	xe_pci_rebar.o \
 	xe_pcode.o \
 	xe_pm.o \
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index d55e5af4f4b7..d970c27f5570 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1320,6 +1320,8 @@ static const struct dev_pm_ops xe_pm_ops = {
 };
 #endif
 
+extern const struct pci_error_handlers xe_pci_error_handlers;
+
 static struct pci_driver xe_pci_driver = {
 	.name = DRIVER_NAME,
 	.id_table = pciidlist,
@@ -1327,6 +1329,7 @@ static struct pci_driver xe_pci_driver = {
 	.remove = xe_pci_remove,
 	.shutdown = xe_pci_shutdown,
 	.sriov_configure = xe_pci_sriov_configure,
+	.err_handler = &xe_pci_error_handlers,
 #ifdef CONFIG_PM_SLEEP
 	.driver.pm = &xe_pm_ops,
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
new file mode 100644
index 000000000000..42a821ca1a04
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2026 Intel Corporation
+ */
+#include <linux/pci.h>
+
+#include <drm/drm_drv.h>
+
+#include "xe_device.h"
+#include "xe_gt.h"
+#include "xe_pci.h"
+#include "xe_survivability_mode.h"
+#include "xe_uc.h"
+
+static void xe_pci_error_handling(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	struct xe_gt *gt;
+	u8 id;
+
+	/*
+	 * Wedge the device to prevent userspace access but don't send the event yet.
+	 * Runtime PM ref is taken by PCI core for the duration of error handling.
+	 */
+	atomic_set(&xe->wedged.flag, 1);
+
+	for_each_gt(gt, xe, id)
+		xe_gt_declare_wedged(gt);
+
+	pci_disable_device(pdev);
+}
+
+static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: error detected state %d\n", state);
+
+	if (state == pci_channel_io_perm_failure)
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	/* If the device is already wedged or in survivability mode, do not attempt recovery */
+	if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	switch (state) {
+	case pci_channel_io_normal:
+		return PCI_ERS_RESULT_CAN_RECOVER;
+	case pci_channel_io_frozen:
+		xe_pci_error_handling(pdev);
+		return PCI_ERS_RESULT_NEED_RESET;
+	default:
+		dev_err(&pdev->dev, "Unknown state %d\n", state);
+		return PCI_ERS_RESULT_NEED_RESET;
+	}
+}
+
+static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
+{
+	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
+
+	return PCI_ERS_RESULT_NEED_RESET;
+}
+
+static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
+{
+	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
+	struct xe_device *xe;
+
+	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
+
+	pci_restore_state(pdev);
+
+	if (pci_enable_device(pdev)) {
+		dev_err(&pdev->dev,
+			"Cannot re-enable PCI device after reset\n");
+		return PCI_ERS_RESULT_DISCONNECT;
+	}
+
+	/*
+	 * Secondary Bus Reset causes all VRAM state to be lost along with
+	 * hardware state. As an initial step, re-probe the device to
+	 * re-initialize the driver and hardware.
+	 * TODO: optimize by re-initializing only the hardware state and re-creating
+	 * kernel BOs.
+	 */
+	pdev->driver->remove(pdev);
+
+	if (pdev->driver->probe(pdev, ent))
+		return PCI_ERS_RESULT_DISCONNECT;
+
+	xe = pdev_to_xe_device(pdev);
+
+	/* Wedge the device to prevent I/O operations till the resume callback */
+	atomic_set(&xe->wedged.flag, 1);
+
+	return PCI_ERS_RESULT_RECOVERED;
+}
+
+static void xe_pci_error_resume(struct pci_dev *pdev)
+{
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+
+	dev_info(&pdev->dev, "Xe Pci error recovery: Recovered\n");
+
+	/* Resume I/O operations */
+	atomic_set(&xe->wedged.flag, 0);
+}
+
+const struct pci_error_handlers xe_pci_error_handlers = {
+	.error_detected	= xe_pci_error_detected,
+	.mmio_enabled	= xe_pci_error_mmio_enabled,
+	.slot_reset	= xe_pci_error_slot_reset,
+	.resume		= xe_pci_error_resume,
+};
-- 
2.47.1

[PATCH v5 04/14] drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset

[Riana Tauro]

Add devres grouping to handle device resource cleanup during
PCI error recovery.

Secondary Bus Reset (SBR) is triggered by PCI core when the
error_detected/mmio_enabled callbacks return PCI_ERS_RESULT_NEED_RESET.

Once SBR is complete, the slot_reset callback is triggered. SBR wipes
out all device memory requiring XE KMD to perform a device removal and
reprobe.
Calling xe_pci_remove() alone does not free the devres allocated.
Since there are no exported functions to release all devres, group the
devres allocations and release the entire group during slot reset to
ensure proper cleanup.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
v2: move to xe pci layer
---
 drivers/gpu/drm/xe/xe_device_types.h | 3 +++
 drivers/gpu/drm/xe/xe_pci.c          | 7 +++++++
 drivers/gpu/drm/xe/xe_pci_error.c    | 3 ++-
 3 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 89437de3001a..ff47d233e8e8 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -492,6 +492,9 @@ struct xe_device {
 		bool inconsistent_reset;
 	} wedged;
 
+	/** @devres_group_id: id for devres group */
+	void *devres_group_id;
+
 	/** @bo_device: Struct to control async free of BOs */
 	struct xe_bo_dev {
 		/** @bo_device.async_free: Free worker */
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index d970c27f5570..1d256bf0bec3 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -1052,6 +1052,7 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	const struct xe_device_desc *desc = (const void *)ent->driver_data;
 	const struct xe_subplatform_desc *subplatform_desc;
 	struct xe_device *xe;
+	void *devres_id;
 	int err;
 
 	xe_configfs_check_device(pdev);
@@ -1077,6 +1078,10 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (xe_display_driver_probe_defer(pdev))
 		return -EPROBE_DEFER;
 
+	devres_id = devres_open_group(&pdev->dev, NULL, GFP_KERNEL);
+	if (!devres_id)
+		return -ENOMEM;
+
 	err = pcim_enable_device(pdev);
 	if (err)
 		return err;
@@ -1085,6 +1090,8 @@ static int xe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (IS_ERR(xe))
 		return PTR_ERR(xe);
 
+	xe->devres_group_id = devres_id;
+
 	pci_set_drvdata(pdev, &xe->drm);
 
 	xe_pm_assert_unbounded_bridge(xe);
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 42a821ca1a04..b392014ff1f6 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -65,7 +65,7 @@ static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
 static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 {
 	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
-	struct xe_device *xe;
+	struct xe_device *xe = pdev_to_xe_device(pdev);
 
 	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
 
@@ -85,6 +85,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 	 * kernel BOs.
 	 */
 	pdev->driver->remove(pdev);
+	devres_release_group(&pdev->dev, xe->devres_group_id);
 
 	if (pdev->driver->probe(pdev, ent))
 		return PCI_ERS_RESULT_DISCONNECT;
-- 
2.47.1

[PATCH v5 05/14] drm/xe: Skip device access during PCI error recovery

[Riana Tauro]

When a fatal error occurs and the error_detected callback is
invoked the device is inaccessible. The error_detected callback
wedges the device causing the jobs to timeout.

The timedout handler acquires forcewake to dump devcoredump and
triggers a GT reset. Since the device is inacessible this causes
errors. Skip all mmio accesses and gt reset when the device
is in reset.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add check in worker (Mallesh)

v3: add in_reset calls (Raag)
    rename in_recovery to in_reset
---
 drivers/gpu/drm/xe/xe_device.h       | 15 +++++++++++++++
 drivers/gpu/drm/xe/xe_device_types.h |  3 +++
 drivers/gpu/drm/xe/xe_gt.c           | 14 +++++++++++---
 drivers/gpu/drm/xe/xe_guc_submit.c   |  9 +++++----
 drivers/gpu/drm/xe/xe_pci_error.c    |  2 ++
 5 files changed, 36 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 355d69dc8f54..765e90f4220f 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -181,6 +181,21 @@ static inline bool xe_device_has_mert(const struct xe_device *xe)
 	return xe->info.has_mert;
 }
 
+static inline bool xe_device_is_in_reset(struct xe_device *xe)
+{
+	return atomic_read(&xe->in_reset);
+}
+
+static inline void xe_device_set_in_reset(struct xe_device *xe)
+{
+	atomic_set(&xe->in_reset, 1);
+}
+
+static inline void xe_device_clear_in_reset(struct xe_device *xe)
+{
+	atomic_set(&xe->in_reset, 0);
+}
+
 u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size);
 
 void xe_device_snapshot_print(struct xe_device *xe, struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index ff47d233e8e8..65006491c378 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -480,6 +480,9 @@ struct xe_device {
 	/** @needs_flr_on_fini: requests function-reset on fini */
 	bool needs_flr_on_fini;
 
+	/** @in_reset: Indicates if device is in reset */
+	atomic_t in_reset;
+
 	/** @wedged: Struct to control Wedged States and mode */
 	struct {
 		/** @wedged.flag: Xe device faced a critical error and is now blocked. */
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index cdc678d1ae1f..7b547cf7de52 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -917,6 +917,9 @@ static void gt_reset_worker(struct work_struct *w)
 	if (xe_device_wedged(gt_to_xe(gt)))
 		goto err_pm_put;
 
+	if (xe_device_is_in_reset(gt_to_xe(gt)))
+		goto err_pm_put;
+
 	/* We only support GT resets with GuC submission */
 	if (!xe_device_uc_enabled(gt_to_xe(gt)))
 		goto err_pm_put;
@@ -977,18 +980,23 @@ static void gt_reset_worker(struct work_struct *w)
 
 void xe_gt_reset_async(struct xe_gt *gt)
 {
-	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+	struct xe_device *xe = gt_to_xe(gt);
+
+	if (xe_device_is_in_reset(xe))
+		return;
 
 	/* Don't do a reset while one is already in flight */
 	if (!xe_fault_inject_gt_reset() && xe_uc_reset_prepare(&gt->uc))
 		return;
 
+	xe_gt_info(gt, "trying reset from %ps\n", __builtin_return_address(0));
+
 	xe_gt_info(gt, "reset queued\n");
 
 	/* Pair with put in gt_reset_worker() if work is enqueued */
-	xe_pm_runtime_get_noresume(gt_to_xe(gt));
+	xe_pm_runtime_get_noresume(xe);
 	if (!queue_work(gt->ordered_wq, &gt->reset.worker))
-		xe_pm_runtime_put(gt_to_xe(gt));
+		xe_pm_runtime_put(xe);
 }
 
 void xe_gt_suspend_prepare(struct xe_gt *gt)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index b1222b42174c..288ca26f31cf 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1522,7 +1522,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	 * If devcoredump not captured and GuC capture for the job is not ready
 	 * do manual capture first and decide later if we need to use it
 	 */
-	if (!exec_queue_killed(q) && !xe->devcoredump.captured &&
+	if (!xe_device_is_in_reset(xe) && !exec_queue_killed(q) && !xe->devcoredump.captured &&
 	    !xe_guc_capture_get_matching_and_lock(q)) {
 		/* take force wake before engine register manual capture */
 		CLASS(xe_force_wake, fw_ref)(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
@@ -1544,8 +1544,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 	set_exec_queue_banned(q);
 
 	/* Kick job / queue off hardware */
-	if (!wedged && (exec_queue_enabled(primary) ||
-			exec_queue_pending_disable(primary))) {
+	if (!xe_device_is_in_reset(xe) && !wedged &&
+	    (exec_queue_enabled(primary) || exec_queue_pending_disable(primary))) {
 		int ret;
 
 		if (exec_queue_reset(primary))
@@ -1613,7 +1613,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
 
 	trace_xe_sched_job_timedout(job);
 
-	if (!exec_queue_killed(q))
+	/* Do not access device if in reset */
+	if (!xe_device_is_in_reset(xe) && !exec_queue_killed(q))
 		xe_devcoredump(q, job,
 			       "Timedout job - seqno=%u, lrc_seqno=%u, guc_id=%d, flags=0x%lx",
 			       xe_sched_job_seqno(job), xe_sched_job_lrc_seqno(job),
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index b392014ff1f6..7d8c36bec7ae 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -22,6 +22,7 @@ static void xe_pci_error_handling(struct pci_dev *pdev)
 	 * Wedge the device to prevent userspace access but don't send the event yet.
 	 * Runtime PM ref is taken by PCI core for the duration of error handling.
 	 */
+	xe_device_set_in_reset(xe);
 	atomic_set(&xe->wedged.flag, 1);
 
 	for_each_gt(gt, xe, id)
@@ -84,6 +85,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
 	 * TODO: optimize by re-initializing only the hardware state and re-creating
 	 * kernel BOs.
 	 */
+	xe_device_clear_in_reset(xe);
 	pdev->driver->remove(pdev);
 	devres_release_group(&pdev->dev, xe->devres_group_id);
 
-- 
2.47.1

[PATCH v5 06/14] drm/xe/xe_ras: Initialize Uncorrectable AER Registers

[Riana Tauro]

Uncorrectable errors from different endpoints in the device are steered to
the USP(Upstream Switch Port) which is a PCI Advanced Error Reporting (AER)
Compliant device. Downgrade all the errors to non-fatal to prevent PCIe
bus driver from triggering a Secondary Bus Reset (SBR). This allows error
detection, containment and recovery in the driver.

The Uncorrectable Error Severity Register has the 'Uncorrectable
Internal Error Severity' set to fatal by default. Set this to
non-fatal and unmask the error.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: clear stale uncorrectable internal status in status register
(Aravind)

v3: abbrevate TLA's (Raag)
    add a info message if USP does not support AER

v4: add a success log (Raag)
---
 drivers/gpu/drm/xe/xe_device.c |  3 ++
 drivers/gpu/drm/xe/xe_ras.c    | 78 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h    |  2 +-
 3 files changed, 82 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 4b45b617a039..200d6bbb1b70 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -62,6 +62,7 @@
 #include "xe_psmi.h"
 #include "xe_pxp.h"
 #include "xe_query.h"
+#include "xe_ras.h"
 #include "xe_shrinker.h"
 #include "xe_soc_remapper.h"
 #include "xe_survivability_mode.h"
@@ -1048,6 +1049,8 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		goto err_unregister_display;
 
+	xe_ras_init(xe);
+
 	err = xe_device_sysfs_init(xe);
 	if (err)
 		goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 4cb16b419b0c..24642c309967 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -91,3 +91,81 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 			comp_to_str(component), sev_to_str(severity));
 	}
 }
+
+#ifdef CONFIG_PCIEAER
+static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
+{
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct pci_dev *vsp, *usp;
+	u32 aer_uncorr_mask, aer_uncorr_sev, aer_uncorr_status;
+	u16 aer_cap;
+
+	/*
+	 * Device Hierarchy:
+	 *
+	 * Upstream Switch Port (USP)--> Virtual Switch Port (VSP)--> SGunit (GPU endpoint)
+	 */
+	vsp = pci_upstream_bridge(pdev);
+	if (!vsp)
+		return;
+
+	usp = pci_upstream_bridge(vsp);
+	if (!usp)
+		return;
+
+	aer_cap = usp->aer_cap;
+
+	if (!aer_cap) {
+		dev_info(&usp->dev, "USP doesn't support AER capability\n");
+		return;
+	}
+
+	/*
+	 * Clear any stale Uncorrectable Internal Error Status event in Uncorrectable Error
+	 * Status Register.
+	 */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &aer_uncorr_status);
+	if (aer_uncorr_status & PCI_ERR_UNC_INTN)
+		pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_INTN);
+
+	/*
+	 * All errors are steered to USP which is a PCIe AER Compliant device.
+	 * Downgrade all the errors to non-fatal to prevent PCIe bus driver
+	 * from triggering a Secondary Bus Reset (SBR). This allows error
+	 * detection, containment and recovery in the driver.
+	 *
+	 * The Uncorrectable Error Severity Register has the 'Uncorrectable
+	 * Internal Error Severity' set to fatal by default. Set this to
+	 * non-fatal and unmask the error.
+	 */
+
+	/* Initialize Uncorrectable Error Severity Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, &aer_uncorr_sev);
+	aer_uncorr_sev &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, aer_uncorr_sev);
+
+	/* Initialize Uncorrectable Error Mask Register */
+	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
+	aer_uncorr_mask &= ~PCI_ERR_UNC_INTN;
+	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
+
+	pci_save_state(usp);
+	dev_dbg(&usp->dev, "Uncorrectable Internal Errors downgraded and unmasked\n");
+}
+#endif
+
+/**
+ * xe_ras_init - Initialize Xe RAS
+ * @xe: xe device instance
+ *
+ * Initialize Xe RAS
+ */
+void xe_ras_init(struct xe_device *xe)
+{
+	if (!xe->info.has_sysctrl || IS_SRIOV_VF(xe))
+		return;
+
+#ifdef CONFIG_PCIEAER
+	aer_unmask_and_downgrade_internal_error(xe);
+#endif
+}
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index ea90593b62dc..a88ea0a46766 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -11,5 +11,5 @@ struct xe_sysctrl_event_response;
 
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response);
-
+void xe_ras_init(struct xe_device *xe);
 #endif
-- 
2.47.1

[PATCH v5 07/14] drm/xe/xe_ras: Add support for uncorrectable core-compute errors

[Riana Tauro]

Add structures and command for get soc error and process uncorrectable
core-compute errors.

Uncorrectable core-compute errors are classified into global and local
errors.

Global error is an error that affects the entire device requiring a
reset. This type of error is not isolated. When an AER is reported and
error_detected is invoked return PCI_ERS_RESULT_NEED_RESET.

Local error is confined to a specific component or context like a
engine. These errors can be contained and recovered by resetting
only the affected part without disrupting the rest of the device.

Upon detection of an uncorrectable local core-compute error, an AER is
generated and GuC is notified of the error to trigger engine reset.
Return recovered from PCI error callbacks for these errors.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: add newline and fix log
    add bounds check (Mallesh)
    add ras specific enum (Raag)
    helper for sysctrl prepare command
    process all errors before deciding recovery action

v3: remove TODO from commit message
    remove redundant rlen check
    fix loop
    add check for sysctrl flooding (Raag)
    do not use xe_ras prefix for static functions (Soham)

v4: remove rlen initialization to 0
    remove local variable
    add error message for length mismatch (Raag)
    reset on sysctrl flooding
    fix sysctrl flood condition

v5: rebase
    modify log and move it to process_errors
    modify sysctrl flood check
    remove whitespace
    simplify structure (Raag)
    fix typo in commit message
---
 drivers/gpu/drm/xe/xe_ras.c                   | 126 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras.h                   |   3 +
 drivers/gpu/drm/xe/xe_ras_types.h             |  55 ++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |   2 +
 4 files changed, 186 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 24642c309967..ecadad5857b2 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -9,6 +9,11 @@
 #include "xe_ras_types.h"
 #include "xe_sysctrl.h"
 #include "xe_sysctrl_event_types.h"
+#include "xe_sysctrl_mailbox.h"
+#include "xe_sysctrl_mailbox_types.h"
+
+#define CORE_COMPUTE_UNCORR_TYPE	GENMASK(26, 25)
+#define  GLOBAL_UNCORR_ERROR		2
 
 /* Severity of detected errors  */
 enum xe_ras_severity {
@@ -66,6 +71,38 @@ static inline const char *comp_to_str(u8 component)
 	return xe_ras_components[component];
 }
 
+static void prepare_ras_command(struct xe_sysctrl_mailbox_command *command,
+				u32 cmd_mask, void *request, size_t request_len,
+				void *response, size_t response_len)
+{
+	struct xe_sysctrl_app_msg_hdr hdr = {0};
+
+	hdr.data = FIELD_PREP(APP_HDR_GROUP_ID_MASK, XE_SYSCTRL_GROUP_GFSP) |
+		   FIELD_PREP(APP_HDR_COMMAND_MASK, cmd_mask);
+
+	command->header = hdr;
+	command->data_in = request;
+	command->data_in_len = request_len;
+	command->data_out = response;
+	command->data_out_len = response_len;
+}
+
+static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *xe,
+							      struct xe_ras_error_array *arr)
+{
+	struct xe_ras_compute_error *error_info = (struct xe_ras_compute_error *)arr->error_details;
+	u8 uncorr_type;
+
+	uncorr_type = FIELD_GET(CORE_COMPUTE_UNCORR_TYPE, error_info->error_log_header);
+
+	/* Request a reset if error is global */
+	if (uncorr_type == GLOBAL_UNCORR_ERROR)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	/* Local errors are recovered using an engine reset by GuC */
+	return XE_RAS_RECOVERY_ACTION_RECOVERED;
+}
+
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response)
 {
@@ -92,6 +129,95 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 	}
 }
 
+/**
+ * xe_ras_process_errors() - Process and contain hardware errors
+ * @xe: xe device instance
+ *
+ * Get error details from system controller and return recovery
+ * method. Called only from PCI error handling.
+ *
+ * Returns: recovery action to be taken
+ */
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_get_soc_error response;
+	enum xe_ras_recovery_action final_action;
+	u32 count = XE_SYSCTRL_FLOOD;
+	size_t rlen;
+	int ret;
+
+	if (!xe->info.has_sysctrl)
+		return XE_RAS_RECOVERY_ACTION_RESET;
+
+	/* Default action */
+	final_action = XE_RAS_RECOVERY_ACTION_RECOVERED;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_GET_SOC_ERROR, NULL, 0,
+			    &response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "sysctrl: failed to get soc error %d\n", ret);
+			goto err;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "sysctrl: unexpected get soc error response length %zu (expected %zu)\n",
+			       rlen, sizeof(response));
+			goto err;
+		}
+
+		/* Report if number of errors exceeds the maximum errors supported */
+		if (response.num_errors > XE_RAS_NUM_ERROR_ARR)
+			xe_err(xe, "sysctrl: number of errors received %d out of bound (%d)\n",
+			       response.num_errors, XE_RAS_NUM_ERROR_ARR);
+
+		for (int i = 0; i < response.num_errors && i < XE_RAS_NUM_ERROR_ARR; i++) {
+			struct xe_ras_error_array *arr = &response.error_arr[i];
+			enum xe_ras_recovery_action action;
+			struct xe_ras_error_class error_class;
+			u8 component, severity;
+
+			error_class = arr->error_class;
+			component = error_class.common.component;
+			severity = error_class.common.severity;
+
+			xe_err(xe, "[RAS]: %s %s detected\n", comp_to_str(component),
+			       sev_to_str(severity));
+
+			switch (component) {
+			case XE_RAS_COMP_CORE_COMPUTE:
+				action = handle_core_compute_errors(xe, arr);
+				break;
+			default:
+				/* For any other component, reset */
+				action = XE_RAS_RECOVERY_ACTION_RESET;
+				break;
+			}
+
+			/* Process and log all errors and then trigger highest recovery action */
+			if (action > final_action)
+				final_action = action;
+		}
+
+		/* Treat flooding as an system controller error */
+		if (!--count) {
+			xe_err(xe, "[RAS]: sysctrl: get soc error response flooding\n");
+			return XE_RAS_RECOVERY_ACTION_RESET;
+		}
+
+	} while (response.additional_errors);
+
+	return final_action;
+
+err:
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 #ifdef CONFIG_PCIEAER
 static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
 {
diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
index a88ea0a46766..cdaad3114dae 100644
--- a/drivers/gpu/drm/xe/xe_ras.h
+++ b/drivers/gpu/drm/xe/xe_ras.h
@@ -6,10 +6,13 @@
 #ifndef _XE_RAS_H_
 #define _XE_RAS_H_
 
+#include "xe_ras_types.h"
+
 struct xe_device;
 struct xe_sysctrl_event_response;
 
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response);
 void xe_ras_init(struct xe_device *xe);
+enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe);
 #endif
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 4e63c67f806a..e97026fd6ff9 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -8,8 +8,27 @@
 
 #include <linux/types.h>
 
+#define XE_RAS_NUM_ERROR_ARR			3
 #define XE_RAS_NUM_COUNTERS			16
 
+/**
+ * enum xe_ras_recovery_action - RAS recovery actions
+ *
+ * @XE_RAS_RECOVERY_ACTION_RECOVERED: Error recovered
+ * @XE_RAS_RECOVERY_ACTION_RESET: Requires reset
+ * @XE_RAS_RECOVERY_ACTION_DISCONNECT: Requires disconnect
+ * @XE_RAS_RECOVERY_ACTION_MAX: Max action value
+ *
+ * This enum defines the possible recovery actions that can be taken in response
+ * to RAS errors.
+ */
+enum xe_ras_recovery_action {
+	XE_RAS_RECOVERY_ACTION_RECOVERED = 0,
+	XE_RAS_RECOVERY_ACTION_RESET,
+	XE_RAS_RECOVERY_ACTION_DISCONNECT,
+	XE_RAS_RECOVERY_ACTION_MAX
+};
+
 /**
  * struct xe_ras_error_common - Error fields that are common across all products
  */
@@ -70,4 +89,40 @@ struct xe_ras_threshold_crossed {
 	struct xe_ras_error_class counters[XE_RAS_NUM_COUNTERS];
 } __packed;
 
+/**
+ * struct xe_ras_error_array - Details of the error types
+ */
+struct xe_ras_error_array {
+	/** @counter_value: Counter value of the returned error */
+	u32 counter_value;
+	/** @error_class: Error class */
+	struct xe_ras_error_class error_class;
+	/** @timestamp: Timestamp */
+	u64 timestamp;
+	/** @error_details: Error details specific to the class */
+	u32 error_details[XE_RAS_NUM_COUNTERS];
+} __packed;
+
+/**
+ * struct xe_ras_get_soc_error - Response from get soc error command
+ */
+struct xe_ras_get_soc_error {
+	/** @num_errors: Number of errors reported in this response */
+	u8 num_errors;
+	/** @additional_errors: Indicates if the errors are pending */
+	u8 additional_errors;
+	/** @error_arr: Array of up to 3 errors */
+	struct xe_ras_error_array error_arr[XE_RAS_NUM_ERROR_ARR];
+} __packed;
+
+/**
+ * struct xe_ras_compute_error - Error details of Core Compute error
+ */
+struct xe_ras_compute_error {
+	/** @error_log_header: Error Source and type */
+	u32 error_log_header;
+	/** @reserved: Reserved */
+	u32 reserved[15];
+} __packed;
+
 #endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 0fa786a9e8c8..5ccfc6325a90 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -22,9 +22,11 @@ enum xe_sysctrl_group {
 /**
  * enum xe_sysctrl_gfsp_cmd - Commands supported by GFSP group
  *
+ * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
  * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
  */
 enum xe_sysctrl_gfsp_cmd {
+	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
 	XE_SYSCTRL_CMD_GET_PENDING_EVENT	= 0x07,
 };
 
-- 
2.47.1

[PATCH v5 08/14] drm/xe/xe_ras: Handle uncorrectable SoC Internal errors

[Riana Tauro]

Some critical errors such as CSC firmware and Punit are reported under SoC
internal errors and require special handling.

CSC errors are classified into hardware errors and firmware errors.
Hardware errors can be recovered using a SBR (Secondary Bus Reset) whereas
firmware errors are critical and require a firmware flash. On such errors,
device is wedged and runtime survivability mode will be enabled to notify
userspace that a firmware flash is required.

PUNIT uncorrectable errors can only be recovered through a cold reset.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: simplify soc structures
    return error code for each SoC error (Mallesh)

v3: squash patches (Raag)

v4: re-use csc work 
---
 drivers/gpu/drm/xe/xe_ras.c       | 53 +++++++++++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras_types.h | 50 +++++++++++++++++++++++++++++
 2 files changed, 103 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index ecadad5857b2..0d4e2116ef61 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -103,6 +103,56 @@ static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *
 	return XE_RAS_RECOVERY_ACTION_RECOVERED;
 }
 
+static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *xe,
+							      struct xe_ras_error_array *arr)
+{
+	struct xe_ras_soc_error *error_info = (struct xe_ras_soc_error *)arr->error_details;
+	struct xe_ras_soc_error_source *source = &error_info->error_source;
+	struct xe_ras_error_class *error_class = &arr->error_class;
+	u8 tile_id = error_class->product.unit.tile;
+	struct xe_tile *tile;
+
+	if (tile_id >= xe->info.tile_count) {
+		xe_err(xe, "sysctrl: SOC internal error reported from invalid tile %u\n", tile_id);
+		return XE_RAS_RECOVERY_ACTION_RESET;
+	}
+
+	tile = &xe->tiles[tile_id];
+
+	if (source->csc) {
+		struct xe_ras_csc_error *csc_error = (struct xe_ras_csc_error *)error_info->additional_details;
+
+		/*
+		 * CSC uncorrectable errors are classified as hardware errors and firmware errors.
+		 * CSC firmware errors are critical errors that can be recovered only by firmware
+		 * update via SPI driver. On a CSC firmware error, PCODE enables FDO mode and sets
+		 * the bit in the capability register. On receiving this error, the driver enables
+		 * runtime survivability mode which notifies userspace that a firmware update
+		 * is required.
+		 */
+		if (csc_error->hec_uncorr_fw_err_dw0) {
+			xe_err(xe, "[RAS]: CSC %s detected: 0x%x\n",
+			       sev_to_str(error_class->common.severity),
+			       csc_error->hec_uncorr_fw_err_dw0);
+			schedule_work(&tile->csc_hw_error_work);
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	} else if (source->ieh) {
+		struct xe_ras_ieh_error *ieh_error = (struct xe_ras_ieh_error *)error_info->additional_details;
+
+		if (ieh_error->global_error_status & XE_RAS_SOC_IEH_PUNIT) {
+			xe_err(xe, "[RAS]: PUNIT %s detected: 0x%x\n",
+			       sev_to_str(error_class->common.severity),
+			       ieh_error->global_error_status);
+			/* TODO: Add PUNIT error handling */
+			return XE_RAS_RECOVERY_ACTION_DISCONNECT;
+		}
+	}
+
+	/* For other SOC internal errors, request a reset as recovery mechanism */
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response)
 {
@@ -193,6 +243,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 			case XE_RAS_COMP_CORE_COMPUTE:
 				action = handle_core_compute_errors(xe, arr);
 				break;
+			case XE_RAS_COMP_SOC_INTERNAL:
+				action = handle_soc_internal_errors(xe, arr);
+				break;
 			default:
 				/* For any other component, reset */
 				action = XE_RAS_RECOVERY_ACTION_RESET;
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index e97026fd6ff9..c5a283317d90 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -10,6 +10,7 @@
 
 #define XE_RAS_NUM_ERROR_ARR			3
 #define XE_RAS_NUM_COUNTERS			16
+#define XE_RAS_SOC_IEH_PUNIT			BIT(1)
 
 /**
  * enum xe_ras_recovery_action - RAS recovery actions
@@ -125,4 +126,53 @@ struct xe_ras_compute_error {
 	u32 reserved[15];
 } __packed;
 
+/**
+ * struct xe_ras_soc_error_source - Source of SoC error
+ */
+struct xe_ras_soc_error_source {
+	/** @csc: CSC */
+	u32 csc:1;
+	/** @ieh: IEH (Integrated Error Handler) */
+	u32 ieh:1;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+} __packed;
+
+/**
+ * struct xe_ras_soc_error - Error details of SoC internal error
+ */
+struct xe_ras_soc_error {
+	/** @error_source: Error source */
+	struct xe_ras_soc_error_source error_source;
+	/** @additional_details: Additional details */
+	u32 additional_details[15];
+} __packed;
+
+/**
+ * struct xe_ras_csc_error - CSC error details
+ */
+struct xe_ras_csc_error {
+	/** @hec_uncorr_err_status: CSC hardware error status */
+	u32 hec_uncorr_err_status;
+	/** @hec_uncorr_fw_err_dw0: CSC firmware error */
+	u32 hec_uncorr_fw_err_dw0;
+} __packed;
+
+/**
+ * struct xe_ras_ieh_error - SoC IEH (Integrated Error Handler) error details
+ */
+struct xe_ras_ieh_error {
+	/** @ieh_instance: IEH instance */
+	u32 ieh_instance:2;
+	/** @reserved: Reserved for future use */
+	u32 reserved:30;
+	/** @global_error_status: Global error status */
+	u32 global_error_status;
+	/** @local_error_status: Local error status */
+	u32 local_error_status;
+	/** @gerr_mask: Global error mask */
+	u32 gerr_mask;
+	/** @additional_info: Additional information */
+	u32 additional_info[10];
+} __packed;
 #endif
-- 
2.47.1

[PATCH v5 09/14] drm/xe/xe_ras: Add support to query device memory errors

[Riana Tauro]

Add initial support to query uncorrectable device memory errors from
system controller. Double bit ECC (Error Correcting Code) errors will
be handled using Page offlining in a later patch. The other device memory
error categories require a Secondary Bus Reset (SBR) to recover.

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: simplify structures 
---
 drivers/gpu/drm/xe/xe_ras.c       | 18 ++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras_types.h | 17 +++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 0d4e2116ef61..803f5fd204bd 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -153,6 +153,21 @@ static enum xe_ras_recovery_action handle_soc_internal_errors(struct xe_device *
 	return XE_RAS_RECOVERY_ACTION_RESET;
 }
 
+static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device *xe,
+							       struct xe_ras_error_array *arr)
+{
+	struct xe_ras_memory_error *error_info = (struct xe_ras_memory_error *)arr->error_details;
+
+	if (error_info->category & XE_RAS_MEMORY_ECC) {
+		xe_err(xe, "[RAS]: double-bit ECC error detected at sw address 0x%llx\n",
+		       error_info->sw_address);
+		/* TODO: page offline handling for double-bit ECC errors and return accordingly */
+	}
+
+	/* Request a reset for other device memory error categories */
+	return XE_RAS_RECOVERY_ACTION_RESET;
+}
+
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response)
 {
@@ -246,6 +261,9 @@ enum xe_ras_recovery_action xe_ras_process_errors(struct xe_device *xe)
 			case XE_RAS_COMP_SOC_INTERNAL:
 				action = handle_soc_internal_errors(xe, arr);
 				break;
+			case XE_RAS_COMP_DEVICE_MEMORY:
+				action = handle_device_memory_errors(xe, arr);
+				break;
 			default:
 				/* For any other component, reset */
 				action = XE_RAS_RECOVERY_ACTION_RESET;
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index c5a283317d90..5999e7b4af1c 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -11,6 +11,7 @@
 #define XE_RAS_NUM_ERROR_ARR			3
 #define XE_RAS_NUM_COUNTERS			16
 #define XE_RAS_SOC_IEH_PUNIT			BIT(1)
+#define XE_RAS_MEMORY_ECC			BIT(1)
 
 /**
  * enum xe_ras_recovery_action - RAS recovery actions
@@ -175,4 +176,20 @@ struct xe_ras_ieh_error {
 	/** @additional_info: Additional information */
 	u32 additional_info[10];
 } __packed;
+
+/**
+ * struct xe_ras_memory_error - Device memory error details
+ */
+struct xe_ras_memory_error {
+	/** @category: Device memory error category */
+	u8 category;
+	/** @reserved: Reserved for future use */
+	u8 reserved[7];
+	/** @hardware_address: Hardware physical address details */
+	u64 hardware_address;
+	/** @sw_address: Software address where error occurred */
+	u64 sw_address;
+	/** @reserved2: Reserved for future use */
+	u32 reserved2[10];
+} __packed;
 #endif
-- 
2.47.1

[PATCH v5 10/14] drm/xe/xe_ras: Add support to query page offline queue and list

[Riana Tauro]

Add support to query page offline list and queue from firmware
during module load. The page offline list command retrieves pages that
are already offlined by the firmware. The page offline queue command
retrieves the pages pending to be offlined by the firmware.
processing pages is done in a later patch.

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: fix commit message
    fix log (Tejas)
---
 drivers/gpu/drm/xe/xe_ras.c                   | 85 +++++++++++++++++++
 drivers/gpu/drm/xe/xe_ras_types.h             | 35 ++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |  4 +
 3 files changed, 124 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 803f5fd204bd..a1ae7a3d9696 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -168,6 +168,88 @@ static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device
 	return XE_RAS_RECOVERY_ACTION_RESET;
 }
 
+static void get_queued_pages(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_queue response = {0};
+	u32 count = 0;
+	size_t rlen;
+	int ret;
+
+	/* Supported only on platforms with system controller */
+	if (!xe->info.has_sysctrl)
+		return;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE, NULL, 0,
+			    &response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "sysctrl: failed to get page offline queue %d\n", ret);
+			return;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "sysctrl: unexpected page offline queue response length %zu (expected %zu)\n",
+			       rlen, sizeof(response));
+			return;
+		}
+
+		/* TODO: Process pages and offline them */
+
+		count += response.pages_returned;
+		if (count > response.total_pages) {
+			xe_err(xe, "sysctrl: Pages returned from queue exceed total pages %u, returned %u\n",
+			       response.total_pages, count);
+			return;
+		}
+	} while (response.additional_data);
+}
+
+static void get_offlined_list(struct xe_device *xe)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_list response = {0};
+	u32 count = 0;
+	size_t rlen;
+	int ret;
+
+	/* Supported only on platforms with system controller */
+	if (!xe->info.has_sysctrl)
+		return;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_GET_OFFLINE_LIST, NULL, 0,
+			    &response, sizeof(response));
+
+	do {
+		memset(&response, 0, sizeof(response));
+
+		ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+		if (ret) {
+			xe_err(xe, "sysctrl: failed to get page offline list %d\n", ret);
+			return;
+		}
+
+		if (rlen != sizeof(response)) {
+			xe_err(xe, "sysctrl: unexpected page offline list response length %zu (expected %zu)\n",
+			       rlen, sizeof(response));
+			return;
+		}
+
+		/* TODO: Process pages and offline them */
+
+		count += response.pages_returned;
+		if (count > response.total_pages) {
+			xe_err(xe, "sysctrl: Pages returned from list exceed total pages %u, returned %u\n",
+			       response.total_pages, count);
+			return;
+		}
+	} while (response.additional_data);
+}
+
 void xe_ras_counter_threshold_crossed(struct xe_device *xe,
 				      struct xe_sysctrl_event_response *response)
 {
@@ -365,4 +447,7 @@ void xe_ras_init(struct xe_device *xe)
 #ifdef CONFIG_PCIEAER
 	aer_unmask_and_downgrade_internal_error(xe);
 #endif
+
+	get_queued_pages(xe);
+	get_offlined_list(xe);
 }
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 5999e7b4af1c..640101c3a3c3 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -12,6 +12,7 @@
 #define XE_RAS_NUM_COUNTERS			16
 #define XE_RAS_SOC_IEH_PUNIT			BIT(1)
 #define XE_RAS_MEMORY_ECC			BIT(1)
+#define XE_RAS_NUM_PAGES			25
 
 /**
  * enum xe_ras_recovery_action - RAS recovery actions
@@ -192,4 +193,38 @@ struct xe_ras_memory_error {
 	/** @reserved2: Reserved for future use */
 	u32 reserved2[10];
 } __packed;
+
+/**
+ * struct xe_ras_page_offline_list - Response from get offline list command
+ */
+struct xe_ras_page_offline_list {
+	/** @max_entries: Total no of pages that can be stored in flash */
+	u32 max_entries;
+	/** @total_pages: Total number of permanently offlined pages */
+	u32 total_pages;
+	/** @pages_returned: Number of pages returned in this response */
+	u32 pages_returned;
+	/** @page_addresses: Array of permanently offlined page addresses (4KB aligned) */
+	u64 page_addresses[XE_RAS_NUM_PAGES];
+	/** @additional_data: Indicates if more data is available */
+	u8 additional_data;
+	/** @reserved: Reserved for future use */
+	u8 reserved[3];
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_queue - Response from get offline queue command
+ */
+struct xe_ras_page_offline_queue {
+	/** @total_pages: Total number of queued pages */
+	u32 total_pages;
+	/** @pages_returned: Number of pages returned in this response */
+	u32 pages_returned;
+	/** @page_addresses: Array of page addresses (4KB aligned) */
+	u64 page_addresses[XE_RAS_NUM_PAGES];
+	/** @additional_data: Indicates if more data is available */
+	u8 additional_data;
+	/** @reserved: Reserved for future use */
+	u8 reserved[3];
+} __packed;
 #endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index 5ccfc6325a90..b7a5e82c6eb0 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -24,10 +24,14 @@ enum xe_sysctrl_group {
  *
  * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
  * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Retrieve list of all offlined pages from flash
+ * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Retrieve list of offlined queued pages from firmware
  */
 enum xe_sysctrl_gfsp_cmd {
 	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
 	XE_SYSCTRL_CMD_GET_PENDING_EVENT	= 0x07,
+	XE_SYSCTRL_CMD_GET_OFFLINE_LIST		= 0x09,
+	XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE	= 0x0A,
 };
 
 /**
-- 
2.47.1

[PATCH v5 11/14] drm/xe/xe_ras: Query errors from system controller on probe

[Riana Tauro]

Reorder soc remapper and system controller initialization to
early probe to allow querying errors on module load.

Cc: Anoop Vijay <anoop.c.vijay@intel.com>
Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
v2: fix comment (Raag)
---
 drivers/gpu/drm/xe/xe_device.c | 20 ++++++++++----------
 drivers/gpu/drm/xe/xe_ras.c    |  7 +++++++
 2 files changed, 17 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 200d6bbb1b70..041af7ffc8bb 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -963,6 +963,16 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		return err;
 
+	err = xe_soc_remapper_init(xe);
+	if (err)
+		return err;
+
+	err = xe_sysctrl_init(xe);
+	if (err)
+		return err;
+
+	xe_ras_init(xe);
+
 	/*
 	 * Now that GT is initialized (TTM in particular),
 	 * we can try to init display, and inherit the initial fb.
@@ -1003,10 +1013,6 @@ int xe_device_probe(struct xe_device *xe)
 
 	xe_nvm_init(xe);
 
-	err = xe_soc_remapper_init(xe);
-	if (err)
-		return err;
-
 	err = xe_heci_gsc_init(xe);
 	if (err)
 		return err;
@@ -1045,12 +1051,6 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		goto err_unregister_display;
 
-	err = xe_sysctrl_init(xe);
-	if (err)
-		goto err_unregister_display;
-
-	xe_ras_init(xe);
-
 	err = xe_device_sysfs_init(xe);
 	if (err)
 		goto err_unregister_display;
diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index a1ae7a3d9696..b99c092a1799 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -450,4 +450,11 @@ void xe_ras_init(struct xe_device *xe)
 
 	get_queued_pages(xe);
 	get_offlined_list(xe);
+
+	/*
+	 * On init, process and log any errors detected by firmware before driver load.
+	 * Critical errors such as Punit, CSC are reported through PCode init failure,
+	 * causing the driver to enter survivability mode.
+	 */
+	xe_ras_process_errors(xe);
 }
-- 
2.47.1

[PATCH v5 12/14] drm/xe/xe_pci_error: Process errors in mmio_enabled

[Riana Tauro]

Query system controller when any non fatal error occurs to check
the type of the error, contain and recover.

The system controller is queried in the mmio_enabled callback.

Signed-off-by: Riana Tauro <riana.tauro@intel.com>
Reviewed-by: Raag Jadav <raag.jadav@intel.com>
---
v2: use ras recovery enum (Raag)

v3: add comment for mapping
    use const (Mallesh)

v4: use switch (Raag, Anshuman)
---
 drivers/gpu/drm/xe/xe_pci_error.c | 22 +++++++++++++++++++++-
 1 file changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 7d8c36bec7ae..8d62bcbcbbb6 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -9,9 +9,24 @@
 #include "xe_device.h"
 #include "xe_gt.h"
 #include "xe_pci.h"
+#include "xe_ras.h"
 #include "xe_survivability_mode.h"
 #include "xe_uc.h"
 
+static pci_ers_result_t ras_action_to_pci_result(enum xe_ras_recovery_action action)
+{
+	switch (action) {
+	case XE_RAS_RECOVERY_ACTION_RECOVERED:
+		return PCI_ERS_RESULT_RECOVERED;
+	case XE_RAS_RECOVERY_ACTION_RESET:
+		return PCI_ERS_RESULT_NEED_RESET;
+	case XE_RAS_RECOVERY_ACTION_DISCONNECT:
+		return PCI_ERS_RESULT_DISCONNECT;
+	default:
+		return PCI_ERS_RESULT_DISCONNECT;
+	}
+}
+
 static void xe_pci_error_handling(struct pci_dev *pdev)
 {
 	struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -58,9 +73,14 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
 
 static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
 {
+	struct xe_device *xe = pdev_to_xe_device(pdev);
+	enum xe_ras_recovery_action action;
+
 	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
 
-	return PCI_ERS_RESULT_NEED_RESET;
+	action = xe_ras_process_errors(xe);
+
+	return ras_action_to_pci_result(action);
 }
 
 static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
-- 
2.47.1

[RFC PATCH v5 13/14] drm/xe/xe_ras: Add support to offline/decline a page address

[Riana Tauro]

This will be integrated with the related address-fault handling flow
once this patch is merged.
https://lore.kernel.org/intel-xe/20260506141143.4033299-12-tejas.upadhyay@intel.com/
Sending for initial comments.

Add basic support for sending page offline/decline requests
to system controller and use it for device memory ECC error
handling.

Handle return values from xe_ttm_vram_handle_addr_fault() and take
corresponding action. Pages that belong to critical BOs cannot
be handled by offlining and require a SBR (Secondary Bus Reset).
Pages that are configured for log-only handling are declined.
Other eligible page addresses are offlined through firmware.

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c                   | 122 +++++++++++++++++-
 drivers/gpu/drm/xe/xe_ras_types.h             |  58 +++++++++
 drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h |   2 +
 3 files changed, 180 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index b99c092a1799..05a77db2ed8a 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -3,6 +3,7 @@
  * Copyright © 2026 Intel Corporation
  */
 
+#include "xe_bo.h"
 #include "xe_device.h"
 #include "xe_printk.h"
 #include "xe_ras.h"
@@ -36,6 +37,17 @@ enum xe_ras_component {
 	XE_RAS_COMP_MAX
 };
 
+static const int ras_status_to_errno_map[] = {
+	[XE_RAS_STATUS_SUCCESS]			= 0,
+	[XE_RAS_STATUS_INVALID_PARAM]		= -EINVAL,
+	[XE_RAS_STATUS_OP_NOT_SUPPORTED]	= -EOPNOTSUPP,
+	[XE_RAS_STATUS_TIMEOUT]			= -ETIMEDOUT,
+	[XE_RAS_STATUS_HARDWARE_FAILURE]	= -EIO,
+	[XE_RAS_STATUS_INSUFFICIENT_RESOURCES]	= -ENAVAIL,
+	[XE_RAS_STATUS_UNKNOWN_ERROR]		= -ENODATA
+};
+static_assert(ARRAY_SIZE(ras_status_to_errno_map) == XE_RAS_STATUS_UNKNOWN_ERROR + 1);
+
 static const char *const xe_ras_severities[] = {
 	[XE_RAS_SEV_NOT_SUPPORTED]		= "Not Supported",
 	[XE_RAS_SEV_CORRECTABLE]		= "Correctable Error",
@@ -71,6 +83,14 @@ static inline const char *comp_to_str(u8 component)
 	return xe_ras_components[component];
 }
 
+static int ras_status_to_errno(enum xe_ras_response_status status)
+{
+	if (status > XE_RAS_STATUS_UNKNOWN_ERROR)
+		status = XE_RAS_STATUS_UNKNOWN_ERROR;
+
+	return ras_status_to_errno_map[status];
+}
+
 static void prepare_ras_command(struct xe_sysctrl_mailbox_command *command,
 				u32 cmd_mask, void *request, size_t request_len,
 				void *response, size_t response_len)
@@ -87,6 +107,101 @@ static void prepare_ras_command(struct xe_sysctrl_mailbox_command *command,
 	command->data_out_len = response_len;
 }
 
+static int send_page_offline(struct xe_device *xe, enum xe_ras_page_action action, u64 page_address)
+{
+	struct xe_sysctrl_mailbox_command command = {0};
+	struct xe_ras_page_offline_request request = {0};
+	struct xe_ras_page_offline_response response = {0};
+	size_t rlen;
+	int ret;
+
+	if (!xe->info.has_sysctrl)
+		return 0;
+
+	if (action >= XE_RAS_PAGE_ACTION_MAX) {
+		xe_err(xe, "[RAS]: Invalid page offline action %d\n", action);
+		return -EINVAL;
+	}
+
+	request.page_address = page_address;
+	request.action = action;
+
+	prepare_ras_command(&command, XE_SYSCTRL_CMD_PAGE_OFFLINE, &request,
+			    sizeof(request), &response, sizeof(response));
+
+	ret = xe_sysctrl_send_command(&xe->sc, &command, &rlen);
+	if (ret) {
+		xe_err(xe, "sysctrl: failed to send page offline command %d\n", ret);
+		return ret;
+	}
+
+	if (rlen != sizeof(response)) {
+		xe_err(xe, "sysctrl: unexpected page offline response length %zu (expected %zu)\n",
+		       rlen, sizeof(response));
+		return -EINVAL;
+	}
+
+	ret = ras_status_to_errno(response.status);
+	if (ret)
+		xe_err(xe, "sysctrl: page offline command failed with status %d\n", response.status);
+
+	return ret;
+}
+
+static int handle_page_offline(struct xe_device *xe, u64 page_address, bool send_offline_cmd)
+{
+	enum xe_ras_page_action action;
+	int ret;
+
+	if (!IS_ALIGNED(page_address, XE_PAGE_SIZE)) {
+		xe_err(xe, "sysctrl: Unaligned page address: 0x%llx\n", page_address);
+		return -EINVAL;
+	}
+
+	/*
+	 * TODO: Call function to handle address fault
+	 * ret = xe_ttm_vram_handle_addr_fault(xe, page_address);
+	 */
+
+	/*
+	 * Handle return code from address fault handling function:
+	 *  0: Address is valid and can be offlined
+	 * -EIO: Address belongs to a critical BO that cannot be offlined
+	 * -ENXIO: Invalid address
+	 * -EOPNOTSUPP: Address is valid and can be offlined but user policy is not to offline
+	 *
+	 * For any other non-zero error code, skip offlining.
+	 */
+
+	switch (ret) {
+	case 0:
+		action = XE_RAS_PAGE_ACTION_OFFLINE;
+		break;
+	/* User policy set to decline page offlining */
+	case -EOPNOTSUPP:
+		action = XE_RAS_PAGE_ACTION_DECLINE;
+		break;
+	case -EIO:
+		xe_err(xe, "[RAS]: Page address belongs to critical BO: 0x%llx\n",
+		       page_address);
+		return ret;
+	default:
+		xe_err(xe, "[RAS]: Failed to handle address fault 0x%llx: %d\n",
+		       page_address, ret);
+		return 0;
+	}
+
+	if (send_offline_cmd) {
+		ret = send_page_offline(xe, action, page_address);
+		if (ret)
+			xe_err(xe, "sysctrl: Failed to offline page for address 0x%llx: %d\n",
+			       page_address, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 static enum xe_ras_recovery_action handle_core_compute_errors(struct xe_device *xe,
 							      struct xe_ras_error_array *arr)
 {
@@ -157,14 +272,17 @@ static enum xe_ras_recovery_action handle_device_memory_errors(struct xe_device
 							       struct xe_ras_error_array *arr)
 {
 	struct xe_ras_memory_error *error_info = (struct xe_ras_memory_error *)arr->error_details;
+	int ret;
 
 	if (error_info->category & XE_RAS_MEMORY_ECC) {
 		xe_err(xe, "[RAS]: double-bit ECC error detected at sw address 0x%llx\n",
 		       error_info->sw_address);
-		/* TODO: page offline handling for double-bit ECC errors and return accordingly */
+		ret = handle_page_offline(xe, error_info->sw_address, true);
+		if (!ret)
+			return XE_RAS_RECOVERY_ACTION_RECOVERED;
 	}
 
-	/* Request a reset for other device memory error categories */
+	/* Request a reset for other device memory errors and if page offlining failed */
 	return XE_RAS_RECOVERY_ACTION_RESET;
 }
 
diff --git a/drivers/gpu/drm/xe/xe_ras_types.h b/drivers/gpu/drm/xe/xe_ras_types.h
index 640101c3a3c3..0267f3268526 100644
--- a/drivers/gpu/drm/xe/xe_ras_types.h
+++ b/drivers/gpu/drm/xe/xe_ras_types.h
@@ -32,6 +32,40 @@ enum xe_ras_recovery_action {
 	XE_RAS_RECOVERY_ACTION_MAX
 };
 
+/**
+ * enum xe_ras_page_action - Page offline actions for page offline request
+ *
+ * @XE_RAS_PAGE_ACTION_OFFLINE: Instruct firmware to remove page from queue
+ * @XE_RAS_PAGE_ACTION_DECLINE: Instruct firmware to mark page as not offline
+ * @XE_RAS_PAGE_ACTION_MAX: Max value for validation
+ */
+enum xe_ras_page_action {
+	XE_RAS_PAGE_ACTION_OFFLINE,
+	XE_RAS_PAGE_ACTION_DECLINE,
+	XE_RAS_PAGE_ACTION_MAX
+};
+
+/**
+ * enum xe_ras_response_status - RAS response status codes
+ *
+ * @XE_RAS_STATUS_SUCCESS: Operation successful
+ * @XE_RAS_STATUS_INVALID_PARAM: Invalid parameter
+ * @XE_RAS_STATUS_OP_NOT_SUPPORTED: Operation not supported
+ * @XE_RAS_STATUS_TIMEOUT: Operation timed out
+ * @XE_RAS_STATUS_HARDWARE_FAILURE: Hardware failure
+ * @XE_RAS_STATUS_INSUFFICIENT_RESOURCES: Insufficient resources
+ * @XE_RAS_STATUS_UNKNOWN_ERROR: Unknown error
+ */
+enum xe_ras_response_status {
+	XE_RAS_STATUS_SUCCESS = 0,
+	XE_RAS_STATUS_INVALID_PARAM,
+	XE_RAS_STATUS_OP_NOT_SUPPORTED,
+	XE_RAS_STATUS_TIMEOUT,
+	XE_RAS_STATUS_HARDWARE_FAILURE,
+	XE_RAS_STATUS_INSUFFICIENT_RESOURCES,
+	XE_RAS_STATUS_UNKNOWN_ERROR
+};
+
 /**
  * struct xe_ras_error_common - Error fields that are common across all products
  */
@@ -227,4 +261,28 @@ struct xe_ras_page_offline_queue {
 	/** @reserved: Reserved for future use */
 	u8 reserved[3];
 } __packed;
+
+/**
+ * struct xe_ras_page_offline_request - Request for page offline command
+ *
+ * This structure provides the request format to offline/decline a page
+ */
+struct xe_ras_page_offline_request {
+	/** @page_address: Page address (4KB aligned) */
+	u64 page_address;
+	/** @action: Action to be performed, see &enum xe_ras_page_action */
+	u32 action;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
+
+/**
+ * struct xe_ras_page_offline_response - Response from page offline command
+ */
+struct xe_ras_page_offline_response {
+	/** @status: Status of the page offline request, see &enum xe_ras_response_status */
+	u32 status;
+	/** @reserved: Reserved for future use */
+	u32 reserved;
+} __packed;
 #endif
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
index b7a5e82c6eb0..12ffd011ee8e 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
@@ -24,12 +24,14 @@ enum xe_sysctrl_group {
  *
  * @XE_SYSCTRL_CMD_GET_SOC_ERROR: Retrieve basic error information
  * @XE_SYSCTRL_CMD_GET_PENDING_EVENT: Retrieve pending event
+ * @XE_SYSCTRL_CMD_PAGE_OFFLINE: Instruct firmware to offline/decline a page
  * @XE_SYSCTRL_CMD_GET_OFFLINE_LIST: Retrieve list of all offlined pages from flash
  * @XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE: Retrieve list of offlined queued pages from firmware
  */
 enum xe_sysctrl_gfsp_cmd {
 	XE_SYSCTRL_CMD_GET_SOC_ERROR		= 0x01,
 	XE_SYSCTRL_CMD_GET_PENDING_EVENT	= 0x07,
+	XE_SYSCTRL_CMD_PAGE_OFFLINE		= 0x08,
 	XE_SYSCTRL_CMD_GET_OFFLINE_LIST		= 0x09,
 	XE_SYSCTRL_CMD_GET_OFFLINE_QUEUE	= 0x0A,
 };
-- 
2.47.1

[RFC PATCH v5 14/14] drm/xe/xe_ras: Process pages from offlined list and queue

[Riana Tauro]

This will be integrated with the related address-fault handling flow
once this patch is merged.
https://lore.kernel.org/intel-xe/20260506141143.4033299-12-tejas.upadhyay@intel.com/
Sending for initial comments.

On module load, process pages queued by firmware for offlining by
reserving and sending the offline/decline command to firmware.
For already offlined pages in the firmware list, reserve the pages.

Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Signed-off-by: Riana Tauro <riana.tauro@intel.com>
---
 drivers/gpu/drm/xe/xe_ras.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
index 05a77db2ed8a..c23946d322d5 100644
--- a/drivers/gpu/drm/xe/xe_ras.c
+++ b/drivers/gpu/drm/xe/xe_ras.c
@@ -292,7 +292,7 @@ static void get_queued_pages(struct xe_device *xe)
 	struct xe_ras_page_offline_queue response = {0};
 	u32 count = 0;
 	size_t rlen;
-	int ret;
+	int ret, i;
 
 	/* Supported only on platforms with system controller */
 	if (!xe->info.has_sysctrl)
@@ -316,7 +316,9 @@ static void get_queued_pages(struct xe_device *xe)
 			return;
 		}
 
-		/* TODO: Process pages and offline them */
+		for (i = 0; i < response.pages_returned && i < XE_RAS_NUM_PAGES; i++)
+			handle_page_offline(xe, response.page_addresses[i], true);
+
 
 		count += response.pages_returned;
 		if (count > response.total_pages) {
@@ -333,7 +335,7 @@ static void get_offlined_list(struct xe_device *xe)
 	struct xe_ras_page_offline_list response = {0};
 	u32 count = 0;
 	size_t rlen;
-	int ret;
+	int ret, i;
 
 	/* Supported only on platforms with system controller */
 	if (!xe->info.has_sysctrl)
@@ -357,7 +359,8 @@ static void get_offlined_list(struct xe_device *xe)
 			return;
 		}
 
-		/* TODO: Process pages and offline them */
+		for (i = 0; i < response.pages_returned && i < XE_RAS_NUM_PAGES; i++)
+			handle_page_offline(xe, response.page_addresses[i], false);
 
 		count += response.pages_returned;
 		if (count > response.total_pages) {
-- 
2.47.1

Re: [PATCH v5 11/14] drm/xe/xe_ras: Query errors from system controller on probe

[Umesh Nerlige Ramappa]

I think the comment you have in the code above xe_ras_process_errors() 
makes a good commit message since it matches with the title for this 
commit. You can add that you reordered stuff to do so.

On Mon, May 11, 2026 at 10:59:18PM +0530, Riana Tauro wrote:
>Reorder soc remapper and system controller initialization to
>early probe to allow querying errors on module load.

nit: Looks like you are moving code within xe_device_probe, which is 
fine, but since there is also xe_device_probe_early() in the driver, I 
would just say "Move soc remapper and system controller initialization 
up in xe_device_probe to allow querying errors on module load"

Rest looks good,

Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>

Umesh
>
>Cc: Anoop Vijay <anoop.c.vijay@intel.com>
>Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>Signed-off-by: Riana Tauro <riana.tauro@intel.com>
>---
>v2: fix comment (Raag)
>---
> drivers/gpu/drm/xe/xe_device.c | 20 ++++++++++----------
> drivers/gpu/drm/xe/xe_ras.c    |  7 +++++++
> 2 files changed, 17 insertions(+), 10 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
>index 200d6bbb1b70..041af7ffc8bb 100644
>--- a/drivers/gpu/drm/xe/xe_device.c
>+++ b/drivers/gpu/drm/xe/xe_device.c
>@@ -963,6 +963,16 @@ int xe_device_probe(struct xe_device *xe)
> 	if (err)
> 		return err;
>
>+	err = xe_soc_remapper_init(xe);
>+	if (err)
>+		return err;
>+
>+	err = xe_sysctrl_init(xe);
>+	if (err)
>+		return err;
>+
>+	xe_ras_init(xe);
>+
> 	/*
> 	 * Now that GT is initialized (TTM in particular),
> 	 * we can try to init display, and inherit the initial fb.
>@@ -1003,10 +1013,6 @@ int xe_device_probe(struct xe_device *xe)
>
> 	xe_nvm_init(xe);
>
>-	err = xe_soc_remapper_init(xe);
>-	if (err)
>-		return err;
>-
> 	err = xe_heci_gsc_init(xe);
> 	if (err)
> 		return err;
>@@ -1045,12 +1051,6 @@ int xe_device_probe(struct xe_device *xe)
> 	if (err)
> 		goto err_unregister_display;
>
>-	err = xe_sysctrl_init(xe);
>-	if (err)
>-		goto err_unregister_display;
>-
>-	xe_ras_init(xe);
>-
> 	err = xe_device_sysfs_init(xe);
> 	if (err)
> 		goto err_unregister_display;
>diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>index a1ae7a3d9696..b99c092a1799 100644
>--- a/drivers/gpu/drm/xe/xe_ras.c
>+++ b/drivers/gpu/drm/xe/xe_ras.c
>@@ -450,4 +450,11 @@ void xe_ras_init(struct xe_device *xe)
>
> 	get_queued_pages(xe);
> 	get_offlined_list(xe);
>+
>+	/*
>+	 * On init, process and log any errors detected by firmware before driver load.
>+	 * Critical errors such as Punit, CSC are reported through PCode init failure,
>+	 * causing the driver to enter survivability mode.
>+	 */
>+	xe_ras_process_errors(xe);
> }
>-- 
>2.47.1
>

✗ CI.checkpatch: warning for Introduce Xe Uncorrectable Error Handling (rev5)

[Patchwork]

== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev5)
URL   : https://patchwork.freedesktop.org/series/160482/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9c44dbc8ff9a79bcae53820437fa206409969539
Author: Riana Tauro <riana.tauro@intel.com>
Date:   Mon May 11 22:59:21 2026 +0530

    drm/xe/xe_ras: Process pages from offlined list and queue
    
    This will be integrated with the related address-fault handling flow
    once this patch is merged.
    https://lore.kernel.org/intel-xe/20260506141143.4033299-12-tejas.upadhyay@intel.com/
    Sending for initial comments.
    
    On module load, process pages queued by firmware for offlining by
    reserving and sending the offline/decline command to firmware.
    For already offlined pages in the firmware list, reserve the pages.
    
    Cc: Tejas Upadhyay <tejas.upadhyay@intel.com>
    Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
    Signed-off-by: Riana Tauro <riana.tauro@intel.com>
+ /mt/dim checkpatch 0ce1c813197dfbe15ff14143da97ec11161e1795 drm-intel
daaa6454b82e drm/xe/xe_survivability: Decouple survivability info from boot survivability
e04b5f5dedf7 drm/xe/xe_sysctrl: Make sysctrl flood limit reusable
676e0712bbbb drm/xe/xe_pci_error: Implement PCI error recovery callbacks
-:60: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#60: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 137 lines checked
681f5750178b drm/xe/xe_pci_error: Group all devres to release them on PCIe slot reset
527456ae5680 drm/xe: Skip device access during PCI error recovery
28692df5a94d drm/xe/xe_ras: Initialize Uncorrectable AER Registers
12028cfd1a03 drm/xe/xe_ras: Add support for uncorrectable core-compute errors
c1e82c7e0a94 drm/xe/xe_ras: Handle uncorrectable SoC Internal errors
-:44: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#44: FILE: drivers/gpu/drm/xe/xe_ras.c:123:
+		struct xe_ras_csc_error *csc_error = (struct xe_ras_csc_error *)error_info->additional_details;

-:62: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#62: FILE: drivers/gpu/drm/xe/xe_ras.c:141:
+		struct xe_ras_ieh_error *ieh_error = (struct xe_ras_ieh_error *)error_info->additional_details;

total: 0 errors, 2 warnings, 0 checks, 125 lines checked
eb68afd68fae drm/xe/xe_ras: Add support to query device memory errors
d4b6835be237 drm/xe/xe_ras: Add support to query page offline queue and list
aa54e68eecac drm/xe/xe_ras: Query errors from system controller on probe
315d78bbd45c drm/xe/xe_pci_error: Process errors in mmio_enabled
b08ce89a9ba6 drm/xe/xe_ras: Add support to offline/decline a page address
-:50: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#50: FILE: drivers/gpu/drm/xe/xe_ras.c:49:
+};
+static_assert(ARRAY_SIZE(ras_status_to_errno_map) == XE_RAS_STATUS_UNKNOWN_ERROR + 1);

-:110: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#110: FILE: drivers/gpu/drm/xe/xe_ras.c:146:
+		xe_err(xe, "sysctrl: page offline command failed with status %d\n", response.status);

total: 0 errors, 1 warnings, 1 checks, 240 lines checked
9c44dbc8ff9a drm/xe/xe_ras: Process pages from offlined list and queue

✓ CI.KUnit: success for Introduce Xe Uncorrectable Error Handling (rev5)

[Patchwork]

== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev5)
URL   : https://patchwork.freedesktop.org/series/160482/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[01:05:12] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:05:16] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[01:05:58] Starting KUnit Kernel (1/1)...
[01:05:58] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:05:58] ================== guc_buf (11 subtests) ===================
[01:05:58] [PASSED] test_smallest
[01:05:58] [PASSED] test_largest
[01:05:58] [PASSED] test_granular
[01:05:58] [PASSED] test_unique
[01:05:58] [PASSED] test_overlap
[01:05:58] [PASSED] test_reusable
[01:05:58] [PASSED] test_too_big
[01:05:58] [PASSED] test_flush
[01:05:58] [PASSED] test_lookup
[01:05:58] [PASSED] test_data
[01:05:58] [PASSED] test_class
[01:05:58] ===================== [PASSED] guc_buf =====================
[01:05:58] =================== guc_dbm (7 subtests) ===================
[01:05:58] [PASSED] test_empty
[01:05:58] [PASSED] test_default
[01:05:58] ======================== test_size  ========================
[01:05:58] [PASSED] 4
[01:05:58] [PASSED] 8
[01:05:58] [PASSED] 32
[01:05:58] [PASSED] 256
[01:05:58] ==================== [PASSED] test_size ====================
[01:05:58] ======================= test_reuse  ========================
[01:05:58] [PASSED] 4
[01:05:58] [PASSED] 8
[01:05:58] [PASSED] 32
[01:05:58] [PASSED] 256
[01:05:58] =================== [PASSED] test_reuse ====================
[01:05:58] =================== test_range_overlap  ====================
[01:05:58] [PASSED] 4
[01:05:58] [PASSED] 8
[01:05:58] [PASSED] 32
[01:05:58] [PASSED] 256
[01:05:58] =============== [PASSED] test_range_overlap ================
[01:05:58] =================== test_range_compact  ====================
[01:05:58] [PASSED] 4
[01:05:58] [PASSED] 8
[01:05:58] [PASSED] 32
[01:05:58] [PASSED] 256
[01:05:58] =============== [PASSED] test_range_compact ================
[01:05:58] ==================== test_range_spare  =====================
[01:05:58] [PASSED] 4
[01:05:58] [PASSED] 8
[01:05:58] [PASSED] 32
[01:05:58] [PASSED] 256
[01:05:58] ================ [PASSED] test_range_spare =================
[01:05:58] ===================== [PASSED] guc_dbm =====================
[01:05:58] =================== guc_idm (6 subtests) ===================
[01:05:58] [PASSED] bad_init
[01:05:58] [PASSED] no_init
[01:05:58] [PASSED] init_fini
[01:05:58] [PASSED] check_used
[01:05:58] [PASSED] check_quota
[01:05:58] [PASSED] check_all
[01:05:58] ===================== [PASSED] guc_idm =====================
[01:05:58] ================== no_relay (3 subtests) ===================
[01:05:58] [PASSED] xe_drops_guc2pf_if_not_ready
[01:05:58] [PASSED] xe_drops_guc2vf_if_not_ready
[01:05:58] [PASSED] xe_rejects_send_if_not_ready
[01:05:58] ==================== [PASSED] no_relay =====================
[01:05:58] ================== pf_relay (14 subtests) ==================
[01:05:58] [PASSED] pf_rejects_guc2pf_too_short
[01:05:58] [PASSED] pf_rejects_guc2pf_too_long
[01:05:58] [PASSED] pf_rejects_guc2pf_no_payload
[01:05:58] [PASSED] pf_fails_no_payload
[01:05:58] [PASSED] pf_fails_bad_origin
[01:05:58] [PASSED] pf_fails_bad_type
[01:05:58] [PASSED] pf_txn_reports_error
[01:05:58] [PASSED] pf_txn_sends_pf2guc
[01:05:58] [PASSED] pf_sends_pf2guc
[01:05:58] [SKIPPED] pf_loopback_nop
[01:05:58] [SKIPPED] pf_loopback_echo
[01:05:58] [SKIPPED] pf_loopback_fail
[01:05:58] [SKIPPED] pf_loopback_busy
[01:05:58] [SKIPPED] pf_loopback_retry
[01:05:58] ==================== [PASSED] pf_relay =====================
[01:05:58] ================== vf_relay (3 subtests) ===================
[01:05:58] [PASSED] vf_rejects_guc2vf_too_short
[01:05:58] [PASSED] vf_rejects_guc2vf_too_long
[01:05:58] [PASSED] vf_rejects_guc2vf_no_payload
[01:05:58] ==================== [PASSED] vf_relay =====================
[01:05:58] ================ pf_gt_config (9 subtests) =================
[01:05:58] [PASSED] fair_contexts_1vf
[01:05:58] [PASSED] fair_doorbells_1vf
[01:05:58] [PASSED] fair_ggtt_1vf
[01:05:58] ====================== fair_vram_1vf  ======================
[01:05:58] [PASSED] 3.50 GiB
[01:05:58] [PASSED] 11.5 GiB
[01:05:58] [PASSED] 15.5 GiB
[01:05:58] [PASSED] 31.5 GiB
[01:05:58] [PASSED] 63.5 GiB
[01:05:58] [PASSED] 1.91 GiB
[01:05:58] ================== [PASSED] fair_vram_1vf ==================
[01:05:58] ================ fair_vram_1vf_admin_only  =================
[01:05:58] [PASSED] 3.50 GiB
[01:05:58] [PASSED] 11.5 GiB
[01:05:58] [PASSED] 15.5 GiB
[01:05:58] [PASSED] 31.5 GiB
[01:05:58] [PASSED] 63.5 GiB
[01:05:58] [PASSED] 1.91 GiB
[01:05:58] ============ [PASSED] fair_vram_1vf_admin_only =============
[01:05:58] ====================== fair_contexts  ======================
[01:05:58] [PASSED] 1 VF
[01:05:58] [PASSED] 2 VFs
[01:05:58] [PASSED] 3 VFs
[01:05:58] [PASSED] 4 VFs
[01:05:58] [PASSED] 5 VFs
[01:05:58] [PASSED] 6 VFs
[01:05:58] [PASSED] 7 VFs
[01:05:58] [PASSED] 8 VFs
[01:05:58] [PASSED] 9 VFs
[01:05:58] [PASSED] 10 VFs
[01:05:58] [PASSED] 11 VFs
[01:05:58] [PASSED] 12 VFs
[01:05:58] [PASSED] 13 VFs
[01:05:58] [PASSED] 14 VFs
[01:05:58] [PASSED] 15 VFs
[01:05:58] [PASSED] 16 VFs
[01:05:58] [PASSED] 17 VFs
[01:05:58] [PASSED] 18 VFs
[01:05:58] [PASSED] 19 VFs
[01:05:58] [PASSED] 20 VFs
[01:05:58] [PASSED] 21 VFs
[01:05:58] [PASSED] 22 VFs
[01:05:58] [PASSED] 23 VFs
[01:05:58] [PASSED] 24 VFs
[01:05:59] [PASSED] 25 VFs
[01:05:59] [PASSED] 26 VFs
[01:05:59] [PASSED] 27 VFs
[01:05:59] [PASSED] 28 VFs
[01:05:59] [PASSED] 29 VFs
[01:05:59] [PASSED] 30 VFs
[01:05:59] [PASSED] 31 VFs
[01:05:59] [PASSED] 32 VFs
[01:05:59] [PASSED] 33 VFs
[01:05:59] [PASSED] 34 VFs
[01:05:59] [PASSED] 35 VFs
[01:05:59] [PASSED] 36 VFs
[01:05:59] [PASSED] 37 VFs
[01:05:59] [PASSED] 38 VFs
[01:05:59] [PASSED] 39 VFs
[01:05:59] [PASSED] 40 VFs
[01:05:59] [PASSED] 41 VFs
[01:05:59] [PASSED] 42 VFs
[01:05:59] [PASSED] 43 VFs
[01:05:59] [PASSED] 44 VFs
[01:05:59] [PASSED] 45 VFs
[01:05:59] [PASSED] 46 VFs
[01:05:59] [PASSED] 47 VFs
[01:05:59] [PASSED] 48 VFs
[01:05:59] [PASSED] 49 VFs
[01:05:59] [PASSED] 50 VFs
[01:05:59] [PASSED] 51 VFs
[01:05:59] [PASSED] 52 VFs
[01:05:59] [PASSED] 53 VFs
[01:05:59] [PASSED] 54 VFs
[01:05:59] [PASSED] 55 VFs
[01:05:59] [PASSED] 56 VFs
[01:05:59] [PASSED] 57 VFs
[01:05:59] [PASSED] 58 VFs
[01:05:59] [PASSED] 59 VFs
[01:05:59] [PASSED] 60 VFs
[01:05:59] [PASSED] 61 VFs
[01:05:59] [PASSED] 62 VFs
[01:05:59] [PASSED] 63 VFs
[01:05:59] ================== [PASSED] fair_contexts ==================
[01:05:59] ===================== fair_doorbells  ======================
[01:05:59] [PASSED] 1 VF
[01:05:59] [PASSED] 2 VFs
[01:05:59] [PASSED] 3 VFs
[01:05:59] [PASSED] 4 VFs
[01:05:59] [PASSED] 5 VFs
[01:05:59] [PASSED] 6 VFs
[01:05:59] [PASSED] 7 VFs
[01:05:59] [PASSED] 8 VFs
[01:05:59] [PASSED] 9 VFs
[01:05:59] [PASSED] 10 VFs
[01:05:59] [PASSED] 11 VFs
[01:05:59] [PASSED] 12 VFs
[01:05:59] [PASSED] 13 VFs
[01:05:59] [PASSED] 14 VFs
[01:05:59] [PASSED] 15 VFs
[01:05:59] [PASSED] 16 VFs
[01:05:59] [PASSED] 17 VFs
[01:05:59] [PASSED] 18 VFs
[01:05:59] [PASSED] 19 VFs
[01:05:59] [PASSED] 20 VFs
[01:05:59] [PASSED] 21 VFs
[01:05:59] [PASSED] 22 VFs
[01:05:59] [PASSED] 23 VFs
[01:05:59] [PASSED] 24 VFs
[01:05:59] [PASSED] 25 VFs
[01:05:59] [PASSED] 26 VFs
[01:05:59] [PASSED] 27 VFs
[01:05:59] [PASSED] 28 VFs
[01:05:59] [PASSED] 29 VFs
[01:05:59] [PASSED] 30 VFs
[01:05:59] [PASSED] 31 VFs
[01:05:59] [PASSED] 32 VFs
[01:05:59] [PASSED] 33 VFs
[01:05:59] [PASSED] 34 VFs
[01:05:59] [PASSED] 35 VFs
[01:05:59] [PASSED] 36 VFs
[01:05:59] [PASSED] 37 VFs
[01:05:59] [PASSED] 38 VFs
[01:05:59] [PASSED] 39 VFs
[01:05:59] [PASSED] 40 VFs
[01:05:59] [PASSED] 41 VFs
[01:05:59] [PASSED] 42 VFs
[01:05:59] [PASSED] 43 VFs
[01:05:59] [PASSED] 44 VFs
[01:05:59] [PASSED] 45 VFs
[01:05:59] [PASSED] 46 VFs
[01:05:59] [PASSED] 47 VFs
[01:05:59] [PASSED] 48 VFs
[01:05:59] [PASSED] 49 VFs
[01:05:59] [PASSED] 50 VFs
[01:05:59] [PASSED] 51 VFs
[01:05:59] [PASSED] 52 VFs
[01:05:59] [PASSED] 53 VFs
[01:05:59] [PASSED] 54 VFs
[01:05:59] [PASSED] 55 VFs
[01:05:59] [PASSED] 56 VFs
[01:05:59] [PASSED] 57 VFs
[01:05:59] [PASSED] 58 VFs
[01:05:59] [PASSED] 59 VFs
[01:05:59] [PASSED] 60 VFs
[01:05:59] [PASSED] 61 VFs
[01:05:59] [PASSED] 62 VFs
[01:05:59] [PASSED] 63 VFs
[01:05:59] ================= [PASSED] fair_doorbells ==================
[01:05:59] ======================== fair_ggtt  ========================
[01:05:59] [PASSED] 1 VF
[01:05:59] [PASSED] 2 VFs
[01:05:59] [PASSED] 3 VFs
[01:05:59] [PASSED] 4 VFs
[01:05:59] [PASSED] 5 VFs
[01:05:59] [PASSED] 6 VFs
[01:05:59] [PASSED] 7 VFs
[01:05:59] [PASSED] 8 VFs
[01:05:59] [PASSED] 9 VFs
[01:05:59] [PASSED] 10 VFs
[01:05:59] [PASSED] 11 VFs
[01:05:59] [PASSED] 12 VFs
[01:05:59] [PASSED] 13 VFs
[01:05:59] [PASSED] 14 VFs
[01:05:59] [PASSED] 15 VFs
[01:05:59] [PASSED] 16 VFs
[01:05:59] [PASSED] 17 VFs
[01:05:59] [PASSED] 18 VFs
[01:05:59] [PASSED] 19 VFs
[01:05:59] [PASSED] 20 VFs
[01:05:59] [PASSED] 21 VFs
[01:05:59] [PASSED] 22 VFs
[01:05:59] [PASSED] 23 VFs
[01:05:59] [PASSED] 24 VFs
[01:05:59] [PASSED] 25 VFs
[01:05:59] [PASSED] 26 VFs
[01:05:59] [PASSED] 27 VFs
[01:05:59] [PASSED] 28 VFs
[01:05:59] [PASSED] 29 VFs
[01:05:59] [PASSED] 30 VFs
[01:05:59] [PASSED] 31 VFs
[01:05:59] [PASSED] 32 VFs
[01:05:59] [PASSED] 33 VFs
[01:05:59] [PASSED] 34 VFs
[01:05:59] [PASSED] 35 VFs
[01:05:59] [PASSED] 36 VFs
[01:05:59] [PASSED] 37 VFs
[01:05:59] [PASSED] 38 VFs
[01:05:59] [PASSED] 39 VFs
[01:05:59] [PASSED] 40 VFs
[01:05:59] [PASSED] 41 VFs
[01:05:59] [PASSED] 42 VFs
[01:05:59] [PASSED] 43 VFs
[01:05:59] [PASSED] 44 VFs
[01:05:59] [PASSED] 45 VFs
[01:05:59] [PASSED] 46 VFs
[01:05:59] [PASSED] 47 VFs
[01:05:59] [PASSED] 48 VFs
[01:05:59] [PASSED] 49 VFs
[01:05:59] [PASSED] 50 VFs
[01:05:59] [PASSED] 51 VFs
[01:05:59] [PASSED] 52 VFs
[01:05:59] [PASSED] 53 VFs
[01:05:59] [PASSED] 54 VFs
[01:05:59] [PASSED] 55 VFs
[01:05:59] [PASSED] 56 VFs
[01:05:59] [PASSED] 57 VFs
[01:05:59] [PASSED] 58 VFs
[01:05:59] [PASSED] 59 VFs
[01:05:59] [PASSED] 60 VFs
[01:05:59] [PASSED] 61 VFs
[01:05:59] [PASSED] 62 VFs
[01:05:59] [PASSED] 63 VFs
[01:05:59] ==================== [PASSED] fair_ggtt ====================
[01:05:59] ======================== fair_vram  ========================
[01:05:59] [PASSED] 1 VF
[01:05:59] [PASSED] 2 VFs
[01:05:59] [PASSED] 3 VFs
[01:05:59] [PASSED] 4 VFs
[01:05:59] [PASSED] 5 VFs
[01:05:59] [PASSED] 6 VFs
[01:05:59] [PASSED] 7 VFs
[01:05:59] [PASSED] 8 VFs
[01:05:59] [PASSED] 9 VFs
[01:05:59] [PASSED] 10 VFs
[01:05:59] [PASSED] 11 VFs
[01:05:59] [PASSED] 12 VFs
[01:05:59] [PASSED] 13 VFs
[01:05:59] [PASSED] 14 VFs
[01:05:59] [PASSED] 15 VFs
[01:05:59] [PASSED] 16 VFs
[01:05:59] [PASSED] 17 VFs
[01:05:59] [PASSED] 18 VFs
[01:05:59] [PASSED] 19 VFs
[01:05:59] [PASSED] 20 VFs
[01:05:59] [PASSED] 21 VFs
[01:05:59] [PASSED] 22 VFs
[01:05:59] [PASSED] 23 VFs
[01:05:59] [PASSED] 24 VFs
[01:05:59] [PASSED] 25 VFs
[01:05:59] [PASSED] 26 VFs
[01:05:59] [PASSED] 27 VFs
[01:05:59] [PASSED] 28 VFs
[01:05:59] [PASSED] 29 VFs
[01:05:59] [PASSED] 30 VFs
[01:05:59] [PASSED] 31 VFs
[01:05:59] [PASSED] 32 VFs
[01:05:59] [PASSED] 33 VFs
[01:05:59] [PASSED] 34 VFs
[01:05:59] [PASSED] 35 VFs
[01:05:59] [PASSED] 36 VFs
[01:05:59] [PASSED] 37 VFs
[01:05:59] [PASSED] 38 VFs
[01:05:59] [PASSED] 39 VFs
[01:05:59] [PASSED] 40 VFs
[01:05:59] [PASSED] 41 VFs
[01:05:59] [PASSED] 42 VFs
[01:05:59] [PASSED] 43 VFs
[01:05:59] [PASSED] 44 VFs
[01:05:59] [PASSED] 45 VFs
[01:05:59] [PASSED] 46 VFs
[01:05:59] [PASSED] 47 VFs
[01:05:59] [PASSED] 48 VFs
[01:05:59] [PASSED] 49 VFs
[01:05:59] [PASSED] 50 VFs
[01:05:59] [PASSED] 51 VFs
[01:05:59] [PASSED] 52 VFs
[01:05:59] [PASSED] 53 VFs
[01:05:59] [PASSED] 54 VFs
[01:05:59] [PASSED] 55 VFs
[01:05:59] [PASSED] 56 VFs
[01:05:59] [PASSED] 57 VFs
[01:05:59] [PASSED] 58 VFs
[01:05:59] [PASSED] 59 VFs
[01:05:59] [PASSED] 60 VFs
[01:05:59] [PASSED] 61 VFs
[01:05:59] [PASSED] 62 VFs
[01:05:59] [PASSED] 63 VFs
[01:05:59] ==================== [PASSED] fair_vram ====================
[01:05:59] ================== [PASSED] pf_gt_config ===================
[01:05:59] ===================== lmtt (1 subtest) =====================
[01:05:59] ======================== test_ops  =========================
[01:05:59] [PASSED] 2-level
[01:05:59] [PASSED] multi-level
[01:05:59] ==================== [PASSED] test_ops =====================
[01:05:59] ====================== [PASSED] lmtt =======================
[01:05:59] ================= pf_service (11 subtests) =================
[01:05:59] [PASSED] pf_negotiate_any
[01:05:59] [PASSED] pf_negotiate_base_match
[01:05:59] [PASSED] pf_negotiate_base_newer
[01:05:59] [PASSED] pf_negotiate_base_next
[01:05:59] [SKIPPED] pf_negotiate_base_older
[01:05:59] [PASSED] pf_negotiate_base_prev
[01:05:59] [PASSED] pf_negotiate_latest_match
[01:05:59] [PASSED] pf_negotiate_latest_newer
[01:05:59] [PASSED] pf_negotiate_latest_next
[01:05:59] [SKIPPED] pf_negotiate_latest_older
[01:05:59] [SKIPPED] pf_negotiate_latest_prev
[01:05:59] =================== [PASSED] pf_service ====================
[01:05:59] ================= xe_guc_g2g (2 subtests) ==================
[01:05:59] ============== xe_live_guc_g2g_kunit_default  ==============
[01:05:59] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[01:05:59] ============== xe_live_guc_g2g_kunit_allmem  ===============
[01:05:59] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[01:05:59] =================== [SKIPPED] xe_guc_g2g ===================
[01:05:59] =================== xe_mocs (2 subtests) ===================
[01:05:59] ================ xe_live_mocs_kernel_kunit  ================
[01:05:59] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[01:05:59] ================ xe_live_mocs_reset_kunit  =================
[01:05:59] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[01:05:59] ==================== [SKIPPED] xe_mocs =====================
[01:05:59] ================= xe_migrate (2 subtests) ==================
[01:05:59] ================= xe_migrate_sanity_kunit  =================
[01:05:59] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[01:05:59] ================== xe_validate_ccs_kunit  ==================
[01:05:59] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[01:05:59] =================== [SKIPPED] xe_migrate ===================
[01:05:59] ================== xe_dma_buf (1 subtest) ==================
[01:05:59] ==================== xe_dma_buf_kunit  =====================
[01:05:59] ================ [SKIPPED] xe_dma_buf_kunit ================
[01:05:59] =================== [SKIPPED] xe_dma_buf ===================
[01:05:59] ================= xe_bo_shrink (1 subtest) =================
[01:05:59] =================== xe_bo_shrink_kunit  ====================
[01:05:59] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[01:05:59] ================== [SKIPPED] xe_bo_shrink ==================
[01:05:59] ==================== xe_bo (2 subtests) ====================
[01:05:59] ================== xe_ccs_migrate_kunit  ===================
[01:05:59] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[01:05:59] ==================== xe_bo_evict_kunit  ====================
[01:05:59] =============== [SKIPPED] xe_bo_evict_kunit ================
[01:05:59] ===================== [SKIPPED] xe_bo ======================
[01:05:59] ==================== args (13 subtests) ====================
[01:05:59] [PASSED] count_args_test
[01:05:59] [PASSED] call_args_example
[01:05:59] [PASSED] call_args_test
[01:05:59] [PASSED] drop_first_arg_example
[01:05:59] [PASSED] drop_first_arg_test
[01:05:59] [PASSED] first_arg_example
[01:05:59] [PASSED] first_arg_test
[01:05:59] [PASSED] last_arg_example
[01:05:59] [PASSED] last_arg_test
[01:05:59] [PASSED] pick_arg_example
[01:05:59] [PASSED] if_args_example
[01:05:59] [PASSED] if_args_test
[01:05:59] [PASSED] sep_comma_example
[01:05:59] ====================== [PASSED] args =======================
[01:05:59] =================== xe_pci (3 subtests) ====================
[01:05:59] ==================== check_graphics_ip  ====================
[01:05:59] [PASSED] 12.00 Xe_LP
[01:05:59] [PASSED] 12.10 Xe_LP+
[01:05:59] [PASSED] 12.55 Xe_HPG
[01:05:59] [PASSED] 12.60 Xe_HPC
[01:05:59] [PASSED] 12.70 Xe_LPG
[01:05:59] [PASSED] 12.71 Xe_LPG
[01:05:59] [PASSED] 12.74 Xe_LPG+
[01:05:59] [PASSED] 20.01 Xe2_HPG
[01:05:59] [PASSED] 20.02 Xe2_HPG
[01:05:59] [PASSED] 20.04 Xe2_LPG
[01:05:59] [PASSED] 30.00 Xe3_LPG
[01:05:59] [PASSED] 30.01 Xe3_LPG
[01:05:59] [PASSED] 30.03 Xe3_LPG
[01:05:59] [PASSED] 30.04 Xe3_LPG
[01:05:59] [PASSED] 30.05 Xe3_LPG
[01:05:59] [PASSED] 35.10 Xe3p_LPG
[01:05:59] [PASSED] 35.11 Xe3p_XPC
[01:05:59] ================ [PASSED] check_graphics_ip ================
[01:05:59] ===================== check_media_ip  ======================
[01:05:59] [PASSED] 12.00 Xe_M
[01:05:59] [PASSED] 12.55 Xe_HPM
[01:05:59] [PASSED] 13.00 Xe_LPM+
[01:05:59] [PASSED] 13.01 Xe2_HPM
[01:05:59] [PASSED] 20.00 Xe2_LPM
[01:05:59] [PASSED] 30.00 Xe3_LPM
[01:05:59] [PASSED] 30.02 Xe3_LPM
[01:05:59] [PASSED] 35.00 Xe3p_LPM
[01:05:59] [PASSED] 35.03 Xe3p_HPM
[01:05:59] ================= [PASSED] check_media_ip ==================
[01:05:59] =================== check_platform_desc  ===================
[01:05:59] [PASSED] 0x9A60 (TIGERLAKE)
[01:05:59] [PASSED] 0x9A68 (TIGERLAKE)
[01:05:59] [PASSED] 0x9A70 (TIGERLAKE)
[01:05:59] [PASSED] 0x9A40 (TIGERLAKE)
[01:05:59] [PASSED] 0x9A49 (TIGERLAKE)
[01:05:59] [PASSED] 0x9A59 (TIGERLAKE)
[01:05:59] [PASSED] 0x9A78 (TIGERLAKE)
[01:05:59] [PASSED] 0x9AC0 (TIGERLAKE)
[01:05:59] [PASSED] 0x9AC9 (TIGERLAKE)
[01:05:59] [PASSED] 0x9AD9 (TIGERLAKE)
[01:05:59] [PASSED] 0x9AF8 (TIGERLAKE)
[01:05:59] [PASSED] 0x4C80 (ROCKETLAKE)
[01:05:59] [PASSED] 0x4C8A (ROCKETLAKE)
[01:05:59] [PASSED] 0x4C8B (ROCKETLAKE)
[01:05:59] [PASSED] 0x4C8C (ROCKETLAKE)
[01:05:59] [PASSED] 0x4C90 (ROCKETLAKE)
[01:05:59] [PASSED] 0x4C9A (ROCKETLAKE)
[01:05:59] [PASSED] 0x4680 (ALDERLAKE_S)
[01:05:59] [PASSED] 0x4682 (ALDERLAKE_S)
[01:05:59] [PASSED] 0x4688 (ALDERLAKE_S)
[01:05:59] [PASSED] 0x468A (ALDERLAKE_S)
[01:05:59] [PASSED] 0x468B (ALDERLAKE_S)
[01:05:59] [PASSED] 0x4690 (ALDERLAKE_S)
[01:05:59] [PASSED] 0x4692 (ALDERLAKE_S)
[01:05:59] [PASSED] 0x4693 (ALDERLAKE_S)
[01:05:59] [PASSED] 0x46A0 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46A1 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46A2 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46A3 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46A6 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46A8 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46AA (ALDERLAKE_P)
[01:05:59] [PASSED] 0x462A (ALDERLAKE_P)
[01:05:59] [PASSED] 0x4626 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x4628 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46B0 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46B1 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46B2 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46B3 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46C0 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46C1 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46C2 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46C3 (ALDERLAKE_P)
[01:05:59] [PASSED] 0x46D0 (ALDERLAKE_N)
[01:05:59] [PASSED] 0x46D1 (ALDERLAKE_N)
[01:05:59] [PASSED] 0x46D2 (ALDERLAKE_N)
[01:05:59] [PASSED] 0x46D3 (ALDERLAKE_N)
[01:05:59] [PASSED] 0x46D4 (ALDERLAKE_N)
[01:05:59] [PASSED] 0xA721 (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7A1 (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7A9 (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7AC (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7AD (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA720 (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7A0 (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7A8 (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7AA (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA7AB (ALDERLAKE_P)
[01:05:59] [PASSED] 0xA780 (ALDERLAKE_S)
[01:05:59] [PASSED] 0xA781 (ALDERLAKE_S)
[01:05:59] [PASSED] 0xA782 (ALDERLAKE_S)
[01:05:59] [PASSED] 0xA783 (ALDERLAKE_S)
[01:05:59] [PASSED] 0xA788 (ALDERLAKE_S)
[01:05:59] [PASSED] 0xA789 (ALDERLAKE_S)
[01:05:59] [PASSED] 0xA78A (ALDERLAKE_S)
[01:05:59] [PASSED] 0xA78B (ALDERLAKE_S)
[01:05:59] [PASSED] 0x4905 (DG1)
[01:05:59] [PASSED] 0x4906 (DG1)
[01:05:59] [PASSED] 0x4907 (DG1)
[01:05:59] [PASSED] 0x4908 (DG1)
[01:05:59] [PASSED] 0x4909 (DG1)
[01:05:59] [PASSED] 0x56C0 (DG2)
[01:05:59] [PASSED] 0x56C2 (DG2)
[01:05:59] [PASSED] 0x56C1 (DG2)
[01:05:59] [PASSED] 0x7D51 (METEORLAKE)
[01:05:59] [PASSED] 0x7DD1 (METEORLAKE)
[01:05:59] [PASSED] 0x7D41 (METEORLAKE)
[01:05:59] [PASSED] 0x7D67 (METEORLAKE)
[01:05:59] [PASSED] 0xB640 (METEORLAKE)
[01:05:59] [PASSED] 0x56A0 (DG2)
[01:05:59] [PASSED] 0x56A1 (DG2)
[01:05:59] [PASSED] 0x56A2 (DG2)
[01:05:59] [PASSED] 0x56BE (DG2)
[01:05:59] [PASSED] 0x56BF (DG2)
[01:05:59] [PASSED] 0x5690 (DG2)
[01:05:59] [PASSED] 0x5691 (DG2)
[01:05:59] [PASSED] 0x5692 (DG2)
[01:05:59] [PASSED] 0x56A5 (DG2)
[01:05:59] [PASSED] 0x56A6 (DG2)
[01:05:59] [PASSED] 0x56B0 (DG2)
[01:05:59] [PASSED] 0x56B1 (DG2)
[01:05:59] [PASSED] 0x56BA (DG2)
[01:05:59] [PASSED] 0x56BB (DG2)
[01:05:59] [PASSED] 0x56BC (DG2)
[01:05:59] [PASSED] 0x56BD (DG2)
[01:05:59] [PASSED] 0x5693 (DG2)
[01:05:59] [PASSED] 0x5694 (DG2)
[01:05:59] [PASSED] 0x5695 (DG2)
[01:05:59] [PASSED] 0x56A3 (DG2)
[01:05:59] [PASSED] 0x56A4 (DG2)
[01:05:59] [PASSED] 0x56B2 (DG2)
[01:05:59] [PASSED] 0x56B3 (DG2)
[01:05:59] [PASSED] 0x5696 (DG2)
[01:05:59] [PASSED] 0x5697 (DG2)
[01:05:59] [PASSED] 0xB69 (PVC)
[01:05:59] [PASSED] 0xB6E (PVC)
[01:05:59] [PASSED] 0xBD4 (PVC)
[01:05:59] [PASSED] 0xBD5 (PVC)
[01:05:59] [PASSED] 0xBD6 (PVC)
[01:05:59] [PASSED] 0xBD7 (PVC)
[01:05:59] [PASSED] 0xBD8 (PVC)
[01:05:59] [PASSED] 0xBD9 (PVC)
[01:05:59] [PASSED] 0xBDA (PVC)
[01:05:59] [PASSED] 0xBDB (PVC)
[01:05:59] [PASSED] 0xBE0 (PVC)
[01:05:59] [PASSED] 0xBE1 (PVC)
[01:05:59] [PASSED] 0xBE5 (PVC)
[01:05:59] [PASSED] 0x7D40 (METEORLAKE)
[01:05:59] [PASSED] 0x7D45 (METEORLAKE)
[01:05:59] [PASSED] 0x7D55 (METEORLAKE)
[01:05:59] [PASSED] 0x7D60 (METEORLAKE)
[01:05:59] [PASSED] 0x7DD5 (METEORLAKE)
[01:05:59] [PASSED] 0x6420 (LUNARLAKE)
[01:05:59] [PASSED] 0x64A0 (LUNARLAKE)
[01:05:59] [PASSED] 0x64B0 (LUNARLAKE)
[01:05:59] [PASSED] 0xE202 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE209 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE20B (BATTLEMAGE)
[01:05:59] [PASSED] 0xE20C (BATTLEMAGE)
[01:05:59] [PASSED] 0xE20D (BATTLEMAGE)
[01:05:59] [PASSED] 0xE210 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE211 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE212 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE216 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE220 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE221 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE222 (BATTLEMAGE)
[01:05:59] [PASSED] 0xE223 (BATTLEMAGE)
[01:05:59] [PASSED] 0xB080 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB081 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB082 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB083 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB084 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB085 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB086 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB087 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB08F (PANTHERLAKE)
[01:05:59] [PASSED] 0xB090 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB0A0 (PANTHERLAKE)
[01:05:59] [PASSED] 0xB0B0 (PANTHERLAKE)
[01:05:59] [PASSED] 0xFD80 (PANTHERLAKE)
[01:05:59] [PASSED] 0xFD81 (PANTHERLAKE)
[01:05:59] [PASSED] 0xD740 (NOVALAKE_S)
[01:05:59] [PASSED] 0xD741 (NOVALAKE_S)
[01:05:59] [PASSED] 0xD742 (NOVALAKE_S)
[01:05:59] [PASSED] 0xD743 (NOVALAKE_S)
[01:05:59] [PASSED] 0xD744 (NOVALAKE_S)
[01:05:59] [PASSED] 0xD745 (NOVALAKE_S)
[01:05:59] [PASSED] 0x674C (CRESCENTISLAND)
[01:05:59] [PASSED] 0x674D (CRESCENTISLAND)
[01:05:59] [PASSED] 0x674E (CRESCENTISLAND)
[01:05:59] [PASSED] 0x674F (CRESCENTISLAND)
[01:05:59] [PASSED] 0x6750 (CRESCENTISLAND)
[01:05:59] [PASSED] 0xD750 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD751 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD752 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD753 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD754 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD755 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD756 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD757 (NOVALAKE_P)
[01:05:59] [PASSED] 0xD75F (NOVALAKE_P)
[01:05:59] =============== [PASSED] check_platform_desc ===============
[01:05:59] ===================== [PASSED] xe_pci ======================
[01:05:59] =================== xe_rtp (2 subtests) ====================
[01:05:59] =============== xe_rtp_process_to_sr_tests  ================
[01:05:59] [PASSED] coalesce-same-reg
[01:05:59] [PASSED] no-match-no-add
[01:05:59] [PASSED] match-or
[01:05:59] [PASSED] match-or-xfail
[01:05:59] [PASSED] no-match-no-add-multiple-rules
[01:05:59] [PASSED] two-regs-two-entries
[01:05:59] [PASSED] clr-one-set-other
[01:05:59] [PASSED] set-field
[01:05:59] [PASSED] conflict-duplicate
[01:05:59] [PASSED] conflict-not-disjoint
[01:05:59] [PASSED] conflict-reg-type
[01:05:59] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[01:05:59] ================== xe_rtp_process_tests  ===================
[01:05:59] [PASSED] active1
[01:05:59] [PASSED] active2
[01:05:59] [PASSED] active-inactive
[01:05:59] [PASSED] inactive-active
[01:05:59] [PASSED] inactive-1st_or_active-inactive
[01:05:59] [PASSED] inactive-2nd_or_active-inactive
[01:05:59] [PASSED] inactive-last_or_active-inactive
[01:05:59] [PASSED] inactive-no_or_active-inactive
[01:05:59] ============== [PASSED] xe_rtp_process_tests ===============
[01:05:59] ===================== [PASSED] xe_rtp ======================
[01:05:59] ==================== xe_wa (1 subtest) =====================
[01:05:59] ======================== xe_wa_gt  =========================
[01:05:59] [PASSED] TIGERLAKE B0
[01:05:59] [PASSED] DG1 A0
[01:05:59] [PASSED] DG1 B0
[01:05:59] [PASSED] ALDERLAKE_S A0
[01:05:59] [PASSED] ALDERLAKE_S B0
[01:05:59] [PASSED] ALDERLAKE_S C0
[01:05:59] [PASSED] ALDERLAKE_S D0
[01:05:59] [PASSED] ALDERLAKE_P A0
[01:05:59] [PASSED] ALDERLAKE_P B0
[01:05:59] [PASSED] ALDERLAKE_P C0
[01:05:59] [PASSED] ALDERLAKE_S RPLS D0
[01:05:59] [PASSED] ALDERLAKE_P RPLU E0
[01:05:59] [PASSED] DG2 G10 C0
[01:05:59] [PASSED] DG2 G11 B1
[01:05:59] [PASSED] DG2 G12 A1
[01:05:59] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:05:59] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[01:05:59] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[01:05:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[01:05:59] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[01:05:59] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[01:05:59] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[01:05:59] ==================== [PASSED] xe_wa_gt =====================
[01:05:59] ====================== [PASSED] xe_wa ======================
[01:05:59] ============================================================
[01:05:59] Testing complete. Ran 601 tests: passed: 583, skipped: 18
[01:05:59] Elapsed time: 46.837s total, 4.504s configuring, 41.667s building, 0.643s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[01:05:59] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:06:01] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[01:06:32] Starting KUnit Kernel (1/1)...
[01:06:32] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:06:32] ============ drm_test_pick_cmdline (2 subtests) ============
[01:06:32] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[01:06:32] =============== drm_test_pick_cmdline_named  ===============
[01:06:32] [PASSED] NTSC
[01:06:32] [PASSED] NTSC-J
[01:06:32] [PASSED] PAL
[01:06:32] [PASSED] PAL-M
[01:06:32] =========== [PASSED] drm_test_pick_cmdline_named ===========
[01:06:32] ============== [PASSED] drm_test_pick_cmdline ==============
[01:06:32] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[01:06:32] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[01:06:32] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[01:06:32] =========== drm_validate_clone_mode (2 subtests) ===========
[01:06:32] ============== drm_test_check_in_clone_mode  ===============
[01:06:32] [PASSED] in_clone_mode
[01:06:32] [PASSED] not_in_clone_mode
[01:06:32] ========== [PASSED] drm_test_check_in_clone_mode ===========
[01:06:32] =============== drm_test_check_valid_clones  ===============
[01:06:32] [PASSED] not_in_clone_mode
[01:06:32] [PASSED] valid_clone
[01:06:32] [PASSED] invalid_clone
[01:06:32] =========== [PASSED] drm_test_check_valid_clones ===========
[01:06:32] ============= [PASSED] drm_validate_clone_mode =============
[01:06:32] ============= drm_validate_modeset (1 subtest) =============
[01:06:32] [PASSED] drm_test_check_connector_changed_modeset
[01:06:32] ============== [PASSED] drm_validate_modeset ===============
[01:06:32] ====== drm_test_bridge_get_current_state (2 subtests) ======
[01:06:32] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[01:06:32] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[01:06:32] ======== [PASSED] drm_test_bridge_get_current_state ========
[01:06:32] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[01:06:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[01:06:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[01:06:32] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[01:06:32] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[01:06:32] ============== drm_bridge_alloc (2 subtests) ===============
[01:06:32] [PASSED] drm_test_drm_bridge_alloc_basic
[01:06:32] [PASSED] drm_test_drm_bridge_alloc_get_put
[01:06:32] ================ [PASSED] drm_bridge_alloc =================
[01:06:32] ============= drm_cmdline_parser (40 subtests) =============
[01:06:32] [PASSED] drm_test_cmdline_force_d_only
[01:06:32] [PASSED] drm_test_cmdline_force_D_only_dvi
[01:06:32] [PASSED] drm_test_cmdline_force_D_only_hdmi
[01:06:32] [PASSED] drm_test_cmdline_force_D_only_not_digital
[01:06:32] [PASSED] drm_test_cmdline_force_e_only
[01:06:32] [PASSED] drm_test_cmdline_res
[01:06:32] [PASSED] drm_test_cmdline_res_vesa
[01:06:32] [PASSED] drm_test_cmdline_res_vesa_rblank
[01:06:32] [PASSED] drm_test_cmdline_res_rblank
[01:06:32] [PASSED] drm_test_cmdline_res_bpp
[01:06:32] [PASSED] drm_test_cmdline_res_refresh
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[01:06:32] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[01:06:32] [PASSED] drm_test_cmdline_res_margins_force_on
[01:06:32] [PASSED] drm_test_cmdline_res_vesa_margins
[01:06:32] [PASSED] drm_test_cmdline_name
[01:06:32] [PASSED] drm_test_cmdline_name_bpp
[01:06:32] [PASSED] drm_test_cmdline_name_option
[01:06:32] [PASSED] drm_test_cmdline_name_bpp_option
[01:06:32] [PASSED] drm_test_cmdline_rotate_0
[01:06:32] [PASSED] drm_test_cmdline_rotate_90
[01:06:32] [PASSED] drm_test_cmdline_rotate_180
[01:06:32] [PASSED] drm_test_cmdline_rotate_270
[01:06:32] [PASSED] drm_test_cmdline_hmirror
[01:06:32] [PASSED] drm_test_cmdline_vmirror
[01:06:32] [PASSED] drm_test_cmdline_margin_options
[01:06:32] [PASSED] drm_test_cmdline_multiple_options
[01:06:32] [PASSED] drm_test_cmdline_bpp_extra_and_option
[01:06:32] [PASSED] drm_test_cmdline_extra_and_option
[01:06:32] [PASSED] drm_test_cmdline_freestanding_options
[01:06:32] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[01:06:32] [PASSED] drm_test_cmdline_panel_orientation
[01:06:32] ================ drm_test_cmdline_invalid  =================
[01:06:32] [PASSED] margin_only
[01:06:32] [PASSED] interlace_only
[01:06:32] [PASSED] res_missing_x
[01:06:32] [PASSED] res_missing_y
[01:06:32] [PASSED] res_bad_y
[01:06:32] [PASSED] res_missing_y_bpp
[01:06:32] [PASSED] res_bad_bpp
[01:06:32] [PASSED] res_bad_refresh
[01:06:32] [PASSED] res_bpp_refresh_force_on_off
[01:06:32] [PASSED] res_invalid_mode
[01:06:32] [PASSED] res_bpp_wrong_place_mode
[01:06:32] [PASSED] name_bpp_refresh
[01:06:32] [PASSED] name_refresh
[01:06:32] [PASSED] name_refresh_wrong_mode
[01:06:32] [PASSED] name_refresh_invalid_mode
[01:06:32] [PASSED] rotate_multiple
[01:06:32] [PASSED] rotate_invalid_val
[01:06:32] [PASSED] rotate_truncated
[01:06:32] [PASSED] invalid_option
[01:06:32] [PASSED] invalid_tv_option
[01:06:32] [PASSED] truncated_tv_option
[01:06:32] ============ [PASSED] drm_test_cmdline_invalid =============
[01:06:32] =============== drm_test_cmdline_tv_options  ===============
[01:06:32] [PASSED] NTSC
[01:06:32] [PASSED] NTSC_443
[01:06:32] [PASSED] NTSC_J
[01:06:32] [PASSED] PAL
[01:06:32] [PASSED] PAL_M
[01:06:32] [PASSED] PAL_N
[01:06:32] [PASSED] SECAM
[01:06:32] [PASSED] MONO_525
[01:06:32] [PASSED] MONO_625
[01:06:32] =========== [PASSED] drm_test_cmdline_tv_options ===========
[01:06:32] =============== [PASSED] drm_cmdline_parser ================
[01:06:32] ========== drmm_connector_hdmi_init (20 subtests) ==========
[01:06:32] [PASSED] drm_test_connector_hdmi_init_valid
[01:06:32] [PASSED] drm_test_connector_hdmi_init_bpc_8
[01:06:32] [PASSED] drm_test_connector_hdmi_init_bpc_10
[01:06:32] [PASSED] drm_test_connector_hdmi_init_bpc_12
[01:06:32] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[01:06:32] [PASSED] drm_test_connector_hdmi_init_bpc_null
[01:06:32] [PASSED] drm_test_connector_hdmi_init_formats_empty
[01:06:32] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[01:06:32] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[01:06:32] [PASSED] supported_formats=0x9 yuv420_allowed=1
[01:06:32] [PASSED] supported_formats=0x9 yuv420_allowed=0
[01:06:32] [PASSED] supported_formats=0x5 yuv420_allowed=1
[01:06:32] [PASSED] supported_formats=0x5 yuv420_allowed=0
[01:06:32] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[01:06:32] [PASSED] drm_test_connector_hdmi_init_null_ddc
[01:06:32] [PASSED] drm_test_connector_hdmi_init_null_product
[01:06:32] [PASSED] drm_test_connector_hdmi_init_null_vendor
[01:06:32] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[01:06:32] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[01:06:32] [PASSED] drm_test_connector_hdmi_init_product_valid
[01:06:32] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[01:06:32] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[01:06:32] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[01:06:32] ========= drm_test_connector_hdmi_init_type_valid  =========
[01:06:32] [PASSED] HDMI-A
[01:06:32] [PASSED] HDMI-B
[01:06:32] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[01:06:32] ======== drm_test_connector_hdmi_init_type_invalid  ========
[01:06:32] [PASSED] Unknown
[01:06:32] [PASSED] VGA
[01:06:32] [PASSED] DVI-I
[01:06:32] [PASSED] DVI-D
[01:06:32] [PASSED] DVI-A
[01:06:32] [PASSED] Composite
[01:06:32] [PASSED] SVIDEO
[01:06:32] [PASSED] LVDS
[01:06:32] [PASSED] Component
[01:06:32] [PASSED] DIN
[01:06:32] [PASSED] DP
[01:06:32] [PASSED] TV
[01:06:32] [PASSED] eDP
[01:06:32] [PASSED] Virtual
[01:06:32] [PASSED] DSI
[01:06:32] [PASSED] DPI
[01:06:32] [PASSED] Writeback
[01:06:32] [PASSED] SPI
[01:06:32] [PASSED] USB
[01:06:32] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[01:06:32] ============ [PASSED] drmm_connector_hdmi_init =============
[01:06:32] ============= drmm_connector_init (3 subtests) =============
[01:06:32] [PASSED] drm_test_drmm_connector_init
[01:06:32] [PASSED] drm_test_drmm_connector_init_null_ddc
[01:06:32] ========= drm_test_drmm_connector_init_type_valid  =========
[01:06:32] [PASSED] Unknown
[01:06:32] [PASSED] VGA
[01:06:32] [PASSED] DVI-I
[01:06:32] [PASSED] DVI-D
[01:06:32] [PASSED] DVI-A
[01:06:32] [PASSED] Composite
[01:06:32] [PASSED] SVIDEO
[01:06:32] [PASSED] LVDS
[01:06:32] [PASSED] Component
[01:06:32] [PASSED] DIN
[01:06:32] [PASSED] DP
[01:06:32] [PASSED] HDMI-A
[01:06:32] [PASSED] HDMI-B
[01:06:32] [PASSED] TV
[01:06:32] [PASSED] eDP
[01:06:32] [PASSED] Virtual
[01:06:32] [PASSED] DSI
[01:06:32] [PASSED] DPI
[01:06:32] [PASSED] Writeback
[01:06:32] [PASSED] SPI
[01:06:32] [PASSED] USB
[01:06:32] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[01:06:32] =============== [PASSED] drmm_connector_init ===============
[01:06:32] ========= drm_connector_dynamic_init (6 subtests) ==========
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_init
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_init_properties
[01:06:32] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[01:06:32] [PASSED] Unknown
[01:06:32] [PASSED] VGA
[01:06:32] [PASSED] DVI-I
[01:06:32] [PASSED] DVI-D
[01:06:32] [PASSED] DVI-A
[01:06:32] [PASSED] Composite
[01:06:32] [PASSED] SVIDEO
[01:06:32] [PASSED] LVDS
[01:06:32] [PASSED] Component
[01:06:32] [PASSED] DIN
[01:06:32] [PASSED] DP
[01:06:32] [PASSED] HDMI-A
[01:06:32] [PASSED] HDMI-B
[01:06:32] [PASSED] TV
[01:06:32] [PASSED] eDP
[01:06:32] [PASSED] Virtual
[01:06:32] [PASSED] DSI
[01:06:32] [PASSED] DPI
[01:06:32] [PASSED] Writeback
[01:06:32] [PASSED] SPI
[01:06:32] [PASSED] USB
[01:06:32] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[01:06:32] ======== drm_test_drm_connector_dynamic_init_name  =========
[01:06:32] [PASSED] Unknown
[01:06:32] [PASSED] VGA
[01:06:32] [PASSED] DVI-I
[01:06:32] [PASSED] DVI-D
[01:06:32] [PASSED] DVI-A
[01:06:32] [PASSED] Composite
[01:06:32] [PASSED] SVIDEO
[01:06:32] [PASSED] LVDS
[01:06:32] [PASSED] Component
[01:06:32] [PASSED] DIN
[01:06:32] [PASSED] DP
[01:06:32] [PASSED] HDMI-A
[01:06:32] [PASSED] HDMI-B
[01:06:32] [PASSED] TV
[01:06:32] [PASSED] eDP
[01:06:32] [PASSED] Virtual
[01:06:32] [PASSED] DSI
[01:06:32] [PASSED] DPI
[01:06:32] [PASSED] Writeback
[01:06:32] [PASSED] SPI
[01:06:32] [PASSED] USB
[01:06:32] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[01:06:32] =========== [PASSED] drm_connector_dynamic_init ============
[01:06:32] ==== drm_connector_dynamic_register_early (4 subtests) =====
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[01:06:32] ====== [PASSED] drm_connector_dynamic_register_early =======
[01:06:32] ======= drm_connector_dynamic_register (7 subtests) ========
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[01:06:32] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[01:06:32] ========= [PASSED] drm_connector_dynamic_register ==========
[01:06:32] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[01:06:32] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[01:06:32] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[01:06:32] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[01:06:32] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[01:06:32] ========== drm_test_get_tv_mode_from_name_valid  ===========
[01:06:32] [PASSED] NTSC
[01:06:32] [PASSED] NTSC-443
[01:06:32] [PASSED] NTSC-J
[01:06:32] [PASSED] PAL
[01:06:32] [PASSED] PAL-M
[01:06:32] [PASSED] PAL-N
[01:06:32] [PASSED] SECAM
[01:06:32] [PASSED] Mono
[01:06:32] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[01:06:32] [PASSED] drm_test_get_tv_mode_from_name_truncated
[01:06:32] ============ [PASSED] drm_get_tv_mode_from_name ============
[01:06:32] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[01:06:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[01:06:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[01:06:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[01:06:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[01:06:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[01:06:32] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[01:06:32] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[01:06:32] [PASSED] VIC 96
[01:06:32] [PASSED] VIC 97
[01:06:32] [PASSED] VIC 101
[01:06:32] [PASSED] VIC 102
[01:06:32] [PASSED] VIC 106
[01:06:32] [PASSED] VIC 107
[01:06:32] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[01:06:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[01:06:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[01:06:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[01:06:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[01:06:32] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[01:06:32] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[01:06:32] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[01:06:32] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[01:06:32] [PASSED] Automatic
[01:06:32] [PASSED] Full
[01:06:32] [PASSED] Limited 16:235
[01:06:32] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[01:06:32] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[01:06:32] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[01:06:32] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[01:06:32] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[01:06:32] [PASSED] RGB
[01:06:32] [PASSED] YUV 4:2:0
[01:06:32] [PASSED] YUV 4:2:2
[01:06:32] [PASSED] YUV 4:4:4
[01:06:32] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[01:06:32] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[01:06:32] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[01:06:32] ============= drm_damage_helper (21 subtests) ==============
[01:06:32] [PASSED] drm_test_damage_iter_no_damage
[01:06:32] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[01:06:32] [PASSED] drm_test_damage_iter_no_damage_src_moved
[01:06:32] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[01:06:32] [PASSED] drm_test_damage_iter_no_damage_not_visible
[01:06:32] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[01:06:32] [PASSED] drm_test_damage_iter_no_damage_no_fb
[01:06:32] [PASSED] drm_test_damage_iter_simple_damage
[01:06:32] [PASSED] drm_test_damage_iter_single_damage
[01:06:32] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[01:06:32] [PASSED] drm_test_damage_iter_single_damage_outside_src
[01:06:32] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[01:06:32] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[01:06:32] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[01:06:32] [PASSED] drm_test_damage_iter_single_damage_src_moved
[01:06:32] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[01:06:32] [PASSED] drm_test_damage_iter_damage
[01:06:32] [PASSED] drm_test_damage_iter_damage_one_intersect
[01:06:32] [PASSED] drm_test_damage_iter_damage_one_outside
[01:06:32] [PASSED] drm_test_damage_iter_damage_src_moved
[01:06:32] [PASSED] drm_test_damage_iter_damage_not_visible
[01:06:32] ================ [PASSED] drm_damage_helper ================
[01:06:32] ============== drm_dp_mst_helper (3 subtests) ==============
[01:06:32] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[01:06:32] [PASSED] Clock 154000 BPP 30 DSC disabled
[01:06:32] [PASSED] Clock 234000 BPP 30 DSC disabled
[01:06:32] [PASSED] Clock 297000 BPP 24 DSC disabled
[01:06:32] [PASSED] Clock 332880 BPP 24 DSC enabled
[01:06:32] [PASSED] Clock 324540 BPP 24 DSC enabled
[01:06:32] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[01:06:32] ============== drm_test_dp_mst_calc_pbn_div  ===============
[01:06:32] [PASSED] Link rate 2000000 lane count 4
[01:06:32] [PASSED] Link rate 2000000 lane count 2
[01:06:32] [PASSED] Link rate 2000000 lane count 1
[01:06:32] [PASSED] Link rate 1350000 lane count 4
[01:06:32] [PASSED] Link rate 1350000 lane count 2
[01:06:32] [PASSED] Link rate 1350000 lane count 1
[01:06:32] [PASSED] Link rate 1000000 lane count 4
[01:06:32] [PASSED] Link rate 1000000 lane count 2
[01:06:32] [PASSED] Link rate 1000000 lane count 1
[01:06:32] [PASSED] Link rate 810000 lane count 4
[01:06:32] [PASSED] Link rate 810000 lane count 2
[01:06:32] [PASSED] Link rate 810000 lane count 1
[01:06:32] [PASSED] Link rate 540000 lane count 4
[01:06:32] [PASSED] Link rate 540000 lane count 2
[01:06:32] [PASSED] Link rate 540000 lane count 1
[01:06:32] [PASSED] Link rate 270000 lane count 4
[01:06:32] [PASSED] Link rate 270000 lane count 2
[01:06:32] [PASSED] Link rate 270000 lane count 1
[01:06:32] [PASSED] Link rate 162000 lane count 4
[01:06:32] [PASSED] Link rate 162000 lane count 2
[01:06:32] [PASSED] Link rate 162000 lane count 1
[01:06:32] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[01:06:32] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[01:06:32] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[01:06:32] [PASSED] DP_POWER_UP_PHY with port number
[01:06:32] [PASSED] DP_POWER_DOWN_PHY with port number
[01:06:32] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[01:06:32] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[01:06:32] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[01:06:32] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[01:06:32] [PASSED] DP_QUERY_PAYLOAD with port number
[01:06:32] [PASSED] DP_QUERY_PAYLOAD with VCPI
[01:06:32] [PASSED] DP_REMOTE_DPCD_READ with port number
[01:06:32] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[01:06:32] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[01:06:32] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[01:06:32] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[01:06:32] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[01:06:32] [PASSED] DP_REMOTE_I2C_READ with port number
[01:06:32] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[01:06:32] [PASSED] DP_REMOTE_I2C_READ with transactions array
[01:06:32] [PASSED] DP_REMOTE_I2C_WRITE with port number
[01:06:32] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[01:06:32] [PASSED] DP_REMOTE_I2C_WRITE with data array
[01:06:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[01:06:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[01:06:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[01:06:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[01:06:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[01:06:32] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[01:06:32] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[01:06:32] ================ [PASSED] drm_dp_mst_helper ================
[01:06:32] ================== drm_exec (7 subtests) ===================
[01:06:32] [PASSED] sanitycheck
[01:06:32] [PASSED] test_lock
[01:06:32] [PASSED] test_lock_unlock
[01:06:32] [PASSED] test_duplicates
[01:06:32] [PASSED] test_prepare
[01:06:32] [PASSED] test_prepare_array
[01:06:32] [PASSED] test_multiple_loops
[01:06:32] ==================== [PASSED] drm_exec =====================
[01:06:32] =========== drm_format_helper_test (17 subtests) ===========
[01:06:32] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[01:06:32] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[01:06:32] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[01:06:32] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[01:06:32] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[01:06:32] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[01:06:32] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[01:06:32] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[01:06:32] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[01:06:32] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[01:06:32] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[01:06:32] ============== drm_test_fb_xrgb8888_to_mono  ===============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[01:06:32] ==================== drm_test_fb_swab  =====================
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ================ [PASSED] drm_test_fb_swab =================
[01:06:32] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[01:06:32] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[01:06:32] [PASSED] single_pixel_source_buffer
[01:06:32] [PASSED] single_pixel_clip_rectangle
[01:06:32] [PASSED] well_known_colors
[01:06:32] [PASSED] destination_pitch
[01:06:32] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[01:06:32] ================= drm_test_fb_clip_offset  =================
[01:06:32] [PASSED] pass through
[01:06:32] [PASSED] horizontal offset
[01:06:32] [PASSED] vertical offset
[01:06:32] [PASSED] horizontal and vertical offset
[01:06:32] [PASSED] horizontal offset (custom pitch)
[01:06:32] [PASSED] vertical offset (custom pitch)
[01:06:32] [PASSED] horizontal and vertical offset (custom pitch)
[01:06:32] ============= [PASSED] drm_test_fb_clip_offset =============
[01:06:32] =================== drm_test_fb_memcpy  ====================
[01:06:32] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[01:06:32] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[01:06:32] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[01:06:32] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[01:06:32] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[01:06:32] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[01:06:32] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[01:06:32] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[01:06:32] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[01:06:32] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[01:06:32] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[01:06:32] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[01:06:32] =============== [PASSED] drm_test_fb_memcpy ================
[01:06:32] ============= [PASSED] drm_format_helper_test ==============
[01:06:32] ================= drm_format (18 subtests) =================
[01:06:32] [PASSED] drm_test_format_block_width_invalid
[01:06:32] [PASSED] drm_test_format_block_width_one_plane
[01:06:32] [PASSED] drm_test_format_block_width_two_plane
[01:06:32] [PASSED] drm_test_format_block_width_three_plane
[01:06:32] [PASSED] drm_test_format_block_width_tiled
[01:06:32] [PASSED] drm_test_format_block_height_invalid
[01:06:32] [PASSED] drm_test_format_block_height_one_plane
[01:06:32] [PASSED] drm_test_format_block_height_two_plane
[01:06:32] [PASSED] drm_test_format_block_height_three_plane
[01:06:32] [PASSED] drm_test_format_block_height_tiled
[01:06:32] [PASSED] drm_test_format_min_pitch_invalid
[01:06:32] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[01:06:32] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[01:06:32] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[01:06:32] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[01:06:32] [PASSED] drm_test_format_min_pitch_two_plane
[01:06:32] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[01:06:32] [PASSED] drm_test_format_min_pitch_tiled
[01:06:32] =================== [PASSED] drm_format ====================
[01:06:32] ============== drm_framebuffer (10 subtests) ===============
[01:06:32] ========== drm_test_framebuffer_check_src_coords  ==========
[01:06:32] [PASSED] Success: source fits into fb
[01:06:32] [PASSED] Fail: overflowing fb with x-axis coordinate
[01:06:32] [PASSED] Fail: overflowing fb with y-axis coordinate
[01:06:32] [PASSED] Fail: overflowing fb with source width
[01:06:32] [PASSED] Fail: overflowing fb with source height
[01:06:32] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[01:06:32] [PASSED] drm_test_framebuffer_cleanup
[01:06:32] =============== drm_test_framebuffer_create  ===============
[01:06:32] [PASSED] ABGR8888 normal sizes
[01:06:32] [PASSED] ABGR8888 max sizes
[01:06:32] [PASSED] ABGR8888 pitch greater than min required
[01:06:32] [PASSED] ABGR8888 pitch less than min required
[01:06:32] [PASSED] ABGR8888 Invalid width
[01:06:32] [PASSED] ABGR8888 Invalid buffer handle
[01:06:32] [PASSED] No pixel format
[01:06:32] [PASSED] ABGR8888 Width 0
[01:06:32] [PASSED] ABGR8888 Height 0
[01:06:32] [PASSED] ABGR8888 Out of bound height * pitch combination
[01:06:32] [PASSED] ABGR8888 Large buffer offset
[01:06:32] [PASSED] ABGR8888 Buffer offset for inexistent plane
[01:06:32] [PASSED] ABGR8888 Invalid flag
[01:06:32] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[01:06:32] [PASSED] ABGR8888 Valid buffer modifier
[01:06:32] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[01:06:32] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[01:06:32] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[01:06:32] [PASSED] NV12 Normal sizes
[01:06:32] [PASSED] NV12 Max sizes
[01:06:32] [PASSED] NV12 Invalid pitch
[01:06:32] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[01:06:32] [PASSED] NV12 different  modifier per-plane
[01:06:32] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[01:06:32] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[01:06:32] [PASSED] NV12 Modifier for inexistent plane
[01:06:32] [PASSED] NV12 Handle for inexistent plane
[01:06:32] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[01:06:32] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[01:06:32] [PASSED] YVU420 Normal sizes
[01:06:32] [PASSED] YVU420 Max sizes
[01:06:32] [PASSED] YVU420 Invalid pitch
[01:06:32] [PASSED] YVU420 Different pitches
[01:06:32] [PASSED] YVU420 Different buffer offsets/pitches
[01:06:32] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[01:06:32] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[01:06:32] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[01:06:32] [PASSED] YVU420 Valid modifier
[01:06:32] [PASSED] YVU420 Different modifiers per plane
[01:06:32] [PASSED] YVU420 Modifier for inexistent plane
[01:06:32] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[01:06:32] [PASSED] X0L2 Normal sizes
[01:06:32] [PASSED] X0L2 Max sizes
[01:06:32] [PASSED] X0L2 Invalid pitch
[01:06:32] [PASSED] X0L2 Pitch greater than minimum required
[01:06:32] [PASSED] X0L2 Handle for inexistent plane
[01:06:32] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[01:06:32] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[01:06:32] [PASSED] X0L2 Valid modifier
[01:06:32] [PASSED] X0L2 Modifier for inexistent plane
[01:06:32] =========== [PASSED] drm_test_framebuffer_create ===========
[01:06:32] [PASSED] drm_test_framebuffer_free
[01:06:32] [PASSED] drm_test_framebuffer_init
[01:06:32] [PASSED] drm_test_framebuffer_init_bad_format
[01:06:32] [PASSED] drm_test_framebuffer_init_dev_mismatch
[01:06:32] [PASSED] drm_test_framebuffer_lookup
[01:06:32] [PASSED] drm_test_framebuffer_lookup_inexistent
[01:06:32] [PASSED] drm_test_framebuffer_modifiers_not_supported
[01:06:32] ================= [PASSED] drm_framebuffer =================
[01:06:32] ================ drm_gem_shmem (8 subtests) ================
[01:06:32] [PASSED] drm_gem_shmem_test_obj_create
[01:06:32] [PASSED] drm_gem_shmem_test_obj_create_private
[01:06:32] [PASSED] drm_gem_shmem_test_pin_pages
[01:06:32] [PASSED] drm_gem_shmem_test_vmap
[01:06:32] [PASSED] drm_gem_shmem_test_get_sg_table
[01:06:32] [PASSED] drm_gem_shmem_test_get_pages_sgt
[01:06:32] [PASSED] drm_gem_shmem_test_madvise
[01:06:32] [PASSED] drm_gem_shmem_test_purge
[01:06:32] ================== [PASSED] drm_gem_shmem ==================
[01:06:32] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[01:06:32] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[01:06:32] [PASSED] Automatic
[01:06:32] [PASSED] Full
[01:06:32] [PASSED] Limited 16:235
[01:06:32] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[01:06:32] [PASSED] drm_test_check_disable_connector
[01:06:32] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[01:06:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[01:06:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[01:06:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[01:06:32] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[01:06:32] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[01:06:32] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[01:06:32] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[01:06:32] [PASSED] drm_test_check_output_bpc_dvi
[01:06:32] [PASSED] drm_test_check_output_bpc_format_vic_1
[01:06:32] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[01:06:32] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[01:06:32] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[01:06:32] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[01:06:32] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[01:06:32] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[01:06:32] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[01:06:32] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[01:06:32] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[01:06:32] [PASSED] drm_test_check_broadcast_rgb_value
[01:06:32] [PASSED] drm_test_check_bpc_8_value
[01:06:32] [PASSED] drm_test_check_bpc_10_value
[01:06:32] [PASSED] drm_test_check_bpc_12_value
[01:06:32] [PASSED] drm_test_check_format_value
[01:06:32] [PASSED] drm_test_check_tmds_char_value
[01:06:32] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[01:06:32] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[01:06:32] [PASSED] drm_test_check_mode_valid
[01:06:32] [PASSED] drm_test_check_mode_valid_reject
[01:06:32] [PASSED] drm_test_check_mode_valid_reject_rate
[01:06:32] [PASSED] drm_test_check_mode_valid_reject_max_clock
[01:06:32] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[01:06:32] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[01:06:32] [PASSED] drm_test_check_infoframes
[01:06:32] [PASSED] drm_test_check_reject_avi_infoframe
[01:06:32] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[01:06:32] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[01:06:32] [PASSED] drm_test_check_reject_audio_infoframe
[01:06:32] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[01:06:32] ================= drm_managed (2 subtests) =================
[01:06:32] [PASSED] drm_test_managed_release_action
[01:06:32] [PASSED] drm_test_managed_run_action
[01:06:32] =================== [PASSED] drm_managed ===================
[01:06:32] =================== drm_mm (6 subtests) ====================
[01:06:32] [PASSED] drm_test_mm_init
[01:06:32] [PASSED] drm_test_mm_debug
[01:06:32] [PASSED] drm_test_mm_align32
[01:06:32] [PASSED] drm_test_mm_align64
[01:06:32] [PASSED] drm_test_mm_lowest
[01:06:32] [PASSED] drm_test_mm_highest
[01:06:32] ===================== [PASSED] drm_mm ======================
[01:06:32] ============= drm_modes_analog_tv (5 subtests) =============
[01:06:32] [PASSED] drm_test_modes_analog_tv_mono_576i
[01:06:32] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[01:06:32] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[01:06:32] [PASSED] drm_test_modes_analog_tv_pal_576i
[01:06:32] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[01:06:32] =============== [PASSED] drm_modes_analog_tv ===============
[01:06:32] ============== drm_plane_helper (2 subtests) ===============
[01:06:32] =============== drm_test_check_plane_state  ================
[01:06:32] [PASSED] clipping_simple
[01:06:32] [PASSED] clipping_rotate_reflect
[01:06:32] [PASSED] positioning_simple
[01:06:32] [PASSED] upscaling
[01:06:32] [PASSED] downscaling
[01:06:32] [PASSED] rounding1
[01:06:32] [PASSED] rounding2
[01:06:32] [PASSED] rounding3
[01:06:32] [PASSED] rounding4
[01:06:32] =========== [PASSED] drm_test_check_plane_state ============
[01:06:32] =========== drm_test_check_invalid_plane_state  ============
[01:06:32] [PASSED] positioning_invalid
[01:06:32] [PASSED] upscaling_invalid
[01:06:32] [PASSED] downscaling_invalid
[01:06:32] ======= [PASSED] drm_test_check_invalid_plane_state ========
[01:06:32] ================ [PASSED] drm_plane_helper =================
[01:06:32] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[01:06:32] ====== drm_test_connector_helper_tv_get_modes_check  =======
[01:06:32] [PASSED] None
[01:06:32] [PASSED] PAL
[01:06:32] [PASSED] NTSC
[01:06:32] [PASSED] Both, NTSC Default
[01:06:32] [PASSED] Both, PAL Default
[01:06:32] [PASSED] Both, NTSC Default, with PAL on command-line
[01:06:32] [PASSED] Both, PAL Default, with NTSC on command-line
[01:06:32] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[01:06:32] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[01:06:32] ================== drm_rect (9 subtests) ===================
[01:06:32] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[01:06:32] [PASSED] drm_test_rect_clip_scaled_not_clipped
[01:06:32] [PASSED] drm_test_rect_clip_scaled_clipped
[01:06:32] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[01:06:32] ================= drm_test_rect_intersect  =================
[01:06:32] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[01:06:32] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[01:06:32] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[01:06:32] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[01:06:32] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[01:06:32] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[01:06:32] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[01:06:32] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[01:06:32] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[01:06:32] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[01:06:32] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[01:06:32] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[01:06:32] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[01:06:32] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[01:06:32] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[01:06:32] ============= [PASSED] drm_test_rect_intersect =============
[01:06:32] ================ drm_test_rect_calc_hscale  ================
[01:06:32] [PASSED] normal use
[01:06:32] [PASSED] out of max range
[01:06:32] [PASSED] out of min range
[01:06:32] [PASSED] zero dst
[01:06:32] [PASSED] negative src
[01:06:32] [PASSED] negative dst
[01:06:32] ============ [PASSED] drm_test_rect_calc_hscale ============
[01:06:32] ================ drm_test_rect_calc_vscale  ================
[01:06:32] [PASSED] normal use
[01:06:32] [PASSED] out of max range
[01:06:32] [PASSED] out of min range
[01:06:32] [PASSED] zero dst
[01:06:32] [PASSED] negative src
[01:06:32] [PASSED] negative dst
[01:06:32] ============ [PASSED] drm_test_rect_calc_vscale ============
[01:06:32] ================== drm_test_rect_rotate  ===================
[01:06:32] [PASSED] reflect-x
[01:06:32] [PASSED] reflect-y
[01:06:32] [PASSED] rotate-0
[01:06:32] [PASSED] rotate-90
[01:06:32] [PASSED] rotate-180
[01:06:32] [PASSED] rotate-270
[01:06:32] ============== [PASSED] drm_test_rect_rotate ===============
[01:06:32] ================ drm_test_rect_rotate_inv  =================
[01:06:32] [PASSED] reflect-x
[01:06:32] [PASSED] reflect-y
[01:06:32] [PASSED] rotate-0
[01:06:32] [PASSED] rotate-90
[01:06:32] [PASSED] rotate-180
[01:06:32] [PASSED] rotate-270
[01:06:32] ============ [PASSED] drm_test_rect_rotate_inv =============
[01:06:32] ==================== [PASSED] drm_rect =====================
[01:06:32] ============ drm_sysfb_modeset_test (1 subtest) ============
[01:06:32] ============ drm_test_sysfb_build_fourcc_list  =============
[01:06:32] [PASSED] no native formats
[01:06:32] [PASSED] XRGB8888 as native format
[01:06:32] [PASSED] remove duplicates
[01:06:32] [PASSED] convert alpha formats
[01:06:32] [PASSED] random formats
[01:06:32] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[01:06:32] ============= [PASSED] drm_sysfb_modeset_test ==============
[01:06:32] ================== drm_fixp (2 subtests) ===================
[01:06:32] [PASSED] drm_test_int2fixp
[01:06:32] [PASSED] drm_test_sm2fixp
[01:06:32] ==================== [PASSED] drm_fixp =====================
[01:06:32] ============================================================
[01:06:32] Testing complete. Ran 621 tests: passed: 621
[01:06:32] Elapsed time: 32.898s total, 1.749s configuring, 30.984s building, 0.136s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[01:06:32] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[01:06:34] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[01:06:43] Starting KUnit Kernel (1/1)...
[01:06:43] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[01:06:44] ================= ttm_device (5 subtests) ==================
[01:06:44] [PASSED] ttm_device_init_basic
[01:06:44] [PASSED] ttm_device_init_multiple
[01:06:44] [PASSED] ttm_device_fini_basic
[01:06:44] [PASSED] ttm_device_init_no_vma_man
[01:06:44] ================== ttm_device_init_pools  ==================
[01:06:44] [PASSED] No DMA allocations, no DMA32 required
[01:06:44] [PASSED] DMA allocations, DMA32 required
[01:06:44] [PASSED] No DMA allocations, DMA32 required
[01:06:44] [PASSED] DMA allocations, no DMA32 required
[01:06:44] ============== [PASSED] ttm_device_init_pools ==============
[01:06:44] =================== [PASSED] ttm_device ====================
[01:06:44] ================== ttm_pool (8 subtests) ===================
[01:06:44] ================== ttm_pool_alloc_basic  ===================
[01:06:44] [PASSED] One page
[01:06:44] [PASSED] More than one page
[01:06:44] [PASSED] Above the allocation limit
[01:06:44] [PASSED] One page, with coherent DMA mappings enabled
[01:06:44] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:06:44] ============== [PASSED] ttm_pool_alloc_basic ===============
[01:06:44] ============== ttm_pool_alloc_basic_dma_addr  ==============
[01:06:44] [PASSED] One page
[01:06:44] [PASSED] More than one page
[01:06:44] [PASSED] Above the allocation limit
[01:06:44] [PASSED] One page, with coherent DMA mappings enabled
[01:06:44] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[01:06:44] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[01:06:44] [PASSED] ttm_pool_alloc_order_caching_match
[01:06:44] [PASSED] ttm_pool_alloc_caching_mismatch
[01:06:44] [PASSED] ttm_pool_alloc_order_mismatch
[01:06:44] [PASSED] ttm_pool_free_dma_alloc
[01:06:44] [PASSED] ttm_pool_free_no_dma_alloc
[01:06:44] [PASSED] ttm_pool_fini_basic
[01:06:44] ==================== [PASSED] ttm_pool =====================
[01:06:44] ================ ttm_resource (8 subtests) =================
[01:06:44] ================= ttm_resource_init_basic  =================
[01:06:44] [PASSED] Init resource in TTM_PL_SYSTEM
[01:06:44] [PASSED] Init resource in TTM_PL_VRAM
[01:06:44] [PASSED] Init resource in a private placement
[01:06:44] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[01:06:44] ============= [PASSED] ttm_resource_init_basic =============
[01:06:44] [PASSED] ttm_resource_init_pinned
[01:06:44] [PASSED] ttm_resource_fini_basic
[01:06:44] [PASSED] ttm_resource_manager_init_basic
[01:06:44] [PASSED] ttm_resource_manager_usage_basic
[01:06:44] [PASSED] ttm_resource_manager_set_used_basic
[01:06:44] [PASSED] ttm_sys_man_alloc_basic
[01:06:44] [PASSED] ttm_sys_man_free_basic
[01:06:44] ================== [PASSED] ttm_resource ===================
[01:06:44] =================== ttm_tt (15 subtests) ===================
[01:06:44] ==================== ttm_tt_init_basic  ====================
[01:06:44] [PASSED] Page-aligned size
[01:06:44] [PASSED] Extra pages requested
[01:06:44] ================ [PASSED] ttm_tt_init_basic ================
[01:06:44] [PASSED] ttm_tt_init_misaligned
[01:06:44] [PASSED] ttm_tt_fini_basic
[01:06:44] [PASSED] ttm_tt_fini_sg
[01:06:44] [PASSED] ttm_tt_fini_shmem
[01:06:44] [PASSED] ttm_tt_create_basic
[01:06:44] [PASSED] ttm_tt_create_invalid_bo_type
[01:06:44] [PASSED] ttm_tt_create_ttm_exists
[01:06:44] [PASSED] ttm_tt_create_failed
[01:06:44] [PASSED] ttm_tt_destroy_basic
[01:06:44] [PASSED] ttm_tt_populate_null_ttm
[01:06:44] [PASSED] ttm_tt_populate_populated_ttm
[01:06:44] [PASSED] ttm_tt_unpopulate_basic
[01:06:44] [PASSED] ttm_tt_unpopulate_empty_ttm
[01:06:44] [PASSED] ttm_tt_swapin_basic
[01:06:44] ===================== [PASSED] ttm_tt ======================
[01:06:44] =================== ttm_bo (14 subtests) ===================
[01:06:44] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[01:06:44] [PASSED] Cannot be interrupted and sleeps
[01:06:44] [PASSED] Cannot be interrupted, locks straight away
[01:06:44] [PASSED] Can be interrupted, sleeps
[01:06:44] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[01:06:44] [PASSED] ttm_bo_reserve_locked_no_sleep
[01:06:44] [PASSED] ttm_bo_reserve_no_wait_ticket
[01:06:44] [PASSED] ttm_bo_reserve_double_resv
[01:06:44] [PASSED] ttm_bo_reserve_interrupted
[01:06:44] [PASSED] ttm_bo_reserve_deadlock
[01:06:44] [PASSED] ttm_bo_unreserve_basic
[01:06:44] [PASSED] ttm_bo_unreserve_pinned
[01:06:44] [PASSED] ttm_bo_unreserve_bulk
[01:06:44] [PASSED] ttm_bo_fini_basic
[01:06:44] [PASSED] ttm_bo_fini_shared_resv
[01:06:44] [PASSED] ttm_bo_pin_basic
[01:06:44] [PASSED] ttm_bo_pin_unpin_resource
[01:06:44] [PASSED] ttm_bo_multiple_pin_one_unpin
[01:06:44] ===================== [PASSED] ttm_bo ======================
[01:06:44] ============== ttm_bo_validate (22 subtests) ===============
[01:06:44] ============== ttm_bo_init_reserved_sys_man  ===============
[01:06:44] [PASSED] Buffer object for userspace
[01:06:44] [PASSED] Kernel buffer object
[01:06:44] [PASSED] Shared buffer object
[01:06:44] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[01:06:44] ============== ttm_bo_init_reserved_mock_man  ==============
[01:06:44] [PASSED] Buffer object for userspace
[01:06:44] [PASSED] Kernel buffer object
[01:06:44] [PASSED] Shared buffer object
[01:06:44] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[01:06:44] [PASSED] ttm_bo_init_reserved_resv
[01:06:44] ================== ttm_bo_validate_basic  ==================
[01:06:44] [PASSED] Buffer object for userspace
[01:06:44] [PASSED] Kernel buffer object
[01:06:44] [PASSED] Shared buffer object
[01:06:44] ============== [PASSED] ttm_bo_validate_basic ==============
[01:06:44] [PASSED] ttm_bo_validate_invalid_placement
[01:06:44] ============= ttm_bo_validate_same_placement  ==============
[01:06:44] [PASSED] System manager
[01:06:44] [PASSED] VRAM manager
[01:06:44] ========= [PASSED] ttm_bo_validate_same_placement ==========
[01:06:44] [PASSED] ttm_bo_validate_failed_alloc
[01:06:44] [PASSED] ttm_bo_validate_pinned
[01:06:44] [PASSED] ttm_bo_validate_busy_placement
[01:06:44] ================ ttm_bo_validate_multihop  =================
[01:06:44] [PASSED] Buffer object for userspace
[01:06:44] [PASSED] Kernel buffer object
[01:06:44] [PASSED] Shared buffer object
[01:06:44] ============ [PASSED] ttm_bo_validate_multihop =============
[01:06:44] ========== ttm_bo_validate_no_placement_signaled  ==========
[01:06:44] [PASSED] Buffer object in system domain, no page vector
[01:06:44] [PASSED] Buffer object in system domain with an existing page vector
[01:06:44] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[01:06:44] ======== ttm_bo_validate_no_placement_not_signaled  ========
[01:06:44] [PASSED] Buffer object for userspace
[01:06:44] [PASSED] Kernel buffer object
[01:06:44] [PASSED] Shared buffer object
[01:06:44] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[01:06:44] [PASSED] ttm_bo_validate_move_fence_signaled
[01:06:44] ========= ttm_bo_validate_move_fence_not_signaled  =========
[01:06:44] [PASSED] Waits for GPU
[01:06:44] [PASSED] Tries to lock straight away
[01:06:44] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[01:06:44] [PASSED] ttm_bo_validate_swapout
[01:06:44] [PASSED] ttm_bo_validate_happy_evict
[01:06:44] [PASSED] ttm_bo_validate_all_pinned_evict
[01:06:44] [PASSED] ttm_bo_validate_allowed_only_evict
[01:06:44] [PASSED] ttm_bo_validate_deleted_evict
[01:06:44] [PASSED] ttm_bo_validate_busy_domain_evict
[01:06:44] [PASSED] ttm_bo_validate_evict_gutting
[01:06:44] [PASSED] ttm_bo_validate_recrusive_evict
[01:06:44] ================= [PASSED] ttm_bo_validate =================
[01:06:44] ============================================================
[01:06:44] Testing complete. Ran 102 tests: passed: 102
[01:06:44] Elapsed time: 11.767s total, 1.777s configuring, 9.725s building, 0.226s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introduce Xe Uncorrectable Error Handling (rev5)

[Patchwork]

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== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev5)
URL   : https://patchwork.freedesktop.org/series/160482/
State : success

== Summary ==

CI Bug Log - changes from xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795_BAT -> xe-pw-160482v5_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795 -> xe-pw-160482v5

  IGT_8903: 6f88532e2fe22529195cc2f8cabff93d994688f8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795: 0ce1c813197dfbe15ff14143da97ec11161e1795
  xe-pw-160482v5: 160482v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/index.html

[-- Attachment #2: Type: text/html, Size: 1510 bytes --]

✗ Xe.CI.FULL: failure for Introduce Xe Uncorrectable Error Handling (rev5)

[Patchwork]

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== Series Details ==

Series: Introduce Xe Uncorrectable Error Handling (rev5)
URL   : https://patchwork.freedesktop.org/series/160482/
State : failure

== Summary ==

CI Bug Log - changes from xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795_FULL -> xe-pw-160482v5_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-160482v5_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-160482v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (2 -> 2)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-160482v5_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_system_allocator@threads-many-stride-mmap-huge-nomemset:
    - shard-lnl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-lnl-4/igt@xe_exec_system_allocator@threads-many-stride-mmap-huge-nomemset.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_exec_system_allocator@threads-many-stride-mmap-huge-nomemset.html

  * igt@xe_madvise@atomic-device:
    - shard-bmg:          NOTRUN -> [FAIL][3]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@xe_madvise@atomic-device.html

  
Known issues
------------

  Here are the changes found in xe-pw-160482v5_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_hotunplug@unbind-rebind:
    - shard-bmg:          [PASS][4] -> [SKIP][5] ([Intel XE#6779])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@core_hotunplug@unbind-rebind.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@core_hotunplug@unbind-rebind.html

  * igt@intel_hwmon@hwmon-write:
    - shard-lnl:          NOTRUN -> [SKIP][6] ([Intel XE#1125] / [Intel XE#7312])
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@intel_hwmon@hwmon-write.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-lnl:          NOTRUN -> [SKIP][7] ([Intel XE#1407]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-bmg:          NOTRUN -> [SKIP][8] ([Intel XE#2327])
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#1124]) +6 other tests skip
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][10] ([Intel XE#607] / [Intel XE#7361])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +2 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#7679]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-target-3840x2160p.html

  * igt@kms_bw@linear-tiling-1-displays-target-1920x1080p:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#367])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_bw@linear-tiling-1-displays-target-1920x1080p.html

  * igt@kms_bw@linear-tiling-2-displays-target-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#367])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_bw@linear-tiling-2-displays-target-2160x1440p.html

  * igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2887]) +9 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][16] ([Intel XE#2887]) +2 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][17] ([Intel XE#2669] / [Intel XE#7389]) +3 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs@pipe-b-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][18] ([Intel XE#3432])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs.html

  * igt@kms_cdclk@plane-scaling:
    - shard-bmg:          NOTRUN -> [SKIP][19] ([Intel XE#2724] / [Intel XE#7449])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium_audio@hdmi-audio-edid:
    - shard-lnl:          NOTRUN -> [SKIP][20] ([Intel XE#373]) +2 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_chamelium_audio@hdmi-audio-edid.html

  * igt@kms_chamelium_color@ctm-negative:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2325] / [Intel XE#7358])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_chamelium_color@ctm-negative.html

  * igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate:
    - shard-bmg:          NOTRUN -> [SKIP][22] ([Intel XE#2252]) +6 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_chamelium_edid@hdmi-edid-change-during-hibernate.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2390] / [Intel XE#6974])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@lic-type-1:
    - shard-bmg:          NOTRUN -> [SKIP][24] ([Intel XE#7642])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_content_protection@lic-type-1.html

  * igt@kms_content_protection@mei-interface:
    - shard-lnl:          NOTRUN -> [SKIP][25] ([Intel XE#1468] / [Intel XE#7396])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_content_protection@mei-interface.html

  * igt@kms_cursor_crc@cursor-offscreen-128x42:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2320]) +4 other tests skip
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_cursor_crc@cursor-offscreen-128x42.html

  * igt@kms_cursor_crc@cursor-offscreen-64x21:
    - shard-lnl:          NOTRUN -> [SKIP][27] ([Intel XE#1424]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_cursor_crc@cursor-offscreen-64x21.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#309] / [Intel XE#7343])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipb-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][29] ([Intel XE#323] / [Intel XE#6035])
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-bmg:          NOTRUN -> [SKIP][30] ([Intel XE#4354] / [Intel XE#5882])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dsc@dsc-fractional-bpp:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2244])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_dsc@dsc-fractional-bpp.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-bmg:          NOTRUN -> [SKIP][32] ([Intel XE#4422] / [Intel XE#7442])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#6126] / [Intel XE#776])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#1421]) +1 other test skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-bmg:          [PASS][35] -> [SKIP][36] ([Intel XE#6703]) +54 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3:
    - shard-bmg:          [PASS][37] -> [FAIL][38] ([Intel XE#3321])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-dp2-hdmi-a3.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-lnl:          [PASS][39] -> [FAIL][40] ([Intel XE#301]) +1 other test fail
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-panning:
    - shard-bmg:          [PASS][41] -> [DMESG-FAIL][42] ([Intel XE#5545]) +1 other test dmesg-fail
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_flip@flip-vs-panning.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_flip@flip-vs-panning.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#7178] / [Intel XE#7351]) +3 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][44] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][45] ([Intel XE#1397] / [Intel XE#7385])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][46] ([Intel XE#6312] / [Intel XE#651]) +4 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#656] / [Intel XE#7905]) +8 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2311]) +44 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#4141]) +13 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-move:
    - shard-lnl:          NOTRUN -> [SKIP][50] ([Intel XE#6312]) +2 other tests skip
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbchdr-suspend:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#7865]) +6 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_frontbuffer_tracking@fbchdr-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-move:
    - shard-lnl:          NOTRUN -> [SKIP][52] ([Intel XE#7905]) +9 other tests skip
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][53] ([Intel XE#7061]) +5 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#7399]) +1 other test skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][55] ([Intel XE#2313]) +49 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][56] ([Intel XE#7061] / [Intel XE#7356])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
    - shard-lnl:          NOTRUN -> [SKIP][57] ([Intel XE#7061]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-lnl:          NOTRUN -> [SKIP][58] ([Intel XE#1470] / [Intel XE#2853])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#3544] / [Intel XE#7915])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@brightness-with-hdr@pipe-a-edp-1-xrgb2101010:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#7915]) +1 other test skip
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_hdr@brightness-with-hdr@pipe-a-edp-1-xrgb2101010.html

  * igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [PASS][61] -> [SKIP][62] ([Intel XE#7915]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-2/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_hdr@static-swap@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-bmg:          NOTRUN -> [SKIP][63] ([Intel XE#6901])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier:
    - shard-lnl:          NOTRUN -> [SKIP][64] ([Intel XE#7283])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_plane@pixel-format-4-tiled-mtl-mc-ccs-modifier.html

  * igt@kms_plane@pixel-format-yf-tiled-modifier:
    - shard-bmg:          NOTRUN -> [SKIP][65] ([Intel XE#7283])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_plane@pixel-format-yf-tiled-modifier.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][66] ([Intel XE#5021] / [Intel XE#7377])
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b:
    - shard-bmg:          NOTRUN -> [SKIP][67] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-b.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-bmg:          NOTRUN -> [SKIP][68] ([Intel XE#2938] / [Intel XE#7376])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-9/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-bmg:          NOTRUN -> [SKIP][69] ([Intel XE#3309] / [Intel XE#7368])
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_dc@deep-pkgc:
    - shard-bmg:          NOTRUN -> [SKIP][70] ([Intel XE#2505] / [Intel XE#7447])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_pm_dc@deep-pkgc.html

  * igt@kms_pm_rpm@dpms-mode-unset-lpsp:
    - shard-bmg:          NOTRUN -> [SKIP][71] ([Intel XE#1439] / [Intel XE#7402] / [Intel XE#836])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html

  * igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
    - shard-lnl:          NOTRUN -> [SKIP][72] ([Intel XE#1439] / [Intel XE#7402] / [Intel XE#836])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][74] ([Intel XE#2893] / [Intel XE#7304])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf:
    - shard-bmg:          NOTRUN -> [SKIP][75] ([Intel XE#1489]) +5 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-bmg:          NOTRUN -> [SKIP][76] ([Intel XE#2387] / [Intel XE#7429])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-pr-cursor-plane-move:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#1406]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_psr@fbc-pr-cursor-plane-move.html

  * igt@kms_psr@psr-primary-page-flip:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#2234] / [Intel XE#2850]) +9 other tests skip
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_psr@psr-primary-page-flip.html

  * igt@kms_psr@psr2-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][79] ([Intel XE#2234])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_psr@psr2-primary-render.html

  * igt@kms_rotation_crc@bad-tiling:
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) +2 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@kms_rotation_crc@bad-tiling.html

  * igt@kms_rotation_crc@primary-rotation-270:
    - shard-bmg:          NOTRUN -> [SKIP][81] ([Intel XE#3904] / [Intel XE#7342])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-9/igt@kms_rotation_crc@primary-rotation-270.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#2330] / [Intel XE#5813]) +1 other test skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#1435]) +1 other test skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@kms_sharpness_filter@invalid-plane-with-filter:
    - shard-bmg:          NOTRUN -> [SKIP][84] ([Intel XE#6503]) +1 other test skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_sharpness_filter@invalid-plane-with-filter.html

  * igt@kms_vrr@max-min:
    - shard-bmg:          NOTRUN -> [SKIP][85] ([Intel XE#1499]) +1 other test skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@kms_vrr@max-min.html

  * igt@xe_compute@ccs-mode-compute-kernel:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#1447] / [Intel XE#7469])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_compute@ccs-mode-compute-kernel.html

  * igt@xe_drm_fdinfo@parallel-utilization-single-idle:
    - shard-bmg:          [PASS][87] -> [SKIP][88] ([Intel XE#6557] / [Intel XE#6703])
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@xe_drm_fdinfo@parallel-utilization-single-idle.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@xe_drm_fdinfo@parallel-utilization-single-idle.html

  * igt@xe_eudebug@basic-connect:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#7636]) +3 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_eudebug@basic-connect.html

  * igt@xe_eudebug_online@resume-one:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#7636]) +9 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@xe_eudebug_online@resume-one.html

  * igt@xe_evict@evict-large-cm:
    - shard-lnl:          NOTRUN -> [SKIP][91] ([Intel XE#6540] / [Intel XE#688]) +1 other test skip
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_evict@evict-large-cm.html

  * igt@xe_exec_balancer@twice-virtual-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][92] ([Intel XE#7482]) +5 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_exec_balancer@twice-virtual-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#2322] / [Intel XE#7372]) +5 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#1392]) +1 other test skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][95] ([Intel XE#7136]) +12 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_exec_fault_mode@many-execqueues-multi-queue-userptr.html

  * igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-prefetch:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#7136]) +3 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_exec_fault_mode@twice-multi-queue-userptr-invalidate-prefetch.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-close-fd-smem:
    - shard-lnl:          NOTRUN -> [SKIP][97] ([Intel XE#6874]) +6 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_exec_multi_queue@one-queue-preempt-mode-close-fd-smem.html

  * igt@xe_exec_multi_queue@two-queues-priority:
    - shard-bmg:          NOTRUN -> [SKIP][98] ([Intel XE#6874]) +24 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_exec_multi_queue@two-queues-priority.html

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#7866]) +2 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_exec_reset@cm-multi-queue-gt-reset.html

  * igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][100] ([Intel XE#7138]) +2 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][101] ([Intel XE#7138]) +6 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@xe_exec_threads@threads-multi-queue-mixed-userptr-rebind.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-basic:
    - shard-lnl:          NOTRUN -> [SKIP][102] ([Intel XE#6964])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_multigpu_svm@mgpu-atomic-op-basic.html

  * igt@xe_multigpu_svm@mgpu-migration-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][103] ([Intel XE#6964]) +2 other tests skip
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_multigpu_svm@mgpu-migration-prefetch.html

  * igt@xe_non_msix@walker-interrupt-notification-non-msix:
    - shard-bmg:          NOTRUN -> [SKIP][104] ([Intel XE#7622])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@xe_non_msix@walker-interrupt-notification-non-msix.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][105] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_page_reclaim@many-vma-same-bo:
    - shard-bmg:          NOTRUN -> [SKIP][106] ([Intel XE#7793]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_page_reclaim@many-vma-same-bo.html

  * igt@xe_page_reclaim@prl-max-entries:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#7793])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_page_reclaim@prl-max-entries.html

  * igt@xe_pat@pat-index-xelp:
    - shard-bmg:          NOTRUN -> [SKIP][108] ([Intel XE#2245] / [Intel XE#7590])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@xe_pat@pat-index-xelp.html

  * igt@xe_pm@d3cold-basic:
    - shard-lnl:          NOTRUN -> [SKIP][109] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_pm@d3cold-basic.html

  * igt@xe_pm@d3cold-i2c:
    - shard-bmg:          NOTRUN -> [SKIP][110] ([Intel XE#5694] / [Intel XE#7370])
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-6/igt@xe_pm@d3cold-i2c.html

  * igt@xe_pm@d3cold-mocs:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#2284] / [Intel XE#7370]) +2 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pm@s3-basic:
    - shard-lnl:          NOTRUN -> [SKIP][112] ([Intel XE#584] / [Intel XE#7369])
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_pm@s3-basic.html

  * igt@xe_pm@vram-d3cold-threshold:
    - shard-lnl:          NOTRUN -> [SKIP][113] ([Intel XE#579] / [Intel XE#7329] / [Intel XE#7456])
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_pm@vram-d3cold-threshold.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-bmg:          NOTRUN -> [SKIP][114] ([Intel XE#4733] / [Intel XE#7417]) +2 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_query@multigpu-query-cs-cycles:
    - shard-bmg:          NOTRUN -> [SKIP][115] ([Intel XE#944])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@xe_query@multigpu-query-cs-cycles.html

  * igt@xe_query@multigpu-query-topology-l3-bank-mask:
    - shard-lnl:          NOTRUN -> [SKIP][116] ([Intel XE#944])
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_query@multigpu-query-topology-l3-bank-mask.html

  * igt@xe_sriov_auto_provisioning@fair-allocation:
    - shard-lnl:          NOTRUN -> [SKIP][117] ([Intel XE#4130] / [Intel XE#7366])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-lnl-7/igt@xe_sriov_auto_provisioning@fair-allocation.html

  * igt@xe_wedged@wedged-mode-toggle:
    - shard-bmg:          NOTRUN -> [ABORT][118] ([Intel XE#7914])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@xe_wedged@wedged-mode-toggle.html

  
#### Possible fixes ####

  * igt@kms_atomic_transition@plane-all-transition-nonblocking:
    - shard-bmg:          [INCOMPLETE][119] ([Intel XE#7961]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition-nonblocking.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_atomic_transition@plane-all-transition-nonblocking.html

  * igt@kms_atomic_transition@plane-all-transition-nonblocking@pipe-b-hdmi-a-3:
    - shard-bmg:          [INCOMPLETE][121] ([Intel XE#6819] / [Intel XE#7961]) -> [PASS][122]
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-3/igt@kms_atomic_transition@plane-all-transition-nonblocking@pipe-b-hdmi-a-3.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_atomic_transition@plane-all-transition-nonblocking@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-bmg:          [INCOMPLETE][123] ([Intel XE#7084]) -> [PASS][124] +1 other test pass
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [INCOMPLETE][125] -> [PASS][126] +1 other test pass
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@torture-bo:
    - shard-bmg:          [INCOMPLETE][127] ([Intel XE#6819]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-2/igt@kms_cursor_legacy@torture-bo.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_cursor_legacy@torture-bo.html

  * igt@kms_cursor_legacy@torture-bo@pipe-a:
    - shard-bmg:          [DMESG-WARN][129] ([Intel XE#6819]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-2/igt@kms_cursor_legacy@torture-bo@pipe-a.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_cursor_legacy@torture-bo@pipe-a.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3:
    - shard-bmg:          [FAIL][131] ([Intel XE#3321]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-5/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bd-dp2-hdmi-a3.html

  * igt@kms_hdr@invalid-hdr:
    - shard-bmg:          [SKIP][133] ([Intel XE#1503]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-10/igt@kms_hdr@invalid-hdr.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-8/igt@kms_hdr@invalid-hdr.html

  * igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
    - shard-bmg:          [SKIP][135] ([Intel XE#7922]) -> [PASS][136] +1 other test pass
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-10/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-8/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html

  * igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f:
    - shard-bmg:          [SKIP][137] ([Intel XE#7915]) -> [PASS][138] +3 other tests pass
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-8/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-4/igt@kms_hdr@static-toggle@pipe-a-hdmi-a-3-xrgb16161616f.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][139] ([Intel XE#6321]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-5/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-1/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  
#### Warnings ####

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
    - shard-bmg:          [SKIP][141] ([Intel XE#1124]) -> [SKIP][142] ([Intel XE#6703]) +2 other tests skip
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
    - shard-bmg:          [SKIP][143] ([Intel XE#2887]) -> [SKIP][144] ([Intel XE#6703])
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-bmg:          [SKIP][145] ([Intel XE#2252]) -> [SKIP][146] ([Intel XE#6703]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_chamelium_hpd@dp-hpd-storm.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_content_protection@lic-type-0-hdcp14:
    - shard-bmg:          [FAIL][147] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) -> [SKIP][148] ([Intel XE#6703])
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_content_protection@lic-type-0-hdcp14.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_content_protection@lic-type-0-hdcp14.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          [SKIP][149] ([Intel XE#4354] / [Intel XE#5870]) -> [SKIP][150] ([Intel XE#6703])
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_dp_link_training@uhbr-sst.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-bmg:          [SKIP][151] ([Intel XE#7178] / [Intel XE#7351]) -> [SKIP][152] ([Intel XE#6703])
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw:
    - shard-bmg:          [SKIP][153] ([Intel XE#2311]) -> [SKIP][154] ([Intel XE#6703]) +5 other tests skip
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
    - shard-bmg:          [SKIP][155] ([Intel XE#4141]) -> [SKIP][156] ([Intel XE#6703]) +1 other test skip
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-bmg:          [SKIP][157] ([Intel XE#2313]) -> [SKIP][158] ([Intel XE#6703]) +5 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-shrfb-draw-blt.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-argb161616f-draw-render:
    - shard-bmg:          [SKIP][159] ([Intel XE#7061] / [Intel XE#7356]) -> [SKIP][160] ([Intel XE#6703])
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-render.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-render.html

  * igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping:
    - shard-bmg:          [SKIP][161] ([Intel XE#7283]) -> [SKIP][162] ([Intel XE#6703]) +1 other test skip
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-dg2-rc-ccs-cc-modifier-source-clamping.html

  * igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
    - shard-bmg:          [SKIP][163] ([Intel XE#1489]) -> [SKIP][164] ([Intel XE#6703])
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html

  * igt@kms_psr@psr-sprite-plane-move:
    - shard-bmg:          [SKIP][165] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][166] ([Intel XE#6703])
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_psr@psr-sprite-plane-move.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_psr@psr-sprite-plane-move.html

  * igt@kms_sharpness_filter@invalid-filter-with-plane:
    - shard-bmg:          [SKIP][167] ([Intel XE#6503]) -> [SKIP][168] ([Intel XE#6703])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_sharpness_filter@invalid-filter-with-plane.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_sharpness_filter@invalid-filter-with-plane.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [FAIL][169] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][170] ([Intel XE#2426] / [Intel XE#5848])
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-suspend:
    - shard-bmg:          [SKIP][171] ([Intel XE#1499]) -> [SKIP][172] ([Intel XE#6703])
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@kms_vrr@flip-suspend.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@kms_vrr@flip-suspend.html

  * igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram:
    - shard-bmg:          [SKIP][173] ([Intel XE#7636]) -> [SKIP][174] ([Intel XE#6703]) +2 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@xe_eudebug_online@writes-caching-sram-bb-vram-target-vram.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
    - shard-bmg:          [SKIP][175] ([Intel XE#2322] / [Intel XE#7372]) -> [SKIP][176] ([Intel XE#6703])
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html

  * igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-basic-smem:
    - shard-bmg:          [SKIP][177] ([Intel XE#6874]) -> [SKIP][178] ([Intel XE#6703]) +1 other test skip
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-basic-smem.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-basic-smem.html

  * igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind:
    - shard-bmg:          [SKIP][179] ([Intel XE#7138]) -> [SKIP][180] ([Intel XE#6703])
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795/shard-bmg-7/igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-cm-fd-rebind.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
  [Intel XE#1468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1468
  [Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
  [Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
  [Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
  [Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5694]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5694
  [Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5870
  [Intel XE#5882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5882
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#6126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6126
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
  [Intel XE#6779]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6779
  [Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
  [Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7136
  [Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7312
  [Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
  [Intel XE#7329]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7329
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7361
  [Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
  [Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
  [Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
  [Intel XE#7377]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7377
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
  [Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389
  [Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
  [Intel XE#7396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7396
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7402]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7402
  [Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
  [Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
  [Intel XE#7429]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7429
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7447
  [Intel XE#7449]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7449
  [Intel XE#7456]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7456
  [Intel XE#7469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7469
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7622]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7622
  [Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7866
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#7914]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7914
  [Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
  [Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
  [Intel XE#7961]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7961
  [Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944


Build changes
-------------

  * Linux: xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795 -> xe-pw-160482v5

  IGT_8903: 6f88532e2fe22529195cc2f8cabff93d994688f8 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-5043-0ce1c813197dfbe15ff14143da97ec11161e1795: 0ce1c813197dfbe15ff14143da97ec11161e1795
  xe-pw-160482v5: 160482v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-160482v5/index.html

[-- Attachment #2: Type: text/html, Size: 66495 bytes --]

Re: [PATCH v5 02/14] drm/xe/xe_sysctrl: Make sysctrl flood limit reusable

[Mallesh, Koujalagi]

Hi Riana,

On 11-05-2026 10:59 pm, Riana Tauro wrote:
> The sysctrl command flood limit was defined in an event specific header,
> restricting its usage to event handling. Move it to the shared header
> with a generic name so it can be re-used across all files
> using system controller commands.
>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_sysctrl_event.c         | 2 +-
>   drivers/gpu/drm/xe/xe_sysctrl_event_types.h   | 2 +-
>   drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h | 3 +++
>   3 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event.c b/drivers/gpu/drm/xe/xe_sysctrl_event.c
> index b4d17329af6c..faf6ba89ce98 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_event.c
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_event.c
> @@ -16,7 +16,7 @@ static void get_pending_event(struct xe_sysctrl *sc, struct xe_sysctrl_mailbox_c
>   {
>   	struct xe_sysctrl_event_response *response = command->data_out;
>   	struct xe_device *xe = sc_to_xe(sc);
> -	u32 count = XE_SYSCTRL_EVENT_FLOOD;
> +	u32 count = XE_SYSCTRL_FLOOD;
>   	size_t len;
>   	int ret;
>   
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
> index c16c66b9fa7f..d236e22fe9dd 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_event_types.h
> @@ -11,7 +11,7 @@
>   #define XE_SYSCTRL_EVENT_DATA_LEN		59
>   
>   /* Modify as needed */
> -#define XE_SYSCTRL_EVENT_FLOOD			16
> +#define XE_SYSCTRL_FLOOD			16
>   
>   /**
>    * enum xe_sysctrl_event - Events reported by System Controller
> diff --git a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> index 84d7c647e743..0fa786a9e8c8 100644
> --- a/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> +++ b/drivers/gpu/drm/xe/xe_sysctrl_mailbox_types.h
> @@ -48,6 +48,9 @@ struct xe_sysctrl_mailbox_command {
>   	size_t data_out_len;
>   };
>   
> +/* Modify as needed */
> +#define XE_SYSCTRL_FLOOD			16

The XE_SYSCTRL_FLOOD definition appears in two files. This is like keeping
two copies of the same information - if we need to change it later, we might
forget to update both places and cause problems. Let's move it to one shared
location so there's only one place to maintain it.

Thanks,
-/Mallesh

> +
>   #define XE_SYSCTRL_MB_FRAME_SIZE	16
>   #define XE_SYSCTRL_MB_MAX_FRAMES	64
>   #define XE_SYSCTRL_MB_MAX_MESSAGE_SIZE	\

Re: [PATCH v5 03/14] drm/xe/xe_pci_error: Implement PCI error recovery callbacks

[Mallesh, Koujalagi]

On 11-05-2026 10:59 pm, Riana Tauro wrote:
> Add error_detected, mmio_enabled, slot_reset and resume recovery callbacks
> to handle PCIe Advanced Error Reporting (AER) errors.
>
> For fatal errors, the device is wedged and becomes inaccessible. Return
> PCI_ERS_RESULT_SLOT_RESET from error_detected to request a Secondary
> Bus Reset (SBR).
>
> For non-fatal errors, return PCI_ERS_RESULT_CAN_RECOVER from
> error_detected to trigger the mmio_enabled callback. In this callback, the
> device is queried to determine the error cause and attempt recovery based
> on the error type.
>
> Once the secondary bus reset(SBR) is completed the slot_reset callback
> cleanly removes and reprobe the device to restore functionality.
>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
LGTM,
Reviewed-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
> ---
> v2: re-order linux headers
>      reword error messages
>      do not clear in_recovery after remove
>      return PCI_ERS_RESULT_DISCONNECT if probe fails (Michal)
>      only wedge device do not send uevent (Raag)
>      set recovery flag in error_detected and clear on resume
>      add default switch case (Mallesh)
>
> v3: do not set in_recovery for disconnect (Mallesh)
>      return if already wedged or in survivability mode
>
> v4: Add comment (Matthew)
>      Fix tab (Mallesh)
>
> v5: remove in_reset
>      disconnect if already in survivability mode or wedged
>      block I/O operations in slot reset (Raag)
>
> Note: The re-probe in this patch will be replaced by
> minimal re-initalization once below patch is merged
>   https://lore.kernel.org/intel-xe/f642453c-f657-41c7-a01b-5a0baf886cd3@intel.com/
>
> ---
>   drivers/gpu/drm/xe/Makefile       |   1 +
>   drivers/gpu/drm/xe/xe_pci.c       |   3 +
>   drivers/gpu/drm/xe/xe_pci_error.c | 115 ++++++++++++++++++++++++++++++
>   3 files changed, 119 insertions(+)
>   create mode 100644 drivers/gpu/drm/xe/xe_pci_error.c
>
> diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
> index 09661f079d03..091872771e98 100644
> --- a/drivers/gpu/drm/xe/Makefile
> +++ b/drivers/gpu/drm/xe/Makefile
> @@ -101,6 +101,7 @@ xe-y += xe_bb.o \
>   	xe_page_reclaim.o \
>   	xe_pat.o \
>   	xe_pci.o \
> +	xe_pci_error.o \
>   	xe_pci_rebar.o \
>   	xe_pcode.o \
>   	xe_pm.o \
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index d55e5af4f4b7..d970c27f5570 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -1320,6 +1320,8 @@ static const struct dev_pm_ops xe_pm_ops = {
>   };
>   #endif
>   
> +extern const struct pci_error_handlers xe_pci_error_handlers;
> +
>   static struct pci_driver xe_pci_driver = {
>   	.name = DRIVER_NAME,
>   	.id_table = pciidlist,
> @@ -1327,6 +1329,7 @@ static struct pci_driver xe_pci_driver = {
>   	.remove = xe_pci_remove,
>   	.shutdown = xe_pci_shutdown,
>   	.sriov_configure = xe_pci_sriov_configure,
> +	.err_handler = &xe_pci_error_handlers,
>   #ifdef CONFIG_PM_SLEEP
>   	.driver.pm = &xe_pm_ops,
>   #endif
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> new file mode 100644
> index 000000000000..42a821ca1a04
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -0,0 +1,115 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2026 Intel Corporation
> + */
> +#include <linux/pci.h>
> +
> +#include <drm/drm_drv.h>
> +
> +#include "xe_device.h"
> +#include "xe_gt.h"
> +#include "xe_pci.h"
> +#include "xe_survivability_mode.h"
> +#include "xe_uc.h"
> +
> +static void xe_pci_error_handling(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +	struct xe_gt *gt;
> +	u8 id;
> +
> +	/*
> +	 * Wedge the device to prevent userspace access but don't send the event yet.
> +	 * Runtime PM ref is taken by PCI core for the duration of error handling.
> +	 */
> +	atomic_set(&xe->wedged.flag, 1);
> +
> +	for_each_gt(gt, xe, id)
> +		xe_gt_declare_wedged(gt);
> +
> +	pci_disable_device(pdev);
> +}
> +
> +static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +
> +	dev_err(&pdev->dev, "Xe Pci error recovery: error detected state %d\n", state);
> +
> +	if (state == pci_channel_io_perm_failure)
> +		return PCI_ERS_RESULT_DISCONNECT;
> +
> +	/* If the device is already wedged or in survivability mode, do not attempt recovery */
> +	if (xe_survivability_mode_is_boot_enabled(xe) || xe_device_wedged(xe))
> +		return PCI_ERS_RESULT_DISCONNECT;
> +
> +	switch (state) {
> +	case pci_channel_io_normal:
> +		return PCI_ERS_RESULT_CAN_RECOVER;
> +	case pci_channel_io_frozen:
> +		xe_pci_error_handling(pdev);
> +		return PCI_ERS_RESULT_NEED_RESET;
> +	default:
> +		dev_err(&pdev->dev, "Unknown state %d\n", state);
> +		return PCI_ERS_RESULT_NEED_RESET;
> +	}
> +}
> +
> +static pci_ers_result_t xe_pci_error_mmio_enabled(struct pci_dev *pdev)
> +{
> +	dev_err(&pdev->dev, "Xe Pci error recovery: MMIO enabled\n");
> +
> +	return PCI_ERS_RESULT_NEED_RESET;
> +}
> +
> +static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
> +{
> +	const struct pci_device_id *ent = pci_match_id(pdev->driver->id_table, pdev);
> +	struct xe_device *xe;
> +
> +	dev_err(&pdev->dev, "Xe Pci error recovery: Slot reset\n");
> +
> +	pci_restore_state(pdev);
> +
> +	if (pci_enable_device(pdev)) {
> +		dev_err(&pdev->dev,
> +			"Cannot re-enable PCI device after reset\n");
> +		return PCI_ERS_RESULT_DISCONNECT;
> +	}
> +
> +	/*
> +	 * Secondary Bus Reset causes all VRAM state to be lost along with
> +	 * hardware state. As an initial step, re-probe the device to
> +	 * re-initialize the driver and hardware.
> +	 * TODO: optimize by re-initializing only the hardware state and re-creating
> +	 * kernel BOs.
> +	 */
> +	pdev->driver->remove(pdev);
> +
> +	if (pdev->driver->probe(pdev, ent))
> +		return PCI_ERS_RESULT_DISCONNECT;
> +
> +	xe = pdev_to_xe_device(pdev);
> +
> +	/* Wedge the device to prevent I/O operations till the resume callback */
> +	atomic_set(&xe->wedged.flag, 1);
> +
> +	return PCI_ERS_RESULT_RECOVERED;
> +}
> +
> +static void xe_pci_error_resume(struct pci_dev *pdev)
> +{
> +	struct xe_device *xe = pdev_to_xe_device(pdev);
> +
> +	dev_info(&pdev->dev, "Xe Pci error recovery: Recovered\n");
> +
> +	/* Resume I/O operations */
> +	atomic_set(&xe->wedged.flag, 0);
> +}
> +
> +const struct pci_error_handlers xe_pci_error_handlers = {
> +	.error_detected	= xe_pci_error_detected,
> +	.mmio_enabled	= xe_pci_error_mmio_enabled,
> +	.slot_reset	= xe_pci_error_slot_reset,
> +	.resume		= xe_pci_error_resume,
> +};

Re: [PATCH v5 06/14] drm/xe/xe_ras: Initialize Uncorrectable AER Registers

[Raag Jadav]

On Mon, May 11, 2026 at 10:59:13PM +0530, Riana Tauro wrote:
> Uncorrectable errors from different endpoints in the device are steered to
> the USP(Upstream Switch Port) which is a PCI Advanced Error Reporting (AER)
> Compliant device. Downgrade all the errors to non-fatal to prevent PCIe
> bus driver from triggering a Secondary Bus Reset (SBR). This allows error
> detection, containment and recovery in the driver.
> 
> The Uncorrectable Error Severity Register has the 'Uncorrectable
> Internal Error Severity' set to fatal by default. Set this to
> non-fatal and unmask the error.
> 
> Signed-off-by: Riana Tauro <riana.tauro@intel.com>
> ---
> v2: clear stale uncorrectable internal status in status register
> (Aravind)
> 
> v3: abbrevate TLA's (Raag)
>     add a info message if USP does not support AER
> 
> v4: add a success log (Raag)
> ---
>  drivers/gpu/drm/xe/xe_device.c |  3 ++
>  drivers/gpu/drm/xe/xe_ras.c    | 78 ++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_ras.h    |  2 +-
>  3 files changed, 82 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 4b45b617a039..200d6bbb1b70 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -62,6 +62,7 @@
>  #include "xe_psmi.h"
>  #include "xe_pxp.h"
>  #include "xe_query.h"
> +#include "xe_ras.h"
>  #include "xe_shrinker.h"
>  #include "xe_soc_remapper.h"
>  #include "xe_survivability_mode.h"
> @@ -1048,6 +1049,8 @@ int xe_device_probe(struct xe_device *xe)
>  	if (err)
>  		goto err_unregister_display;
>  
> +	xe_ras_init(xe);
> +
>  	err = xe_device_sysfs_init(xe);
>  	if (err)
>  		goto err_unregister_display;
> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
> index 4cb16b419b0c..24642c309967 100644
> --- a/drivers/gpu/drm/xe/xe_ras.c
> +++ b/drivers/gpu/drm/xe/xe_ras.c
> @@ -91,3 +91,81 @@ void xe_ras_counter_threshold_crossed(struct xe_device *xe,
>  			comp_to_str(component), sev_to_str(severity));
>  	}
>  }
> +
> +#ifdef CONFIG_PCIEAER

I think all the PCI stuff should be part of xe_pci_error.c but I'll leave
it to you all.

Raag

> +static void aer_unmask_and_downgrade_internal_error(struct xe_device *xe)
> +{
> +	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
> +	struct pci_dev *vsp, *usp;
> +	u32 aer_uncorr_mask, aer_uncorr_sev, aer_uncorr_status;
> +	u16 aer_cap;
> +
> +	/*
> +	 * Device Hierarchy:
> +	 *
> +	 * Upstream Switch Port (USP)--> Virtual Switch Port (VSP)--> SGunit (GPU endpoint)
> +	 */
> +	vsp = pci_upstream_bridge(pdev);
> +	if (!vsp)
> +		return;
> +
> +	usp = pci_upstream_bridge(vsp);
> +	if (!usp)
> +		return;
> +
> +	aer_cap = usp->aer_cap;
> +
> +	if (!aer_cap) {
> +		dev_info(&usp->dev, "USP doesn't support AER capability\n");
> +		return;
> +	}
> +
> +	/*
> +	 * Clear any stale Uncorrectable Internal Error Status event in Uncorrectable Error
> +	 * Status Register.
> +	 */
> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, &aer_uncorr_status);
> +	if (aer_uncorr_status & PCI_ERR_UNC_INTN)
> +		pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_INTN);
> +
> +	/*
> +	 * All errors are steered to USP which is a PCIe AER Compliant device.
> +	 * Downgrade all the errors to non-fatal to prevent PCIe bus driver
> +	 * from triggering a Secondary Bus Reset (SBR). This allows error
> +	 * detection, containment and recovery in the driver.
> +	 *
> +	 * The Uncorrectable Error Severity Register has the 'Uncorrectable
> +	 * Internal Error Severity' set to fatal by default. Set this to
> +	 * non-fatal and unmask the error.
> +	 */
> +
> +	/* Initialize Uncorrectable Error Severity Register */
> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, &aer_uncorr_sev);
> +	aer_uncorr_sev &= ~PCI_ERR_UNC_INTN;
> +	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_SEVER, aer_uncorr_sev);
> +
> +	/* Initialize Uncorrectable Error Mask Register */
> +	pci_read_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, &aer_uncorr_mask);
> +	aer_uncorr_mask &= ~PCI_ERR_UNC_INTN;
> +	pci_write_config_dword(usp, aer_cap + PCI_ERR_UNCOR_MASK, aer_uncorr_mask);
> +
> +	pci_save_state(usp);
> +	dev_dbg(&usp->dev, "Uncorrectable Internal Errors downgraded and unmasked\n");
> +}
> +#endif
> +
> +/**
> + * xe_ras_init - Initialize Xe RAS
> + * @xe: xe device instance
> + *
> + * Initialize Xe RAS
> + */
> +void xe_ras_init(struct xe_device *xe)
> +{
> +	if (!xe->info.has_sysctrl || IS_SRIOV_VF(xe))
> +		return;
> +
> +#ifdef CONFIG_PCIEAER
> +	aer_unmask_and_downgrade_internal_error(xe);
> +#endif
> +}
> diff --git a/drivers/gpu/drm/xe/xe_ras.h b/drivers/gpu/drm/xe/xe_ras.h
> index ea90593b62dc..a88ea0a46766 100644
> --- a/drivers/gpu/drm/xe/xe_ras.h
> +++ b/drivers/gpu/drm/xe/xe_ras.h
> @@ -11,5 +11,5 @@ struct xe_sysctrl_event_response;
>  
>  void xe_ras_counter_threshold_crossed(struct xe_device *xe,
>  				      struct xe_sysctrl_event_response *response);
> -
> +void xe_ras_init(struct xe_device *xe);
>  #endif
> -- 
> 2.47.1
>