* [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
@ 2026-05-15 8:24 Suraj Kandpal
2026-05-15 10:21 ` Jani Nikula
` (2 more replies)
0 siblings, 3 replies; 22+ messages in thread
From: Suraj Kandpal @ 2026-05-15 8:24 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
Starting with display version 30, the per-pipe frame timestamp is read
from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the display
and select the appropriate register based on DISPLAY_VER(), and update
all callers (intel_vblank, intel_initial_plane) accordingly.
Bspec: 79482
WA: 14022946399
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_regs.h | 7 +++++--
drivers/gpu/drm/i915/display/intel_initial_plane.c | 4 ++--
drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
index 4321f8b529da..579f802215d3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
@@ -3149,8 +3149,11 @@ enum skl_power_gate {
/* g4x+, except vlv/chv! */
#define _PIPE_FRMTMSTMP_A 0x70048
#define _PIPE_FRMTMSTMP_B 0x71048
-#define PIPE_FRMTMSTMP(pipe) \
- _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B)
+#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
+#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
+#define PIPE_FRMTMSTMP(display, pipe) (DISPLAY_VER(display) >= 30 ? \
+ _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A, _PIPEDMC_FRMTMSTMP_B) : \
+ _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B))
/* g4x+, except vlv/chv! */
#define _PIPE_FLIPTMSTMP_A 0x7004C
diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c b/drivers/gpu/drm/i915/display/intel_initial_plane.c
index 034fe199c2a1..004cbdb6be32 100644
--- a/drivers/gpu/drm/i915/display/intel_initial_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c
@@ -34,9 +34,9 @@ void intel_initial_plane_vblank_wait(struct intel_crtc *crtc)
return;
}
- start_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe));
+ start_ts = intel_de_read(display, PIPE_FRMTMSTMP(display, crtc->pipe));
- ret = poll_timeout_us(end_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe)),
+ ret = poll_timeout_us(end_ts = intel_de_read(display, PIPE_FRMTMSTMP(display, crtc->pipe)),
end_ts != start_ts, 1000, 1000 * 1000, false);
if (ret)
drm_warn(display->drm, "[CRTC:%d:%s] early vblank wait timed out\n",
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 28d81199792e..52ff47936f9e 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -157,7 +157,7 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
* is sampled at every start of vertical blank.
*/
scan_prev_time = intel_de_read_fw(display,
- PIPE_FRMTMSTMP(crtc->pipe));
+ PIPE_FRMTMSTMP(display, crtc->pipe));
/*
* The TIMESTAMP_CTR register has the current
@@ -166,7 +166,7 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR);
scan_post_time = intel_de_read_fw(display,
- PIPE_FRMTMSTMP(crtc->pipe));
+ PIPE_FRMTMSTMP(display, crtc->pipe));
} while (scan_post_time != scan_prev_time);
return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-15 8:24 [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
@ 2026-05-15 10:21 ` Jani Nikula
2026-05-15 15:04 ` Kandpal, Suraj
2026-05-15 14:55 ` Gustavo Sousa
2026-05-17 2:45 ` Suraj Kandpal
2 siblings, 1 reply; 22+ messages in thread
From: Jani Nikula @ 2026-05-15 10:21 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal, ville.syrjala
On Fri, 15 May 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Starting with display version 30, the per-pipe frame timestamp is read
> from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
> legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the display
> and select the appropriate register based on DISPLAY_VER(), and update
> all callers (intel_vblank, intel_initial_plane) accordingly.
>
> Bspec: 79482
> WA: 14022946399
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_regs.h | 7 +++++--
> drivers/gpu/drm/i915/display/intel_initial_plane.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
> 3 files changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 4321f8b529da..579f802215d3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -3149,8 +3149,11 @@ enum skl_power_gate {
> /* g4x+, except vlv/chv! */
> #define _PIPE_FRMTMSTMP_A 0x70048
> #define _PIPE_FRMTMSTMP_B 0x71048
> -#define PIPE_FRMTMSTMP(pipe) \
> - _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B)
> +#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
> +#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
> +#define PIPE_FRMTMSTMP(display, pipe) (DISPLAY_VER(display) >= 30 ? \
> + _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A, _PIPEDMC_FRMTMSTMP_B) : \
> + _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B))
I'm wondering if we want to hide this difference inside the register
macro, though.
Yes, it's the easy thing to do.
But PIPEDMC registers belong in intel_dmc_regs.h, and it's a bit
questionable to have something that looks like PIPE_FRMTMSTMP() suddenly
end up being PIPMEDMC_FRMTMSTMP.
BR,
Jani.
PS. It's absolutely disgusting that this is named "FRMTMSTMP" in
bspec. Vowels exist for a reason.
>
> /* g4x+, except vlv/chv! */
> #define _PIPE_FLIPTMSTMP_A 0x7004C
> diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> index 034fe199c2a1..004cbdb6be32 100644
> --- a/drivers/gpu/drm/i915/display/intel_initial_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> @@ -34,9 +34,9 @@ void intel_initial_plane_vblank_wait(struct intel_crtc *crtc)
> return;
> }
>
> - start_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe));
> + start_ts = intel_de_read(display, PIPE_FRMTMSTMP(display, crtc->pipe));
>
> - ret = poll_timeout_us(end_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe)),
> + ret = poll_timeout_us(end_ts = intel_de_read(display, PIPE_FRMTMSTMP(display, crtc->pipe)),
> end_ts != start_ts, 1000, 1000 * 1000, false);
> if (ret)
> drm_warn(display->drm, "[CRTC:%d:%s] early vblank wait timed out\n",
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 28d81199792e..52ff47936f9e 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -157,7 +157,7 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> * is sampled at every start of vertical blank.
> */
> scan_prev_time = intel_de_read_fw(display,
> - PIPE_FRMTMSTMP(crtc->pipe));
> + PIPE_FRMTMSTMP(display, crtc->pipe));
>
> /*
> * The TIMESTAMP_CTR register has the current
> @@ -166,7 +166,7 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR);
>
> scan_post_time = intel_de_read_fw(display,
> - PIPE_FRMTMSTMP(crtc->pipe));
> + PIPE_FRMTMSTMP(display, crtc->pipe));
> } while (scan_post_time != scan_prev_time);
>
> return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-15 8:24 [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
2026-05-15 10:21 ` Jani Nikula
@ 2026-05-15 14:55 ` Gustavo Sousa
2026-05-15 15:07 ` Kandpal, Suraj
2026-05-17 2:45 ` Suraj Kandpal
2 siblings, 1 reply; 22+ messages in thread
From: Gustavo Sousa @ 2026-05-15 14:55 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
Suraj Kandpal <suraj.kandpal@intel.com> writes:
> Starting with display version 30, the per-pipe frame timestamp is read
> from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
> legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the display
> and select the appropriate register based on DISPLAY_VER(), and update
> all callers (intel_vblank, intel_initial_plane) accordingly.
>
> Bspec: 79482
> WA: 14022946399
Why is this workaround being mentioned here?
If this is part of the workaround implementation, we should use the proper
display workaround infra (intel_display_wa.*) and we probably don't need
to add this commit trailer IMO.
Is the idea to use the PIPEDMC_FRMTMSTMP register as an alternative for
the workaround in display IPs that support such a register? If so, I
think this alternative will not apply to previous display versions,
right?
Another important question is: is this register updated even when the
DMC is not loaded?
--
Gustavo Sousa
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_regs.h | 7 +++++--
> drivers/gpu/drm/i915/display/intel_initial_plane.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
> 3 files changed, 9 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h b/drivers/gpu/drm/i915/display/intel_display_regs.h
> index 4321f8b529da..579f802215d3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> @@ -3149,8 +3149,11 @@ enum skl_power_gate {
> /* g4x+, except vlv/chv! */
> #define _PIPE_FRMTMSTMP_A 0x70048
> #define _PIPE_FRMTMSTMP_B 0x71048
> -#define PIPE_FRMTMSTMP(pipe) \
> - _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B)
> +#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
> +#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
> +#define PIPE_FRMTMSTMP(display, pipe) (DISPLAY_VER(display) >= 30 ? \
> + _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A, _PIPEDMC_FRMTMSTMP_B) : \
> + _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B))
>
> /* g4x+, except vlv/chv! */
> #define _PIPE_FLIPTMSTMP_A 0x7004C
> diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> index 034fe199c2a1..004cbdb6be32 100644
> --- a/drivers/gpu/drm/i915/display/intel_initial_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> @@ -34,9 +34,9 @@ void intel_initial_plane_vblank_wait(struct intel_crtc *crtc)
> return;
> }
>
> - start_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe));
> + start_ts = intel_de_read(display, PIPE_FRMTMSTMP(display, crtc->pipe));
>
> - ret = poll_timeout_us(end_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe)),
> + ret = poll_timeout_us(end_ts = intel_de_read(display, PIPE_FRMTMSTMP(display, crtc->pipe)),
> end_ts != start_ts, 1000, 1000 * 1000, false);
> if (ret)
> drm_warn(display->drm, "[CRTC:%d:%s] early vblank wait timed out\n",
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 28d81199792e..52ff47936f9e 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -157,7 +157,7 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> * is sampled at every start of vertical blank.
> */
> scan_prev_time = intel_de_read_fw(display,
> - PIPE_FRMTMSTMP(crtc->pipe));
> + PIPE_FRMTMSTMP(display, crtc->pipe));
>
> /*
> * The TIMESTAMP_CTR register has the current
> @@ -166,7 +166,7 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR);
>
> scan_post_time = intel_de_read_fw(display,
> - PIPE_FRMTMSTMP(crtc->pipe));
> + PIPE_FRMTMSTMP(display, crtc->pipe));
> } while (scan_post_time != scan_prev_time);
>
> return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
> --
> 2.34.1
^ permalink raw reply [flat|nested] 22+ messages in thread
* RE: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-15 10:21 ` Jani Nikula
@ 2026-05-15 15:04 ` Kandpal, Suraj
0 siblings, 0 replies; 22+ messages in thread
From: Kandpal, Suraj @ 2026-05-15 15:04 UTC (permalink / raw)
To: Jani Nikula, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R, ville.syrjala@linux.intel.com
> Subject: Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display
> ver >= 30
>
> On Fri, 15 May 2026, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> > Starting with display version 30, the per-pipe frame timestamp is read
> > from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
> > legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the
> > display and select the appropriate register based on DISPLAY_VER(),
> > and update all callers (intel_vblank, intel_initial_plane) accordingly.
> >
> > Bspec: 79482
> > WA: 14022946399
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_regs.h | 7 +++++--
> > drivers/gpu/drm/i915/display/intel_initial_plane.c | 4 ++--
> > drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
> > 3 files changed, 9 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > index 4321f8b529da..579f802215d3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > @@ -3149,8 +3149,11 @@ enum skl_power_gate {
> > /* g4x+, except vlv/chv! */
> > #define _PIPE_FRMTMSTMP_A 0x70048
> > #define _PIPE_FRMTMSTMP_B 0x71048
> > -#define PIPE_FRMTMSTMP(pipe) \
> > - _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B)
> > +#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
> > +#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
> > +#define PIPE_FRMTMSTMP(display, pipe) (DISPLAY_VER(display) >= 30 ?
> \
> > + _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A,
> _PIPEDMC_FRMTMSTMP_B) : \
> > + _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B))
>
> I'm wondering if we want to hide this difference inside the register macro,
> though.
>
> Yes, it's the easy thing to do.
>
> But PIPEDMC registers belong in intel_dmc_regs.h, and it's a bit questionable to
> have something that looks like PIPE_FRMTMSTMP() suddenly end up being
> PIPMEDMC_FRMTMSTMP.
True the reason I did it was to avoid all the if else cases everywhere this had been called.
Also helps make sure that this WA does not get lost in case someone at some point of time
decides to use PIPE_FRMTMSTMP() instead of PIPE_DMC_FRMTMSTMP().
Which makes me think if I do, choose to do the if -else way wherever this has been called.
I should perhaps add a comments in intel_display_regs.h stating to use PIPE_DMC_FRMTMSTMP() instead.
>
> BR,
> Jani.
>
>
> PS. It's absolutely disgusting that this is named "FRMTMSTMP" in bspec. Vowels
> exist for a reason.
Oh I absolutely agree. Its revolting to end up defining them like this too, to maintain consistency with Bspec.
Regards,
Suraj Kandpal
>
> >
> > /* g4x+, except vlv/chv! */
> > #define _PIPE_FLIPTMSTMP_A 0x7004C
> > diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > index 034fe199c2a1..004cbdb6be32 100644
> > --- a/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > @@ -34,9 +34,9 @@ void intel_initial_plane_vblank_wait(struct intel_crtc
> *crtc)
> > return;
> > }
> >
> > - start_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe));
> > + start_ts = intel_de_read(display, PIPE_FRMTMSTMP(display,
> > +crtc->pipe));
> >
> > - ret = poll_timeout_us(end_ts = intel_de_read(display,
> PIPE_FRMTMSTMP(crtc->pipe)),
> > + ret = poll_timeout_us(end_ts = intel_de_read(display,
> > +PIPE_FRMTMSTMP(display, crtc->pipe)),
> > end_ts != start_ts, 1000, 1000 * 1000, false);
> > if (ret)
> > drm_warn(display->drm, "[CRTC:%d:%s] early vblank wait
> timed
> > out\n", diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> > b/drivers/gpu/drm/i915/display/intel_vblank.c
> > index 28d81199792e..52ff47936f9e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > @@ -157,7 +157,7 @@ static u32
> intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> > * is sampled at every start of vertical blank.
> > */
> > scan_prev_time = intel_de_read_fw(display,
> > - PIPE_FRMTMSTMP(crtc-
> >pipe));
> > + PIPE_FRMTMSTMP(display,
> crtc->pipe));
> >
> > /*
> > * The TIMESTAMP_CTR register has the current @@ -166,7
> +166,7 @@
> > static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> > scan_curr_time = intel_de_read_fw(display,
> IVB_TIMESTAMP_CTR);
> >
> > scan_post_time = intel_de_read_fw(display,
> > - PIPE_FRMTMSTMP(crtc-
> >pipe));
> > + PIPE_FRMTMSTMP(display,
> crtc->pipe));
> > } while (scan_post_time != scan_prev_time);
> >
> > return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* RE: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-15 14:55 ` Gustavo Sousa
@ 2026-05-15 15:07 ` Kandpal, Suraj
0 siblings, 0 replies; 22+ messages in thread
From: Kandpal, Suraj @ 2026-05-15 15:07 UTC (permalink / raw)
To: Sousa, Gustavo, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R
> Subject: Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display
> ver >= 30
>
> Suraj Kandpal <suraj.kandpal@intel.com> writes:
>
> > Starting with display version 30, the per-pipe frame timestamp is read
> > from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
> > legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the
> > display and select the appropriate register based on DISPLAY_VER(),
> > and update all callers (intel_vblank, intel_initial_plane) accordingly.
> >
> > Bspec: 79482
> > WA: 14022946399
>
> Why is this workaround being mentioned here?
>
> If this is part of the workaround implementation, we should use the proper
> display workaround infra (intel_display_wa.*) and we probably don't need to
> add this commit trailer IMO.
>
> Is the idea to use the PIPEDMC_FRMTMSTMP register as an alternative for the
> workaround in display IPs that support such a register? If so, I think this
> alternative will not apply to previous display versions, right?
Sure will use the intel_display_wa framework
>
> Another important question is: is this register updated even when the DMC is
> not loaded?
Its actually does not, I have fixed the issue which will arise from this mainly in intel_inital_wait_for_vblank() and will refloat that in the next revision.
Regards,
Suraj Kandpal
>
> --
> Gustavo Sousa
>
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_regs.h | 7 +++++--
> > drivers/gpu/drm/i915/display/intel_initial_plane.c | 4 ++--
> > drivers/gpu/drm/i915/display/intel_vblank.c | 4 ++--
> > 3 files changed, 9 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > index 4321f8b529da..579f802215d3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_regs.h
> > @@ -3149,8 +3149,11 @@ enum skl_power_gate {
> > /* g4x+, except vlv/chv! */
> > #define _PIPE_FRMTMSTMP_A 0x70048
> > #define _PIPE_FRMTMSTMP_B 0x71048
> > -#define PIPE_FRMTMSTMP(pipe) \
> > - _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B)
> > +#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
> > +#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
> > +#define PIPE_FRMTMSTMP(display, pipe) (DISPLAY_VER(display) >= 30 ?
> \
> > + _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A,
> _PIPEDMC_FRMTMSTMP_B) : \
> > + _MMIO_PIPE(pipe, _PIPE_FRMTMSTMP_A, _PIPE_FRMTMSTMP_B))
> >
> > /* g4x+, except vlv/chv! */
> > #define _PIPE_FLIPTMSTMP_A 0x7004C
> > diff --git a/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > index 034fe199c2a1..004cbdb6be32 100644
> > --- a/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_initial_plane.c
> > @@ -34,9 +34,9 @@ void intel_initial_plane_vblank_wait(struct intel_crtc
> *crtc)
> > return;
> > }
> >
> > - start_ts = intel_de_read(display, PIPE_FRMTMSTMP(crtc->pipe));
> > + start_ts = intel_de_read(display, PIPE_FRMTMSTMP(display,
> > +crtc->pipe));
> >
> > - ret = poll_timeout_us(end_ts = intel_de_read(display,
> PIPE_FRMTMSTMP(crtc->pipe)),
> > + ret = poll_timeout_us(end_ts = intel_de_read(display,
> > +PIPE_FRMTMSTMP(display, crtc->pipe)),
> > end_ts != start_ts, 1000, 1000 * 1000, false);
> > if (ret)
> > drm_warn(display->drm, "[CRTC:%d:%s] early vblank wait
> timed
> > out\n", diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> > b/drivers/gpu/drm/i915/display/intel_vblank.c
> > index 28d81199792e..52ff47936f9e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > @@ -157,7 +157,7 @@ static u32
> intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> > * is sampled at every start of vertical blank.
> > */
> > scan_prev_time = intel_de_read_fw(display,
> > - PIPE_FRMTMSTMP(crtc-
> >pipe));
> > + PIPE_FRMTMSTMP(display,
> crtc->pipe));
> >
> > /*
> > * The TIMESTAMP_CTR register has the current @@ -166,7
> +166,7 @@
> > static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> > scan_curr_time = intel_de_read_fw(display,
> IVB_TIMESTAMP_CTR);
> >
> > scan_post_time = intel_de_read_fw(display,
> > - PIPE_FRMTMSTMP(crtc-
> >pipe));
> > + PIPE_FRMTMSTMP(display,
> crtc->pipe));
> > } while (scan_post_time != scan_prev_time);
> >
> > return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
> > --
> > 2.34.1
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface"
@ 2026-05-15 15:53 Suraj Kandpal
2026-05-15 16:00 ` ✓ CI.KUnit: success for " Patchwork
` (9 more replies)
0 siblings, 10 replies; 22+ messages in thread
From: Suraj Kandpal @ 2026-05-15 15:53 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
This reverts commit 40d2f5820951dee818d05c14677277048bd85f9f.
Removing the try_vesa_interface gate caused a backlight regression on
panels whose VBT correctly reports INTEL_BACKLIGHT_DISPLAY_DDI and whose
PWM path is the actual backlight control, but whose DPCD optimistically
advertises DP_EDP_BACKLIGHT_AUX_ENABLE_CAP / _BRIGHTNESS_AUX_SET_CAP.
After the commit such panels silently bind to the VESA AUX backlight
funcs; AUX writes complete but the panel ignores them, leaving
brightness stuck (no-op backlight). Observed on at least KBL and TGL
eDP setups.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../drm/i915/display/intel_dp_aux_backlight.c | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index a8d56ebf06a2..7a6c07f6aaeb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -691,10 +691,9 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
struct intel_dp *intel_dp = intel_attached_dp(connector);
struct drm_device *dev = connector->base.dev;
struct intel_panel *panel = &connector->panel;
- bool try_intel_interface = false;
+ bool try_intel_interface = false, try_vesa_interface = false;
- /*
- * Check the VBT and user's module parameters to figure out which
+ /* Check the VBT and user's module parameters to figure out which
* interfaces to probe
*/
switch (display->params.enable_dpcd_backlight) {
@@ -703,6 +702,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
case INTEL_DP_AUX_BACKLIGHT_AUTO:
switch (panel->vbt.backlight.type) {
case INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE:
+ try_vesa_interface = true;
break;
case INTEL_BACKLIGHT_DISPLAY_DDI:
try_intel_interface = true;
@@ -715,12 +715,20 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
if (panel->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE)
try_intel_interface = true;
+ try_vesa_interface = true;
+ break;
+ case INTEL_DP_AUX_BACKLIGHT_FORCE_VESA:
+ try_vesa_interface = true;
break;
case INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL:
try_intel_interface = true;
break;
}
+ /* For eDP 1.5 and above we are supposed to use VESA interface for brightness control */
+ if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
+ try_vesa_interface = true;
+
/*
* Since Intel has their own backlight control interface, the majority of machines out there
* using DPCD backlight controls with Intel GPUs will be using this interface as opposed to
@@ -733,9 +741,6 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
* panel with Intel's OUI - which is also required for us to be able to detect Intel's
* backlight interface at all. This means that the only sensible way for us to detect both
* interfaces is to probe for Intel's first, and VESA's second.
- *
- * Also there is a chance some VBTs may advertise false Intel backlight support even if the
- * TCON DPCD says otherwise. This means we keep VESA interface as fallback in that case.
*/
if (try_intel_interface && intel_dp->edp_dpcd[0] <= DP_EDP_14b &&
intel_dp_aux_supports_hdr_backlight(connector)) {
@@ -745,7 +750,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
return 0;
}
- if (intel_dp_aux_supports_vesa_backlight(connector)) {
+ if (try_vesa_interface && intel_dp_aux_supports_vesa_backlight(connector)) {
drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Using VESA eDP backlight controls\n",
connector->base.base.id, connector->base.name);
panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface"
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
@ 2026-05-15 16:00 ` Patchwork
2026-05-15 16:10 ` [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
` (8 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-15 16:00 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface"
URL : https://patchwork.freedesktop.org/series/166667/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[15:58:51] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:58:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:59:27] Starting KUnit Kernel (1/1)...
[15:59:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:59:27] ================== guc_buf (11 subtests) ===================
[15:59:27] [PASSED] test_smallest
[15:59:27] [PASSED] test_largest
[15:59:27] [PASSED] test_granular
[15:59:27] [PASSED] test_unique
[15:59:27] [PASSED] test_overlap
[15:59:27] [PASSED] test_reusable
[15:59:27] [PASSED] test_too_big
[15:59:27] [PASSED] test_flush
[15:59:27] [PASSED] test_lookup
[15:59:27] [PASSED] test_data
[15:59:27] [PASSED] test_class
[15:59:27] ===================== [PASSED] guc_buf =====================
[15:59:27] =================== guc_dbm (7 subtests) ===================
[15:59:27] [PASSED] test_empty
[15:59:27] [PASSED] test_default
[15:59:27] ======================== test_size ========================
[15:59:27] [PASSED] 4
[15:59:27] [PASSED] 8
[15:59:27] [PASSED] 32
[15:59:27] [PASSED] 256
[15:59:27] ==================== [PASSED] test_size ====================
[15:59:27] ======================= test_reuse ========================
[15:59:27] [PASSED] 4
[15:59:27] [PASSED] 8
[15:59:27] [PASSED] 32
[15:59:27] [PASSED] 256
[15:59:27] =================== [PASSED] test_reuse ====================
[15:59:27] =================== test_range_overlap ====================
[15:59:27] [PASSED] 4
[15:59:27] [PASSED] 8
[15:59:27] [PASSED] 32
[15:59:27] [PASSED] 256
[15:59:27] =============== [PASSED] test_range_overlap ================
[15:59:27] =================== test_range_compact ====================
[15:59:27] [PASSED] 4
[15:59:27] [PASSED] 8
[15:59:27] [PASSED] 32
[15:59:27] [PASSED] 256
[15:59:27] =============== [PASSED] test_range_compact ================
[15:59:27] ==================== test_range_spare =====================
[15:59:27] [PASSED] 4
[15:59:27] [PASSED] 8
[15:59:27] [PASSED] 32
[15:59:27] [PASSED] 256
[15:59:27] ================ [PASSED] test_range_spare =================
[15:59:27] ===================== [PASSED] guc_dbm =====================
[15:59:27] =================== guc_idm (6 subtests) ===================
[15:59:27] [PASSED] bad_init
[15:59:27] [PASSED] no_init
[15:59:27] [PASSED] init_fini
[15:59:27] [PASSED] check_used
[15:59:27] [PASSED] check_quota
[15:59:27] [PASSED] check_all
[15:59:27] ===================== [PASSED] guc_idm =====================
[15:59:27] ================== no_relay (3 subtests) ===================
[15:59:27] [PASSED] xe_drops_guc2pf_if_not_ready
[15:59:27] [PASSED] xe_drops_guc2vf_if_not_ready
[15:59:27] [PASSED] xe_rejects_send_if_not_ready
[15:59:27] ==================== [PASSED] no_relay =====================
[15:59:27] ================== pf_relay (14 subtests) ==================
[15:59:27] [PASSED] pf_rejects_guc2pf_too_short
[15:59:27] [PASSED] pf_rejects_guc2pf_too_long
[15:59:27] [PASSED] pf_rejects_guc2pf_no_payload
[15:59:27] [PASSED] pf_fails_no_payload
[15:59:27] [PASSED] pf_fails_bad_origin
[15:59:27] [PASSED] pf_fails_bad_type
[15:59:27] [PASSED] pf_txn_reports_error
[15:59:27] [PASSED] pf_txn_sends_pf2guc
[15:59:27] [PASSED] pf_sends_pf2guc
[15:59:27] [SKIPPED] pf_loopback_nop
[15:59:27] [SKIPPED] pf_loopback_echo
[15:59:27] [SKIPPED] pf_loopback_fail
[15:59:27] [SKIPPED] pf_loopback_busy
[15:59:27] [SKIPPED] pf_loopback_retry
[15:59:27] ==================== [PASSED] pf_relay =====================
[15:59:27] ================== vf_relay (3 subtests) ===================
[15:59:27] [PASSED] vf_rejects_guc2vf_too_short
[15:59:27] [PASSED] vf_rejects_guc2vf_too_long
[15:59:27] [PASSED] vf_rejects_guc2vf_no_payload
[15:59:27] ==================== [PASSED] vf_relay =====================
[15:59:27] ================ pf_gt_config (9 subtests) =================
[15:59:27] [PASSED] fair_contexts_1vf
[15:59:27] [PASSED] fair_doorbells_1vf
[15:59:27] [PASSED] fair_ggtt_1vf
[15:59:27] ====================== fair_vram_1vf ======================
[15:59:27] [PASSED] 3.50 GiB
[15:59:27] [PASSED] 11.5 GiB
[15:59:27] [PASSED] 15.5 GiB
[15:59:27] [PASSED] 31.5 GiB
[15:59:27] [PASSED] 63.5 GiB
[15:59:27] [PASSED] 1.91 GiB
[15:59:27] ================== [PASSED] fair_vram_1vf ==================
[15:59:27] ================ fair_vram_1vf_admin_only =================
[15:59:27] [PASSED] 3.50 GiB
[15:59:27] [PASSED] 11.5 GiB
[15:59:27] [PASSED] 15.5 GiB
[15:59:27] [PASSED] 31.5 GiB
[15:59:27] [PASSED] 63.5 GiB
[15:59:27] [PASSED] 1.91 GiB
[15:59:27] ============ [PASSED] fair_vram_1vf_admin_only =============
[15:59:27] ====================== fair_contexts ======================
[15:59:27] [PASSED] 1 VF
[15:59:27] [PASSED] 2 VFs
[15:59:27] [PASSED] 3 VFs
[15:59:27] [PASSED] 4 VFs
[15:59:27] [PASSED] 5 VFs
[15:59:27] [PASSED] 6 VFs
[15:59:27] [PASSED] 7 VFs
[15:59:27] [PASSED] 8 VFs
[15:59:27] [PASSED] 9 VFs
[15:59:27] [PASSED] 10 VFs
[15:59:27] [PASSED] 11 VFs
[15:59:27] [PASSED] 12 VFs
[15:59:27] [PASSED] 13 VFs
[15:59:27] [PASSED] 14 VFs
[15:59:27] [PASSED] 15 VFs
[15:59:27] [PASSED] 16 VFs
[15:59:27] [PASSED] 17 VFs
[15:59:27] [PASSED] 18 VFs
[15:59:27] [PASSED] 19 VFs
[15:59:27] [PASSED] 20 VFs
[15:59:27] [PASSED] 21 VFs
[15:59:27] [PASSED] 22 VFs
[15:59:27] [PASSED] 23 VFs
[15:59:27] [PASSED] 24 VFs
[15:59:27] [PASSED] 25 VFs
[15:59:27] [PASSED] 26 VFs
[15:59:27] [PASSED] 27 VFs
[15:59:27] [PASSED] 28 VFs
[15:59:27] [PASSED] 29 VFs
[15:59:27] [PASSED] 30 VFs
[15:59:27] [PASSED] 31 VFs
[15:59:27] [PASSED] 32 VFs
[15:59:27] [PASSED] 33 VFs
[15:59:27] [PASSED] 34 VFs
[15:59:27] [PASSED] 35 VFs
[15:59:27] [PASSED] 36 VFs
[15:59:27] [PASSED] 37 VFs
[15:59:27] [PASSED] 38 VFs
[15:59:27] [PASSED] 39 VFs
[15:59:27] [PASSED] 40 VFs
[15:59:27] [PASSED] 41 VFs
[15:59:27] [PASSED] 42 VFs
[15:59:27] [PASSED] 43 VFs
[15:59:27] [PASSED] 44 VFs
[15:59:27] [PASSED] 45 VFs
[15:59:27] [PASSED] 46 VFs
[15:59:27] [PASSED] 47 VFs
[15:59:27] [PASSED] 48 VFs
[15:59:27] [PASSED] 49 VFs
[15:59:27] [PASSED] 50 VFs
[15:59:27] [PASSED] 51 VFs
[15:59:27] [PASSED] 52 VFs
[15:59:27] [PASSED] 53 VFs
[15:59:27] [PASSED] 54 VFs
[15:59:27] [PASSED] 55 VFs
[15:59:27] [PASSED] 56 VFs
[15:59:27] [PASSED] 57 VFs
[15:59:27] [PASSED] 58 VFs
[15:59:27] [PASSED] 59 VFs
[15:59:27] [PASSED] 60 VFs
[15:59:27] [PASSED] 61 VFs
[15:59:27] [PASSED] 62 VFs
[15:59:27] [PASSED] 63 VFs
[15:59:27] ================== [PASSED] fair_contexts ==================
[15:59:27] ===================== fair_doorbells ======================
[15:59:27] [PASSED] 1 VF
[15:59:27] [PASSED] 2 VFs
[15:59:27] [PASSED] 3 VFs
[15:59:27] [PASSED] 4 VFs
[15:59:27] [PASSED] 5 VFs
[15:59:27] [PASSED] 6 VFs
[15:59:27] [PASSED] 7 VFs
[15:59:27] [PASSED] 8 VFs
[15:59:27] [PASSED] 9 VFs
[15:59:27] [PASSED] 10 VFs
[15:59:27] [PASSED] 11 VFs
[15:59:27] [PASSED] 12 VFs
[15:59:27] [PASSED] 13 VFs
[15:59:27] [PASSED] 14 VFs
[15:59:27] [PASSED] 15 VFs
[15:59:27] [PASSED] 16 VFs
[15:59:27] [PASSED] 17 VFs
[15:59:27] [PASSED] 18 VFs
[15:59:27] [PASSED] 19 VFs
[15:59:27] [PASSED] 20 VFs
[15:59:27] [PASSED] 21 VFs
[15:59:27] [PASSED] 22 VFs
[15:59:27] [PASSED] 23 VFs
[15:59:27] [PASSED] 24 VFs
[15:59:27] [PASSED] 25 VFs
[15:59:27] [PASSED] 26 VFs
[15:59:27] [PASSED] 27 VFs
[15:59:27] [PASSED] 28 VFs
[15:59:27] [PASSED] 29 VFs
[15:59:27] [PASSED] 30 VFs
[15:59:27] [PASSED] 31 VFs
[15:59:27] [PASSED] 32 VFs
[15:59:27] [PASSED] 33 VFs
[15:59:27] [PASSED] 34 VFs
[15:59:27] [PASSED] 35 VFs
[15:59:27] [PASSED] 36 VFs
[15:59:27] [PASSED] 37 VFs
[15:59:27] [PASSED] 38 VFs
[15:59:27] [PASSED] 39 VFs
[15:59:27] [PASSED] 40 VFs
[15:59:27] [PASSED] 41 VFs
[15:59:27] [PASSED] 42 VFs
[15:59:27] [PASSED] 43 VFs
[15:59:27] [PASSED] 44 VFs
[15:59:27] [PASSED] 45 VFs
[15:59:27] [PASSED] 46 VFs
[15:59:27] [PASSED] 47 VFs
[15:59:27] [PASSED] 48 VFs
[15:59:27] [PASSED] 49 VFs
[15:59:27] [PASSED] 50 VFs
[15:59:27] [PASSED] 51 VFs
[15:59:27] [PASSED] 52 VFs
[15:59:27] [PASSED] 53 VFs
[15:59:27] [PASSED] 54 VFs
[15:59:27] [PASSED] 55 VFs
[15:59:27] [PASSED] 56 VFs
[15:59:27] [PASSED] 57 VFs
[15:59:27] [PASSED] 58 VFs
[15:59:27] [PASSED] 59 VFs
[15:59:27] [PASSED] 60 VFs
[15:59:27] [PASSED] 61 VFs
[15:59:27] [PASSED] 62 VFs
[15:59:27] [PASSED] 63 VFs
[15:59:27] ================= [PASSED] fair_doorbells ==================
[15:59:27] ======================== fair_ggtt ========================
[15:59:27] [PASSED] 1 VF
[15:59:27] [PASSED] 2 VFs
[15:59:27] [PASSED] 3 VFs
[15:59:27] [PASSED] 4 VFs
[15:59:27] [PASSED] 5 VFs
[15:59:27] [PASSED] 6 VFs
[15:59:27] [PASSED] 7 VFs
[15:59:27] [PASSED] 8 VFs
[15:59:27] [PASSED] 9 VFs
[15:59:27] [PASSED] 10 VFs
[15:59:27] [PASSED] 11 VFs
[15:59:27] [PASSED] 12 VFs
[15:59:27] [PASSED] 13 VFs
[15:59:27] [PASSED] 14 VFs
[15:59:27] [PASSED] 15 VFs
[15:59:27] [PASSED] 16 VFs
[15:59:27] [PASSED] 17 VFs
[15:59:27] [PASSED] 18 VFs
[15:59:27] [PASSED] 19 VFs
[15:59:27] [PASSED] 20 VFs
[15:59:27] [PASSED] 21 VFs
[15:59:27] [PASSED] 22 VFs
[15:59:27] [PASSED] 23 VFs
[15:59:27] [PASSED] 24 VFs
[15:59:27] [PASSED] 25 VFs
[15:59:27] [PASSED] 26 VFs
[15:59:27] [PASSED] 27 VFs
[15:59:27] [PASSED] 28 VFs
[15:59:27] [PASSED] 29 VFs
[15:59:27] [PASSED] 30 VFs
[15:59:27] [PASSED] 31 VFs
[15:59:27] [PASSED] 32 VFs
[15:59:27] [PASSED] 33 VFs
[15:59:27] [PASSED] 34 VFs
[15:59:27] [PASSED] 35 VFs
[15:59:27] [PASSED] 36 VFs
[15:59:27] [PASSED] 37 VFs
[15:59:27] [PASSED] 38 VFs
[15:59:27] [PASSED] 39 VFs
[15:59:27] [PASSED] 40 VFs
[15:59:27] [PASSED] 41 VFs
[15:59:27] [PASSED] 42 VFs
[15:59:27] [PASSED] 43 VFs
[15:59:27] [PASSED] 44 VFs
[15:59:27] [PASSED] 45 VFs
[15:59:27] [PASSED] 46 VFs
[15:59:27] [PASSED] 47 VFs
[15:59:27] [PASSED] 48 VFs
[15:59:27] [PASSED] 49 VFs
[15:59:27] [PASSED] 50 VFs
[15:59:27] [PASSED] 51 VFs
[15:59:27] [PASSED] 52 VFs
[15:59:27] [PASSED] 53 VFs
[15:59:27] [PASSED] 54 VFs
[15:59:27] [PASSED] 55 VFs
[15:59:27] [PASSED] 56 VFs
[15:59:27] [PASSED] 57 VFs
[15:59:27] [PASSED] 58 VFs
[15:59:27] [PASSED] 59 VFs
[15:59:27] [PASSED] 60 VFs
[15:59:27] [PASSED] 61 VFs
[15:59:27] [PASSED] 62 VFs
[15:59:27] [PASSED] 63 VFs
[15:59:27] ==================== [PASSED] fair_ggtt ====================
[15:59:27] ======================== fair_vram ========================
[15:59:27] [PASSED] 1 VF
[15:59:27] [PASSED] 2 VFs
[15:59:27] [PASSED] 3 VFs
[15:59:27] [PASSED] 4 VFs
[15:59:27] [PASSED] 5 VFs
[15:59:27] [PASSED] 6 VFs
[15:59:27] [PASSED] 7 VFs
[15:59:27] [PASSED] 8 VFs
[15:59:27] [PASSED] 9 VFs
[15:59:27] [PASSED] 10 VFs
[15:59:27] [PASSED] 11 VFs
[15:59:27] [PASSED] 12 VFs
[15:59:27] [PASSED] 13 VFs
[15:59:27] [PASSED] 14 VFs
[15:59:27] [PASSED] 15 VFs
[15:59:27] [PASSED] 16 VFs
[15:59:27] [PASSED] 17 VFs
[15:59:27] [PASSED] 18 VFs
[15:59:27] [PASSED] 19 VFs
[15:59:27] [PASSED] 20 VFs
[15:59:27] [PASSED] 21 VFs
[15:59:27] [PASSED] 22 VFs
[15:59:27] [PASSED] 23 VFs
[15:59:27] [PASSED] 24 VFs
[15:59:27] [PASSED] 25 VFs
[15:59:27] [PASSED] 26 VFs
[15:59:27] [PASSED] 27 VFs
[15:59:27] [PASSED] 28 VFs
[15:59:27] [PASSED] 29 VFs
[15:59:27] [PASSED] 30 VFs
[15:59:27] [PASSED] 31 VFs
[15:59:27] [PASSED] 32 VFs
[15:59:27] [PASSED] 33 VFs
[15:59:27] [PASSED] 34 VFs
[15:59:27] [PASSED] 35 VFs
[15:59:27] [PASSED] 36 VFs
[15:59:27] [PASSED] 37 VFs
[15:59:27] [PASSED] 38 VFs
[15:59:27] [PASSED] 39 VFs
[15:59:27] [PASSED] 40 VFs
[15:59:27] [PASSED] 41 VFs
[15:59:27] [PASSED] 42 VFs
[15:59:27] [PASSED] 43 VFs
[15:59:27] [PASSED] 44 VFs
[15:59:27] [PASSED] 45 VFs
[15:59:27] [PASSED] 46 VFs
[15:59:27] [PASSED] 47 VFs
[15:59:27] [PASSED] 48 VFs
[15:59:27] [PASSED] 49 VFs
[15:59:27] [PASSED] 50 VFs
[15:59:27] [PASSED] 51 VFs
[15:59:27] [PASSED] 52 VFs
[15:59:27] [PASSED] 53 VFs
[15:59:27] [PASSED] 54 VFs
[15:59:27] [PASSED] 55 VFs
[15:59:27] [PASSED] 56 VFs
[15:59:27] [PASSED] 57 VFs
[15:59:27] [PASSED] 58 VFs
[15:59:27] [PASSED] 59 VFs
[15:59:27] [PASSED] 60 VFs
[15:59:27] [PASSED] 61 VFs
[15:59:27] [PASSED] 62 VFs
[15:59:27] [PASSED] 63 VFs
[15:59:27] ==================== [PASSED] fair_vram ====================
[15:59:27] ================== [PASSED] pf_gt_config ===================
[15:59:27] ===================== lmtt (1 subtest) =====================
[15:59:27] ======================== test_ops =========================
[15:59:27] [PASSED] 2-level
[15:59:27] [PASSED] multi-level
[15:59:27] ==================== [PASSED] test_ops =====================
[15:59:27] ====================== [PASSED] lmtt =======================
[15:59:27] ================= pf_service (11 subtests) =================
[15:59:27] [PASSED] pf_negotiate_any
[15:59:27] [PASSED] pf_negotiate_base_match
[15:59:27] [PASSED] pf_negotiate_base_newer
[15:59:27] [PASSED] pf_negotiate_base_next
[15:59:27] [SKIPPED] pf_negotiate_base_older
[15:59:27] [PASSED] pf_negotiate_base_prev
[15:59:27] [PASSED] pf_negotiate_latest_match
[15:59:27] [PASSED] pf_negotiate_latest_newer
[15:59:27] [PASSED] pf_negotiate_latest_next
[15:59:27] [SKIPPED] pf_negotiate_latest_older
[15:59:27] [SKIPPED] pf_negotiate_latest_prev
[15:59:27] =================== [PASSED] pf_service ====================
[15:59:27] ================= xe_guc_g2g (2 subtests) ==================
[15:59:27] ============== xe_live_guc_g2g_kunit_default ==============
[15:59:27] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[15:59:27] ============== xe_live_guc_g2g_kunit_allmem ===============
[15:59:27] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[15:59:27] =================== [SKIPPED] xe_guc_g2g ===================
[15:59:27] =================== xe_mocs (2 subtests) ===================
[15:59:27] ================ xe_live_mocs_kernel_kunit ================
[15:59:27] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[15:59:27] ================ xe_live_mocs_reset_kunit =================
[15:59:27] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[15:59:27] ==================== [SKIPPED] xe_mocs =====================
[15:59:27] ================= xe_migrate (2 subtests) ==================
[15:59:27] ================= xe_migrate_sanity_kunit =================
[15:59:27] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[15:59:27] ================== xe_validate_ccs_kunit ==================
[15:59:27] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[15:59:27] =================== [SKIPPED] xe_migrate ===================
[15:59:27] ================== xe_dma_buf (1 subtest) ==================
[15:59:27] ==================== xe_dma_buf_kunit =====================
[15:59:27] ================ [SKIPPED] xe_dma_buf_kunit ================
[15:59:27] =================== [SKIPPED] xe_dma_buf ===================
[15:59:27] ================= xe_bo_shrink (1 subtest) =================
[15:59:27] =================== xe_bo_shrink_kunit ====================
[15:59:27] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[15:59:27] ================== [SKIPPED] xe_bo_shrink ==================
[15:59:27] ==================== xe_bo (2 subtests) ====================
[15:59:27] ================== xe_ccs_migrate_kunit ===================
[15:59:27] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[15:59:27] ==================== xe_bo_evict_kunit ====================
[15:59:27] =============== [SKIPPED] xe_bo_evict_kunit ================
[15:59:27] ===================== [SKIPPED] xe_bo ======================
[15:59:27] ==================== args (13 subtests) ====================
[15:59:27] [PASSED] count_args_test
[15:59:27] [PASSED] call_args_example
[15:59:27] [PASSED] call_args_test
[15:59:27] [PASSED] drop_first_arg_example
[15:59:27] [PASSED] drop_first_arg_test
[15:59:27] [PASSED] first_arg_example
[15:59:27] [PASSED] first_arg_test
[15:59:27] [PASSED] last_arg_example
[15:59:27] [PASSED] last_arg_test
[15:59:27] [PASSED] pick_arg_example
[15:59:27] [PASSED] if_args_example
[15:59:27] [PASSED] if_args_test
[15:59:27] [PASSED] sep_comma_example
[15:59:27] ====================== [PASSED] args =======================
[15:59:27] =================== xe_pci (3 subtests) ====================
[15:59:27] ==================== check_graphics_ip ====================
[15:59:27] [PASSED] 12.00 Xe_LP
[15:59:27] [PASSED] 12.10 Xe_LP+
[15:59:27] [PASSED] 12.55 Xe_HPG
[15:59:27] [PASSED] 12.60 Xe_HPC
[15:59:27] [PASSED] 12.70 Xe_LPG
[15:59:27] [PASSED] 12.71 Xe_LPG
[15:59:27] [PASSED] 12.74 Xe_LPG+
[15:59:27] [PASSED] 20.01 Xe2_HPG
[15:59:27] [PASSED] 20.02 Xe2_HPG
[15:59:27] [PASSED] 20.04 Xe2_LPG
[15:59:27] [PASSED] 30.00 Xe3_LPG
[15:59:27] [PASSED] 30.01 Xe3_LPG
[15:59:27] [PASSED] 30.03 Xe3_LPG
[15:59:27] [PASSED] 30.04 Xe3_LPG
[15:59:27] [PASSED] 30.05 Xe3_LPG
[15:59:27] [PASSED] 35.10 Xe3p_LPG
[15:59:27] [PASSED] 35.11 Xe3p_XPC
[15:59:27] ================ [PASSED] check_graphics_ip ================
[15:59:27] ===================== check_media_ip ======================
[15:59:27] [PASSED] 12.00 Xe_M
[15:59:27] [PASSED] 12.55 Xe_HPM
[15:59:27] [PASSED] 13.00 Xe_LPM+
[15:59:27] [PASSED] 13.01 Xe2_HPM
[15:59:27] [PASSED] 20.00 Xe2_LPM
[15:59:27] [PASSED] 30.00 Xe3_LPM
[15:59:27] [PASSED] 30.02 Xe3_LPM
[15:59:27] [PASSED] 35.00 Xe3p_LPM
[15:59:27] [PASSED] 35.03 Xe3p_HPM
[15:59:27] ================= [PASSED] check_media_ip ==================
[15:59:27] =================== check_platform_desc ===================
[15:59:27] [PASSED] 0x9A60 (TIGERLAKE)
[15:59:27] [PASSED] 0x9A68 (TIGERLAKE)
[15:59:27] [PASSED] 0x9A70 (TIGERLAKE)
[15:59:27] [PASSED] 0x9A40 (TIGERLAKE)
[15:59:27] [PASSED] 0x9A49 (TIGERLAKE)
[15:59:27] [PASSED] 0x9A59 (TIGERLAKE)
[15:59:27] [PASSED] 0x9A78 (TIGERLAKE)
[15:59:27] [PASSED] 0x9AC0 (TIGERLAKE)
[15:59:27] [PASSED] 0x9AC9 (TIGERLAKE)
[15:59:27] [PASSED] 0x9AD9 (TIGERLAKE)
[15:59:27] [PASSED] 0x9AF8 (TIGERLAKE)
[15:59:27] [PASSED] 0x4C80 (ROCKETLAKE)
[15:59:27] [PASSED] 0x4C8A (ROCKETLAKE)
[15:59:27] [PASSED] 0x4C8B (ROCKETLAKE)
[15:59:27] [PASSED] 0x4C8C (ROCKETLAKE)
[15:59:27] [PASSED] 0x4C90 (ROCKETLAKE)
[15:59:27] [PASSED] 0x4C9A (ROCKETLAKE)
[15:59:27] [PASSED] 0x4680 (ALDERLAKE_S)
[15:59:27] [PASSED] 0x4682 (ALDERLAKE_S)
[15:59:27] [PASSED] 0x4688 (ALDERLAKE_S)
[15:59:27] [PASSED] 0x468A (ALDERLAKE_S)
[15:59:27] [PASSED] 0x468B (ALDERLAKE_S)
[15:59:27] [PASSED] 0x4690 (ALDERLAKE_S)
[15:59:27] [PASSED] 0x4692 (ALDERLAKE_S)
[15:59:27] [PASSED] 0x4693 (ALDERLAKE_S)
[15:59:27] [PASSED] 0x46A0 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46A1 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46A2 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46A3 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46A6 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46A8 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46AA (ALDERLAKE_P)
[15:59:27] [PASSED] 0x462A (ALDERLAKE_P)
[15:59:27] [PASSED] 0x4626 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x4628 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46B0 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46B1 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46B2 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46B3 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46C0 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46C1 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46C2 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46C3 (ALDERLAKE_P)
[15:59:27] [PASSED] 0x46D0 (ALDERLAKE_N)
[15:59:27] [PASSED] 0x46D1 (ALDERLAKE_N)
[15:59:27] [PASSED] 0x46D2 (ALDERLAKE_N)
[15:59:27] [PASSED] 0x46D3 (ALDERLAKE_N)
[15:59:27] [PASSED] 0x46D4 (ALDERLAKE_N)
[15:59:27] [PASSED] 0xA721 (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7A1 (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7A9 (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7AC (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7AD (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA720 (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7A0 (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7A8 (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7AA (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA7AB (ALDERLAKE_P)
[15:59:27] [PASSED] 0xA780 (ALDERLAKE_S)
[15:59:27] [PASSED] 0xA781 (ALDERLAKE_S)
[15:59:27] [PASSED] 0xA782 (ALDERLAKE_S)
[15:59:27] [PASSED] 0xA783 (ALDERLAKE_S)
[15:59:27] [PASSED] 0xA788 (ALDERLAKE_S)
[15:59:27] [PASSED] 0xA789 (ALDERLAKE_S)
[15:59:27] [PASSED] 0xA78A (ALDERLAKE_S)
[15:59:27] [PASSED] 0xA78B (ALDERLAKE_S)
[15:59:27] [PASSED] 0x4905 (DG1)
[15:59:27] [PASSED] 0x4906 (DG1)
[15:59:27] [PASSED] 0x4907 (DG1)
[15:59:27] [PASSED] 0x4908 (DG1)
[15:59:27] [PASSED] 0x4909 (DG1)
[15:59:27] [PASSED] 0x56C0 (DG2)
[15:59:27] [PASSED] 0x56C2 (DG2)
[15:59:27] [PASSED] 0x56C1 (DG2)
[15:59:27] [PASSED] 0x7D51 (METEORLAKE)
[15:59:27] [PASSED] 0x7DD1 (METEORLAKE)
[15:59:27] [PASSED] 0x7D41 (METEORLAKE)
[15:59:27] [PASSED] 0x7D67 (METEORLAKE)
[15:59:27] [PASSED] 0xB640 (METEORLAKE)
[15:59:27] [PASSED] 0x56A0 (DG2)
[15:59:27] [PASSED] 0x56A1 (DG2)
[15:59:27] [PASSED] 0x56A2 (DG2)
[15:59:27] [PASSED] 0x56BE (DG2)
[15:59:27] [PASSED] 0x56BF (DG2)
[15:59:27] [PASSED] 0x5690 (DG2)
[15:59:27] [PASSED] 0x5691 (DG2)
[15:59:27] [PASSED] 0x5692 (DG2)
[15:59:27] [PASSED] 0x56A5 (DG2)
[15:59:27] [PASSED] 0x56A6 (DG2)
[15:59:27] [PASSED] 0x56B0 (DG2)
[15:59:27] [PASSED] 0x56B1 (DG2)
[15:59:27] [PASSED] 0x56BA (DG2)
[15:59:27] [PASSED] 0x56BB (DG2)
[15:59:27] [PASSED] 0x56BC (DG2)
[15:59:27] [PASSED] 0x56BD (DG2)
[15:59:27] [PASSED] 0x5693 (DG2)
[15:59:27] [PASSED] 0x5694 (DG2)
[15:59:27] [PASSED] 0x5695 (DG2)
[15:59:27] [PASSED] 0x56A3 (DG2)
[15:59:27] [PASSED] 0x56A4 (DG2)
[15:59:27] [PASSED] 0x56B2 (DG2)
[15:59:27] [PASSED] 0x56B3 (DG2)
[15:59:27] [PASSED] 0x5696 (DG2)
[15:59:27] [PASSED] 0x5697 (DG2)
[15:59:27] [PASSED] 0xB69 (PVC)
[15:59:27] [PASSED] 0xB6E (PVC)
[15:59:27] [PASSED] 0xBD4 (PVC)
[15:59:27] [PASSED] 0xBD5 (PVC)
[15:59:27] [PASSED] 0xBD6 (PVC)
[15:59:27] [PASSED] 0xBD7 (PVC)
[15:59:27] [PASSED] 0xBD8 (PVC)
[15:59:27] [PASSED] 0xBD9 (PVC)
[15:59:27] [PASSED] 0xBDA (PVC)
[15:59:27] [PASSED] 0xBDB (PVC)
[15:59:27] [PASSED] 0xBE0 (PVC)
[15:59:27] [PASSED] 0xBE1 (PVC)
[15:59:27] [PASSED] 0xBE5 (PVC)
[15:59:27] [PASSED] 0x7D40 (METEORLAKE)
[15:59:27] [PASSED] 0x7D45 (METEORLAKE)
[15:59:27] [PASSED] 0x7D55 (METEORLAKE)
[15:59:27] [PASSED] 0x7D60 (METEORLAKE)
[15:59:27] [PASSED] 0x7DD5 (METEORLAKE)
[15:59:27] [PASSED] 0x6420 (LUNARLAKE)
[15:59:27] [PASSED] 0x64A0 (LUNARLAKE)
[15:59:27] [PASSED] 0x64B0 (LUNARLAKE)
[15:59:27] [PASSED] 0xE202 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE209 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE20B (BATTLEMAGE)
[15:59:27] [PASSED] 0xE20C (BATTLEMAGE)
[15:59:27] [PASSED] 0xE20D (BATTLEMAGE)
[15:59:27] [PASSED] 0xE210 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE211 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE212 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE216 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE220 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE221 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE222 (BATTLEMAGE)
[15:59:27] [PASSED] 0xE223 (BATTLEMAGE)
[15:59:27] [PASSED] 0xB080 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB081 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB082 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB083 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB084 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB085 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB086 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB087 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB08F (PANTHERLAKE)
[15:59:27] [PASSED] 0xB090 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB0A0 (PANTHERLAKE)
[15:59:27] [PASSED] 0xB0B0 (PANTHERLAKE)
[15:59:27] [PASSED] 0xFD80 (PANTHERLAKE)
[15:59:27] [PASSED] 0xFD81 (PANTHERLAKE)
[15:59:27] [PASSED] 0xD740 (NOVALAKE_S)
[15:59:27] [PASSED] 0xD741 (NOVALAKE_S)
[15:59:27] [PASSED] 0xD742 (NOVALAKE_S)
[15:59:27] [PASSED] 0xD743 (NOVALAKE_S)
[15:59:27] [PASSED] 0xD744 (NOVALAKE_S)
[15:59:27] [PASSED] 0xD745 (NOVALAKE_S)
[15:59:27] [PASSED] 0x674C (CRESCENTISLAND)
[15:59:27] [PASSED] 0x674D (CRESCENTISLAND)
[15:59:27] [PASSED] 0x674E (CRESCENTISLAND)
[15:59:27] [PASSED] 0x674F (CRESCENTISLAND)
[15:59:27] [PASSED] 0x6750 (CRESCENTISLAND)
[15:59:27] [PASSED] 0xD750 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD751 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD752 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD753 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD754 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD755 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD756 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD757 (NOVALAKE_P)
[15:59:27] [PASSED] 0xD75F (NOVALAKE_P)
[15:59:27] =============== [PASSED] check_platform_desc ===============
[15:59:27] ===================== [PASSED] xe_pci ======================
[15:59:27] =================== xe_rtp (2 subtests) ====================
[15:59:27] =============== xe_rtp_process_to_sr_tests ================
[15:59:27] [PASSED] coalesce-same-reg
[15:59:27] [PASSED] no-match-no-add
[15:59:27] [PASSED] match-or
[15:59:27] [PASSED] match-or-xfail
[15:59:27] [PASSED] no-match-no-add-multiple-rules
[15:59:27] [PASSED] two-regs-two-entries
[15:59:27] [PASSED] clr-one-set-other
[15:59:27] [PASSED] set-field
[15:59:27] [PASSED] conflict-duplicate
[15:59:27] [PASSED] conflict-not-disjoint
[15:59:27] [PASSED] conflict-reg-type
[15:59:27] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[15:59:27] ================== xe_rtp_process_tests ===================
[15:59:27] [PASSED] active1
[15:59:27] [PASSED] active2
[15:59:27] [PASSED] active-inactive
[15:59:27] [PASSED] inactive-active
[15:59:27] [PASSED] inactive-1st_or_active-inactive
[15:59:27] [PASSED] inactive-2nd_or_active-inactive
[15:59:27] [PASSED] inactive-last_or_active-inactive
[15:59:27] [PASSED] inactive-no_or_active-inactive
[15:59:27] ============== [PASSED] xe_rtp_process_tests ===============
[15:59:27] ===================== [PASSED] xe_rtp ======================
[15:59:27] ==================== xe_wa (1 subtest) =====================
[15:59:27] ======================== xe_wa_gt =========================
[15:59:27] [PASSED] TIGERLAKE B0
[15:59:27] [PASSED] DG1 A0
[15:59:27] [PASSED] DG1 B0
[15:59:27] [PASSED] ALDERLAKE_S A0
[15:59:27] [PASSED] ALDERLAKE_S B0
[15:59:27] [PASSED] ALDERLAKE_S C0
[15:59:27] [PASSED] ALDERLAKE_S D0
[15:59:27] [PASSED] ALDERLAKE_P A0
[15:59:27] [PASSED] ALDERLAKE_P B0
[15:59:27] [PASSED] ALDERLAKE_P C0
[15:59:27] [PASSED] ALDERLAKE_S RPLS D0
[15:59:27] [PASSED] ALDERLAKE_P RPLU E0
[15:59:27] [PASSED] DG2 G10 C0
[15:59:27] [PASSED] DG2 G11 B1
[15:59:27] [PASSED] DG2 G12 A1
[15:59:27] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:59:27] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[15:59:27] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[15:59:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[15:59:27] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[15:59:27] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[15:59:27] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[15:59:27] ==================== [PASSED] xe_wa_gt =====================
[15:59:27] ====================== [PASSED] xe_wa ======================
[15:59:27] ============================================================
[15:59:27] Testing complete. Ran 601 tests: passed: 583, skipped: 18
[15:59:27] Elapsed time: 36.293s total, 4.319s configuring, 31.358s building, 0.609s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[15:59:27] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:59:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[15:59:53] Starting KUnit Kernel (1/1)...
[15:59:53] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[15:59:53] ============ drm_test_pick_cmdline (2 subtests) ============
[15:59:53] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[15:59:53] =============== drm_test_pick_cmdline_named ===============
[15:59:53] [PASSED] NTSC
[15:59:53] [PASSED] NTSC-J
[15:59:53] [PASSED] PAL
[15:59:53] [PASSED] PAL-M
[15:59:53] =========== [PASSED] drm_test_pick_cmdline_named ===========
[15:59:53] ============== [PASSED] drm_test_pick_cmdline ==============
[15:59:53] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[15:59:53] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[15:59:53] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[15:59:53] =========== drm_validate_clone_mode (2 subtests) ===========
[15:59:53] ============== drm_test_check_in_clone_mode ===============
[15:59:53] [PASSED] in_clone_mode
[15:59:53] [PASSED] not_in_clone_mode
[15:59:53] ========== [PASSED] drm_test_check_in_clone_mode ===========
[15:59:53] =============== drm_test_check_valid_clones ===============
[15:59:53] [PASSED] not_in_clone_mode
[15:59:53] [PASSED] valid_clone
[15:59:53] [PASSED] invalid_clone
[15:59:53] =========== [PASSED] drm_test_check_valid_clones ===========
[15:59:53] ============= [PASSED] drm_validate_clone_mode =============
[15:59:53] ============= drm_validate_modeset (1 subtest) =============
[15:59:53] [PASSED] drm_test_check_connector_changed_modeset
[15:59:53] ============== [PASSED] drm_validate_modeset ===============
[15:59:53] ====== drm_test_bridge_get_current_state (2 subtests) ======
[15:59:53] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[15:59:53] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[15:59:53] ======== [PASSED] drm_test_bridge_get_current_state ========
[15:59:53] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[15:59:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[15:59:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[15:59:53] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[15:59:53] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[15:59:53] ============== drm_bridge_alloc (2 subtests) ===============
[15:59:53] [PASSED] drm_test_drm_bridge_alloc_basic
[15:59:53] [PASSED] drm_test_drm_bridge_alloc_get_put
[15:59:53] ================ [PASSED] drm_bridge_alloc =================
[15:59:53] ============= drm_cmdline_parser (40 subtests) =============
[15:59:53] [PASSED] drm_test_cmdline_force_d_only
[15:59:53] [PASSED] drm_test_cmdline_force_D_only_dvi
[15:59:53] [PASSED] drm_test_cmdline_force_D_only_hdmi
[15:59:53] [PASSED] drm_test_cmdline_force_D_only_not_digital
[15:59:53] [PASSED] drm_test_cmdline_force_e_only
[15:59:53] [PASSED] drm_test_cmdline_res
[15:59:53] [PASSED] drm_test_cmdline_res_vesa
[15:59:53] [PASSED] drm_test_cmdline_res_vesa_rblank
[15:59:53] [PASSED] drm_test_cmdline_res_rblank
[15:59:53] [PASSED] drm_test_cmdline_res_bpp
[15:59:53] [PASSED] drm_test_cmdline_res_refresh
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[15:59:53] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[15:59:53] [PASSED] drm_test_cmdline_res_margins_force_on
[15:59:53] [PASSED] drm_test_cmdline_res_vesa_margins
[15:59:53] [PASSED] drm_test_cmdline_name
[15:59:53] [PASSED] drm_test_cmdline_name_bpp
[15:59:53] [PASSED] drm_test_cmdline_name_option
[15:59:53] [PASSED] drm_test_cmdline_name_bpp_option
[15:59:53] [PASSED] drm_test_cmdline_rotate_0
[15:59:53] [PASSED] drm_test_cmdline_rotate_90
[15:59:53] [PASSED] drm_test_cmdline_rotate_180
[15:59:53] [PASSED] drm_test_cmdline_rotate_270
[15:59:53] [PASSED] drm_test_cmdline_hmirror
[15:59:53] [PASSED] drm_test_cmdline_vmirror
[15:59:53] [PASSED] drm_test_cmdline_margin_options
[15:59:53] [PASSED] drm_test_cmdline_multiple_options
[15:59:53] [PASSED] drm_test_cmdline_bpp_extra_and_option
[15:59:53] [PASSED] drm_test_cmdline_extra_and_option
[15:59:53] [PASSED] drm_test_cmdline_freestanding_options
[15:59:53] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[15:59:53] [PASSED] drm_test_cmdline_panel_orientation
[15:59:53] ================ drm_test_cmdline_invalid =================
[15:59:53] [PASSED] margin_only
[15:59:53] [PASSED] interlace_only
[15:59:53] [PASSED] res_missing_x
[15:59:53] [PASSED] res_missing_y
[15:59:53] [PASSED] res_bad_y
[15:59:53] [PASSED] res_missing_y_bpp
[15:59:53] [PASSED] res_bad_bpp
[15:59:53] [PASSED] res_bad_refresh
[15:59:53] [PASSED] res_bpp_refresh_force_on_off
[15:59:53] [PASSED] res_invalid_mode
[15:59:53] [PASSED] res_bpp_wrong_place_mode
[15:59:53] [PASSED] name_bpp_refresh
[15:59:53] [PASSED] name_refresh
[15:59:53] [PASSED] name_refresh_wrong_mode
[15:59:53] [PASSED] name_refresh_invalid_mode
[15:59:53] [PASSED] rotate_multiple
[15:59:53] [PASSED] rotate_invalid_val
[15:59:53] [PASSED] rotate_truncated
[15:59:53] [PASSED] invalid_option
[15:59:53] [PASSED] invalid_tv_option
[15:59:53] [PASSED] truncated_tv_option
[15:59:53] ============ [PASSED] drm_test_cmdline_invalid =============
[15:59:53] =============== drm_test_cmdline_tv_options ===============
[15:59:53] [PASSED] NTSC
[15:59:53] [PASSED] NTSC_443
[15:59:53] [PASSED] NTSC_J
[15:59:53] [PASSED] PAL
[15:59:53] [PASSED] PAL_M
[15:59:53] [PASSED] PAL_N
[15:59:53] [PASSED] SECAM
[15:59:53] [PASSED] MONO_525
[15:59:53] [PASSED] MONO_625
[15:59:53] =========== [PASSED] drm_test_cmdline_tv_options ===========
[15:59:53] =============== [PASSED] drm_cmdline_parser ================
[15:59:53] ========== drmm_connector_hdmi_init (20 subtests) ==========
[15:59:53] [PASSED] drm_test_connector_hdmi_init_valid
[15:59:53] [PASSED] drm_test_connector_hdmi_init_bpc_8
[15:59:53] [PASSED] drm_test_connector_hdmi_init_bpc_10
[15:59:53] [PASSED] drm_test_connector_hdmi_init_bpc_12
[15:59:53] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[15:59:53] [PASSED] drm_test_connector_hdmi_init_bpc_null
[15:59:53] [PASSED] drm_test_connector_hdmi_init_formats_empty
[15:59:53] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[15:59:53] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:59:53] [PASSED] supported_formats=0x9 yuv420_allowed=1
[15:59:53] [PASSED] supported_formats=0x9 yuv420_allowed=0
[15:59:53] [PASSED] supported_formats=0x5 yuv420_allowed=1
[15:59:53] [PASSED] supported_formats=0x5 yuv420_allowed=0
[15:59:53] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[15:59:53] [PASSED] drm_test_connector_hdmi_init_null_ddc
[15:59:53] [PASSED] drm_test_connector_hdmi_init_null_product
[15:59:53] [PASSED] drm_test_connector_hdmi_init_null_vendor
[15:59:53] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[15:59:53] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[15:59:53] [PASSED] drm_test_connector_hdmi_init_product_valid
[15:59:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[15:59:53] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[15:59:53] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[15:59:53] ========= drm_test_connector_hdmi_init_type_valid =========
[15:59:53] [PASSED] HDMI-A
[15:59:53] [PASSED] HDMI-B
[15:59:53] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[15:59:53] ======== drm_test_connector_hdmi_init_type_invalid ========
[15:59:53] [PASSED] Unknown
[15:59:53] [PASSED] VGA
[15:59:53] [PASSED] DVI-I
[15:59:53] [PASSED] DVI-D
[15:59:53] [PASSED] DVI-A
[15:59:53] [PASSED] Composite
[15:59:53] [PASSED] SVIDEO
[15:59:53] [PASSED] LVDS
[15:59:53] [PASSED] Component
[15:59:53] [PASSED] DIN
[15:59:53] [PASSED] DP
[15:59:53] [PASSED] TV
[15:59:53] [PASSED] eDP
[15:59:53] [PASSED] Virtual
[15:59:53] [PASSED] DSI
[15:59:53] [PASSED] DPI
[15:59:53] [PASSED] Writeback
[15:59:53] [PASSED] SPI
[15:59:53] [PASSED] USB
[15:59:53] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[15:59:53] ============ [PASSED] drmm_connector_hdmi_init =============
[15:59:53] ============= drmm_connector_init (3 subtests) =============
[15:59:53] [PASSED] drm_test_drmm_connector_init
[15:59:53] [PASSED] drm_test_drmm_connector_init_null_ddc
[15:59:53] ========= drm_test_drmm_connector_init_type_valid =========
[15:59:53] [PASSED] Unknown
[15:59:53] [PASSED] VGA
[15:59:53] [PASSED] DVI-I
[15:59:53] [PASSED] DVI-D
[15:59:53] [PASSED] DVI-A
[15:59:53] [PASSED] Composite
[15:59:53] [PASSED] SVIDEO
[15:59:53] [PASSED] LVDS
[15:59:53] [PASSED] Component
[15:59:53] [PASSED] DIN
[15:59:53] [PASSED] DP
[15:59:53] [PASSED] HDMI-A
[15:59:53] [PASSED] HDMI-B
[15:59:53] [PASSED] TV
[15:59:53] [PASSED] eDP
[15:59:53] [PASSED] Virtual
[15:59:53] [PASSED] DSI
[15:59:53] [PASSED] DPI
[15:59:53] [PASSED] Writeback
[15:59:53] [PASSED] SPI
[15:59:53] [PASSED] USB
[15:59:53] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[15:59:53] =============== [PASSED] drmm_connector_init ===============
[15:59:53] ========= drm_connector_dynamic_init (6 subtests) ==========
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_init
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_init_properties
[15:59:53] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[15:59:53] [PASSED] Unknown
[15:59:53] [PASSED] VGA
[15:59:53] [PASSED] DVI-I
[15:59:53] [PASSED] DVI-D
[15:59:53] [PASSED] DVI-A
[15:59:53] [PASSED] Composite
[15:59:53] [PASSED] SVIDEO
[15:59:53] [PASSED] LVDS
[15:59:53] [PASSED] Component
[15:59:53] [PASSED] DIN
[15:59:53] [PASSED] DP
[15:59:53] [PASSED] HDMI-A
[15:59:53] [PASSED] HDMI-B
[15:59:53] [PASSED] TV
[15:59:53] [PASSED] eDP
[15:59:53] [PASSED] Virtual
[15:59:53] [PASSED] DSI
[15:59:53] [PASSED] DPI
[15:59:53] [PASSED] Writeback
[15:59:53] [PASSED] SPI
[15:59:53] [PASSED] USB
[15:59:53] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[15:59:53] ======== drm_test_drm_connector_dynamic_init_name =========
[15:59:53] [PASSED] Unknown
[15:59:53] [PASSED] VGA
[15:59:53] [PASSED] DVI-I
[15:59:53] [PASSED] DVI-D
[15:59:53] [PASSED] DVI-A
[15:59:53] [PASSED] Composite
[15:59:53] [PASSED] SVIDEO
[15:59:53] [PASSED] LVDS
[15:59:53] [PASSED] Component
[15:59:53] [PASSED] DIN
[15:59:53] [PASSED] DP
[15:59:53] [PASSED] HDMI-A
[15:59:53] [PASSED] HDMI-B
[15:59:53] [PASSED] TV
[15:59:53] [PASSED] eDP
[15:59:53] [PASSED] Virtual
[15:59:53] [PASSED] DSI
[15:59:53] [PASSED] DPI
[15:59:53] [PASSED] Writeback
[15:59:53] [PASSED] SPI
[15:59:53] [PASSED] USB
[15:59:53] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[15:59:53] =========== [PASSED] drm_connector_dynamic_init ============
[15:59:53] ==== drm_connector_dynamic_register_early (4 subtests) =====
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[15:59:53] ====== [PASSED] drm_connector_dynamic_register_early =======
[15:59:53] ======= drm_connector_dynamic_register (7 subtests) ========
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[15:59:53] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[15:59:53] ========= [PASSED] drm_connector_dynamic_register ==========
[15:59:53] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[15:59:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[15:59:53] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[15:59:53] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[15:59:53] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[15:59:53] ========== drm_test_get_tv_mode_from_name_valid ===========
[15:59:53] [PASSED] NTSC
[15:59:53] [PASSED] NTSC-443
[15:59:53] [PASSED] NTSC-J
[15:59:53] [PASSED] PAL
[15:59:53] [PASSED] PAL-M
[15:59:53] [PASSED] PAL-N
[15:59:53] [PASSED] SECAM
[15:59:53] [PASSED] Mono
[15:59:53] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[15:59:53] [PASSED] drm_test_get_tv_mode_from_name_truncated
[15:59:53] ============ [PASSED] drm_get_tv_mode_from_name ============
[15:59:53] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[15:59:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[15:59:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[15:59:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[15:59:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[15:59:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[15:59:53] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[15:59:53] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[15:59:53] [PASSED] VIC 96
[15:59:53] [PASSED] VIC 97
[15:59:53] [PASSED] VIC 101
[15:59:53] [PASSED] VIC 102
[15:59:53] [PASSED] VIC 106
[15:59:53] [PASSED] VIC 107
[15:59:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[15:59:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[15:59:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[15:59:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[15:59:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[15:59:53] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[15:59:53] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[15:59:53] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[15:59:53] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[15:59:53] [PASSED] Automatic
[15:59:53] [PASSED] Full
[15:59:53] [PASSED] Limited 16:235
[15:59:53] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[15:59:53] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[15:59:53] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[15:59:53] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[15:59:53] === drm_test_drm_hdmi_connector_get_output_format_name ====
[15:59:53] [PASSED] RGB
[15:59:53] [PASSED] YUV 4:2:0
[15:59:53] [PASSED] YUV 4:2:2
[15:59:53] [PASSED] YUV 4:4:4
[15:59:53] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[15:59:53] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[15:59:53] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[15:59:53] ============= drm_damage_helper (21 subtests) ==============
[15:59:53] [PASSED] drm_test_damage_iter_no_damage
[15:59:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[15:59:53] [PASSED] drm_test_damage_iter_no_damage_src_moved
[15:59:53] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[15:59:53] [PASSED] drm_test_damage_iter_no_damage_not_visible
[15:59:53] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[15:59:53] [PASSED] drm_test_damage_iter_no_damage_no_fb
[15:59:53] [PASSED] drm_test_damage_iter_simple_damage
[15:59:53] [PASSED] drm_test_damage_iter_single_damage
[15:59:53] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[15:59:53] [PASSED] drm_test_damage_iter_single_damage_outside_src
[15:59:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[15:59:53] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[15:59:53] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[15:59:53] [PASSED] drm_test_damage_iter_single_damage_src_moved
[15:59:53] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[15:59:53] [PASSED] drm_test_damage_iter_damage
[15:59:53] [PASSED] drm_test_damage_iter_damage_one_intersect
[15:59:53] [PASSED] drm_test_damage_iter_damage_one_outside
[15:59:53] [PASSED] drm_test_damage_iter_damage_src_moved
[15:59:53] [PASSED] drm_test_damage_iter_damage_not_visible
[15:59:53] ================ [PASSED] drm_damage_helper ================
[15:59:53] ============== drm_dp_mst_helper (3 subtests) ==============
[15:59:53] ============== drm_test_dp_mst_calc_pbn_mode ==============
[15:59:53] [PASSED] Clock 154000 BPP 30 DSC disabled
[15:59:53] [PASSED] Clock 234000 BPP 30 DSC disabled
[15:59:53] [PASSED] Clock 297000 BPP 24 DSC disabled
[15:59:53] [PASSED] Clock 332880 BPP 24 DSC enabled
[15:59:53] [PASSED] Clock 324540 BPP 24 DSC enabled
[15:59:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[15:59:53] ============== drm_test_dp_mst_calc_pbn_div ===============
[15:59:53] [PASSED] Link rate 2000000 lane count 4
[15:59:53] [PASSED] Link rate 2000000 lane count 2
[15:59:53] [PASSED] Link rate 2000000 lane count 1
[15:59:53] [PASSED] Link rate 1350000 lane count 4
[15:59:53] [PASSED] Link rate 1350000 lane count 2
[15:59:53] [PASSED] Link rate 1350000 lane count 1
[15:59:53] [PASSED] Link rate 1000000 lane count 4
[15:59:53] [PASSED] Link rate 1000000 lane count 2
[15:59:53] [PASSED] Link rate 1000000 lane count 1
[15:59:53] [PASSED] Link rate 810000 lane count 4
[15:59:53] [PASSED] Link rate 810000 lane count 2
[15:59:53] [PASSED] Link rate 810000 lane count 1
[15:59:53] [PASSED] Link rate 540000 lane count 4
[15:59:53] [PASSED] Link rate 540000 lane count 2
[15:59:53] [PASSED] Link rate 540000 lane count 1
[15:59:53] [PASSED] Link rate 270000 lane count 4
[15:59:53] [PASSED] Link rate 270000 lane count 2
[15:59:53] [PASSED] Link rate 270000 lane count 1
[15:59:53] [PASSED] Link rate 162000 lane count 4
[15:59:53] [PASSED] Link rate 162000 lane count 2
[15:59:53] [PASSED] Link rate 162000 lane count 1
[15:59:53] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[15:59:53] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[15:59:53] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[15:59:53] [PASSED] DP_POWER_UP_PHY with port number
[15:59:53] [PASSED] DP_POWER_DOWN_PHY with port number
[15:59:53] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[15:59:53] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[15:59:53] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[15:59:53] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[15:59:53] [PASSED] DP_QUERY_PAYLOAD with port number
[15:59:53] [PASSED] DP_QUERY_PAYLOAD with VCPI
[15:59:53] [PASSED] DP_REMOTE_DPCD_READ with port number
[15:59:53] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[15:59:53] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[15:59:53] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[15:59:53] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[15:59:53] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[15:59:53] [PASSED] DP_REMOTE_I2C_READ with port number
[15:59:53] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[15:59:53] [PASSED] DP_REMOTE_I2C_READ with transactions array
[15:59:53] [PASSED] DP_REMOTE_I2C_WRITE with port number
[15:59:53] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[15:59:53] [PASSED] DP_REMOTE_I2C_WRITE with data array
[15:59:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[15:59:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[15:59:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[15:59:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[15:59:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[15:59:53] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[15:59:53] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[15:59:53] ================ [PASSED] drm_dp_mst_helper ================
[15:59:53] ================== drm_exec (7 subtests) ===================
[15:59:53] [PASSED] sanitycheck
[15:59:53] [PASSED] test_lock
[15:59:53] [PASSED] test_lock_unlock
[15:59:53] [PASSED] test_duplicates
[15:59:53] [PASSED] test_prepare
[15:59:53] [PASSED] test_prepare_array
[15:59:53] [PASSED] test_multiple_loops
[15:59:53] ==================== [PASSED] drm_exec =====================
[15:59:53] =========== drm_format_helper_test (17 subtests) ===========
[15:59:53] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[15:59:53] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[15:59:53] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[15:59:53] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[15:59:53] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[15:59:53] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[15:59:53] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[15:59:53] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[15:59:53] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[15:59:53] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[15:59:53] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[15:59:53] ============== drm_test_fb_xrgb8888_to_mono ===============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[15:59:53] ==================== drm_test_fb_swab =====================
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ================ [PASSED] drm_test_fb_swab =================
[15:59:53] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[15:59:53] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[15:59:53] [PASSED] single_pixel_source_buffer
[15:59:53] [PASSED] single_pixel_clip_rectangle
[15:59:53] [PASSED] well_known_colors
[15:59:53] [PASSED] destination_pitch
[15:59:53] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[15:59:53] ================= drm_test_fb_clip_offset =================
[15:59:53] [PASSED] pass through
[15:59:53] [PASSED] horizontal offset
[15:59:53] [PASSED] vertical offset
[15:59:53] [PASSED] horizontal and vertical offset
[15:59:53] [PASSED] horizontal offset (custom pitch)
[15:59:53] [PASSED] vertical offset (custom pitch)
[15:59:53] [PASSED] horizontal and vertical offset (custom pitch)
[15:59:53] ============= [PASSED] drm_test_fb_clip_offset =============
[15:59:53] =================== drm_test_fb_memcpy ====================
[15:59:53] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[15:59:53] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[15:59:53] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[15:59:53] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[15:59:53] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[15:59:53] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[15:59:53] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[15:59:53] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[15:59:53] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[15:59:53] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[15:59:53] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[15:59:53] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[15:59:53] =============== [PASSED] drm_test_fb_memcpy ================
[15:59:53] ============= [PASSED] drm_format_helper_test ==============
[15:59:53] ================= drm_format (18 subtests) =================
[15:59:53] [PASSED] drm_test_format_block_width_invalid
[15:59:53] [PASSED] drm_test_format_block_width_one_plane
[15:59:53] [PASSED] drm_test_format_block_width_two_plane
[15:59:53] [PASSED] drm_test_format_block_width_three_plane
[15:59:53] [PASSED] drm_test_format_block_width_tiled
[15:59:53] [PASSED] drm_test_format_block_height_invalid
[15:59:53] [PASSED] drm_test_format_block_height_one_plane
[15:59:53] [PASSED] drm_test_format_block_height_two_plane
[15:59:53] [PASSED] drm_test_format_block_height_three_plane
[15:59:53] [PASSED] drm_test_format_block_height_tiled
[15:59:53] [PASSED] drm_test_format_min_pitch_invalid
[15:59:53] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[15:59:53] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[15:59:53] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[15:59:53] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[15:59:53] [PASSED] drm_test_format_min_pitch_two_plane
[15:59:53] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[15:59:53] [PASSED] drm_test_format_min_pitch_tiled
[15:59:53] =================== [PASSED] drm_format ====================
[15:59:53] ============== drm_framebuffer (10 subtests) ===============
[15:59:53] ========== drm_test_framebuffer_check_src_coords ==========
[15:59:53] [PASSED] Success: source fits into fb
[15:59:53] [PASSED] Fail: overflowing fb with x-axis coordinate
[15:59:53] [PASSED] Fail: overflowing fb with y-axis coordinate
[15:59:53] [PASSED] Fail: overflowing fb with source width
[15:59:53] [PASSED] Fail: overflowing fb with source height
[15:59:53] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[15:59:53] [PASSED] drm_test_framebuffer_cleanup
[15:59:53] =============== drm_test_framebuffer_create ===============
[15:59:53] [PASSED] ABGR8888 normal sizes
[15:59:53] [PASSED] ABGR8888 max sizes
[15:59:53] [PASSED] ABGR8888 pitch greater than min required
[15:59:53] [PASSED] ABGR8888 pitch less than min required
[15:59:53] [PASSED] ABGR8888 Invalid width
[15:59:53] [PASSED] ABGR8888 Invalid buffer handle
[15:59:53] [PASSED] No pixel format
[15:59:53] [PASSED] ABGR8888 Width 0
[15:59:53] [PASSED] ABGR8888 Height 0
[15:59:53] [PASSED] ABGR8888 Out of bound height * pitch combination
[15:59:53] [PASSED] ABGR8888 Large buffer offset
[15:59:53] [PASSED] ABGR8888 Buffer offset for inexistent plane
[15:59:53] [PASSED] ABGR8888 Invalid flag
[15:59:53] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[15:59:53] [PASSED] ABGR8888 Valid buffer modifier
[15:59:53] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[15:59:53] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[15:59:53] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[15:59:53] [PASSED] NV12 Normal sizes
[15:59:53] [PASSED] NV12 Max sizes
[15:59:53] [PASSED] NV12 Invalid pitch
[15:59:53] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[15:59:53] [PASSED] NV12 different modifier per-plane
[15:59:53] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[15:59:53] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[15:59:53] [PASSED] NV12 Modifier for inexistent plane
[15:59:53] [PASSED] NV12 Handle for inexistent plane
[15:59:53] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[15:59:53] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[15:59:53] [PASSED] YVU420 Normal sizes
[15:59:53] [PASSED] YVU420 Max sizes
[15:59:53] [PASSED] YVU420 Invalid pitch
[15:59:53] [PASSED] YVU420 Different pitches
[15:59:53] [PASSED] YVU420 Different buffer offsets/pitches
[15:59:53] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[15:59:53] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[15:59:53] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[15:59:53] [PASSED] YVU420 Valid modifier
[15:59:53] [PASSED] YVU420 Different modifiers per plane
[15:59:53] [PASSED] YVU420 Modifier for inexistent plane
[15:59:53] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[15:59:53] [PASSED] X0L2 Normal sizes
[15:59:53] [PASSED] X0L2 Max sizes
[15:59:53] [PASSED] X0L2 Invalid pitch
[15:59:53] [PASSED] X0L2 Pitch greater than minimum required
[15:59:53] [PASSED] X0L2 Handle for inexistent plane
[15:59:53] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[15:59:53] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[15:59:53] [PASSED] X0L2 Valid modifier
[15:59:53] [PASSED] X0L2 Modifier for inexistent plane
[15:59:53] =========== [PASSED] drm_test_framebuffer_create ===========
[15:59:53] [PASSED] drm_test_framebuffer_free
[15:59:53] [PASSED] drm_test_framebuffer_init
[15:59:53] [PASSED] drm_test_framebuffer_init_bad_format
[15:59:53] [PASSED] drm_test_framebuffer_init_dev_mismatch
[15:59:53] [PASSED] drm_test_framebuffer_lookup
[15:59:53] [PASSED] drm_test_framebuffer_lookup_inexistent
[15:59:53] [PASSED] drm_test_framebuffer_modifiers_not_supported
[15:59:53] ================= [PASSED] drm_framebuffer =================
[15:59:53] ================ drm_gem_shmem (8 subtests) ================
[15:59:53] [PASSED] drm_gem_shmem_test_obj_create
[15:59:53] [PASSED] drm_gem_shmem_test_obj_create_private
[15:59:53] [PASSED] drm_gem_shmem_test_pin_pages
[15:59:53] [PASSED] drm_gem_shmem_test_vmap
[15:59:53] [PASSED] drm_gem_shmem_test_get_sg_table
[15:59:53] [PASSED] drm_gem_shmem_test_get_pages_sgt
[15:59:53] [PASSED] drm_gem_shmem_test_madvise
[15:59:53] [PASSED] drm_gem_shmem_test_purge
[15:59:53] ================== [PASSED] drm_gem_shmem ==================
[15:59:53] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[15:59:53] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[15:59:53] [PASSED] Automatic
[15:59:53] [PASSED] Full
[15:59:53] [PASSED] Limited 16:235
[15:59:53] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[15:59:53] [PASSED] drm_test_check_disable_connector
[15:59:53] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[15:59:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[15:59:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[15:59:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[15:59:53] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[15:59:53] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[15:59:53] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[15:59:53] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[15:59:53] [PASSED] drm_test_check_output_bpc_dvi
[15:59:53] [PASSED] drm_test_check_output_bpc_format_vic_1
[15:59:53] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[15:59:53] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[15:59:53] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[15:59:53] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[15:59:53] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[15:59:53] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[15:59:53] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[15:59:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[15:59:53] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[15:59:53] [PASSED] drm_test_check_broadcast_rgb_value
[15:59:53] [PASSED] drm_test_check_bpc_8_value
[15:59:53] [PASSED] drm_test_check_bpc_10_value
[15:59:53] [PASSED] drm_test_check_bpc_12_value
[15:59:53] [PASSED] drm_test_check_format_value
[15:59:53] [PASSED] drm_test_check_tmds_char_value
[15:59:53] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[15:59:53] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[15:59:53] [PASSED] drm_test_check_mode_valid
[15:59:53] [PASSED] drm_test_check_mode_valid_reject
[15:59:53] [PASSED] drm_test_check_mode_valid_reject_rate
[15:59:53] [PASSED] drm_test_check_mode_valid_reject_max_clock
[15:59:53] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[15:59:53] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[15:59:53] [PASSED] drm_test_check_infoframes
[15:59:53] [PASSED] drm_test_check_reject_avi_infoframe
[15:59:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[15:59:53] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[15:59:53] [PASSED] drm_test_check_reject_audio_infoframe
[15:59:53] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[15:59:53] ================= drm_managed (2 subtests) =================
[15:59:53] [PASSED] drm_test_managed_release_action
[15:59:53] [PASSED] drm_test_managed_run_action
[15:59:53] =================== [PASSED] drm_managed ===================
[15:59:53] =================== drm_mm (6 subtests) ====================
[15:59:53] [PASSED] drm_test_mm_init
[15:59:53] [PASSED] drm_test_mm_debug
[15:59:53] [PASSED] drm_test_mm_align32
[15:59:53] [PASSED] drm_test_mm_align64
[15:59:53] [PASSED] drm_test_mm_lowest
[15:59:53] [PASSED] drm_test_mm_highest
[15:59:53] ===================== [PASSED] drm_mm ======================
[15:59:53] ============= drm_modes_analog_tv (5 subtests) =============
[15:59:53] [PASSED] drm_test_modes_analog_tv_mono_576i
[15:59:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[15:59:53] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[15:59:53] [PASSED] drm_test_modes_analog_tv_pal_576i
[15:59:53] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[15:59:53] =============== [PASSED] drm_modes_analog_tv ===============
[15:59:53] ============== drm_plane_helper (2 subtests) ===============
[15:59:53] =============== drm_test_check_plane_state ================
[15:59:53] [PASSED] clipping_simple
[15:59:53] [PASSED] clipping_rotate_reflect
[15:59:53] [PASSED] positioning_simple
[15:59:53] [PASSED] upscaling
[15:59:53] [PASSED] downscaling
[15:59:53] [PASSED] rounding1
[15:59:53] [PASSED] rounding2
[15:59:53] [PASSED] rounding3
[15:59:53] [PASSED] rounding4
[15:59:53] =========== [PASSED] drm_test_check_plane_state ============
[15:59:53] =========== drm_test_check_invalid_plane_state ============
[15:59:53] [PASSED] positioning_invalid
[15:59:53] [PASSED] upscaling_invalid
[15:59:53] [PASSED] downscaling_invalid
[15:59:53] ======= [PASSED] drm_test_check_invalid_plane_state ========
[15:59:53] ================ [PASSED] drm_plane_helper =================
[15:59:53] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[15:59:53] ====== drm_test_connector_helper_tv_get_modes_check =======
[15:59:53] [PASSED] None
[15:59:53] [PASSED] PAL
[15:59:53] [PASSED] NTSC
[15:59:53] [PASSED] Both, NTSC Default
[15:59:53] [PASSED] Both, PAL Default
[15:59:53] [PASSED] Both, NTSC Default, with PAL on command-line
[15:59:53] [PASSED] Both, PAL Default, with NTSC on command-line
[15:59:53] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[15:59:53] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[15:59:53] ================== drm_rect (9 subtests) ===================
[15:59:53] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[15:59:53] [PASSED] drm_test_rect_clip_scaled_not_clipped
[15:59:53] [PASSED] drm_test_rect_clip_scaled_clipped
[15:59:53] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[15:59:53] ================= drm_test_rect_intersect =================
[15:59:53] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[15:59:53] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[15:59:53] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[15:59:53] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[15:59:53] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[15:59:53] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[15:59:53] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[15:59:53] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[15:59:53] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[15:59:53] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[15:59:53] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[15:59:53] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[15:59:53] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[15:59:53] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[15:59:53] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[15:59:53] ============= [PASSED] drm_test_rect_intersect =============
[15:59:53] ================ drm_test_rect_calc_hscale ================
[15:59:53] [PASSED] normal use
[15:59:53] [PASSED] out of max range
[15:59:53] [PASSED] out of min range
[15:59:53] [PASSED] zero dst
[15:59:53] [PASSED] negative src
[15:59:53] [PASSED] negative dst
[15:59:53] ============ [PASSED] drm_test_rect_calc_hscale ============
[15:59:53] ================ drm_test_rect_calc_vscale ================
[15:59:53] [PASSED] normal use
[15:59:53] [PASSED] out of max range
[15:59:53] [PASSED] out of min range
[15:59:53] [PASSED] zero dst
[15:59:53] [PASSED] negative src
[15:59:53] [PASSED] negative dst
[15:59:53] ============ [PASSED] drm_test_rect_calc_vscale ============
[15:59:53] ================== drm_test_rect_rotate ===================
[15:59:53] [PASSED] reflect-x
[15:59:53] [PASSED] reflect-y
[15:59:53] [PASSED] rotate-0
[15:59:53] [PASSED] rotate-90
[15:59:53] [PASSED] rotate-180
[15:59:53] [PASSED] rotate-270
[15:59:53] ============== [PASSED] drm_test_rect_rotate ===============
[15:59:53] ================ drm_test_rect_rotate_inv =================
[15:59:53] [PASSED] reflect-x
[15:59:53] [PASSED] reflect-y
[15:59:53] [PASSED] rotate-0
[15:59:53] [PASSED] rotate-90
[15:59:53] [PASSED] rotate-180
[15:59:53] [PASSED] rotate-270
[15:59:53] ============ [PASSED] drm_test_rect_rotate_inv =============
[15:59:53] ==================== [PASSED] drm_rect =====================
[15:59:53] ============ drm_sysfb_modeset_test (1 subtest) ============
[15:59:53] ============ drm_test_sysfb_build_fourcc_list =============
[15:59:53] [PASSED] no native formats
[15:59:53] [PASSED] XRGB8888 as native format
[15:59:53] [PASSED] remove duplicates
[15:59:53] [PASSED] convert alpha formats
[15:59:53] [PASSED] random formats
[15:59:53] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[15:59:53] ============= [PASSED] drm_sysfb_modeset_test ==============
[15:59:53] ================== drm_fixp (2 subtests) ===================
[15:59:53] [PASSED] drm_test_int2fixp
[15:59:53] [PASSED] drm_test_sm2fixp
[15:59:53] ==================== [PASSED] drm_fixp =====================
[15:59:53] ============================================================
[15:59:53] Testing complete. Ran 621 tests: passed: 621
[15:59:53] Elapsed time: 25.852s total, 1.718s configuring, 23.962s building, 0.138s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[15:59:53] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[15:59:55] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[16:00:05] Starting KUnit Kernel (1/1)...
[16:00:05] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[16:00:05] ================= ttm_device (5 subtests) ==================
[16:00:05] [PASSED] ttm_device_init_basic
[16:00:05] [PASSED] ttm_device_init_multiple
[16:00:05] [PASSED] ttm_device_fini_basic
[16:00:05] [PASSED] ttm_device_init_no_vma_man
[16:00:05] ================== ttm_device_init_pools ==================
[16:00:05] [PASSED] No DMA allocations, no DMA32 required
[16:00:05] [PASSED] DMA allocations, DMA32 required
[16:00:05] [PASSED] No DMA allocations, DMA32 required
[16:00:05] [PASSED] DMA allocations, no DMA32 required
[16:00:05] ============== [PASSED] ttm_device_init_pools ==============
[16:00:05] =================== [PASSED] ttm_device ====================
[16:00:05] ================== ttm_pool (8 subtests) ===================
[16:00:05] ================== ttm_pool_alloc_basic ===================
[16:00:05] [PASSED] One page
[16:00:05] [PASSED] More than one page
[16:00:05] [PASSED] Above the allocation limit
[16:00:05] [PASSED] One page, with coherent DMA mappings enabled
[16:00:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:00:05] ============== [PASSED] ttm_pool_alloc_basic ===============
[16:00:05] ============== ttm_pool_alloc_basic_dma_addr ==============
[16:00:05] [PASSED] One page
[16:00:05] [PASSED] More than one page
[16:00:05] [PASSED] Above the allocation limit
[16:00:05] [PASSED] One page, with coherent DMA mappings enabled
[16:00:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[16:00:05] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[16:00:05] [PASSED] ttm_pool_alloc_order_caching_match
[16:00:05] [PASSED] ttm_pool_alloc_caching_mismatch
[16:00:05] [PASSED] ttm_pool_alloc_order_mismatch
[16:00:05] [PASSED] ttm_pool_free_dma_alloc
[16:00:05] [PASSED] ttm_pool_free_no_dma_alloc
[16:00:05] [PASSED] ttm_pool_fini_basic
[16:00:05] ==================== [PASSED] ttm_pool =====================
[16:00:05] ================ ttm_resource (8 subtests) =================
[16:00:05] ================= ttm_resource_init_basic =================
[16:00:05] [PASSED] Init resource in TTM_PL_SYSTEM
[16:00:05] [PASSED] Init resource in TTM_PL_VRAM
[16:00:05] [PASSED] Init resource in a private placement
[16:00:05] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[16:00:05] ============= [PASSED] ttm_resource_init_basic =============
[16:00:05] [PASSED] ttm_resource_init_pinned
[16:00:05] [PASSED] ttm_resource_fini_basic
[16:00:05] [PASSED] ttm_resource_manager_init_basic
[16:00:05] [PASSED] ttm_resource_manager_usage_basic
[16:00:05] [PASSED] ttm_resource_manager_set_used_basic
[16:00:05] [PASSED] ttm_sys_man_alloc_basic
[16:00:05] [PASSED] ttm_sys_man_free_basic
[16:00:05] ================== [PASSED] ttm_resource ===================
[16:00:05] =================== ttm_tt (15 subtests) ===================
[16:00:05] ==================== ttm_tt_init_basic ====================
[16:00:05] [PASSED] Page-aligned size
[16:00:05] [PASSED] Extra pages requested
[16:00:05] ================ [PASSED] ttm_tt_init_basic ================
[16:00:05] [PASSED] ttm_tt_init_misaligned
[16:00:05] [PASSED] ttm_tt_fini_basic
[16:00:05] [PASSED] ttm_tt_fini_sg
[16:00:05] [PASSED] ttm_tt_fini_shmem
[16:00:05] [PASSED] ttm_tt_create_basic
[16:00:05] [PASSED] ttm_tt_create_invalid_bo_type
[16:00:05] [PASSED] ttm_tt_create_ttm_exists
[16:00:05] [PASSED] ttm_tt_create_failed
[16:00:05] [PASSED] ttm_tt_destroy_basic
[16:00:05] [PASSED] ttm_tt_populate_null_ttm
[16:00:05] [PASSED] ttm_tt_populate_populated_ttm
[16:00:05] [PASSED] ttm_tt_unpopulate_basic
[16:00:05] [PASSED] ttm_tt_unpopulate_empty_ttm
[16:00:05] [PASSED] ttm_tt_swapin_basic
[16:00:05] ===================== [PASSED] ttm_tt ======================
[16:00:05] =================== ttm_bo (14 subtests) ===================
[16:00:05] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[16:00:05] [PASSED] Cannot be interrupted and sleeps
[16:00:05] [PASSED] Cannot be interrupted, locks straight away
[16:00:05] [PASSED] Can be interrupted, sleeps
[16:00:05] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[16:00:05] [PASSED] ttm_bo_reserve_locked_no_sleep
[16:00:05] [PASSED] ttm_bo_reserve_no_wait_ticket
[16:00:05] [PASSED] ttm_bo_reserve_double_resv
[16:00:05] [PASSED] ttm_bo_reserve_interrupted
[16:00:05] [PASSED] ttm_bo_reserve_deadlock
[16:00:05] [PASSED] ttm_bo_unreserve_basic
[16:00:05] [PASSED] ttm_bo_unreserve_pinned
[16:00:05] [PASSED] ttm_bo_unreserve_bulk
[16:00:05] [PASSED] ttm_bo_fini_basic
[16:00:05] [PASSED] ttm_bo_fini_shared_resv
[16:00:05] [PASSED] ttm_bo_pin_basic
[16:00:05] [PASSED] ttm_bo_pin_unpin_resource
[16:00:05] [PASSED] ttm_bo_multiple_pin_one_unpin
[16:00:05] ===================== [PASSED] ttm_bo ======================
[16:00:05] ============== ttm_bo_validate (22 subtests) ===============
[16:00:05] ============== ttm_bo_init_reserved_sys_man ===============
[16:00:05] [PASSED] Buffer object for userspace
[16:00:05] [PASSED] Kernel buffer object
[16:00:05] [PASSED] Shared buffer object
[16:00:05] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[16:00:05] ============== ttm_bo_init_reserved_mock_man ==============
[16:00:05] [PASSED] Buffer object for userspace
[16:00:05] [PASSED] Kernel buffer object
[16:00:05] [PASSED] Shared buffer object
[16:00:05] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[16:00:05] [PASSED] ttm_bo_init_reserved_resv
[16:00:05] ================== ttm_bo_validate_basic ==================
[16:00:05] [PASSED] Buffer object for userspace
[16:00:05] [PASSED] Kernel buffer object
[16:00:05] [PASSED] Shared buffer object
[16:00:05] ============== [PASSED] ttm_bo_validate_basic ==============
[16:00:05] [PASSED] ttm_bo_validate_invalid_placement
[16:00:05] ============= ttm_bo_validate_same_placement ==============
[16:00:05] [PASSED] System manager
[16:00:05] [PASSED] VRAM manager
[16:00:05] ========= [PASSED] ttm_bo_validate_same_placement ==========
[16:00:05] [PASSED] ttm_bo_validate_failed_alloc
[16:00:05] [PASSED] ttm_bo_validate_pinned
[16:00:05] [PASSED] ttm_bo_validate_busy_placement
[16:00:05] ================ ttm_bo_validate_multihop =================
[16:00:05] [PASSED] Buffer object for userspace
[16:00:05] [PASSED] Kernel buffer object
[16:00:05] [PASSED] Shared buffer object
[16:00:05] ============ [PASSED] ttm_bo_validate_multihop =============
[16:00:05] ========== ttm_bo_validate_no_placement_signaled ==========
[16:00:05] [PASSED] Buffer object in system domain, no page vector
[16:00:05] [PASSED] Buffer object in system domain with an existing page vector
[16:00:05] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[16:00:05] ======== ttm_bo_validate_no_placement_not_signaled ========
[16:00:05] [PASSED] Buffer object for userspace
[16:00:05] [PASSED] Kernel buffer object
[16:00:05] [PASSED] Shared buffer object
[16:00:05] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[16:00:05] [PASSED] ttm_bo_validate_move_fence_signaled
[16:00:05] ========= ttm_bo_validate_move_fence_not_signaled =========
[16:00:05] [PASSED] Waits for GPU
[16:00:05] [PASSED] Tries to lock straight away
[16:00:05] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[16:00:05] [PASSED] ttm_bo_validate_swapout
[16:00:05] [PASSED] ttm_bo_validate_happy_evict
[16:00:05] [PASSED] ttm_bo_validate_all_pinned_evict
[16:00:05] [PASSED] ttm_bo_validate_allowed_only_evict
[16:00:05] [PASSED] ttm_bo_validate_deleted_evict
[16:00:05] [PASSED] ttm_bo_validate_busy_domain_evict
[16:00:05] [PASSED] ttm_bo_validate_evict_gutting
[16:00:05] [PASSED] ttm_bo_validate_recrusive_evict
[16:00:05] ================= [PASSED] ttm_bo_validate =================
[16:00:05] ============================================================
[16:00:05] Testing complete. Ran 102 tests: passed: 102
[16:00:05] Elapsed time: 11.602s total, 1.759s configuring, 9.628s building, 0.179s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
2026-05-15 16:00 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-05-15 16:10 ` Suraj Kandpal
2026-05-18 14:17 ` Ville Syrjälä
2026-05-15 16:52 ` ✓ Xe.CI.BAT: success for Revert "drm/i915/backlight: Remove try_vesa_interface" Patchwork
` (7 subsequent siblings)
9 siblings, 1 reply; 22+ messages in thread
From: Suraj Kandpal @ 2026-05-15 16:10 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, gustavo.sousa, jani.nikula,
Suraj Kandpal
Starting with display version 30, the per-pipe frame timestamp is read
from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the display
and select the appropriate register based on DISPLAY_VER(), and update
all callers intel_vblank accordingly.
Bspec: 79482
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
v1 -> v2:
- Define registers in correct location (Jani)
- Use the intel_display_wa() helper to select the correct register (Gustavo)
- Fix early vblank timeout issue when DMC is not loaded
.../gpu/drm/i915/display/intel_display_wa.c | 2 ++
.../gpu/drm/i915/display/intel_display_wa.h | 1 +
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 ++++++
drivers/gpu/drm/i915/display/intel_vblank.c | 18 ++++++++++++++----
4 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 7d3d63a59882..44c2a503c911 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -110,6 +110,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
return DISPLAY_VERx100(display) == 3000 ||
DISPLAY_VERx100(display) == 2000 ||
DISPLAY_VERx100(display) == 1401;
+ case INTEL_DISPLAY_WA_14022946399:
+ return DISPLAY_VER(display) >= 30;
case INTEL_DISPLAY_WA_14025769978:
return DISPLAY_VER(display) == 35;
case INTEL_DISPLAY_WA_15013987218:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 15fec843f15e..884463a894c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -42,6 +42,7 @@ enum intel_display_wa {
INTEL_DISPLAY_WA_14014143976,
INTEL_DISPLAY_WA_14016740474,
INTEL_DISPLAY_WA_14020863754,
+ INTEL_DISPLAY_WA_14022946399,
INTEL_DISPLAY_WA_14025769978,
INTEL_DISPLAY_WA_15013987218,
INTEL_DISPLAY_WA_15018326506,
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index 38e342b45af0..985642a79a52 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -644,4 +644,10 @@ enum pipedmc_event_id {
#define _PIPEDMC_DCB_BALANCE_RESET_B 0x986a8
#define PIPEDMC_DCB_BALANCE_RESET(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_BALANCE_RESET_A,\
_PIPEDMC_DCB_BALANCE_RESET_B)
+
+#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
+#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
+#define PIPEDMC_FRMTMSTMP(pipe) \
+ _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A, _PIPEDMC_FRMTMSTMP_B)
+
#endif /* __INTEL_DMC_REGS_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 28d81199792e..145c342f445f 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -15,6 +15,8 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_display_wa.h"
+#include "intel_dmc_regs.h"
#include "intel_vblank.h"
#include "intel_vrr.h"
@@ -156,8 +158,12 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
* pipe frame time stamp. The time stamp value
* is sampled at every start of vertical blank.
*/
- scan_prev_time = intel_de_read_fw(display,
- PIPE_FRMTMSTMP(crtc->pipe));
+ if (intel_display_wa(display, INTEL_DISPLAY_WA_14022946399))
+ scan_prev_time = intel_de_read_fw(display,
+ PIPEDMC_FRMTMSTMP(crtc->pipe));
+ else
+ scan_prev_time = intel_de_read_fw(display,
+ PIPE_FRMTMSTMP(crtc->pipe));
/*
* The TIMESTAMP_CTR register has the current
@@ -165,8 +171,12 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
*/
scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR);
- scan_post_time = intel_de_read_fw(display,
- PIPE_FRMTMSTMP(crtc->pipe));
+ if (intel_display_wa(display, INTEL_DISPLAY_WA_14022946399))
+ scan_post_time = intel_de_read_fw(display,
+ PIPEDMC_FRMTMSTMP(crtc->pipe));
+ else
+ scan_post_time = intel_de_read_fw(display,
+ PIPE_FRMTMSTMP(crtc->pipe));
} while (scan_post_time != scan_prev_time);
return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* ✓ Xe.CI.BAT: success for Revert "drm/i915/backlight: Remove try_vesa_interface"
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
2026-05-15 16:00 ` ✓ CI.KUnit: success for " Patchwork
2026-05-15 16:10 ` [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
@ 2026-05-15 16:52 ` Patchwork
2026-05-15 17:19 ` ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2) Patchwork
` (6 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-15 16:52 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 968 bytes --]
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface"
URL : https://patchwork.freedesktop.org/series/166667/
State : success
== Summary ==
CI Bug Log - changes from xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3_BAT -> xe-pw-166667v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3 -> xe-pw-166667v1
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3: 25de7fb53bca724e7864b6bd8280aa1ec59429e3
xe-pw-166667v1: 166667v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v1/index.html
[-- Attachment #2: Type: text/html, Size: 1526 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2)
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (2 preceding siblings ...)
2026-05-15 16:52 ` ✓ Xe.CI.BAT: success for Revert "drm/i915/backlight: Remove try_vesa_interface" Patchwork
@ 2026-05-15 17:19 ` Patchwork
2026-05-15 17:57 ` ✓ Xe.CI.BAT: " Patchwork
` (5 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-15 17:19 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2)
URL : https://patchwork.freedesktop.org/series/166667/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[17:18:01] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:18:05] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:18:36] Starting KUnit Kernel (1/1)...
[17:18:36] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:18:36] ================== guc_buf (11 subtests) ===================
[17:18:36] [PASSED] test_smallest
[17:18:36] [PASSED] test_largest
[17:18:36] [PASSED] test_granular
[17:18:36] [PASSED] test_unique
[17:18:36] [PASSED] test_overlap
[17:18:36] [PASSED] test_reusable
[17:18:36] [PASSED] test_too_big
[17:18:36] [PASSED] test_flush
[17:18:36] [PASSED] test_lookup
[17:18:36] [PASSED] test_data
[17:18:36] [PASSED] test_class
[17:18:36] ===================== [PASSED] guc_buf =====================
[17:18:36] =================== guc_dbm (7 subtests) ===================
[17:18:36] [PASSED] test_empty
[17:18:36] [PASSED] test_default
[17:18:36] ======================== test_size ========================
[17:18:36] [PASSED] 4
[17:18:36] [PASSED] 8
[17:18:36] [PASSED] 32
[17:18:36] [PASSED] 256
[17:18:36] ==================== [PASSED] test_size ====================
[17:18:36] ======================= test_reuse ========================
[17:18:36] [PASSED] 4
[17:18:36] [PASSED] 8
[17:18:36] [PASSED] 32
[17:18:36] [PASSED] 256
[17:18:36] =================== [PASSED] test_reuse ====================
[17:18:36] =================== test_range_overlap ====================
[17:18:36] [PASSED] 4
[17:18:36] [PASSED] 8
[17:18:36] [PASSED] 32
[17:18:36] [PASSED] 256
[17:18:36] =============== [PASSED] test_range_overlap ================
[17:18:36] =================== test_range_compact ====================
[17:18:36] [PASSED] 4
[17:18:36] [PASSED] 8
[17:18:36] [PASSED] 32
[17:18:36] [PASSED] 256
[17:18:36] =============== [PASSED] test_range_compact ================
[17:18:36] ==================== test_range_spare =====================
[17:18:36] [PASSED] 4
[17:18:36] [PASSED] 8
[17:18:36] [PASSED] 32
[17:18:36] [PASSED] 256
[17:18:36] ================ [PASSED] test_range_spare =================
[17:18:36] ===================== [PASSED] guc_dbm =====================
[17:18:36] =================== guc_idm (6 subtests) ===================
[17:18:36] [PASSED] bad_init
[17:18:36] [PASSED] no_init
[17:18:36] [PASSED] init_fini
[17:18:36] [PASSED] check_used
[17:18:36] [PASSED] check_quota
[17:18:36] [PASSED] check_all
[17:18:36] ===================== [PASSED] guc_idm =====================
[17:18:36] ================== no_relay (3 subtests) ===================
[17:18:36] [PASSED] xe_drops_guc2pf_if_not_ready
[17:18:36] [PASSED] xe_drops_guc2vf_if_not_ready
[17:18:36] [PASSED] xe_rejects_send_if_not_ready
[17:18:36] ==================== [PASSED] no_relay =====================
[17:18:36] ================== pf_relay (14 subtests) ==================
[17:18:36] [PASSED] pf_rejects_guc2pf_too_short
[17:18:36] [PASSED] pf_rejects_guc2pf_too_long
[17:18:36] [PASSED] pf_rejects_guc2pf_no_payload
[17:18:36] [PASSED] pf_fails_no_payload
[17:18:36] [PASSED] pf_fails_bad_origin
[17:18:36] [PASSED] pf_fails_bad_type
[17:18:36] [PASSED] pf_txn_reports_error
[17:18:36] [PASSED] pf_txn_sends_pf2guc
[17:18:36] [PASSED] pf_sends_pf2guc
[17:18:36] [SKIPPED] pf_loopback_nop
[17:18:36] [SKIPPED] pf_loopback_echo
[17:18:36] [SKIPPED] pf_loopback_fail
[17:18:36] [SKIPPED] pf_loopback_busy
[17:18:36] [SKIPPED] pf_loopback_retry
[17:18:36] ==================== [PASSED] pf_relay =====================
[17:18:36] ================== vf_relay (3 subtests) ===================
[17:18:36] [PASSED] vf_rejects_guc2vf_too_short
[17:18:36] [PASSED] vf_rejects_guc2vf_too_long
[17:18:36] [PASSED] vf_rejects_guc2vf_no_payload
[17:18:36] ==================== [PASSED] vf_relay =====================
[17:18:36] ================ pf_gt_config (9 subtests) =================
[17:18:36] [PASSED] fair_contexts_1vf
[17:18:36] [PASSED] fair_doorbells_1vf
[17:18:36] [PASSED] fair_ggtt_1vf
[17:18:36] ====================== fair_vram_1vf ======================
[17:18:36] [PASSED] 3.50 GiB
[17:18:36] [PASSED] 11.5 GiB
[17:18:36] [PASSED] 15.5 GiB
[17:18:36] [PASSED] 31.5 GiB
[17:18:36] [PASSED] 63.5 GiB
[17:18:36] [PASSED] 1.91 GiB
[17:18:36] ================== [PASSED] fair_vram_1vf ==================
[17:18:36] ================ fair_vram_1vf_admin_only =================
[17:18:36] [PASSED] 3.50 GiB
[17:18:36] [PASSED] 11.5 GiB
[17:18:36] [PASSED] 15.5 GiB
[17:18:36] [PASSED] 31.5 GiB
[17:18:36] [PASSED] 63.5 GiB
[17:18:36] [PASSED] 1.91 GiB
[17:18:36] ============ [PASSED] fair_vram_1vf_admin_only =============
[17:18:36] ====================== fair_contexts ======================
[17:18:36] [PASSED] 1 VF
[17:18:36] [PASSED] 2 VFs
[17:18:36] [PASSED] 3 VFs
[17:18:36] [PASSED] 4 VFs
[17:18:36] [PASSED] 5 VFs
[17:18:36] [PASSED] 6 VFs
[17:18:36] [PASSED] 7 VFs
[17:18:36] [PASSED] 8 VFs
[17:18:36] [PASSED] 9 VFs
[17:18:36] [PASSED] 10 VFs
[17:18:36] [PASSED] 11 VFs
[17:18:36] [PASSED] 12 VFs
[17:18:36] [PASSED] 13 VFs
[17:18:36] [PASSED] 14 VFs
[17:18:36] [PASSED] 15 VFs
[17:18:36] [PASSED] 16 VFs
[17:18:36] [PASSED] 17 VFs
[17:18:36] [PASSED] 18 VFs
[17:18:36] [PASSED] 19 VFs
[17:18:36] [PASSED] 20 VFs
[17:18:36] [PASSED] 21 VFs
[17:18:36] [PASSED] 22 VFs
[17:18:36] [PASSED] 23 VFs
[17:18:36] [PASSED] 24 VFs
[17:18:36] [PASSED] 25 VFs
[17:18:36] [PASSED] 26 VFs
[17:18:36] [PASSED] 27 VFs
[17:18:36] [PASSED] 28 VFs
[17:18:36] [PASSED] 29 VFs
[17:18:36] [PASSED] 30 VFs
[17:18:36] [PASSED] 31 VFs
[17:18:36] [PASSED] 32 VFs
[17:18:36] [PASSED] 33 VFs
[17:18:36] [PASSED] 34 VFs
[17:18:36] [PASSED] 35 VFs
[17:18:36] [PASSED] 36 VFs
[17:18:36] [PASSED] 37 VFs
[17:18:36] [PASSED] 38 VFs
[17:18:36] [PASSED] 39 VFs
[17:18:36] [PASSED] 40 VFs
[17:18:36] [PASSED] 41 VFs
[17:18:36] [PASSED] 42 VFs
[17:18:36] [PASSED] 43 VFs
[17:18:36] [PASSED] 44 VFs
[17:18:36] [PASSED] 45 VFs
[17:18:36] [PASSED] 46 VFs
[17:18:36] [PASSED] 47 VFs
[17:18:36] [PASSED] 48 VFs
[17:18:36] [PASSED] 49 VFs
[17:18:36] [PASSED] 50 VFs
[17:18:36] [PASSED] 51 VFs
[17:18:36] [PASSED] 52 VFs
[17:18:36] [PASSED] 53 VFs
[17:18:36] [PASSED] 54 VFs
[17:18:36] [PASSED] 55 VFs
[17:18:36] [PASSED] 56 VFs
[17:18:36] [PASSED] 57 VFs
[17:18:36] [PASSED] 58 VFs
[17:18:36] [PASSED] 59 VFs
[17:18:36] [PASSED] 60 VFs
[17:18:36] [PASSED] 61 VFs
[17:18:36] [PASSED] 62 VFs
[17:18:36] [PASSED] 63 VFs
[17:18:36] ================== [PASSED] fair_contexts ==================
[17:18:36] ===================== fair_doorbells ======================
[17:18:36] [PASSED] 1 VF
[17:18:36] [PASSED] 2 VFs
[17:18:36] [PASSED] 3 VFs
[17:18:36] [PASSED] 4 VFs
[17:18:36] [PASSED] 5 VFs
[17:18:36] [PASSED] 6 VFs
[17:18:36] [PASSED] 7 VFs
[17:18:36] [PASSED] 8 VFs
[17:18:36] [PASSED] 9 VFs
[17:18:36] [PASSED] 10 VFs
[17:18:36] [PASSED] 11 VFs
[17:18:36] [PASSED] 12 VFs
[17:18:36] [PASSED] 13 VFs
[17:18:36] [PASSED] 14 VFs
[17:18:36] [PASSED] 15 VFs
[17:18:36] [PASSED] 16 VFs
[17:18:36] [PASSED] 17 VFs
[17:18:36] [PASSED] 18 VFs
[17:18:36] [PASSED] 19 VFs
[17:18:36] [PASSED] 20 VFs
[17:18:36] [PASSED] 21 VFs
[17:18:36] [PASSED] 22 VFs
[17:18:36] [PASSED] 23 VFs
[17:18:36] [PASSED] 24 VFs
[17:18:36] [PASSED] 25 VFs
[17:18:36] [PASSED] 26 VFs
[17:18:36] [PASSED] 27 VFs
[17:18:36] [PASSED] 28 VFs
[17:18:36] [PASSED] 29 VFs
[17:18:36] [PASSED] 30 VFs
[17:18:36] [PASSED] 31 VFs
[17:18:36] [PASSED] 32 VFs
[17:18:36] [PASSED] 33 VFs
[17:18:36] [PASSED] 34 VFs
[17:18:36] [PASSED] 35 VFs
[17:18:36] [PASSED] 36 VFs
[17:18:36] [PASSED] 37 VFs
[17:18:36] [PASSED] 38 VFs
[17:18:36] [PASSED] 39 VFs
[17:18:36] [PASSED] 40 VFs
[17:18:36] [PASSED] 41 VFs
[17:18:36] [PASSED] 42 VFs
[17:18:36] [PASSED] 43 VFs
[17:18:36] [PASSED] 44 VFs
[17:18:36] [PASSED] 45 VFs
[17:18:36] [PASSED] 46 VFs
[17:18:36] [PASSED] 47 VFs
[17:18:36] [PASSED] 48 VFs
[17:18:36] [PASSED] 49 VFs
[17:18:36] [PASSED] 50 VFs
[17:18:36] [PASSED] 51 VFs
[17:18:36] [PASSED] 52 VFs
[17:18:36] [PASSED] 53 VFs
[17:18:36] [PASSED] 54 VFs
[17:18:36] [PASSED] 55 VFs
[17:18:36] [PASSED] 56 VFs
[17:18:36] [PASSED] 57 VFs
[17:18:36] [PASSED] 58 VFs
[17:18:36] [PASSED] 59 VFs
[17:18:36] [PASSED] 60 VFs
[17:18:36] [PASSED] 61 VFs
[17:18:36] [PASSED] 62 VFs
[17:18:36] [PASSED] 63 VFs
[17:18:36] ================= [PASSED] fair_doorbells ==================
[17:18:36] ======================== fair_ggtt ========================
[17:18:36] [PASSED] 1 VF
[17:18:36] [PASSED] 2 VFs
[17:18:36] [PASSED] 3 VFs
[17:18:36] [PASSED] 4 VFs
[17:18:36] [PASSED] 5 VFs
[17:18:36] [PASSED] 6 VFs
[17:18:36] [PASSED] 7 VFs
[17:18:36] [PASSED] 8 VFs
[17:18:36] [PASSED] 9 VFs
[17:18:36] [PASSED] 10 VFs
[17:18:36] [PASSED] 11 VFs
[17:18:36] [PASSED] 12 VFs
[17:18:36] [PASSED] 13 VFs
[17:18:36] [PASSED] 14 VFs
[17:18:36] [PASSED] 15 VFs
[17:18:36] [PASSED] 16 VFs
[17:18:36] [PASSED] 17 VFs
[17:18:36] [PASSED] 18 VFs
[17:18:36] [PASSED] 19 VFs
[17:18:36] [PASSED] 20 VFs
[17:18:36] [PASSED] 21 VFs
[17:18:36] [PASSED] 22 VFs
[17:18:36] [PASSED] 23 VFs
[17:18:36] [PASSED] 24 VFs
[17:18:36] [PASSED] 25 VFs
[17:18:36] [PASSED] 26 VFs
[17:18:36] [PASSED] 27 VFs
[17:18:36] [PASSED] 28 VFs
[17:18:36] [PASSED] 29 VFs
[17:18:36] [PASSED] 30 VFs
[17:18:36] [PASSED] 31 VFs
[17:18:36] [PASSED] 32 VFs
[17:18:36] [PASSED] 33 VFs
[17:18:36] [PASSED] 34 VFs
[17:18:36] [PASSED] 35 VFs
[17:18:36] [PASSED] 36 VFs
[17:18:36] [PASSED] 37 VFs
[17:18:36] [PASSED] 38 VFs
[17:18:36] [PASSED] 39 VFs
[17:18:36] [PASSED] 40 VFs
[17:18:36] [PASSED] 41 VFs
[17:18:36] [PASSED] 42 VFs
[17:18:36] [PASSED] 43 VFs
[17:18:36] [PASSED] 44 VFs
[17:18:36] [PASSED] 45 VFs
[17:18:36] [PASSED] 46 VFs
[17:18:36] [PASSED] 47 VFs
[17:18:36] [PASSED] 48 VFs
[17:18:36] [PASSED] 49 VFs
[17:18:36] [PASSED] 50 VFs
[17:18:36] [PASSED] 51 VFs
[17:18:36] [PASSED] 52 VFs
[17:18:36] [PASSED] 53 VFs
[17:18:36] [PASSED] 54 VFs
[17:18:36] [PASSED] 55 VFs
[17:18:36] [PASSED] 56 VFs
[17:18:36] [PASSED] 57 VFs
[17:18:36] [PASSED] 58 VFs
[17:18:36] [PASSED] 59 VFs
[17:18:36] [PASSED] 60 VFs
[17:18:36] [PASSED] 61 VFs
[17:18:36] [PASSED] 62 VFs
[17:18:36] [PASSED] 63 VFs
[17:18:36] ==================== [PASSED] fair_ggtt ====================
[17:18:36] ======================== fair_vram ========================
[17:18:36] [PASSED] 1 VF
[17:18:36] [PASSED] 2 VFs
[17:18:36] [PASSED] 3 VFs
[17:18:36] [PASSED] 4 VFs
[17:18:36] [PASSED] 5 VFs
[17:18:36] [PASSED] 6 VFs
[17:18:36] [PASSED] 7 VFs
[17:18:36] [PASSED] 8 VFs
[17:18:36] [PASSED] 9 VFs
[17:18:36] [PASSED] 10 VFs
[17:18:36] [PASSED] 11 VFs
[17:18:36] [PASSED] 12 VFs
[17:18:36] [PASSED] 13 VFs
[17:18:36] [PASSED] 14 VFs
[17:18:36] [PASSED] 15 VFs
[17:18:36] [PASSED] 16 VFs
[17:18:36] [PASSED] 17 VFs
[17:18:36] [PASSED] 18 VFs
[17:18:36] [PASSED] 19 VFs
[17:18:36] [PASSED] 20 VFs
[17:18:36] [PASSED] 21 VFs
[17:18:36] [PASSED] 22 VFs
[17:18:37] [PASSED] 23 VFs
[17:18:37] [PASSED] 24 VFs
[17:18:37] [PASSED] 25 VFs
[17:18:37] [PASSED] 26 VFs
[17:18:37] [PASSED] 27 VFs
[17:18:37] [PASSED] 28 VFs
[17:18:37] [PASSED] 29 VFs
[17:18:37] [PASSED] 30 VFs
[17:18:37] [PASSED] 31 VFs
[17:18:37] [PASSED] 32 VFs
[17:18:37] [PASSED] 33 VFs
[17:18:37] [PASSED] 34 VFs
[17:18:37] [PASSED] 35 VFs
[17:18:37] [PASSED] 36 VFs
[17:18:37] [PASSED] 37 VFs
[17:18:37] [PASSED] 38 VFs
[17:18:37] [PASSED] 39 VFs
[17:18:37] [PASSED] 40 VFs
[17:18:37] [PASSED] 41 VFs
[17:18:37] [PASSED] 42 VFs
[17:18:37] [PASSED] 43 VFs
[17:18:37] [PASSED] 44 VFs
[17:18:37] [PASSED] 45 VFs
[17:18:37] [PASSED] 46 VFs
[17:18:37] [PASSED] 47 VFs
[17:18:37] [PASSED] 48 VFs
[17:18:37] [PASSED] 49 VFs
[17:18:37] [PASSED] 50 VFs
[17:18:37] [PASSED] 51 VFs
[17:18:37] [PASSED] 52 VFs
[17:18:37] [PASSED] 53 VFs
[17:18:37] [PASSED] 54 VFs
[17:18:37] [PASSED] 55 VFs
[17:18:37] [PASSED] 56 VFs
[17:18:37] [PASSED] 57 VFs
[17:18:37] [PASSED] 58 VFs
[17:18:37] [PASSED] 59 VFs
[17:18:37] [PASSED] 60 VFs
[17:18:37] [PASSED] 61 VFs
[17:18:37] [PASSED] 62 VFs
[17:18:37] [PASSED] 63 VFs
[17:18:37] ==================== [PASSED] fair_vram ====================
[17:18:37] ================== [PASSED] pf_gt_config ===================
[17:18:37] ===================== lmtt (1 subtest) =====================
[17:18:37] ======================== test_ops =========================
[17:18:37] [PASSED] 2-level
[17:18:37] [PASSED] multi-level
[17:18:37] ==================== [PASSED] test_ops =====================
[17:18:37] ====================== [PASSED] lmtt =======================
[17:18:37] ================= pf_service (11 subtests) =================
[17:18:37] [PASSED] pf_negotiate_any
[17:18:37] [PASSED] pf_negotiate_base_match
[17:18:37] [PASSED] pf_negotiate_base_newer
[17:18:37] [PASSED] pf_negotiate_base_next
[17:18:37] [SKIPPED] pf_negotiate_base_older
[17:18:37] [PASSED] pf_negotiate_base_prev
[17:18:37] [PASSED] pf_negotiate_latest_match
[17:18:37] [PASSED] pf_negotiate_latest_newer
[17:18:37] [PASSED] pf_negotiate_latest_next
[17:18:37] [SKIPPED] pf_negotiate_latest_older
[17:18:37] [SKIPPED] pf_negotiate_latest_prev
[17:18:37] =================== [PASSED] pf_service ====================
[17:18:37] ================= xe_guc_g2g (2 subtests) ==================
[17:18:37] ============== xe_live_guc_g2g_kunit_default ==============
[17:18:37] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[17:18:37] ============== xe_live_guc_g2g_kunit_allmem ===============
[17:18:37] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[17:18:37] =================== [SKIPPED] xe_guc_g2g ===================
[17:18:37] =================== xe_mocs (2 subtests) ===================
[17:18:37] ================ xe_live_mocs_kernel_kunit ================
[17:18:37] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[17:18:37] ================ xe_live_mocs_reset_kunit =================
[17:18:37] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[17:18:37] ==================== [SKIPPED] xe_mocs =====================
[17:18:37] ================= xe_migrate (2 subtests) ==================
[17:18:37] ================= xe_migrate_sanity_kunit =================
[17:18:37] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[17:18:37] ================== xe_validate_ccs_kunit ==================
[17:18:37] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[17:18:37] =================== [SKIPPED] xe_migrate ===================
[17:18:37] ================== xe_dma_buf (1 subtest) ==================
[17:18:37] ==================== xe_dma_buf_kunit =====================
[17:18:37] ================ [SKIPPED] xe_dma_buf_kunit ================
[17:18:37] =================== [SKIPPED] xe_dma_buf ===================
[17:18:37] ================= xe_bo_shrink (1 subtest) =================
[17:18:37] =================== xe_bo_shrink_kunit ====================
[17:18:37] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[17:18:37] ================== [SKIPPED] xe_bo_shrink ==================
[17:18:37] ==================== xe_bo (2 subtests) ====================
[17:18:37] ================== xe_ccs_migrate_kunit ===================
[17:18:37] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[17:18:37] ==================== xe_bo_evict_kunit ====================
[17:18:37] =============== [SKIPPED] xe_bo_evict_kunit ================
[17:18:37] ===================== [SKIPPED] xe_bo ======================
[17:18:37] ==================== args (13 subtests) ====================
[17:18:37] [PASSED] count_args_test
[17:18:37] [PASSED] call_args_example
[17:18:37] [PASSED] call_args_test
[17:18:37] [PASSED] drop_first_arg_example
[17:18:37] [PASSED] drop_first_arg_test
[17:18:37] [PASSED] first_arg_example
[17:18:37] [PASSED] first_arg_test
[17:18:37] [PASSED] last_arg_example
[17:18:37] [PASSED] last_arg_test
[17:18:37] [PASSED] pick_arg_example
[17:18:37] [PASSED] if_args_example
[17:18:37] [PASSED] if_args_test
[17:18:37] [PASSED] sep_comma_example
[17:18:37] ====================== [PASSED] args =======================
[17:18:37] =================== xe_pci (3 subtests) ====================
[17:18:37] ==================== check_graphics_ip ====================
[17:18:37] [PASSED] 12.00 Xe_LP
[17:18:37] [PASSED] 12.10 Xe_LP+
[17:18:37] [PASSED] 12.55 Xe_HPG
[17:18:37] [PASSED] 12.60 Xe_HPC
[17:18:37] [PASSED] 12.70 Xe_LPG
[17:18:37] [PASSED] 12.71 Xe_LPG
[17:18:37] [PASSED] 12.74 Xe_LPG+
[17:18:37] [PASSED] 20.01 Xe2_HPG
[17:18:37] [PASSED] 20.02 Xe2_HPG
[17:18:37] [PASSED] 20.04 Xe2_LPG
[17:18:37] [PASSED] 30.00 Xe3_LPG
[17:18:37] [PASSED] 30.01 Xe3_LPG
[17:18:37] [PASSED] 30.03 Xe3_LPG
[17:18:37] [PASSED] 30.04 Xe3_LPG
[17:18:37] [PASSED] 30.05 Xe3_LPG
[17:18:37] [PASSED] 35.10 Xe3p_LPG
[17:18:37] [PASSED] 35.11 Xe3p_XPC
[17:18:37] ================ [PASSED] check_graphics_ip ================
[17:18:37] ===================== check_media_ip ======================
[17:18:37] [PASSED] 12.00 Xe_M
[17:18:37] [PASSED] 12.55 Xe_HPM
[17:18:37] [PASSED] 13.00 Xe_LPM+
[17:18:37] [PASSED] 13.01 Xe2_HPM
[17:18:37] [PASSED] 20.00 Xe2_LPM
[17:18:37] [PASSED] 30.00 Xe3_LPM
[17:18:37] [PASSED] 30.02 Xe3_LPM
[17:18:37] [PASSED] 35.00 Xe3p_LPM
[17:18:37] [PASSED] 35.03 Xe3p_HPM
[17:18:37] ================= [PASSED] check_media_ip ==================
[17:18:37] =================== check_platform_desc ===================
[17:18:37] [PASSED] 0x9A60 (TIGERLAKE)
[17:18:37] [PASSED] 0x9A68 (TIGERLAKE)
[17:18:37] [PASSED] 0x9A70 (TIGERLAKE)
[17:18:37] [PASSED] 0x9A40 (TIGERLAKE)
[17:18:37] [PASSED] 0x9A49 (TIGERLAKE)
[17:18:37] [PASSED] 0x9A59 (TIGERLAKE)
[17:18:37] [PASSED] 0x9A78 (TIGERLAKE)
[17:18:37] [PASSED] 0x9AC0 (TIGERLAKE)
[17:18:37] [PASSED] 0x9AC9 (TIGERLAKE)
[17:18:37] [PASSED] 0x9AD9 (TIGERLAKE)
[17:18:37] [PASSED] 0x9AF8 (TIGERLAKE)
[17:18:37] [PASSED] 0x4C80 (ROCKETLAKE)
[17:18:37] [PASSED] 0x4C8A (ROCKETLAKE)
[17:18:37] [PASSED] 0x4C8B (ROCKETLAKE)
[17:18:37] [PASSED] 0x4C8C (ROCKETLAKE)
[17:18:37] [PASSED] 0x4C90 (ROCKETLAKE)
[17:18:37] [PASSED] 0x4C9A (ROCKETLAKE)
[17:18:37] [PASSED] 0x4680 (ALDERLAKE_S)
[17:18:37] [PASSED] 0x4682 (ALDERLAKE_S)
[17:18:37] [PASSED] 0x4688 (ALDERLAKE_S)
[17:18:37] [PASSED] 0x468A (ALDERLAKE_S)
[17:18:37] [PASSED] 0x468B (ALDERLAKE_S)
[17:18:37] [PASSED] 0x4690 (ALDERLAKE_S)
[17:18:37] [PASSED] 0x4692 (ALDERLAKE_S)
[17:18:37] [PASSED] 0x4693 (ALDERLAKE_S)
[17:18:37] [PASSED] 0x46A0 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46A1 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46A2 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46A3 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46A6 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46A8 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46AA (ALDERLAKE_P)
[17:18:37] [PASSED] 0x462A (ALDERLAKE_P)
[17:18:37] [PASSED] 0x4626 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x4628 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46B0 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46B1 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46B2 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46B3 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46C0 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46C1 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46C2 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46C3 (ALDERLAKE_P)
[17:18:37] [PASSED] 0x46D0 (ALDERLAKE_N)
[17:18:37] [PASSED] 0x46D1 (ALDERLAKE_N)
[17:18:37] [PASSED] 0x46D2 (ALDERLAKE_N)
[17:18:37] [PASSED] 0x46D3 (ALDERLAKE_N)
[17:18:37] [PASSED] 0x46D4 (ALDERLAKE_N)
[17:18:37] [PASSED] 0xA721 (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7A1 (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7A9 (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7AC (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7AD (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA720 (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7A0 (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7A8 (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7AA (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA7AB (ALDERLAKE_P)
[17:18:37] [PASSED] 0xA780 (ALDERLAKE_S)
[17:18:37] [PASSED] 0xA781 (ALDERLAKE_S)
[17:18:37] [PASSED] 0xA782 (ALDERLAKE_S)
[17:18:37] [PASSED] 0xA783 (ALDERLAKE_S)
[17:18:37] [PASSED] 0xA788 (ALDERLAKE_S)
[17:18:37] [PASSED] 0xA789 (ALDERLAKE_S)
[17:18:37] [PASSED] 0xA78A (ALDERLAKE_S)
[17:18:37] [PASSED] 0xA78B (ALDERLAKE_S)
[17:18:37] [PASSED] 0x4905 (DG1)
[17:18:37] [PASSED] 0x4906 (DG1)
[17:18:37] [PASSED] 0x4907 (DG1)
[17:18:37] [PASSED] 0x4908 (DG1)
[17:18:37] [PASSED] 0x4909 (DG1)
[17:18:37] [PASSED] 0x56C0 (DG2)
[17:18:37] [PASSED] 0x56C2 (DG2)
[17:18:37] [PASSED] 0x56C1 (DG2)
[17:18:37] [PASSED] 0x7D51 (METEORLAKE)
[17:18:37] [PASSED] 0x7DD1 (METEORLAKE)
[17:18:37] [PASSED] 0x7D41 (METEORLAKE)
[17:18:37] [PASSED] 0x7D67 (METEORLAKE)
[17:18:37] [PASSED] 0xB640 (METEORLAKE)
[17:18:37] [PASSED] 0x56A0 (DG2)
[17:18:37] [PASSED] 0x56A1 (DG2)
[17:18:37] [PASSED] 0x56A2 (DG2)
[17:18:37] [PASSED] 0x56BE (DG2)
[17:18:37] [PASSED] 0x56BF (DG2)
[17:18:37] [PASSED] 0x5690 (DG2)
[17:18:37] [PASSED] 0x5691 (DG2)
[17:18:37] [PASSED] 0x5692 (DG2)
[17:18:37] [PASSED] 0x56A5 (DG2)
[17:18:37] [PASSED] 0x56A6 (DG2)
[17:18:37] [PASSED] 0x56B0 (DG2)
[17:18:37] [PASSED] 0x56B1 (DG2)
[17:18:37] [PASSED] 0x56BA (DG2)
[17:18:37] [PASSED] 0x56BB (DG2)
[17:18:37] [PASSED] 0x56BC (DG2)
[17:18:37] [PASSED] 0x56BD (DG2)
[17:18:37] [PASSED] 0x5693 (DG2)
[17:18:37] [PASSED] 0x5694 (DG2)
[17:18:37] [PASSED] 0x5695 (DG2)
[17:18:37] [PASSED] 0x56A3 (DG2)
[17:18:37] [PASSED] 0x56A4 (DG2)
[17:18:37] [PASSED] 0x56B2 (DG2)
[17:18:37] [PASSED] 0x56B3 (DG2)
[17:18:37] [PASSED] 0x5696 (DG2)
[17:18:37] [PASSED] 0x5697 (DG2)
[17:18:37] [PASSED] 0xB69 (PVC)
[17:18:37] [PASSED] 0xB6E (PVC)
[17:18:37] [PASSED] 0xBD4 (PVC)
[17:18:37] [PASSED] 0xBD5 (PVC)
[17:18:37] [PASSED] 0xBD6 (PVC)
[17:18:37] [PASSED] 0xBD7 (PVC)
[17:18:37] [PASSED] 0xBD8 (PVC)
[17:18:37] [PASSED] 0xBD9 (PVC)
[17:18:37] [PASSED] 0xBDA (PVC)
[17:18:37] [PASSED] 0xBDB (PVC)
[17:18:37] [PASSED] 0xBE0 (PVC)
[17:18:37] [PASSED] 0xBE1 (PVC)
[17:18:37] [PASSED] 0xBE5 (PVC)
[17:18:37] [PASSED] 0x7D40 (METEORLAKE)
[17:18:37] [PASSED] 0x7D45 (METEORLAKE)
[17:18:37] [PASSED] 0x7D55 (METEORLAKE)
[17:18:37] [PASSED] 0x7D60 (METEORLAKE)
[17:18:37] [PASSED] 0x7DD5 (METEORLAKE)
[17:18:37] [PASSED] 0x6420 (LUNARLAKE)
[17:18:37] [PASSED] 0x64A0 (LUNARLAKE)
[17:18:37] [PASSED] 0x64B0 (LUNARLAKE)
[17:18:37] [PASSED] 0xE202 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE209 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE20B (BATTLEMAGE)
[17:18:37] [PASSED] 0xE20C (BATTLEMAGE)
[17:18:37] [PASSED] 0xE20D (BATTLEMAGE)
[17:18:37] [PASSED] 0xE210 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE211 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE212 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE216 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE220 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE221 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE222 (BATTLEMAGE)
[17:18:37] [PASSED] 0xE223 (BATTLEMAGE)
[17:18:37] [PASSED] 0xB080 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB081 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB082 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB083 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB084 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB085 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB086 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB087 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB08F (PANTHERLAKE)
[17:18:37] [PASSED] 0xB090 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB0A0 (PANTHERLAKE)
[17:18:37] [PASSED] 0xB0B0 (PANTHERLAKE)
[17:18:37] [PASSED] 0xFD80 (PANTHERLAKE)
[17:18:37] [PASSED] 0xFD81 (PANTHERLAKE)
[17:18:37] [PASSED] 0xD740 (NOVALAKE_S)
[17:18:37] [PASSED] 0xD741 (NOVALAKE_S)
[17:18:37] [PASSED] 0xD742 (NOVALAKE_S)
[17:18:37] [PASSED] 0xD743 (NOVALAKE_S)
[17:18:37] [PASSED] 0xD744 (NOVALAKE_S)
[17:18:37] [PASSED] 0xD745 (NOVALAKE_S)
[17:18:37] [PASSED] 0x674C (CRESCENTISLAND)
[17:18:37] [PASSED] 0x674D (CRESCENTISLAND)
[17:18:37] [PASSED] 0x674E (CRESCENTISLAND)
[17:18:37] [PASSED] 0x674F (CRESCENTISLAND)
[17:18:37] [PASSED] 0x6750 (CRESCENTISLAND)
[17:18:37] [PASSED] 0xD750 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD751 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD752 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD753 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD754 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD755 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD756 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD757 (NOVALAKE_P)
[17:18:37] [PASSED] 0xD75F (NOVALAKE_P)
[17:18:37] =============== [PASSED] check_platform_desc ===============
[17:18:37] ===================== [PASSED] xe_pci ======================
[17:18:37] =================== xe_rtp (2 subtests) ====================
[17:18:37] =============== xe_rtp_process_to_sr_tests ================
[17:18:37] [PASSED] coalesce-same-reg
[17:18:37] [PASSED] no-match-no-add
[17:18:37] [PASSED] match-or
[17:18:37] [PASSED] match-or-xfail
[17:18:37] [PASSED] no-match-no-add-multiple-rules
[17:18:37] [PASSED] two-regs-two-entries
[17:18:37] [PASSED] clr-one-set-other
[17:18:37] [PASSED] set-field
[17:18:37] [PASSED] conflict-duplicate
[17:18:37] [PASSED] conflict-not-disjoint
[17:18:37] [PASSED] conflict-reg-type
[17:18:37] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[17:18:37] ================== xe_rtp_process_tests ===================
[17:18:37] [PASSED] active1
[17:18:37] [PASSED] active2
[17:18:37] [PASSED] active-inactive
[17:18:37] [PASSED] inactive-active
[17:18:37] [PASSED] inactive-1st_or_active-inactive
[17:18:37] [PASSED] inactive-2nd_or_active-inactive
[17:18:37] [PASSED] inactive-last_or_active-inactive
[17:18:37] [PASSED] inactive-no_or_active-inactive
[17:18:37] ============== [PASSED] xe_rtp_process_tests ===============
[17:18:37] ===================== [PASSED] xe_rtp ======================
[17:18:37] ==================== xe_wa (1 subtest) =====================
[17:18:37] ======================== xe_wa_gt =========================
[17:18:37] [PASSED] TIGERLAKE B0
[17:18:37] [PASSED] DG1 A0
[17:18:37] [PASSED] DG1 B0
[17:18:37] [PASSED] ALDERLAKE_S A0
[17:18:37] [PASSED] ALDERLAKE_S B0
[17:18:37] [PASSED] ALDERLAKE_S C0
[17:18:37] [PASSED] ALDERLAKE_S D0
[17:18:37] [PASSED] ALDERLAKE_P A0
[17:18:37] [PASSED] ALDERLAKE_P B0
[17:18:37] [PASSED] ALDERLAKE_P C0
[17:18:37] [PASSED] ALDERLAKE_S RPLS D0
[17:18:37] [PASSED] ALDERLAKE_P RPLU E0
[17:18:37] [PASSED] DG2 G10 C0
[17:18:37] [PASSED] DG2 G11 B1
[17:18:37] [PASSED] DG2 G12 A1
[17:18:37] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:18:37] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[17:18:37] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[17:18:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[17:18:37] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[17:18:37] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[17:18:37] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[17:18:37] ==================== [PASSED] xe_wa_gt =====================
[17:18:37] ====================== [PASSED] xe_wa ======================
[17:18:37] ============================================================
[17:18:37] Testing complete. Ran 601 tests: passed: 583, skipped: 18
[17:18:37] Elapsed time: 35.973s total, 4.213s configuring, 31.144s building, 0.603s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[17:18:37] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:18:38] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:19:03] Starting KUnit Kernel (1/1)...
[17:19:03] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:19:03] ============ drm_test_pick_cmdline (2 subtests) ============
[17:19:03] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[17:19:03] =============== drm_test_pick_cmdline_named ===============
[17:19:03] [PASSED] NTSC
[17:19:03] [PASSED] NTSC-J
[17:19:03] [PASSED] PAL
[17:19:03] [PASSED] PAL-M
[17:19:03] =========== [PASSED] drm_test_pick_cmdline_named ===========
[17:19:03] ============== [PASSED] drm_test_pick_cmdline ==============
[17:19:03] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[17:19:03] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[17:19:03] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[17:19:03] =========== drm_validate_clone_mode (2 subtests) ===========
[17:19:03] ============== drm_test_check_in_clone_mode ===============
[17:19:03] [PASSED] in_clone_mode
[17:19:03] [PASSED] not_in_clone_mode
[17:19:03] ========== [PASSED] drm_test_check_in_clone_mode ===========
[17:19:03] =============== drm_test_check_valid_clones ===============
[17:19:03] [PASSED] not_in_clone_mode
[17:19:03] [PASSED] valid_clone
[17:19:03] [PASSED] invalid_clone
[17:19:03] =========== [PASSED] drm_test_check_valid_clones ===========
[17:19:03] ============= [PASSED] drm_validate_clone_mode =============
[17:19:03] ============= drm_validate_modeset (1 subtest) =============
[17:19:03] [PASSED] drm_test_check_connector_changed_modeset
[17:19:03] ============== [PASSED] drm_validate_modeset ===============
[17:19:03] ====== drm_test_bridge_get_current_state (2 subtests) ======
[17:19:03] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[17:19:03] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[17:19:03] ======== [PASSED] drm_test_bridge_get_current_state ========
[17:19:03] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[17:19:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[17:19:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[17:19:03] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[17:19:03] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[17:19:03] ============== drm_bridge_alloc (2 subtests) ===============
[17:19:03] [PASSED] drm_test_drm_bridge_alloc_basic
[17:19:03] [PASSED] drm_test_drm_bridge_alloc_get_put
[17:19:03] ================ [PASSED] drm_bridge_alloc =================
[17:19:03] ============= drm_cmdline_parser (40 subtests) =============
[17:19:03] [PASSED] drm_test_cmdline_force_d_only
[17:19:03] [PASSED] drm_test_cmdline_force_D_only_dvi
[17:19:03] [PASSED] drm_test_cmdline_force_D_only_hdmi
[17:19:03] [PASSED] drm_test_cmdline_force_D_only_not_digital
[17:19:03] [PASSED] drm_test_cmdline_force_e_only
[17:19:03] [PASSED] drm_test_cmdline_res
[17:19:03] [PASSED] drm_test_cmdline_res_vesa
[17:19:03] [PASSED] drm_test_cmdline_res_vesa_rblank
[17:19:03] [PASSED] drm_test_cmdline_res_rblank
[17:19:03] [PASSED] drm_test_cmdline_res_bpp
[17:19:03] [PASSED] drm_test_cmdline_res_refresh
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[17:19:03] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[17:19:03] [PASSED] drm_test_cmdline_res_margins_force_on
[17:19:03] [PASSED] drm_test_cmdline_res_vesa_margins
[17:19:03] [PASSED] drm_test_cmdline_name
[17:19:03] [PASSED] drm_test_cmdline_name_bpp
[17:19:03] [PASSED] drm_test_cmdline_name_option
[17:19:03] [PASSED] drm_test_cmdline_name_bpp_option
[17:19:03] [PASSED] drm_test_cmdline_rotate_0
[17:19:03] [PASSED] drm_test_cmdline_rotate_90
[17:19:03] [PASSED] drm_test_cmdline_rotate_180
[17:19:03] [PASSED] drm_test_cmdline_rotate_270
[17:19:03] [PASSED] drm_test_cmdline_hmirror
[17:19:03] [PASSED] drm_test_cmdline_vmirror
[17:19:03] [PASSED] drm_test_cmdline_margin_options
[17:19:03] [PASSED] drm_test_cmdline_multiple_options
[17:19:03] [PASSED] drm_test_cmdline_bpp_extra_and_option
[17:19:03] [PASSED] drm_test_cmdline_extra_and_option
[17:19:03] [PASSED] drm_test_cmdline_freestanding_options
[17:19:03] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[17:19:03] [PASSED] drm_test_cmdline_panel_orientation
[17:19:03] ================ drm_test_cmdline_invalid =================
[17:19:03] [PASSED] margin_only
[17:19:03] [PASSED] interlace_only
[17:19:03] [PASSED] res_missing_x
[17:19:03] [PASSED] res_missing_y
[17:19:03] [PASSED] res_bad_y
[17:19:03] [PASSED] res_missing_y_bpp
[17:19:03] [PASSED] res_bad_bpp
[17:19:03] [PASSED] res_bad_refresh
[17:19:03] [PASSED] res_bpp_refresh_force_on_off
[17:19:03] [PASSED] res_invalid_mode
[17:19:03] [PASSED] res_bpp_wrong_place_mode
[17:19:03] [PASSED] name_bpp_refresh
[17:19:03] [PASSED] name_refresh
[17:19:03] [PASSED] name_refresh_wrong_mode
[17:19:03] [PASSED] name_refresh_invalid_mode
[17:19:03] [PASSED] rotate_multiple
[17:19:03] [PASSED] rotate_invalid_val
[17:19:03] [PASSED] rotate_truncated
[17:19:03] [PASSED] invalid_option
[17:19:03] [PASSED] invalid_tv_option
[17:19:03] [PASSED] truncated_tv_option
[17:19:03] ============ [PASSED] drm_test_cmdline_invalid =============
[17:19:03] =============== drm_test_cmdline_tv_options ===============
[17:19:03] [PASSED] NTSC
[17:19:03] [PASSED] NTSC_443
[17:19:03] [PASSED] NTSC_J
[17:19:03] [PASSED] PAL
[17:19:03] [PASSED] PAL_M
[17:19:03] [PASSED] PAL_N
[17:19:03] [PASSED] SECAM
[17:19:03] [PASSED] MONO_525
[17:19:03] [PASSED] MONO_625
[17:19:03] =========== [PASSED] drm_test_cmdline_tv_options ===========
[17:19:03] =============== [PASSED] drm_cmdline_parser ================
[17:19:03] ========== drmm_connector_hdmi_init (20 subtests) ==========
[17:19:03] [PASSED] drm_test_connector_hdmi_init_valid
[17:19:03] [PASSED] drm_test_connector_hdmi_init_bpc_8
[17:19:03] [PASSED] drm_test_connector_hdmi_init_bpc_10
[17:19:03] [PASSED] drm_test_connector_hdmi_init_bpc_12
[17:19:03] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[17:19:03] [PASSED] drm_test_connector_hdmi_init_bpc_null
[17:19:03] [PASSED] drm_test_connector_hdmi_init_formats_empty
[17:19:03] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[17:19:03] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[17:19:03] [PASSED] supported_formats=0x9 yuv420_allowed=1
[17:19:03] [PASSED] supported_formats=0x9 yuv420_allowed=0
[17:19:03] [PASSED] supported_formats=0x5 yuv420_allowed=1
[17:19:03] [PASSED] supported_formats=0x5 yuv420_allowed=0
[17:19:03] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[17:19:03] [PASSED] drm_test_connector_hdmi_init_null_ddc
[17:19:03] [PASSED] drm_test_connector_hdmi_init_null_product
[17:19:03] [PASSED] drm_test_connector_hdmi_init_null_vendor
[17:19:03] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[17:19:03] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[17:19:03] [PASSED] drm_test_connector_hdmi_init_product_valid
[17:19:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[17:19:03] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[17:19:03] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[17:19:03] ========= drm_test_connector_hdmi_init_type_valid =========
[17:19:03] [PASSED] HDMI-A
[17:19:03] [PASSED] HDMI-B
[17:19:03] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[17:19:03] ======== drm_test_connector_hdmi_init_type_invalid ========
[17:19:03] [PASSED] Unknown
[17:19:03] [PASSED] VGA
[17:19:03] [PASSED] DVI-I
[17:19:03] [PASSED] DVI-D
[17:19:03] [PASSED] DVI-A
[17:19:03] [PASSED] Composite
[17:19:03] [PASSED] SVIDEO
[17:19:03] [PASSED] LVDS
[17:19:03] [PASSED] Component
[17:19:03] [PASSED] DIN
[17:19:03] [PASSED] DP
[17:19:03] [PASSED] TV
[17:19:03] [PASSED] eDP
[17:19:03] [PASSED] Virtual
[17:19:03] [PASSED] DSI
[17:19:03] [PASSED] DPI
[17:19:03] [PASSED] Writeback
[17:19:03] [PASSED] SPI
[17:19:03] [PASSED] USB
[17:19:03] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[17:19:03] ============ [PASSED] drmm_connector_hdmi_init =============
[17:19:03] ============= drmm_connector_init (3 subtests) =============
[17:19:03] [PASSED] drm_test_drmm_connector_init
[17:19:03] [PASSED] drm_test_drmm_connector_init_null_ddc
[17:19:03] ========= drm_test_drmm_connector_init_type_valid =========
[17:19:03] [PASSED] Unknown
[17:19:03] [PASSED] VGA
[17:19:03] [PASSED] DVI-I
[17:19:03] [PASSED] DVI-D
[17:19:03] [PASSED] DVI-A
[17:19:03] [PASSED] Composite
[17:19:03] [PASSED] SVIDEO
[17:19:03] [PASSED] LVDS
[17:19:03] [PASSED] Component
[17:19:03] [PASSED] DIN
[17:19:03] [PASSED] DP
[17:19:03] [PASSED] HDMI-A
[17:19:03] [PASSED] HDMI-B
[17:19:03] [PASSED] TV
[17:19:03] [PASSED] eDP
[17:19:03] [PASSED] Virtual
[17:19:03] [PASSED] DSI
[17:19:03] [PASSED] DPI
[17:19:03] [PASSED] Writeback
[17:19:03] [PASSED] SPI
[17:19:03] [PASSED] USB
[17:19:03] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[17:19:03] =============== [PASSED] drmm_connector_init ===============
[17:19:03] ========= drm_connector_dynamic_init (6 subtests) ==========
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_init
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_init_properties
[17:19:03] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[17:19:03] [PASSED] Unknown
[17:19:03] [PASSED] VGA
[17:19:03] [PASSED] DVI-I
[17:19:03] [PASSED] DVI-D
[17:19:03] [PASSED] DVI-A
[17:19:03] [PASSED] Composite
[17:19:03] [PASSED] SVIDEO
[17:19:03] [PASSED] LVDS
[17:19:03] [PASSED] Component
[17:19:03] [PASSED] DIN
[17:19:03] [PASSED] DP
[17:19:03] [PASSED] HDMI-A
[17:19:03] [PASSED] HDMI-B
[17:19:03] [PASSED] TV
[17:19:03] [PASSED] eDP
[17:19:03] [PASSED] Virtual
[17:19:03] [PASSED] DSI
[17:19:03] [PASSED] DPI
[17:19:03] [PASSED] Writeback
[17:19:03] [PASSED] SPI
[17:19:03] [PASSED] USB
[17:19:03] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[17:19:03] ======== drm_test_drm_connector_dynamic_init_name =========
[17:19:03] [PASSED] Unknown
[17:19:03] [PASSED] VGA
[17:19:03] [PASSED] DVI-I
[17:19:03] [PASSED] DVI-D
[17:19:03] [PASSED] DVI-A
[17:19:03] [PASSED] Composite
[17:19:03] [PASSED] SVIDEO
[17:19:03] [PASSED] LVDS
[17:19:03] [PASSED] Component
[17:19:03] [PASSED] DIN
[17:19:03] [PASSED] DP
[17:19:03] [PASSED] HDMI-A
[17:19:03] [PASSED] HDMI-B
[17:19:03] [PASSED] TV
[17:19:03] [PASSED] eDP
[17:19:03] [PASSED] Virtual
[17:19:03] [PASSED] DSI
[17:19:03] [PASSED] DPI
[17:19:03] [PASSED] Writeback
[17:19:03] [PASSED] SPI
[17:19:03] [PASSED] USB
[17:19:03] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[17:19:03] =========== [PASSED] drm_connector_dynamic_init ============
[17:19:03] ==== drm_connector_dynamic_register_early (4 subtests) =====
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[17:19:03] ====== [PASSED] drm_connector_dynamic_register_early =======
[17:19:03] ======= drm_connector_dynamic_register (7 subtests) ========
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[17:19:03] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[17:19:03] ========= [PASSED] drm_connector_dynamic_register ==========
[17:19:03] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[17:19:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[17:19:03] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[17:19:03] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[17:19:03] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[17:19:03] ========== drm_test_get_tv_mode_from_name_valid ===========
[17:19:03] [PASSED] NTSC
[17:19:03] [PASSED] NTSC-443
[17:19:03] [PASSED] NTSC-J
[17:19:03] [PASSED] PAL
[17:19:03] [PASSED] PAL-M
[17:19:03] [PASSED] PAL-N
[17:19:03] [PASSED] SECAM
[17:19:03] [PASSED] Mono
[17:19:03] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[17:19:03] [PASSED] drm_test_get_tv_mode_from_name_truncated
[17:19:03] ============ [PASSED] drm_get_tv_mode_from_name ============
[17:19:03] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[17:19:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[17:19:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[17:19:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[17:19:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[17:19:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[17:19:03] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[17:19:03] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[17:19:03] [PASSED] VIC 96
[17:19:03] [PASSED] VIC 97
[17:19:03] [PASSED] VIC 101
[17:19:03] [PASSED] VIC 102
[17:19:03] [PASSED] VIC 106
[17:19:03] [PASSED] VIC 107
[17:19:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[17:19:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[17:19:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[17:19:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[17:19:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[17:19:03] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[17:19:03] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[17:19:03] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[17:19:03] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[17:19:03] [PASSED] Automatic
[17:19:03] [PASSED] Full
[17:19:03] [PASSED] Limited 16:235
[17:19:03] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[17:19:03] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[17:19:03] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[17:19:03] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[17:19:03] === drm_test_drm_hdmi_connector_get_output_format_name ====
[17:19:03] [PASSED] RGB
[17:19:03] [PASSED] YUV 4:2:0
[17:19:03] [PASSED] YUV 4:2:2
[17:19:03] [PASSED] YUV 4:4:4
[17:19:03] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[17:19:03] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[17:19:03] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[17:19:03] ============= drm_damage_helper (21 subtests) ==============
[17:19:03] [PASSED] drm_test_damage_iter_no_damage
[17:19:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[17:19:03] [PASSED] drm_test_damage_iter_no_damage_src_moved
[17:19:03] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[17:19:03] [PASSED] drm_test_damage_iter_no_damage_not_visible
[17:19:03] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[17:19:03] [PASSED] drm_test_damage_iter_no_damage_no_fb
[17:19:03] [PASSED] drm_test_damage_iter_simple_damage
[17:19:03] [PASSED] drm_test_damage_iter_single_damage
[17:19:03] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[17:19:03] [PASSED] drm_test_damage_iter_single_damage_outside_src
[17:19:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[17:19:03] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[17:19:03] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[17:19:03] [PASSED] drm_test_damage_iter_single_damage_src_moved
[17:19:03] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[17:19:03] [PASSED] drm_test_damage_iter_damage
[17:19:03] [PASSED] drm_test_damage_iter_damage_one_intersect
[17:19:03] [PASSED] drm_test_damage_iter_damage_one_outside
[17:19:03] [PASSED] drm_test_damage_iter_damage_src_moved
[17:19:03] [PASSED] drm_test_damage_iter_damage_not_visible
[17:19:03] ================ [PASSED] drm_damage_helper ================
[17:19:03] ============== drm_dp_mst_helper (3 subtests) ==============
[17:19:03] ============== drm_test_dp_mst_calc_pbn_mode ==============
[17:19:03] [PASSED] Clock 154000 BPP 30 DSC disabled
[17:19:03] [PASSED] Clock 234000 BPP 30 DSC disabled
[17:19:03] [PASSED] Clock 297000 BPP 24 DSC disabled
[17:19:03] [PASSED] Clock 332880 BPP 24 DSC enabled
[17:19:03] [PASSED] Clock 324540 BPP 24 DSC enabled
[17:19:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[17:19:03] ============== drm_test_dp_mst_calc_pbn_div ===============
[17:19:03] [PASSED] Link rate 2000000 lane count 4
[17:19:03] [PASSED] Link rate 2000000 lane count 2
[17:19:03] [PASSED] Link rate 2000000 lane count 1
[17:19:03] [PASSED] Link rate 1350000 lane count 4
[17:19:03] [PASSED] Link rate 1350000 lane count 2
[17:19:03] [PASSED] Link rate 1350000 lane count 1
[17:19:03] [PASSED] Link rate 1000000 lane count 4
[17:19:03] [PASSED] Link rate 1000000 lane count 2
[17:19:03] [PASSED] Link rate 1000000 lane count 1
[17:19:03] [PASSED] Link rate 810000 lane count 4
[17:19:03] [PASSED] Link rate 810000 lane count 2
[17:19:03] [PASSED] Link rate 810000 lane count 1
[17:19:03] [PASSED] Link rate 540000 lane count 4
[17:19:03] [PASSED] Link rate 540000 lane count 2
[17:19:03] [PASSED] Link rate 540000 lane count 1
[17:19:03] [PASSED] Link rate 270000 lane count 4
[17:19:03] [PASSED] Link rate 270000 lane count 2
[17:19:03] [PASSED] Link rate 270000 lane count 1
[17:19:03] [PASSED] Link rate 162000 lane count 4
[17:19:03] [PASSED] Link rate 162000 lane count 2
[17:19:03] [PASSED] Link rate 162000 lane count 1
[17:19:03] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[17:19:03] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[17:19:03] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[17:19:03] [PASSED] DP_POWER_UP_PHY with port number
[17:19:03] [PASSED] DP_POWER_DOWN_PHY with port number
[17:19:03] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[17:19:03] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[17:19:03] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[17:19:03] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[17:19:03] [PASSED] DP_QUERY_PAYLOAD with port number
[17:19:03] [PASSED] DP_QUERY_PAYLOAD with VCPI
[17:19:03] [PASSED] DP_REMOTE_DPCD_READ with port number
[17:19:03] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[17:19:03] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[17:19:03] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[17:19:03] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[17:19:03] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[17:19:03] [PASSED] DP_REMOTE_I2C_READ with port number
[17:19:03] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[17:19:03] [PASSED] DP_REMOTE_I2C_READ with transactions array
[17:19:03] [PASSED] DP_REMOTE_I2C_WRITE with port number
[17:19:03] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[17:19:03] [PASSED] DP_REMOTE_I2C_WRITE with data array
[17:19:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[17:19:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[17:19:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[17:19:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[17:19:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[17:19:03] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[17:19:03] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[17:19:03] ================ [PASSED] drm_dp_mst_helper ================
[17:19:03] ================== drm_exec (7 subtests) ===================
[17:19:03] [PASSED] sanitycheck
[17:19:03] [PASSED] test_lock
[17:19:03] [PASSED] test_lock_unlock
[17:19:03] [PASSED] test_duplicates
[17:19:03] [PASSED] test_prepare
[17:19:03] [PASSED] test_prepare_array
[17:19:03] [PASSED] test_multiple_loops
[17:19:03] ==================== [PASSED] drm_exec =====================
[17:19:03] =========== drm_format_helper_test (17 subtests) ===========
[17:19:03] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[17:19:03] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[17:19:03] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[17:19:03] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[17:19:03] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[17:19:03] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[17:19:03] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[17:19:03] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[17:19:03] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[17:19:03] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[17:19:03] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[17:19:03] ============== drm_test_fb_xrgb8888_to_mono ===============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[17:19:03] ==================== drm_test_fb_swab =====================
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ================ [PASSED] drm_test_fb_swab =================
[17:19:03] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[17:19:03] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[17:19:03] [PASSED] single_pixel_source_buffer
[17:19:03] [PASSED] single_pixel_clip_rectangle
[17:19:03] [PASSED] well_known_colors
[17:19:03] [PASSED] destination_pitch
[17:19:03] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[17:19:03] ================= drm_test_fb_clip_offset =================
[17:19:03] [PASSED] pass through
[17:19:03] [PASSED] horizontal offset
[17:19:03] [PASSED] vertical offset
[17:19:03] [PASSED] horizontal and vertical offset
[17:19:03] [PASSED] horizontal offset (custom pitch)
[17:19:03] [PASSED] vertical offset (custom pitch)
[17:19:03] [PASSED] horizontal and vertical offset (custom pitch)
[17:19:03] ============= [PASSED] drm_test_fb_clip_offset =============
[17:19:03] =================== drm_test_fb_memcpy ====================
[17:19:03] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[17:19:03] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[17:19:03] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[17:19:03] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[17:19:03] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[17:19:03] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[17:19:03] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[17:19:03] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[17:19:03] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[17:19:03] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[17:19:03] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[17:19:03] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[17:19:03] =============== [PASSED] drm_test_fb_memcpy ================
[17:19:03] ============= [PASSED] drm_format_helper_test ==============
[17:19:03] ================= drm_format (18 subtests) =================
[17:19:03] [PASSED] drm_test_format_block_width_invalid
[17:19:03] [PASSED] drm_test_format_block_width_one_plane
[17:19:03] [PASSED] drm_test_format_block_width_two_plane
[17:19:03] [PASSED] drm_test_format_block_width_three_plane
[17:19:03] [PASSED] drm_test_format_block_width_tiled
[17:19:03] [PASSED] drm_test_format_block_height_invalid
[17:19:03] [PASSED] drm_test_format_block_height_one_plane
[17:19:03] [PASSED] drm_test_format_block_height_two_plane
[17:19:03] [PASSED] drm_test_format_block_height_three_plane
[17:19:03] [PASSED] drm_test_format_block_height_tiled
[17:19:03] [PASSED] drm_test_format_min_pitch_invalid
[17:19:03] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[17:19:03] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[17:19:03] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[17:19:03] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[17:19:03] [PASSED] drm_test_format_min_pitch_two_plane
[17:19:03] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[17:19:03] [PASSED] drm_test_format_min_pitch_tiled
[17:19:03] =================== [PASSED] drm_format ====================
[17:19:03] ============== drm_framebuffer (10 subtests) ===============
[17:19:03] ========== drm_test_framebuffer_check_src_coords ==========
[17:19:03] [PASSED] Success: source fits into fb
[17:19:03] [PASSED] Fail: overflowing fb with x-axis coordinate
[17:19:03] [PASSED] Fail: overflowing fb with y-axis coordinate
[17:19:03] [PASSED] Fail: overflowing fb with source width
[17:19:03] [PASSED] Fail: overflowing fb with source height
[17:19:03] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[17:19:03] [PASSED] drm_test_framebuffer_cleanup
[17:19:03] =============== drm_test_framebuffer_create ===============
[17:19:03] [PASSED] ABGR8888 normal sizes
[17:19:03] [PASSED] ABGR8888 max sizes
[17:19:03] [PASSED] ABGR8888 pitch greater than min required
[17:19:03] [PASSED] ABGR8888 pitch less than min required
[17:19:03] [PASSED] ABGR8888 Invalid width
[17:19:03] [PASSED] ABGR8888 Invalid buffer handle
[17:19:03] [PASSED] No pixel format
[17:19:03] [PASSED] ABGR8888 Width 0
[17:19:03] [PASSED] ABGR8888 Height 0
[17:19:03] [PASSED] ABGR8888 Out of bound height * pitch combination
[17:19:03] [PASSED] ABGR8888 Large buffer offset
[17:19:03] [PASSED] ABGR8888 Buffer offset for inexistent plane
[17:19:03] [PASSED] ABGR8888 Invalid flag
[17:19:03] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[17:19:03] [PASSED] ABGR8888 Valid buffer modifier
[17:19:03] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[17:19:03] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[17:19:03] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[17:19:03] [PASSED] NV12 Normal sizes
[17:19:03] [PASSED] NV12 Max sizes
[17:19:03] [PASSED] NV12 Invalid pitch
[17:19:03] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[17:19:03] [PASSED] NV12 different modifier per-plane
[17:19:03] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[17:19:03] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[17:19:03] [PASSED] NV12 Modifier for inexistent plane
[17:19:03] [PASSED] NV12 Handle for inexistent plane
[17:19:03] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[17:19:03] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[17:19:03] [PASSED] YVU420 Normal sizes
[17:19:03] [PASSED] YVU420 Max sizes
[17:19:03] [PASSED] YVU420 Invalid pitch
[17:19:03] [PASSED] YVU420 Different pitches
[17:19:03] [PASSED] YVU420 Different buffer offsets/pitches
[17:19:03] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[17:19:03] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[17:19:03] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[17:19:03] [PASSED] YVU420 Valid modifier
[17:19:03] [PASSED] YVU420 Different modifiers per plane
[17:19:03] [PASSED] YVU420 Modifier for inexistent plane
[17:19:03] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[17:19:03] [PASSED] X0L2 Normal sizes
[17:19:03] [PASSED] X0L2 Max sizes
[17:19:03] [PASSED] X0L2 Invalid pitch
[17:19:03] [PASSED] X0L2 Pitch greater than minimum required
[17:19:03] [PASSED] X0L2 Handle for inexistent plane
[17:19:03] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[17:19:03] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[17:19:03] [PASSED] X0L2 Valid modifier
[17:19:03] [PASSED] X0L2 Modifier for inexistent plane
[17:19:03] =========== [PASSED] drm_test_framebuffer_create ===========
[17:19:03] [PASSED] drm_test_framebuffer_free
[17:19:03] [PASSED] drm_test_framebuffer_init
[17:19:03] [PASSED] drm_test_framebuffer_init_bad_format
[17:19:03] [PASSED] drm_test_framebuffer_init_dev_mismatch
[17:19:03] [PASSED] drm_test_framebuffer_lookup
[17:19:03] [PASSED] drm_test_framebuffer_lookup_inexistent
[17:19:03] [PASSED] drm_test_framebuffer_modifiers_not_supported
[17:19:03] ================= [PASSED] drm_framebuffer =================
[17:19:03] ================ drm_gem_shmem (8 subtests) ================
[17:19:03] [PASSED] drm_gem_shmem_test_obj_create
[17:19:03] [PASSED] drm_gem_shmem_test_obj_create_private
[17:19:03] [PASSED] drm_gem_shmem_test_pin_pages
[17:19:03] [PASSED] drm_gem_shmem_test_vmap
[17:19:03] [PASSED] drm_gem_shmem_test_get_sg_table
[17:19:03] [PASSED] drm_gem_shmem_test_get_pages_sgt
[17:19:03] [PASSED] drm_gem_shmem_test_madvise
[17:19:03] [PASSED] drm_gem_shmem_test_purge
[17:19:03] ================== [PASSED] drm_gem_shmem ==================
[17:19:03] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[17:19:03] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[17:19:03] [PASSED] Automatic
[17:19:03] [PASSED] Full
[17:19:03] [PASSED] Limited 16:235
[17:19:03] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[17:19:03] [PASSED] drm_test_check_disable_connector
[17:19:03] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[17:19:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[17:19:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[17:19:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[17:19:03] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[17:19:03] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[17:19:03] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[17:19:03] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[17:19:03] [PASSED] drm_test_check_output_bpc_dvi
[17:19:03] [PASSED] drm_test_check_output_bpc_format_vic_1
[17:19:03] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[17:19:03] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[17:19:03] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[17:19:03] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[17:19:03] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[17:19:03] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[17:19:03] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[17:19:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[17:19:03] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[17:19:03] [PASSED] drm_test_check_broadcast_rgb_value
[17:19:03] [PASSED] drm_test_check_bpc_8_value
[17:19:03] [PASSED] drm_test_check_bpc_10_value
[17:19:03] [PASSED] drm_test_check_bpc_12_value
[17:19:03] [PASSED] drm_test_check_format_value
[17:19:03] [PASSED] drm_test_check_tmds_char_value
[17:19:03] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[17:19:03] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[17:19:03] [PASSED] drm_test_check_mode_valid
[17:19:03] [PASSED] drm_test_check_mode_valid_reject
[17:19:03] [PASSED] drm_test_check_mode_valid_reject_rate
[17:19:03] [PASSED] drm_test_check_mode_valid_reject_max_clock
[17:19:03] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[17:19:03] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[17:19:03] [PASSED] drm_test_check_infoframes
[17:19:03] [PASSED] drm_test_check_reject_avi_infoframe
[17:19:03] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[17:19:03] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[17:19:03] [PASSED] drm_test_check_reject_audio_infoframe
[17:19:03] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[17:19:03] ================= drm_managed (2 subtests) =================
[17:19:03] [PASSED] drm_test_managed_release_action
[17:19:03] [PASSED] drm_test_managed_run_action
[17:19:03] =================== [PASSED] drm_managed ===================
[17:19:03] =================== drm_mm (6 subtests) ====================
[17:19:03] [PASSED] drm_test_mm_init
[17:19:03] [PASSED] drm_test_mm_debug
[17:19:03] [PASSED] drm_test_mm_align32
[17:19:03] [PASSED] drm_test_mm_align64
[17:19:03] [PASSED] drm_test_mm_lowest
[17:19:03] [PASSED] drm_test_mm_highest
[17:19:03] ===================== [PASSED] drm_mm ======================
[17:19:03] ============= drm_modes_analog_tv (5 subtests) =============
[17:19:03] [PASSED] drm_test_modes_analog_tv_mono_576i
[17:19:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[17:19:03] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[17:19:03] [PASSED] drm_test_modes_analog_tv_pal_576i
[17:19:03] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[17:19:03] =============== [PASSED] drm_modes_analog_tv ===============
[17:19:03] ============== drm_plane_helper (2 subtests) ===============
[17:19:03] =============== drm_test_check_plane_state ================
[17:19:03] [PASSED] clipping_simple
[17:19:03] [PASSED] clipping_rotate_reflect
[17:19:03] [PASSED] positioning_simple
[17:19:03] [PASSED] upscaling
[17:19:03] [PASSED] downscaling
[17:19:03] [PASSED] rounding1
[17:19:03] [PASSED] rounding2
[17:19:03] [PASSED] rounding3
[17:19:03] [PASSED] rounding4
[17:19:03] =========== [PASSED] drm_test_check_plane_state ============
[17:19:03] =========== drm_test_check_invalid_plane_state ============
[17:19:03] [PASSED] positioning_invalid
[17:19:03] [PASSED] upscaling_invalid
[17:19:03] [PASSED] downscaling_invalid
[17:19:03] ======= [PASSED] drm_test_check_invalid_plane_state ========
[17:19:03] ================ [PASSED] drm_plane_helper =================
[17:19:03] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[17:19:03] ====== drm_test_connector_helper_tv_get_modes_check =======
[17:19:03] [PASSED] None
[17:19:03] [PASSED] PAL
[17:19:03] [PASSED] NTSC
[17:19:03] [PASSED] Both, NTSC Default
[17:19:03] [PASSED] Both, PAL Default
[17:19:03] [PASSED] Both, NTSC Default, with PAL on command-line
[17:19:03] [PASSED] Both, PAL Default, with NTSC on command-line
[17:19:03] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[17:19:03] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[17:19:03] ================== drm_rect (9 subtests) ===================
[17:19:03] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[17:19:03] [PASSED] drm_test_rect_clip_scaled_not_clipped
[17:19:03] [PASSED] drm_test_rect_clip_scaled_clipped
[17:19:03] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[17:19:03] ================= drm_test_rect_intersect =================
[17:19:03] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[17:19:03] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[17:19:03] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[17:19:03] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[17:19:03] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[17:19:03] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[17:19:03] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[17:19:03] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[17:19:03] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[17:19:03] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[17:19:03] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[17:19:03] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[17:19:03] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[17:19:03] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[17:19:03] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[17:19:03] ============= [PASSED] drm_test_rect_intersect =============
[17:19:03] ================ drm_test_rect_calc_hscale ================
[17:19:03] [PASSED] normal use
[17:19:03] [PASSED] out of max range
[17:19:03] [PASSED] out of min range
[17:19:03] [PASSED] zero dst
[17:19:03] [PASSED] negative src
[17:19:03] [PASSED] negative dst
[17:19:03] ============ [PASSED] drm_test_rect_calc_hscale ============
[17:19:03] ================ drm_test_rect_calc_vscale ================
[17:19:03] [PASSED] normal use
[17:19:03] [PASSED] out of max range
[17:19:03] [PASSED] out of min range
[17:19:03] [PASSED] zero dst
[17:19:03] [PASSED] negative src
[17:19:03] [PASSED] negative dst
[17:19:03] ============ [PASSED] drm_test_rect_calc_vscale ============
[17:19:03] ================== drm_test_rect_rotate ===================
[17:19:03] [PASSED] reflect-x
[17:19:03] [PASSED] reflect-y
[17:19:03] [PASSED] rotate-0
[17:19:03] [PASSED] rotate-90
[17:19:03] [PASSED] rotate-180
[17:19:03] [PASSED] rotate-270
[17:19:03] ============== [PASSED] drm_test_rect_rotate ===============
[17:19:03] ================ drm_test_rect_rotate_inv =================
[17:19:03] [PASSED] reflect-x
[17:19:03] [PASSED] reflect-y
[17:19:03] [PASSED] rotate-0
[17:19:03] [PASSED] rotate-90
[17:19:03] [PASSED] rotate-180
[17:19:03] [PASSED] rotate-270
[17:19:03] ============ [PASSED] drm_test_rect_rotate_inv =============
[17:19:03] ==================== [PASSED] drm_rect =====================
[17:19:03] ============ drm_sysfb_modeset_test (1 subtest) ============
[17:19:03] ============ drm_test_sysfb_build_fourcc_list =============
[17:19:03] [PASSED] no native formats
[17:19:03] [PASSED] XRGB8888 as native format
[17:19:03] [PASSED] remove duplicates
[17:19:03] [PASSED] convert alpha formats
[17:19:03] [PASSED] random formats
[17:19:03] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[17:19:03] ============= [PASSED] drm_sysfb_modeset_test ==============
[17:19:03] ================== drm_fixp (2 subtests) ===================
[17:19:03] [PASSED] drm_test_int2fixp
[17:19:03] [PASSED] drm_test_sm2fixp
[17:19:03] ==================== [PASSED] drm_fixp =====================
[17:19:03] ============================================================
[17:19:03] Testing complete. Ran 621 tests: passed: 621
[17:19:03] Elapsed time: 25.985s total, 1.733s configuring, 24.071s building, 0.180s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[17:19:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[17:19:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[17:19:14] Starting KUnit Kernel (1/1)...
[17:19:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[17:19:14] ================= ttm_device (5 subtests) ==================
[17:19:14] [PASSED] ttm_device_init_basic
[17:19:14] [PASSED] ttm_device_init_multiple
[17:19:14] [PASSED] ttm_device_fini_basic
[17:19:14] [PASSED] ttm_device_init_no_vma_man
[17:19:14] ================== ttm_device_init_pools ==================
[17:19:14] [PASSED] No DMA allocations, no DMA32 required
[17:19:14] [PASSED] DMA allocations, DMA32 required
[17:19:14] [PASSED] No DMA allocations, DMA32 required
[17:19:14] [PASSED] DMA allocations, no DMA32 required
[17:19:14] ============== [PASSED] ttm_device_init_pools ==============
[17:19:14] =================== [PASSED] ttm_device ====================
[17:19:14] ================== ttm_pool (8 subtests) ===================
[17:19:14] ================== ttm_pool_alloc_basic ===================
[17:19:14] [PASSED] One page
[17:19:14] [PASSED] More than one page
[17:19:14] [PASSED] Above the allocation limit
[17:19:14] [PASSED] One page, with coherent DMA mappings enabled
[17:19:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:19:14] ============== [PASSED] ttm_pool_alloc_basic ===============
[17:19:14] ============== ttm_pool_alloc_basic_dma_addr ==============
[17:19:14] [PASSED] One page
[17:19:14] [PASSED] More than one page
[17:19:14] [PASSED] Above the allocation limit
[17:19:14] [PASSED] One page, with coherent DMA mappings enabled
[17:19:14] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[17:19:14] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[17:19:14] [PASSED] ttm_pool_alloc_order_caching_match
[17:19:14] [PASSED] ttm_pool_alloc_caching_mismatch
[17:19:14] [PASSED] ttm_pool_alloc_order_mismatch
[17:19:14] [PASSED] ttm_pool_free_dma_alloc
[17:19:14] [PASSED] ttm_pool_free_no_dma_alloc
[17:19:14] [PASSED] ttm_pool_fini_basic
[17:19:14] ==================== [PASSED] ttm_pool =====================
[17:19:14] ================ ttm_resource (8 subtests) =================
[17:19:14] ================= ttm_resource_init_basic =================
[17:19:14] [PASSED] Init resource in TTM_PL_SYSTEM
[17:19:14] [PASSED] Init resource in TTM_PL_VRAM
[17:19:14] [PASSED] Init resource in a private placement
[17:19:14] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[17:19:14] ============= [PASSED] ttm_resource_init_basic =============
[17:19:14] [PASSED] ttm_resource_init_pinned
[17:19:14] [PASSED] ttm_resource_fini_basic
[17:19:14] [PASSED] ttm_resource_manager_init_basic
[17:19:14] [PASSED] ttm_resource_manager_usage_basic
[17:19:14] [PASSED] ttm_resource_manager_set_used_basic
[17:19:14] [PASSED] ttm_sys_man_alloc_basic
[17:19:14] [PASSED] ttm_sys_man_free_basic
[17:19:14] ================== [PASSED] ttm_resource ===================
[17:19:14] =================== ttm_tt (15 subtests) ===================
[17:19:14] ==================== ttm_tt_init_basic ====================
[17:19:14] [PASSED] Page-aligned size
[17:19:14] [PASSED] Extra pages requested
[17:19:14] ================ [PASSED] ttm_tt_init_basic ================
[17:19:14] [PASSED] ttm_tt_init_misaligned
[17:19:14] [PASSED] ttm_tt_fini_basic
[17:19:14] [PASSED] ttm_tt_fini_sg
[17:19:14] [PASSED] ttm_tt_fini_shmem
[17:19:14] [PASSED] ttm_tt_create_basic
[17:19:14] [PASSED] ttm_tt_create_invalid_bo_type
[17:19:14] [PASSED] ttm_tt_create_ttm_exists
[17:19:14] [PASSED] ttm_tt_create_failed
[17:19:14] [PASSED] ttm_tt_destroy_basic
[17:19:14] [PASSED] ttm_tt_populate_null_ttm
[17:19:14] [PASSED] ttm_tt_populate_populated_ttm
[17:19:14] [PASSED] ttm_tt_unpopulate_basic
[17:19:14] [PASSED] ttm_tt_unpopulate_empty_ttm
[17:19:14] [PASSED] ttm_tt_swapin_basic
[17:19:14] ===================== [PASSED] ttm_tt ======================
[17:19:14] =================== ttm_bo (14 subtests) ===================
[17:19:14] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[17:19:14] [PASSED] Cannot be interrupted and sleeps
[17:19:14] [PASSED] Cannot be interrupted, locks straight away
[17:19:14] [PASSED] Can be interrupted, sleeps
[17:19:14] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[17:19:14] [PASSED] ttm_bo_reserve_locked_no_sleep
[17:19:14] [PASSED] ttm_bo_reserve_no_wait_ticket
[17:19:14] [PASSED] ttm_bo_reserve_double_resv
[17:19:14] [PASSED] ttm_bo_reserve_interrupted
[17:19:14] [PASSED] ttm_bo_reserve_deadlock
[17:19:14] [PASSED] ttm_bo_unreserve_basic
[17:19:14] [PASSED] ttm_bo_unreserve_pinned
[17:19:14] [PASSED] ttm_bo_unreserve_bulk
[17:19:14] [PASSED] ttm_bo_fini_basic
[17:19:14] [PASSED] ttm_bo_fini_shared_resv
[17:19:14] [PASSED] ttm_bo_pin_basic
[17:19:14] [PASSED] ttm_bo_pin_unpin_resource
[17:19:14] [PASSED] ttm_bo_multiple_pin_one_unpin
[17:19:14] ===================== [PASSED] ttm_bo ======================
[17:19:14] ============== ttm_bo_validate (22 subtests) ===============
[17:19:14] ============== ttm_bo_init_reserved_sys_man ===============
[17:19:14] [PASSED] Buffer object for userspace
[17:19:14] [PASSED] Kernel buffer object
[17:19:14] [PASSED] Shared buffer object
[17:19:14] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[17:19:14] ============== ttm_bo_init_reserved_mock_man ==============
[17:19:14] [PASSED] Buffer object for userspace
[17:19:14] [PASSED] Kernel buffer object
[17:19:14] [PASSED] Shared buffer object
[17:19:14] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[17:19:14] [PASSED] ttm_bo_init_reserved_resv
[17:19:14] ================== ttm_bo_validate_basic ==================
[17:19:14] [PASSED] Buffer object for userspace
[17:19:14] [PASSED] Kernel buffer object
[17:19:14] [PASSED] Shared buffer object
[17:19:14] ============== [PASSED] ttm_bo_validate_basic ==============
[17:19:14] [PASSED] ttm_bo_validate_invalid_placement
[17:19:14] ============= ttm_bo_validate_same_placement ==============
[17:19:14] [PASSED] System manager
[17:19:14] [PASSED] VRAM manager
[17:19:14] ========= [PASSED] ttm_bo_validate_same_placement ==========
[17:19:14] [PASSED] ttm_bo_validate_failed_alloc
[17:19:14] [PASSED] ttm_bo_validate_pinned
[17:19:14] [PASSED] ttm_bo_validate_busy_placement
[17:19:14] ================ ttm_bo_validate_multihop =================
[17:19:14] [PASSED] Buffer object for userspace
[17:19:14] [PASSED] Kernel buffer object
[17:19:14] [PASSED] Shared buffer object
[17:19:14] ============ [PASSED] ttm_bo_validate_multihop =============
[17:19:14] ========== ttm_bo_validate_no_placement_signaled ==========
[17:19:14] [PASSED] Buffer object in system domain, no page vector
[17:19:14] [PASSED] Buffer object in system domain with an existing page vector
[17:19:14] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[17:19:14] ======== ttm_bo_validate_no_placement_not_signaled ========
[17:19:14] [PASSED] Buffer object for userspace
[17:19:14] [PASSED] Kernel buffer object
[17:19:14] [PASSED] Shared buffer object
[17:19:14] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[17:19:14] [PASSED] ttm_bo_validate_move_fence_signaled
[17:19:14] ========= ttm_bo_validate_move_fence_not_signaled =========
[17:19:14] [PASSED] Waits for GPU
[17:19:14] [PASSED] Tries to lock straight away
[17:19:14] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[17:19:14] [PASSED] ttm_bo_validate_swapout
[17:19:14] [PASSED] ttm_bo_validate_happy_evict
[17:19:14] [PASSED] ttm_bo_validate_all_pinned_evict
[17:19:14] [PASSED] ttm_bo_validate_allowed_only_evict
[17:19:14] [PASSED] ttm_bo_validate_deleted_evict
[17:19:14] [PASSED] ttm_bo_validate_busy_domain_evict
[17:19:14] [PASSED] ttm_bo_validate_evict_gutting
[17:19:14] [PASSED] ttm_bo_validate_recrusive_evict
[17:19:14] ================= [PASSED] ttm_bo_validate =================
[17:19:14] ============================================================
[17:19:14] Testing complete. Ran 102 tests: passed: 102
[17:19:14] Elapsed time: 11.471s total, 1.623s configuring, 9.583s building, 0.237s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Xe.CI.BAT: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2)
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (3 preceding siblings ...)
2026-05-15 17:19 ` ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2) Patchwork
@ 2026-05-15 17:57 ` Patchwork
2026-05-16 8:16 ` ✓ Xe.CI.FULL: " Patchwork
` (4 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-15 17:57 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 975 bytes --]
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2)
URL : https://patchwork.freedesktop.org/series/166667/
State : success
== Summary ==
CI Bug Log - changes from xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3_BAT -> xe-pw-166667v2_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3 -> xe-pw-166667v2
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3: 25de7fb53bca724e7864b6bd8280aa1ec59429e3
xe-pw-166667v2: 166667v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/index.html
[-- Attachment #2: Type: text/html, Size: 1533 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Xe.CI.FULL: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2)
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (4 preceding siblings ...)
2026-05-15 17:57 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-05-16 8:16 ` Patchwork
2026-05-17 2:47 ` [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (3 subsequent siblings)
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-16 8:16 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 38158 bytes --]
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2)
URL : https://patchwork.freedesktop.org/series/166667/
State : success
== Summary ==
CI Bug Log - changes from xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3_FULL -> xe-pw-166667v2_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-166667v2_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-lnl: NOTRUN -> [SKIP][1] ([Intel XE#1125] / [Intel XE#7312])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@intel_hwmon@hwmon-write.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-3-4:
- shard-bmg: [PASS][2] -> [ABORT][3] ([Intel XE#7814]) +1 other test abort
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-3-4.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-7/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-b-hdmi-a-3-4.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-dp-2-4-rc-ccs:
- shard-bmg: [PASS][4] -> [DMESG-WARN][5] ([Intel XE#7814]) +12 other tests dmesg-warn
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-dp-2-4-rc-ccs.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-7/igt@kms_async_flips@async-flip-with-page-flip-events-tiled-atomic@pipe-d-dp-2-4-rc-ccs.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#3658] / [Intel XE#7360])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2327]) +1 other test skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#1407]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#7679])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html
- shard-bmg: NOTRUN -> [SKIP][10] ([Intel XE#7679])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#2887])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#2887])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_ccs@random-ccs-data-4-tiled-mtl-mc-ccs.html
* igt@kms_chamelium_edid@hdmi-mode-timings:
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#373]) +1 other test skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_chamelium_edid@hdmi-mode-timings.html
* igt@kms_chamelium_hpd@dp-hpd-storm:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#2252]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_chamelium_hpd@dp-hpd-storm.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-toggle:
- shard-lnl: NOTRUN -> [SKIP][15] ([Intel XE#309] / [Intel XE#7343])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_cursor_legacy@cursorb-vs-flipb-toggle.html
* igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
- shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#1421])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [PASS][17] -> [FAIL][18] ([Intel XE#301])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7178] / [Intel XE#7351])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
- shard-lnl: NOTRUN -> [SKIP][20] ([Intel XE#7178] / [Intel XE#7351])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#656] / [Intel XE#7905]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#4141])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-plflip-blt:
- shard-lnl: NOTRUN -> [SKIP][23] ([Intel XE#6312] / [Intel XE#651])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-stridechange:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2311]) +3 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrshdr-stridechange.html
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#6312])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrshdr-stridechange.html
* igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-move:
- shard-lnl: NOTRUN -> [SKIP][26] ([Intel XE#7865])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_frontbuffer_tracking@fbchdr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#7061])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-shrfb-plflip-blt:
- shard-lnl: NOTRUN -> [SKIP][28] ([Intel XE#7905]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-shrfb-plflip-blt.html
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#2313]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-shrfb-plflip-blt.html
* igt@kms_hdmi_inject@inject-audio:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#1470] / [Intel XE#2853])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_hdmi_inject@inject-audio.html
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#7308])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_hdmi_inject@inject-audio.html
* igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f:
- shard-bmg: [PASS][32] -> [SKIP][33] ([Intel XE#7915]) +1 other test skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-6/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-7/igt@kms_hdr@invalid-metadata-sizes@pipe-a-hdmi-a-3-xrgb16161616f.html
* igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier:
- shard-bmg: NOTRUN -> [SKIP][34] ([Intel XE#7283])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier.html
* igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-a-plane-5:
- shard-lnl: NOTRUN -> [SKIP][35] ([Intel XE#7130]) +1 other test skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier@pipe-a-plane-5.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#2893] / [Intel XE#7304])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
- shard-bmg: NOTRUN -> [SKIP][37] ([Intel XE#1489])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr@psr2-cursor-plane-move:
- shard-bmg: NOTRUN -> [SKIP][38] ([Intel XE#2234] / [Intel XE#2850])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_psr@psr2-cursor-plane-move.html
* igt@kms_vrr@seamless-rr-switch-vrr:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#1499])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_vrr@seamless-rr-switch-vrr.html
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#1499])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@kms_vrr@seamless-rr-switch-vrr.html
* igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram:
- shard-bmg: NOTRUN -> [SKIP][41] ([Intel XE#7636]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@xe_eudebug_online@writes-caching-vram-bb-vram-target-vram.html
* igt@xe_evict@evict-beng-mixed-threads-large-multi-vm:
- shard-lnl: NOTRUN -> [SKIP][42] ([Intel XE#6540] / [Intel XE#688]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_evict@evict-beng-mixed-threads-large-multi-vm.html
* igt@xe_exec_balancer@twice-cm-parallel-rebind:
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#7482]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_exec_balancer@twice-cm-parallel-rebind.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-bmg: NOTRUN -> [SKIP][44] ([Intel XE#2322] / [Intel XE#7372])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#1392])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-basic:
- shard-bmg: NOTRUN -> [SKIP][46] ([Intel XE#6874]) +2 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-basic.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd:
- shard-lnl: NOTRUN -> [SKIP][47] ([Intel XE#6874]) +2 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd.html
* igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads:
- shard-bmg: [PASS][48] -> [FAIL][49] ([Intel XE#7850])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-4/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-6/igt@xe_exec_reset@long-spin-comp-reuse-many-preempt-threads.html
* igt@xe_exec_sip_eudebug@wait-writesip-nodebug:
- shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#7636]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_exec_sip_eudebug@wait-writesip-nodebug.html
* igt@xe_pat@pat-index-xelp:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#7590] / [Intel XE#977])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_pat@pat-index-xelp.html
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#2245] / [Intel XE#7590])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@xe_pat@pat-index-xelp.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#944])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@xe_query@multigpu-query-invalid-cs-cycles.html
- shard-lnl: NOTRUN -> [SKIP][54] ([Intel XE#944])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_query@multigpu-query-invalid-cs-cycles.html
* igt@xe_sriov_auto_provisioning@fair-allocation@numvfs-random:
- shard-bmg: NOTRUN -> [FAIL][55] ([Intel XE#7992])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_sriov_auto_provisioning@fair-allocation@numvfs-random.html
#### Possible fixes ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [FAIL][56] ([Intel XE#3718] / [Intel XE#6078]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2:
- shard-bmg: [FAIL][58] ([Intel XE#6078]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-dp-2.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-bmg: [FAIL][60] ([Intel XE#7571]) -> [PASS][61]
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-4/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_flip@2x-plain-flip-fb-recreate:
- shard-bmg: [DMESG-FAIL][62] ([Intel XE#5208] / [Intel XE#5545] / [Intel XE#7774]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate.html
* igt@kms_flip@2x-plain-flip-fb-recreate@bd-dp2-hdmi-a3:
- shard-bmg: [DMESG-FAIL][64] ([Intel XE#5545] / [Intel XE#7774]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate@bd-dp2-hdmi-a3.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_flip@2x-plain-flip-fb-recreate@bd-dp2-hdmi-a3.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][66] ([Intel XE#1503]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-9/igt@kms_hdr@invalid-hdr.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
* igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [SKIP][68] ([Intel XE#7922]) -> [PASS][69] +1 other test pass
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-9/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-8/igt@kms_hdr@invalid-hdr@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_vrr@flipline:
- shard-lnl: [FAIL][70] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][71] +1 other test pass
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-lnl-1/igt@kms_vrr@flipline.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-1/igt@kms_vrr@flipline.html
* igt@xe_exec_reset@long-spin-reuse-many-preempt-gt1-threads:
- shard-bmg: [FAIL][72] ([Intel XE#7850]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-10/igt@xe_exec_reset@long-spin-reuse-many-preempt-gt1-threads.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_exec_reset@long-spin-reuse-many-preempt-gt1-threads.html
* igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset:
- shard-bmg: [ABORT][74] -> [PASS][75]
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-1/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-1/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html
- shard-lnl: [ABORT][76] -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-lnl-2/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-lnl-7/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch:
- shard-bmg: [SKIP][78] ([Intel XE#6557] / [Intel XE#6703]) -> [PASS][79] +1 other test pass
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch.html
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-prefetch.html
* igt@xe_intel_bb@intel-bb-blit-x:
- shard-bmg: [SKIP][80] ([Intel XE#6703]) -> [PASS][81] +133 other tests pass
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_intel_bb@intel-bb-blit-x.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_intel_bb@intel-bb-blit-x.html
#### Warnings ####
* igt@kms_big_fb@y-tiled-8bpp-rotate-180:
- shard-bmg: [SKIP][82] ([Intel XE#6703]) -> [SKIP][83] ([Intel XE#1124]) +2 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_big_fb@y-tiled-8bpp-rotate-180.html
* igt@kms_bw@linear-tiling-3-displays-target-1920x1080p:
- shard-bmg: [SKIP][84] ([Intel XE#6703]) -> [SKIP][85] ([Intel XE#367])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_bw@linear-tiling-3-displays-target-1920x1080p.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_bw@linear-tiling-3-displays-target-1920x1080p.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs:
- shard-bmg: [SKIP][86] ([Intel XE#6703]) -> [SKIP][87] ([Intel XE#2887]) +2 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_chamelium_color@ctm-max:
- shard-bmg: [SKIP][88] ([Intel XE#6703]) -> [SKIP][89] ([Intel XE#2325] / [Intel XE#7358])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_chamelium_color@ctm-max.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- shard-bmg: [SKIP][90] ([Intel XE#6703]) -> [SKIP][91] ([Intel XE#2252])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-fast.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_cursor_crc@cursor-rapid-movement-128x42:
- shard-bmg: [SKIP][92] ([Intel XE#6703]) -> [SKIP][93] ([Intel XE#2320])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_cursor_crc@cursor-rapid-movement-128x42.html
* igt@kms_dsc@dsc-with-output-formats:
- shard-bmg: [SKIP][94] ([Intel XE#6703]) -> [SKIP][95] ([Intel XE#2244])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_dsc@dsc-with-output-formats.html
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_dsc@dsc-with-output-formats.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
- shard-bmg: [SKIP][96] ([Intel XE#6703]) -> [SKIP][97] ([Intel XE#7178] / [Intel XE#7351])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render:
- shard-bmg: [SKIP][98] ([Intel XE#6703]) -> [SKIP][99] ([Intel XE#4141]) +3 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render.html
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][100] ([Intel XE#6703]) -> [SKIP][101] ([Intel XE#2311]) +11 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-spr-indfb-fullscreen.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: [SKIP][102] ([Intel XE#6703]) -> [SKIP][103] ([Intel XE#2313]) +12 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
- shard-bmg: [SKIP][104] ([Intel XE#6703]) -> [SKIP][105] ([Intel XE#7061])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
- shard-bmg: [SKIP][106] ([Intel XE#6703]) -> [SKIP][107] ([Intel XE#7283])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
* igt@kms_pm_rpm@package-g7:
- shard-bmg: [SKIP][108] ([Intel XE#6703]) -> [SKIP][109] ([Intel XE#6814] / [Intel XE#7428])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_pm_rpm@package-g7.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_pm_rpm@package-g7.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf:
- shard-bmg: [SKIP][110] ([Intel XE#6703]) -> [SKIP][111] ([Intel XE#1489])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-sf.html
* igt@kms_psr@pr-suspend:
- shard-bmg: [SKIP][112] ([Intel XE#6703]) -> [SKIP][113] ([Intel XE#2234] / [Intel XE#2850]) +1 other test skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_psr@pr-suspend.html
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_psr@pr-suspend.html
* igt@kms_sharpness_filter@filter-dpms:
- shard-bmg: [SKIP][114] ([Intel XE#6703]) -> [SKIP][115] ([Intel XE#6503])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_sharpness_filter@filter-dpms.html
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_sharpness_filter@filter-dpms.html
* igt@kms_vrr@flip-dpms:
- shard-bmg: [SKIP][116] ([Intel XE#6703]) -> [SKIP][117] ([Intel XE#1499])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@kms_vrr@flip-dpms.html
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@kms_vrr@flip-dpms.html
* igt@xe_eudebug@basic-read-event:
- shard-bmg: [SKIP][118] ([Intel XE#6703]) -> [SKIP][119] ([Intel XE#7636]) +2 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_eudebug@basic-read-event.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_eudebug@basic-read-event.html
* igt@xe_evict@evict-small-multi-queue-priority:
- shard-bmg: [SKIP][120] ([Intel XE#6703]) -> [SKIP][121] ([Intel XE#7140])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_evict@evict-small-multi-queue-priority.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_evict@evict-small-multi-queue-priority.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-bmg: [SKIP][122] ([Intel XE#6703]) -> [SKIP][123] ([Intel XE#2322] / [Intel XE#7372]) +1 other test skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_multi_queue@few-execs-dyn-priority:
- shard-bmg: [SKIP][124] ([Intel XE#6703]) -> [SKIP][125] ([Intel XE#6874]) +7 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_exec_multi_queue@few-execs-dyn-priority.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_exec_multi_queue@few-execs-dyn-priority.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind:
- shard-bmg: [SKIP][126] ([Intel XE#6703]) -> [SKIP][127] ([Intel XE#7138]) +1 other test skip
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr-rebind.html
* igt@xe_page_reclaim@random:
- shard-bmg: [SKIP][128] ([Intel XE#6703]) -> [SKIP][129] ([Intel XE#7793])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_page_reclaim@random.html
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_page_reclaim@random.html
* igt@xe_pm@d3cold-basic-exec:
- shard-bmg: [SKIP][130] ([Intel XE#6703]) -> [SKIP][131] ([Intel XE#2284] / [Intel XE#7370])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_pm@d3cold-basic-exec.html
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_pm@d3cold-basic-exec.html
* igt@xe_pmu@fn-engine-activity-load:
- shard-bmg: [SKIP][132] ([Intel XE#6703]) -> [FAIL][133] ([Intel XE#7992]) +1 other test fail
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3/shard-bmg-2/igt@xe_pmu@fn-engine-activity-load.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/shard-bmg-2/igt@xe_pmu@fn-engine-activity-load.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1470]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1470
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2853]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2853
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3658
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#6557]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6557
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6703
[Intel XE#6814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6814
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7130
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7140]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7140
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7308
[Intel XE#7312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7312
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7360
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7428
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7571
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7774]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7774
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7814
[Intel XE#7850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7850
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7922]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7922
[Intel XE#7992]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7992
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
Build changes
-------------
* Linux: xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3 -> xe-pw-166667v2
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5068-25de7fb53bca724e7864b6bd8280aa1ec59429e3: 25de7fb53bca724e7864b6bd8280aa1ec59429e3
xe-pw-166667v2: 166667v2
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v2/index.html
[-- Attachment #2: Type: text/html, Size: 44599 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-15 8:24 [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
2026-05-15 10:21 ` Jani Nikula
2026-05-15 14:55 ` Gustavo Sousa
@ 2026-05-17 2:45 ` Suraj Kandpal
2 siblings, 0 replies; 22+ messages in thread
From: Suraj Kandpal @ 2026-05-17 2:45 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, gustavo.sousa, jani.nikula,
Suraj Kandpal
Starting with display version 30, the per-pipe frame timestamp is read
from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the display
and select the appropriate register based on DISPLAY_VER(), and update
all callers intel_vblank accordingly.
Bspec: 79482
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
v1 -> v2:
- Define registers in correct location (Jani)
- Use the intel_display_wa() helper to select the correct register (Gustavo)
- Fix early vblank timeout issue when DMC is not loaded
.../gpu/drm/i915/display/intel_display_wa.c | 2 ++
.../gpu/drm/i915/display/intel_display_wa.h | 1 +
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 ++++++
drivers/gpu/drm/i915/display/intel_vblank.c | 18 ++++++++++++++----
4 files changed, 23 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
index 7d3d63a59882..44c2a503c911 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.c
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
@@ -110,6 +110,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
return DISPLAY_VERx100(display) == 3000 ||
DISPLAY_VERx100(display) == 2000 ||
DISPLAY_VERx100(display) == 1401;
+ case INTEL_DISPLAY_WA_14022946399:
+ return DISPLAY_VER(display) >= 30;
case INTEL_DISPLAY_WA_14025769978:
return DISPLAY_VER(display) == 35;
case INTEL_DISPLAY_WA_15013987218:
diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
index 15fec843f15e..884463a894c8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_wa.h
+++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
@@ -42,6 +42,7 @@ enum intel_display_wa {
INTEL_DISPLAY_WA_14014143976,
INTEL_DISPLAY_WA_14016740474,
INTEL_DISPLAY_WA_14020863754,
+ INTEL_DISPLAY_WA_14022946399,
INTEL_DISPLAY_WA_14025769978,
INTEL_DISPLAY_WA_15013987218,
INTEL_DISPLAY_WA_15018326506,
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index 38e342b45af0..985642a79a52 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -644,4 +644,10 @@ enum pipedmc_event_id {
#define _PIPEDMC_DCB_BALANCE_RESET_B 0x986a8
#define PIPEDMC_DCB_BALANCE_RESET(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_BALANCE_RESET_A,\
_PIPEDMC_DCB_BALANCE_RESET_B)
+
+#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
+#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
+#define PIPEDMC_FRMTMSTMP(pipe) \
+ _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A, _PIPEDMC_FRMTMSTMP_B)
+
#endif /* __INTEL_DMC_REGS_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index 28d81199792e..145c342f445f 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -15,6 +15,8 @@
#include "intel_display_regs.h"
#include "intel_display_types.h"
#include "intel_display_utils.h"
+#include "intel_display_wa.h"
+#include "intel_dmc_regs.h"
#include "intel_vblank.h"
#include "intel_vrr.h"
@@ -156,8 +158,12 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
* pipe frame time stamp. The time stamp value
* is sampled at every start of vertical blank.
*/
- scan_prev_time = intel_de_read_fw(display,
- PIPE_FRMTMSTMP(crtc->pipe));
+ if (intel_display_wa(display, INTEL_DISPLAY_WA_14022946399))
+ scan_prev_time = intel_de_read_fw(display,
+ PIPEDMC_FRMTMSTMP(crtc->pipe));
+ else
+ scan_prev_time = intel_de_read_fw(display,
+ PIPE_FRMTMSTMP(crtc->pipe));
/*
* The TIMESTAMP_CTR register has the current
@@ -165,8 +171,12 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
*/
scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR);
- scan_post_time = intel_de_read_fw(display,
- PIPE_FRMTMSTMP(crtc->pipe));
+ if (intel_display_wa(display, INTEL_DISPLAY_WA_14022946399))
+ scan_post_time = intel_de_read_fw(display,
+ PIPEDMC_FRMTMSTMP(crtc->pipe));
+ else
+ scan_post_time = intel_de_read_fw(display,
+ PIPE_FRMTMSTMP(crtc->pipe));
} while (scan_post_time != scan_prev_time);
return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface"
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (5 preceding siblings ...)
2026-05-16 8:16 ` ✓ Xe.CI.FULL: " Patchwork
@ 2026-05-17 2:47 ` Suraj Kandpal
2026-05-20 8:08 ` Nautiyal, Ankit K
2026-05-17 3:50 ` ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3) Patchwork
` (2 subsequent siblings)
9 siblings, 1 reply; 22+ messages in thread
From: Suraj Kandpal @ 2026-05-17 2:47 UTC (permalink / raw)
To: intel-xe, intel-gfx; +Cc: ankit.k.nautiyal, arun.r.murthy, Suraj Kandpal
This reverts commit 40d2f5820951dee818d05c14677277048bd85f9f.
Removing the try_vesa_interface gate caused a backlight regression on
panels whose VBT correctly reports INTEL_BACKLIGHT_DISPLAY_DDI and whose
PWM path is the actual backlight control, but whose DPCD optimistically
advertises DP_EDP_BACKLIGHT_AUX_ENABLE_CAP / _BRIGHTNESS_AUX_SET_CAP.
After the commit such panels silently bind to the VESA AUX backlight
funcs; AUX writes complete but the panel ignores them, leaving
brightness stuck (no-op backlight). Observed on at least KBL and TGL
eDP setups.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
.../drm/i915/display/intel_dp_aux_backlight.c | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index a8d56ebf06a2..7a6c07f6aaeb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -691,10 +691,9 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
struct intel_dp *intel_dp = intel_attached_dp(connector);
struct drm_device *dev = connector->base.dev;
struct intel_panel *panel = &connector->panel;
- bool try_intel_interface = false;
+ bool try_intel_interface = false, try_vesa_interface = false;
- /*
- * Check the VBT and user's module parameters to figure out which
+ /* Check the VBT and user's module parameters to figure out which
* interfaces to probe
*/
switch (display->params.enable_dpcd_backlight) {
@@ -703,6 +702,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
case INTEL_DP_AUX_BACKLIGHT_AUTO:
switch (panel->vbt.backlight.type) {
case INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE:
+ try_vesa_interface = true;
break;
case INTEL_BACKLIGHT_DISPLAY_DDI:
try_intel_interface = true;
@@ -715,12 +715,20 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
if (panel->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE)
try_intel_interface = true;
+ try_vesa_interface = true;
+ break;
+ case INTEL_DP_AUX_BACKLIGHT_FORCE_VESA:
+ try_vesa_interface = true;
break;
case INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL:
try_intel_interface = true;
break;
}
+ /* For eDP 1.5 and above we are supposed to use VESA interface for brightness control */
+ if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
+ try_vesa_interface = true;
+
/*
* Since Intel has their own backlight control interface, the majority of machines out there
* using DPCD backlight controls with Intel GPUs will be using this interface as opposed to
@@ -733,9 +741,6 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
* panel with Intel's OUI - which is also required for us to be able to detect Intel's
* backlight interface at all. This means that the only sensible way for us to detect both
* interfaces is to probe for Intel's first, and VESA's second.
- *
- * Also there is a chance some VBTs may advertise false Intel backlight support even if the
- * TCON DPCD says otherwise. This means we keep VESA interface as fallback in that case.
*/
if (try_intel_interface && intel_dp->edp_dpcd[0] <= DP_EDP_14b &&
intel_dp_aux_supports_hdr_backlight(connector)) {
@@ -745,7 +750,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
return 0;
}
- if (intel_dp_aux_supports_vesa_backlight(connector)) {
+ if (try_vesa_interface && intel_dp_aux_supports_vesa_backlight(connector)) {
drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Using VESA eDP backlight controls\n",
connector->base.base.id, connector->base.name);
panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
--
2.34.1
^ permalink raw reply related [flat|nested] 22+ messages in thread
* ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3)
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (6 preceding siblings ...)
2026-05-17 2:47 ` [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
@ 2026-05-17 3:50 ` Patchwork
2026-05-17 4:30 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-17 5:49 ` ✗ Xe.CI.FULL: failure " Patchwork
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-17 3:50 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3)
URL : https://patchwork.freedesktop.org/series/166667/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[03:49:26] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:49:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:50:02] Starting KUnit Kernel (1/1)...
[03:50:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:50:02] ================== guc_buf (11 subtests) ===================
[03:50:02] [PASSED] test_smallest
[03:50:02] [PASSED] test_largest
[03:50:02] [PASSED] test_granular
[03:50:02] [PASSED] test_unique
[03:50:02] [PASSED] test_overlap
[03:50:02] [PASSED] test_reusable
[03:50:02] [PASSED] test_too_big
[03:50:02] [PASSED] test_flush
[03:50:02] [PASSED] test_lookup
[03:50:02] [PASSED] test_data
[03:50:02] [PASSED] test_class
[03:50:02] ===================== [PASSED] guc_buf =====================
[03:50:02] =================== guc_dbm (7 subtests) ===================
[03:50:02] [PASSED] test_empty
[03:50:02] [PASSED] test_default
[03:50:02] ======================== test_size ========================
[03:50:02] [PASSED] 4
[03:50:02] [PASSED] 8
[03:50:02] [PASSED] 32
[03:50:02] [PASSED] 256
[03:50:02] ==================== [PASSED] test_size ====================
[03:50:02] ======================= test_reuse ========================
[03:50:02] [PASSED] 4
[03:50:02] [PASSED] 8
[03:50:02] [PASSED] 32
[03:50:02] [PASSED] 256
[03:50:02] =================== [PASSED] test_reuse ====================
[03:50:02] =================== test_range_overlap ====================
[03:50:02] [PASSED] 4
[03:50:02] [PASSED] 8
[03:50:02] [PASSED] 32
[03:50:02] [PASSED] 256
[03:50:02] =============== [PASSED] test_range_overlap ================
[03:50:02] =================== test_range_compact ====================
[03:50:02] [PASSED] 4
[03:50:02] [PASSED] 8
[03:50:02] [PASSED] 32
[03:50:02] [PASSED] 256
[03:50:02] =============== [PASSED] test_range_compact ================
[03:50:02] ==================== test_range_spare =====================
[03:50:02] [PASSED] 4
[03:50:02] [PASSED] 8
[03:50:02] [PASSED] 32
[03:50:02] [PASSED] 256
[03:50:02] ================ [PASSED] test_range_spare =================
[03:50:02] ===================== [PASSED] guc_dbm =====================
[03:50:02] =================== guc_idm (6 subtests) ===================
[03:50:02] [PASSED] bad_init
[03:50:02] [PASSED] no_init
[03:50:02] [PASSED] init_fini
[03:50:02] [PASSED] check_used
[03:50:02] [PASSED] check_quota
[03:50:02] [PASSED] check_all
[03:50:02] ===================== [PASSED] guc_idm =====================
[03:50:02] ================== no_relay (3 subtests) ===================
[03:50:02] [PASSED] xe_drops_guc2pf_if_not_ready
[03:50:02] [PASSED] xe_drops_guc2vf_if_not_ready
[03:50:02] [PASSED] xe_rejects_send_if_not_ready
[03:50:02] ==================== [PASSED] no_relay =====================
[03:50:02] ================== pf_relay (14 subtests) ==================
[03:50:02] [PASSED] pf_rejects_guc2pf_too_short
[03:50:02] [PASSED] pf_rejects_guc2pf_too_long
[03:50:02] [PASSED] pf_rejects_guc2pf_no_payload
[03:50:02] [PASSED] pf_fails_no_payload
[03:50:02] [PASSED] pf_fails_bad_origin
[03:50:02] [PASSED] pf_fails_bad_type
[03:50:02] [PASSED] pf_txn_reports_error
[03:50:02] [PASSED] pf_txn_sends_pf2guc
[03:50:02] [PASSED] pf_sends_pf2guc
[03:50:02] [SKIPPED] pf_loopback_nop
[03:50:02] [SKIPPED] pf_loopback_echo
[03:50:02] [SKIPPED] pf_loopback_fail
[03:50:02] [SKIPPED] pf_loopback_busy
[03:50:02] [SKIPPED] pf_loopback_retry
[03:50:02] ==================== [PASSED] pf_relay =====================
[03:50:02] ================== vf_relay (3 subtests) ===================
[03:50:02] [PASSED] vf_rejects_guc2vf_too_short
[03:50:02] [PASSED] vf_rejects_guc2vf_too_long
[03:50:02] [PASSED] vf_rejects_guc2vf_no_payload
[03:50:02] ==================== [PASSED] vf_relay =====================
[03:50:02] ================ pf_gt_config (9 subtests) =================
[03:50:02] [PASSED] fair_contexts_1vf
[03:50:02] [PASSED] fair_doorbells_1vf
[03:50:02] [PASSED] fair_ggtt_1vf
[03:50:02] ====================== fair_vram_1vf ======================
[03:50:02] [PASSED] 3.50 GiB
[03:50:02] [PASSED] 11.5 GiB
[03:50:02] [PASSED] 15.5 GiB
[03:50:02] [PASSED] 31.5 GiB
[03:50:02] [PASSED] 63.5 GiB
[03:50:02] [PASSED] 1.91 GiB
[03:50:02] ================== [PASSED] fair_vram_1vf ==================
[03:50:02] ================ fair_vram_1vf_admin_only =================
[03:50:02] [PASSED] 3.50 GiB
[03:50:02] [PASSED] 11.5 GiB
[03:50:02] [PASSED] 15.5 GiB
[03:50:02] [PASSED] 31.5 GiB
[03:50:02] [PASSED] 63.5 GiB
[03:50:02] [PASSED] 1.91 GiB
[03:50:02] ============ [PASSED] fair_vram_1vf_admin_only =============
[03:50:02] ====================== fair_contexts ======================
[03:50:02] [PASSED] 1 VF
[03:50:02] [PASSED] 2 VFs
[03:50:02] [PASSED] 3 VFs
[03:50:02] [PASSED] 4 VFs
[03:50:02] [PASSED] 5 VFs
[03:50:02] [PASSED] 6 VFs
[03:50:02] [PASSED] 7 VFs
[03:50:02] [PASSED] 8 VFs
[03:50:02] [PASSED] 9 VFs
[03:50:02] [PASSED] 10 VFs
[03:50:02] [PASSED] 11 VFs
[03:50:02] [PASSED] 12 VFs
[03:50:02] [PASSED] 13 VFs
[03:50:02] [PASSED] 14 VFs
[03:50:02] [PASSED] 15 VFs
[03:50:02] [PASSED] 16 VFs
[03:50:02] [PASSED] 17 VFs
[03:50:02] [PASSED] 18 VFs
[03:50:02] [PASSED] 19 VFs
[03:50:02] [PASSED] 20 VFs
[03:50:02] [PASSED] 21 VFs
[03:50:02] [PASSED] 22 VFs
[03:50:02] [PASSED] 23 VFs
[03:50:02] [PASSED] 24 VFs
[03:50:02] [PASSED] 25 VFs
[03:50:02] [PASSED] 26 VFs
[03:50:02] [PASSED] 27 VFs
[03:50:02] [PASSED] 28 VFs
[03:50:02] [PASSED] 29 VFs
[03:50:02] [PASSED] 30 VFs
[03:50:02] [PASSED] 31 VFs
[03:50:02] [PASSED] 32 VFs
[03:50:02] [PASSED] 33 VFs
[03:50:02] [PASSED] 34 VFs
[03:50:02] [PASSED] 35 VFs
[03:50:02] [PASSED] 36 VFs
[03:50:02] [PASSED] 37 VFs
[03:50:02] [PASSED] 38 VFs
[03:50:02] [PASSED] 39 VFs
[03:50:02] [PASSED] 40 VFs
[03:50:02] [PASSED] 41 VFs
[03:50:02] [PASSED] 42 VFs
[03:50:02] [PASSED] 43 VFs
[03:50:02] [PASSED] 44 VFs
[03:50:02] [PASSED] 45 VFs
[03:50:02] [PASSED] 46 VFs
[03:50:02] [PASSED] 47 VFs
[03:50:02] [PASSED] 48 VFs
[03:50:02] [PASSED] 49 VFs
[03:50:02] [PASSED] 50 VFs
[03:50:02] [PASSED] 51 VFs
[03:50:02] [PASSED] 52 VFs
[03:50:02] [PASSED] 53 VFs
[03:50:02] [PASSED] 54 VFs
[03:50:02] [PASSED] 55 VFs
[03:50:02] [PASSED] 56 VFs
[03:50:02] [PASSED] 57 VFs
[03:50:02] [PASSED] 58 VFs
[03:50:02] [PASSED] 59 VFs
[03:50:02] [PASSED] 60 VFs
[03:50:02] [PASSED] 61 VFs
[03:50:02] [PASSED] 62 VFs
[03:50:02] [PASSED] 63 VFs
[03:50:02] ================== [PASSED] fair_contexts ==================
[03:50:02] ===================== fair_doorbells ======================
[03:50:02] [PASSED] 1 VF
[03:50:02] [PASSED] 2 VFs
[03:50:02] [PASSED] 3 VFs
[03:50:02] [PASSED] 4 VFs
[03:50:02] [PASSED] 5 VFs
[03:50:02] [PASSED] 6 VFs
[03:50:02] [PASSED] 7 VFs
[03:50:02] [PASSED] 8 VFs
[03:50:02] [PASSED] 9 VFs
[03:50:02] [PASSED] 10 VFs
[03:50:02] [PASSED] 11 VFs
[03:50:02] [PASSED] 12 VFs
[03:50:02] [PASSED] 13 VFs
[03:50:02] [PASSED] 14 VFs
[03:50:02] [PASSED] 15 VFs
[03:50:02] [PASSED] 16 VFs
[03:50:02] [PASSED] 17 VFs
[03:50:02] [PASSED] 18 VFs
[03:50:02] [PASSED] 19 VFs
[03:50:02] [PASSED] 20 VFs
[03:50:02] [PASSED] 21 VFs
[03:50:02] [PASSED] 22 VFs
[03:50:02] [PASSED] 23 VFs
[03:50:02] [PASSED] 24 VFs
[03:50:02] [PASSED] 25 VFs
[03:50:02] [PASSED] 26 VFs
[03:50:02] [PASSED] 27 VFs
[03:50:02] [PASSED] 28 VFs
[03:50:02] [PASSED] 29 VFs
[03:50:02] [PASSED] 30 VFs
[03:50:02] [PASSED] 31 VFs
[03:50:02] [PASSED] 32 VFs
[03:50:02] [PASSED] 33 VFs
[03:50:02] [PASSED] 34 VFs
[03:50:02] [PASSED] 35 VFs
[03:50:02] [PASSED] 36 VFs
[03:50:02] [PASSED] 37 VFs
[03:50:02] [PASSED] 38 VFs
[03:50:02] [PASSED] 39 VFs
[03:50:02] [PASSED] 40 VFs
[03:50:02] [PASSED] 41 VFs
[03:50:02] [PASSED] 42 VFs
[03:50:02] [PASSED] 43 VFs
[03:50:02] [PASSED] 44 VFs
[03:50:02] [PASSED] 45 VFs
[03:50:02] [PASSED] 46 VFs
[03:50:02] [PASSED] 47 VFs
[03:50:02] [PASSED] 48 VFs
[03:50:02] [PASSED] 49 VFs
[03:50:02] [PASSED] 50 VFs
[03:50:02] [PASSED] 51 VFs
[03:50:02] [PASSED] 52 VFs
[03:50:02] [PASSED] 53 VFs
[03:50:02] [PASSED] 54 VFs
[03:50:02] [PASSED] 55 VFs
[03:50:02] [PASSED] 56 VFs
[03:50:02] [PASSED] 57 VFs
[03:50:02] [PASSED] 58 VFs
[03:50:02] [PASSED] 59 VFs
[03:50:02] [PASSED] 60 VFs
[03:50:02] [PASSED] 61 VFs
[03:50:02] [PASSED] 62 VFs
[03:50:02] [PASSED] 63 VFs
[03:50:02] ================= [PASSED] fair_doorbells ==================
[03:50:02] ======================== fair_ggtt ========================
[03:50:02] [PASSED] 1 VF
[03:50:02] [PASSED] 2 VFs
[03:50:02] [PASSED] 3 VFs
[03:50:02] [PASSED] 4 VFs
[03:50:02] [PASSED] 5 VFs
[03:50:02] [PASSED] 6 VFs
[03:50:02] [PASSED] 7 VFs
[03:50:02] [PASSED] 8 VFs
[03:50:02] [PASSED] 9 VFs
[03:50:02] [PASSED] 10 VFs
[03:50:02] [PASSED] 11 VFs
[03:50:02] [PASSED] 12 VFs
[03:50:02] [PASSED] 13 VFs
[03:50:02] [PASSED] 14 VFs
[03:50:02] [PASSED] 15 VFs
[03:50:02] [PASSED] 16 VFs
[03:50:02] [PASSED] 17 VFs
[03:50:02] [PASSED] 18 VFs
[03:50:02] [PASSED] 19 VFs
[03:50:02] [PASSED] 20 VFs
[03:50:02] [PASSED] 21 VFs
[03:50:02] [PASSED] 22 VFs
[03:50:02] [PASSED] 23 VFs
[03:50:02] [PASSED] 24 VFs
[03:50:02] [PASSED] 25 VFs
[03:50:02] [PASSED] 26 VFs
[03:50:02] [PASSED] 27 VFs
[03:50:02] [PASSED] 28 VFs
[03:50:02] [PASSED] 29 VFs
[03:50:02] [PASSED] 30 VFs
[03:50:02] [PASSED] 31 VFs
[03:50:02] [PASSED] 32 VFs
[03:50:02] [PASSED] 33 VFs
[03:50:02] [PASSED] 34 VFs
[03:50:02] [PASSED] 35 VFs
[03:50:02] [PASSED] 36 VFs
[03:50:02] [PASSED] 37 VFs
[03:50:02] [PASSED] 38 VFs
[03:50:02] [PASSED] 39 VFs
[03:50:02] [PASSED] 40 VFs
[03:50:02] [PASSED] 41 VFs
[03:50:02] [PASSED] 42 VFs
[03:50:02] [PASSED] 43 VFs
[03:50:02] [PASSED] 44 VFs
[03:50:02] [PASSED] 45 VFs
[03:50:02] [PASSED] 46 VFs
[03:50:02] [PASSED] 47 VFs
[03:50:02] [PASSED] 48 VFs
[03:50:02] [PASSED] 49 VFs
[03:50:02] [PASSED] 50 VFs
[03:50:02] [PASSED] 51 VFs
[03:50:02] [PASSED] 52 VFs
[03:50:02] [PASSED] 53 VFs
[03:50:02] [PASSED] 54 VFs
[03:50:02] [PASSED] 55 VFs
[03:50:02] [PASSED] 56 VFs
[03:50:02] [PASSED] 57 VFs
[03:50:02] [PASSED] 58 VFs
[03:50:02] [PASSED] 59 VFs
[03:50:02] [PASSED] 60 VFs
[03:50:02] [PASSED] 61 VFs
[03:50:02] [PASSED] 62 VFs
[03:50:02] [PASSED] 63 VFs
[03:50:02] ==================== [PASSED] fair_ggtt ====================
[03:50:02] ======================== fair_vram ========================
[03:50:02] [PASSED] 1 VF
[03:50:02] [PASSED] 2 VFs
[03:50:02] [PASSED] 3 VFs
[03:50:02] [PASSED] 4 VFs
[03:50:02] [PASSED] 5 VFs
[03:50:02] [PASSED] 6 VFs
[03:50:02] [PASSED] 7 VFs
[03:50:02] [PASSED] 8 VFs
[03:50:02] [PASSED] 9 VFs
[03:50:02] [PASSED] 10 VFs
[03:50:02] [PASSED] 11 VFs
[03:50:02] [PASSED] 12 VFs
[03:50:02] [PASSED] 13 VFs
[03:50:02] [PASSED] 14 VFs
[03:50:02] [PASSED] 15 VFs
[03:50:02] [PASSED] 16 VFs
[03:50:02] [PASSED] 17 VFs
[03:50:02] [PASSED] 18 VFs
[03:50:02] [PASSED] 19 VFs
[03:50:02] [PASSED] 20 VFs
[03:50:02] [PASSED] 21 VFs
[03:50:02] [PASSED] 22 VFs
[03:50:02] [PASSED] 23 VFs
[03:50:02] [PASSED] 24 VFs
[03:50:02] [PASSED] 25 VFs
[03:50:02] [PASSED] 26 VFs
[03:50:02] [PASSED] 27 VFs
[03:50:02] [PASSED] 28 VFs
[03:50:02] [PASSED] 29 VFs
[03:50:02] [PASSED] 30 VFs
[03:50:02] [PASSED] 31 VFs
[03:50:02] [PASSED] 32 VFs
[03:50:02] [PASSED] 33 VFs
[03:50:02] [PASSED] 34 VFs
[03:50:02] [PASSED] 35 VFs
[03:50:02] [PASSED] 36 VFs
[03:50:02] [PASSED] 37 VFs
[03:50:02] [PASSED] 38 VFs
[03:50:02] [PASSED] 39 VFs
[03:50:02] [PASSED] 40 VFs
[03:50:02] [PASSED] 41 VFs
[03:50:02] [PASSED] 42 VFs
[03:50:02] [PASSED] 43 VFs
[03:50:02] [PASSED] 44 VFs
[03:50:02] [PASSED] 45 VFs
[03:50:02] [PASSED] 46 VFs
[03:50:02] [PASSED] 47 VFs
[03:50:02] [PASSED] 48 VFs
[03:50:02] [PASSED] 49 VFs
[03:50:02] [PASSED] 50 VFs
[03:50:02] [PASSED] 51 VFs
[03:50:02] [PASSED] 52 VFs
[03:50:02] [PASSED] 53 VFs
[03:50:02] [PASSED] 54 VFs
[03:50:02] [PASSED] 55 VFs
[03:50:02] [PASSED] 56 VFs
[03:50:02] [PASSED] 57 VFs
[03:50:02] [PASSED] 58 VFs
[03:50:02] [PASSED] 59 VFs
[03:50:02] [PASSED] 60 VFs
[03:50:02] [PASSED] 61 VFs
[03:50:02] [PASSED] 62 VFs
[03:50:02] [PASSED] 63 VFs
[03:50:02] ==================== [PASSED] fair_vram ====================
[03:50:02] ================== [PASSED] pf_gt_config ===================
[03:50:02] ===================== lmtt (1 subtest) =====================
[03:50:02] ======================== test_ops =========================
[03:50:02] [PASSED] 2-level
[03:50:02] [PASSED] multi-level
[03:50:02] ==================== [PASSED] test_ops =====================
[03:50:02] ====================== [PASSED] lmtt =======================
[03:50:02] ================= pf_service (11 subtests) =================
[03:50:02] [PASSED] pf_negotiate_any
[03:50:02] [PASSED] pf_negotiate_base_match
[03:50:02] [PASSED] pf_negotiate_base_newer
[03:50:02] [PASSED] pf_negotiate_base_next
[03:50:02] [SKIPPED] pf_negotiate_base_older
[03:50:02] [PASSED] pf_negotiate_base_prev
[03:50:02] [PASSED] pf_negotiate_latest_match
[03:50:02] [PASSED] pf_negotiate_latest_newer
[03:50:02] [PASSED] pf_negotiate_latest_next
[03:50:02] [SKIPPED] pf_negotiate_latest_older
[03:50:02] [SKIPPED] pf_negotiate_latest_prev
[03:50:02] =================== [PASSED] pf_service ====================
[03:50:02] ================= xe_guc_g2g (2 subtests) ==================
[03:50:02] ============== xe_live_guc_g2g_kunit_default ==============
[03:50:02] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[03:50:02] ============== xe_live_guc_g2g_kunit_allmem ===============
[03:50:02] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[03:50:02] =================== [SKIPPED] xe_guc_g2g ===================
[03:50:02] =================== xe_mocs (2 subtests) ===================
[03:50:02] ================ xe_live_mocs_kernel_kunit ================
[03:50:02] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[03:50:02] ================ xe_live_mocs_reset_kunit =================
[03:50:02] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[03:50:02] ==================== [SKIPPED] xe_mocs =====================
[03:50:02] ================= xe_migrate (2 subtests) ==================
[03:50:02] ================= xe_migrate_sanity_kunit =================
[03:50:02] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[03:50:02] ================== xe_validate_ccs_kunit ==================
[03:50:02] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[03:50:02] =================== [SKIPPED] xe_migrate ===================
[03:50:02] ================== xe_dma_buf (1 subtest) ==================
[03:50:02] ==================== xe_dma_buf_kunit =====================
[03:50:02] ================ [SKIPPED] xe_dma_buf_kunit ================
[03:50:02] =================== [SKIPPED] xe_dma_buf ===================
[03:50:02] ================= xe_bo_shrink (1 subtest) =================
[03:50:02] =================== xe_bo_shrink_kunit ====================
[03:50:02] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[03:50:02] ================== [SKIPPED] xe_bo_shrink ==================
[03:50:02] ==================== xe_bo (2 subtests) ====================
[03:50:02] ================== xe_ccs_migrate_kunit ===================
[03:50:02] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[03:50:02] ==================== xe_bo_evict_kunit ====================
[03:50:02] =============== [SKIPPED] xe_bo_evict_kunit ================
[03:50:02] ===================== [SKIPPED] xe_bo ======================
[03:50:02] ==================== args (13 subtests) ====================
[03:50:02] [PASSED] count_args_test
[03:50:02] [PASSED] call_args_example
[03:50:02] [PASSED] call_args_test
[03:50:02] [PASSED] drop_first_arg_example
[03:50:02] [PASSED] drop_first_arg_test
[03:50:02] [PASSED] first_arg_example
[03:50:02] [PASSED] first_arg_test
[03:50:02] [PASSED] last_arg_example
[03:50:02] [PASSED] last_arg_test
[03:50:02] [PASSED] pick_arg_example
[03:50:02] [PASSED] if_args_example
[03:50:02] [PASSED] if_args_test
[03:50:02] [PASSED] sep_comma_example
[03:50:02] ====================== [PASSED] args =======================
[03:50:02] =================== xe_pci (3 subtests) ====================
[03:50:02] ==================== check_graphics_ip ====================
[03:50:02] [PASSED] 12.00 Xe_LP
[03:50:02] [PASSED] 12.10 Xe_LP+
[03:50:02] [PASSED] 12.55 Xe_HPG
[03:50:02] [PASSED] 12.60 Xe_HPC
[03:50:02] [PASSED] 12.70 Xe_LPG
[03:50:02] [PASSED] 12.71 Xe_LPG
[03:50:02] [PASSED] 12.74 Xe_LPG+
[03:50:02] [PASSED] 20.01 Xe2_HPG
[03:50:02] [PASSED] 20.02 Xe2_HPG
[03:50:02] [PASSED] 20.04 Xe2_LPG
[03:50:02] [PASSED] 30.00 Xe3_LPG
[03:50:02] [PASSED] 30.01 Xe3_LPG
[03:50:02] [PASSED] 30.03 Xe3_LPG
[03:50:02] [PASSED] 30.04 Xe3_LPG
[03:50:02] [PASSED] 30.05 Xe3_LPG
[03:50:02] [PASSED] 35.10 Xe3p_LPG
[03:50:02] [PASSED] 35.11 Xe3p_XPC
[03:50:02] ================ [PASSED] check_graphics_ip ================
[03:50:02] ===================== check_media_ip ======================
[03:50:02] [PASSED] 12.00 Xe_M
[03:50:02] [PASSED] 12.55 Xe_HPM
[03:50:02] [PASSED] 13.00 Xe_LPM+
[03:50:02] [PASSED] 13.01 Xe2_HPM
[03:50:02] [PASSED] 20.00 Xe2_LPM
[03:50:02] [PASSED] 30.00 Xe3_LPM
[03:50:02] [PASSED] 30.02 Xe3_LPM
[03:50:02] [PASSED] 35.00 Xe3p_LPM
[03:50:02] [PASSED] 35.03 Xe3p_HPM
[03:50:02] ================= [PASSED] check_media_ip ==================
[03:50:02] =================== check_platform_desc ===================
[03:50:02] [PASSED] 0x9A60 (TIGERLAKE)
[03:50:02] [PASSED] 0x9A68 (TIGERLAKE)
[03:50:02] [PASSED] 0x9A70 (TIGERLAKE)
[03:50:02] [PASSED] 0x9A40 (TIGERLAKE)
[03:50:02] [PASSED] 0x9A49 (TIGERLAKE)
[03:50:02] [PASSED] 0x9A59 (TIGERLAKE)
[03:50:02] [PASSED] 0x9A78 (TIGERLAKE)
[03:50:02] [PASSED] 0x9AC0 (TIGERLAKE)
[03:50:02] [PASSED] 0x9AC9 (TIGERLAKE)
[03:50:02] [PASSED] 0x9AD9 (TIGERLAKE)
[03:50:02] [PASSED] 0x9AF8 (TIGERLAKE)
[03:50:02] [PASSED] 0x4C80 (ROCKETLAKE)
[03:50:02] [PASSED] 0x4C8A (ROCKETLAKE)
[03:50:02] [PASSED] 0x4C8B (ROCKETLAKE)
[03:50:02] [PASSED] 0x4C8C (ROCKETLAKE)
[03:50:02] [PASSED] 0x4C90 (ROCKETLAKE)
[03:50:02] [PASSED] 0x4C9A (ROCKETLAKE)
[03:50:02] [PASSED] 0x4680 (ALDERLAKE_S)
[03:50:02] [PASSED] 0x4682 (ALDERLAKE_S)
[03:50:02] [PASSED] 0x4688 (ALDERLAKE_S)
[03:50:02] [PASSED] 0x468A (ALDERLAKE_S)
[03:50:02] [PASSED] 0x468B (ALDERLAKE_S)
[03:50:02] [PASSED] 0x4690 (ALDERLAKE_S)
[03:50:02] [PASSED] 0x4692 (ALDERLAKE_S)
[03:50:02] [PASSED] 0x4693 (ALDERLAKE_S)
[03:50:02] [PASSED] 0x46A0 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46A1 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46A2 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46A3 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46A6 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46A8 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46AA (ALDERLAKE_P)
[03:50:02] [PASSED] 0x462A (ALDERLAKE_P)
[03:50:02] [PASSED] 0x4626 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x4628 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46B0 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46B1 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46B2 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46B3 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46C0 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46C1 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46C2 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46C3 (ALDERLAKE_P)
[03:50:02] [PASSED] 0x46D0 (ALDERLAKE_N)
[03:50:02] [PASSED] 0x46D1 (ALDERLAKE_N)
[03:50:02] [PASSED] 0x46D2 (ALDERLAKE_N)
[03:50:02] [PASSED] 0x46D3 (ALDERLAKE_N)
[03:50:02] [PASSED] 0x46D4 (ALDERLAKE_N)
[03:50:02] [PASSED] 0xA721 (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7A1 (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7A9 (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7AC (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7AD (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA720 (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7A0 (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7A8 (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7AA (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA7AB (ALDERLAKE_P)
[03:50:02] [PASSED] 0xA780 (ALDERLAKE_S)
[03:50:02] [PASSED] 0xA781 (ALDERLAKE_S)
[03:50:02] [PASSED] 0xA782 (ALDERLAKE_S)
[03:50:02] [PASSED] 0xA783 (ALDERLAKE_S)
[03:50:02] [PASSED] 0xA788 (ALDERLAKE_S)
[03:50:02] [PASSED] 0xA789 (ALDERLAKE_S)
[03:50:02] [PASSED] 0xA78A (ALDERLAKE_S)
[03:50:02] [PASSED] 0xA78B (ALDERLAKE_S)
[03:50:02] [PASSED] 0x4905 (DG1)
[03:50:02] [PASSED] 0x4906 (DG1)
[03:50:02] [PASSED] 0x4907 (DG1)
[03:50:02] [PASSED] 0x4908 (DG1)
[03:50:02] [PASSED] 0x4909 (DG1)
[03:50:02] [PASSED] 0x56C0 (DG2)
[03:50:02] [PASSED] 0x56C2 (DG2)
[03:50:02] [PASSED] 0x56C1 (DG2)
[03:50:02] [PASSED] 0x7D51 (METEORLAKE)
[03:50:02] [PASSED] 0x7DD1 (METEORLAKE)
[03:50:02] [PASSED] 0x7D41 (METEORLAKE)
[03:50:02] [PASSED] 0x7D67 (METEORLAKE)
[03:50:02] [PASSED] 0xB640 (METEORLAKE)
[03:50:02] [PASSED] 0x56A0 (DG2)
[03:50:02] [PASSED] 0x56A1 (DG2)
[03:50:02] [PASSED] 0x56A2 (DG2)
[03:50:02] [PASSED] 0x56BE (DG2)
[03:50:02] [PASSED] 0x56BF (DG2)
[03:50:02] [PASSED] 0x5690 (DG2)
[03:50:02] [PASSED] 0x5691 (DG2)
[03:50:02] [PASSED] 0x5692 (DG2)
[03:50:02] [PASSED] 0x56A5 (DG2)
[03:50:02] [PASSED] 0x56A6 (DG2)
[03:50:02] [PASSED] 0x56B0 (DG2)
[03:50:02] [PASSED] 0x56B1 (DG2)
[03:50:02] [PASSED] 0x56BA (DG2)
[03:50:02] [PASSED] 0x56BB (DG2)
[03:50:02] [PASSED] 0x56BC (DG2)
[03:50:02] [PASSED] 0x56BD (DG2)
[03:50:02] [PASSED] 0x5693 (DG2)
[03:50:02] [PASSED] 0x5694 (DG2)
[03:50:02] [PASSED] 0x5695 (DG2)
[03:50:02] [PASSED] 0x56A3 (DG2)
[03:50:02] [PASSED] 0x56A4 (DG2)
[03:50:02] [PASSED] 0x56B2 (DG2)
[03:50:02] [PASSED] 0x56B3 (DG2)
[03:50:02] [PASSED] 0x5696 (DG2)
[03:50:02] [PASSED] 0x5697 (DG2)
[03:50:02] [PASSED] 0xB69 (PVC)
[03:50:02] [PASSED] 0xB6E (PVC)
[03:50:02] [PASSED] 0xBD4 (PVC)
[03:50:02] [PASSED] 0xBD5 (PVC)
[03:50:02] [PASSED] 0xBD6 (PVC)
[03:50:02] [PASSED] 0xBD7 (PVC)
[03:50:02] [PASSED] 0xBD8 (PVC)
[03:50:02] [PASSED] 0xBD9 (PVC)
[03:50:02] [PASSED] 0xBDA (PVC)
[03:50:02] [PASSED] 0xBDB (PVC)
[03:50:02] [PASSED] 0xBE0 (PVC)
[03:50:02] [PASSED] 0xBE1 (PVC)
[03:50:02] [PASSED] 0xBE5 (PVC)
[03:50:02] [PASSED] 0x7D40 (METEORLAKE)
[03:50:02] [PASSED] 0x7D45 (METEORLAKE)
[03:50:02] [PASSED] 0x7D55 (METEORLAKE)
[03:50:02] [PASSED] 0x7D60 (METEORLAKE)
[03:50:02] [PASSED] 0x7DD5 (METEORLAKE)
[03:50:02] [PASSED] 0x6420 (LUNARLAKE)
[03:50:02] [PASSED] 0x64A0 (LUNARLAKE)
[03:50:02] [PASSED] 0x64B0 (LUNARLAKE)
[03:50:02] [PASSED] 0xE202 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE209 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE20B (BATTLEMAGE)
[03:50:02] [PASSED] 0xE20C (BATTLEMAGE)
[03:50:02] [PASSED] 0xE20D (BATTLEMAGE)
[03:50:02] [PASSED] 0xE210 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE211 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE212 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE216 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE220 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE221 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE222 (BATTLEMAGE)
[03:50:02] [PASSED] 0xE223 (BATTLEMAGE)
[03:50:02] [PASSED] 0xB080 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB081 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB082 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB083 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB084 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB085 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB086 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB087 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB08F (PANTHERLAKE)
[03:50:02] [PASSED] 0xB090 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB0A0 (PANTHERLAKE)
[03:50:02] [PASSED] 0xB0B0 (PANTHERLAKE)
[03:50:02] [PASSED] 0xFD80 (PANTHERLAKE)
[03:50:02] [PASSED] 0xFD81 (PANTHERLAKE)
[03:50:02] [PASSED] 0xD740 (NOVALAKE_S)
[03:50:02] [PASSED] 0xD741 (NOVALAKE_S)
[03:50:02] [PASSED] 0xD742 (NOVALAKE_S)
[03:50:02] [PASSED] 0xD743 (NOVALAKE_S)
[03:50:02] [PASSED] 0xD744 (NOVALAKE_S)
[03:50:02] [PASSED] 0xD745 (NOVALAKE_S)
[03:50:02] [PASSED] 0x674C (CRESCENTISLAND)
[03:50:02] [PASSED] 0x674D (CRESCENTISLAND)
[03:50:02] [PASSED] 0x674E (CRESCENTISLAND)
[03:50:02] [PASSED] 0x674F (CRESCENTISLAND)
[03:50:02] [PASSED] 0x6750 (CRESCENTISLAND)
[03:50:02] [PASSED] 0xD750 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD751 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD752 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD753 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD754 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD755 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD756 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD757 (NOVALAKE_P)
[03:50:02] [PASSED] 0xD75F (NOVALAKE_P)
[03:50:02] =============== [PASSED] check_platform_desc ===============
[03:50:02] ===================== [PASSED] xe_pci ======================
[03:50:02] =================== xe_rtp (2 subtests) ====================
[03:50:02] =============== xe_rtp_process_to_sr_tests ================
[03:50:02] [PASSED] coalesce-same-reg
[03:50:02] [PASSED] no-match-no-add
[03:50:02] [PASSED] match-or
[03:50:02] [PASSED] match-or-xfail
[03:50:02] [PASSED] no-match-no-add-multiple-rules
[03:50:02] [PASSED] two-regs-two-entries
[03:50:02] [PASSED] clr-one-set-other
[03:50:02] [PASSED] set-field
[03:50:02] [PASSED] conflict-duplicate
[03:50:02] [PASSED] conflict-not-disjoint
[03:50:02] [PASSED] conflict-reg-type
[03:50:02] [PASSED] bad-mcr-reg-forced-to-regular
[03:50:02] [PASSED] bad-regular-reg-forced-to-mcr
[03:50:02] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[03:50:02] ================== xe_rtp_process_tests ===================
[03:50:02] [PASSED] active1
[03:50:02] [PASSED] active2
[03:50:02] [PASSED] active-inactive
[03:50:02] [PASSED] inactive-active
[03:50:02] [PASSED] inactive-1st_or_active-inactive
[03:50:02] [PASSED] inactive-2nd_or_active-inactive
[03:50:02] [PASSED] inactive-last_or_active-inactive
[03:50:02] [PASSED] inactive-no_or_active-inactive
[03:50:02] ============== [PASSED] xe_rtp_process_tests ===============
[03:50:02] ===================== [PASSED] xe_rtp ======================
[03:50:02] ==================== xe_wa (1 subtest) =====================
[03:50:02] ======================== xe_wa_gt =========================
[03:50:02] [PASSED] TIGERLAKE B0
[03:50:02] [PASSED] DG1 A0
[03:50:02] [PASSED] DG1 B0
[03:50:02] [PASSED] ALDERLAKE_S A0
[03:50:02] [PASSED] ALDERLAKE_S B0
[03:50:02] [PASSED] ALDERLAKE_S C0
[03:50:02] [PASSED] ALDERLAKE_S D0
[03:50:02] [PASSED] ALDERLAKE_P A0
[03:50:02] [PASSED] ALDERLAKE_P B0
[03:50:02] [PASSED] ALDERLAKE_P C0
[03:50:02] [PASSED] ALDERLAKE_S RPLS D0
[03:50:02] [PASSED] ALDERLAKE_P RPLU E0
[03:50:02] [PASSED] DG2 G10 C0
[03:50:02] [PASSED] DG2 G11 B1
[03:50:02] [PASSED] DG2 G12 A1
[03:50:02] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:50:02] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:50:02] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[03:50:02] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[03:50:02] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[03:50:02] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[03:50:02] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[03:50:02] ==================== [PASSED] xe_wa_gt =====================
[03:50:02] ====================== [PASSED] xe_wa ======================
[03:50:02] ============================================================
[03:50:02] Testing complete. Ran 603 tests: passed: 585, skipped: 18
[03:50:02] Elapsed time: 36.178s total, 4.273s configuring, 31.239s building, 0.625s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[03:50:02] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:50:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:50:28] Starting KUnit Kernel (1/1)...
[03:50:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:50:28] ============ drm_test_pick_cmdline (2 subtests) ============
[03:50:28] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[03:50:28] =============== drm_test_pick_cmdline_named ===============
[03:50:28] [PASSED] NTSC
[03:50:28] [PASSED] NTSC-J
[03:50:28] [PASSED] PAL
[03:50:28] [PASSED] PAL-M
[03:50:28] =========== [PASSED] drm_test_pick_cmdline_named ===========
[03:50:28] ============== [PASSED] drm_test_pick_cmdline ==============
[03:50:28] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[03:50:28] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[03:50:28] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[03:50:28] =========== drm_validate_clone_mode (2 subtests) ===========
[03:50:28] ============== drm_test_check_in_clone_mode ===============
[03:50:28] [PASSED] in_clone_mode
[03:50:28] [PASSED] not_in_clone_mode
[03:50:28] ========== [PASSED] drm_test_check_in_clone_mode ===========
[03:50:28] =============== drm_test_check_valid_clones ===============
[03:50:28] [PASSED] not_in_clone_mode
[03:50:28] [PASSED] valid_clone
[03:50:28] [PASSED] invalid_clone
[03:50:28] =========== [PASSED] drm_test_check_valid_clones ===========
[03:50:28] ============= [PASSED] drm_validate_clone_mode =============
[03:50:28] ============= drm_validate_modeset (1 subtest) =============
[03:50:28] [PASSED] drm_test_check_connector_changed_modeset
[03:50:28] ============== [PASSED] drm_validate_modeset ===============
[03:50:28] ====== drm_test_bridge_get_current_state (2 subtests) ======
[03:50:28] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[03:50:28] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[03:50:28] ======== [PASSED] drm_test_bridge_get_current_state ========
[03:50:28] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[03:50:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[03:50:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[03:50:28] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[03:50:28] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[03:50:28] ============== drm_bridge_alloc (2 subtests) ===============
[03:50:28] [PASSED] drm_test_drm_bridge_alloc_basic
[03:50:28] [PASSED] drm_test_drm_bridge_alloc_get_put
[03:50:28] ================ [PASSED] drm_bridge_alloc =================
[03:50:28] ============= drm_cmdline_parser (40 subtests) =============
[03:50:28] [PASSED] drm_test_cmdline_force_d_only
[03:50:28] [PASSED] drm_test_cmdline_force_D_only_dvi
[03:50:28] [PASSED] drm_test_cmdline_force_D_only_hdmi
[03:50:28] [PASSED] drm_test_cmdline_force_D_only_not_digital
[03:50:28] [PASSED] drm_test_cmdline_force_e_only
[03:50:28] [PASSED] drm_test_cmdline_res
[03:50:28] [PASSED] drm_test_cmdline_res_vesa
[03:50:28] [PASSED] drm_test_cmdline_res_vesa_rblank
[03:50:28] [PASSED] drm_test_cmdline_res_rblank
[03:50:28] [PASSED] drm_test_cmdline_res_bpp
[03:50:28] [PASSED] drm_test_cmdline_res_refresh
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[03:50:28] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[03:50:28] [PASSED] drm_test_cmdline_res_margins_force_on
[03:50:28] [PASSED] drm_test_cmdline_res_vesa_margins
[03:50:28] [PASSED] drm_test_cmdline_name
[03:50:28] [PASSED] drm_test_cmdline_name_bpp
[03:50:28] [PASSED] drm_test_cmdline_name_option
[03:50:28] [PASSED] drm_test_cmdline_name_bpp_option
[03:50:28] [PASSED] drm_test_cmdline_rotate_0
[03:50:28] [PASSED] drm_test_cmdline_rotate_90
[03:50:28] [PASSED] drm_test_cmdline_rotate_180
[03:50:28] [PASSED] drm_test_cmdline_rotate_270
[03:50:28] [PASSED] drm_test_cmdline_hmirror
[03:50:28] [PASSED] drm_test_cmdline_vmirror
[03:50:28] [PASSED] drm_test_cmdline_margin_options
[03:50:28] [PASSED] drm_test_cmdline_multiple_options
[03:50:28] [PASSED] drm_test_cmdline_bpp_extra_and_option
[03:50:28] [PASSED] drm_test_cmdline_extra_and_option
[03:50:28] [PASSED] drm_test_cmdline_freestanding_options
[03:50:28] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[03:50:28] [PASSED] drm_test_cmdline_panel_orientation
[03:50:28] ================ drm_test_cmdline_invalid =================
[03:50:28] [PASSED] margin_only
[03:50:28] [PASSED] interlace_only
[03:50:28] [PASSED] res_missing_x
[03:50:28] [PASSED] res_missing_y
[03:50:28] [PASSED] res_bad_y
[03:50:28] [PASSED] res_missing_y_bpp
[03:50:28] [PASSED] res_bad_bpp
[03:50:28] [PASSED] res_bad_refresh
[03:50:28] [PASSED] res_bpp_refresh_force_on_off
[03:50:28] [PASSED] res_invalid_mode
[03:50:28] [PASSED] res_bpp_wrong_place_mode
[03:50:28] [PASSED] name_bpp_refresh
[03:50:28] [PASSED] name_refresh
[03:50:28] [PASSED] name_refresh_wrong_mode
[03:50:28] [PASSED] name_refresh_invalid_mode
[03:50:28] [PASSED] rotate_multiple
[03:50:28] [PASSED] rotate_invalid_val
[03:50:28] [PASSED] rotate_truncated
[03:50:28] [PASSED] invalid_option
[03:50:28] [PASSED] invalid_tv_option
[03:50:28] [PASSED] truncated_tv_option
[03:50:28] ============ [PASSED] drm_test_cmdline_invalid =============
[03:50:28] =============== drm_test_cmdline_tv_options ===============
[03:50:28] [PASSED] NTSC
[03:50:28] [PASSED] NTSC_443
[03:50:28] [PASSED] NTSC_J
[03:50:28] [PASSED] PAL
[03:50:28] [PASSED] PAL_M
[03:50:28] [PASSED] PAL_N
[03:50:28] [PASSED] SECAM
[03:50:28] [PASSED] MONO_525
[03:50:28] [PASSED] MONO_625
[03:50:28] =========== [PASSED] drm_test_cmdline_tv_options ===========
[03:50:28] =============== [PASSED] drm_cmdline_parser ================
[03:50:28] ========== drmm_connector_hdmi_init (20 subtests) ==========
[03:50:28] [PASSED] drm_test_connector_hdmi_init_valid
[03:50:28] [PASSED] drm_test_connector_hdmi_init_bpc_8
[03:50:28] [PASSED] drm_test_connector_hdmi_init_bpc_10
[03:50:28] [PASSED] drm_test_connector_hdmi_init_bpc_12
[03:50:28] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[03:50:28] [PASSED] drm_test_connector_hdmi_init_bpc_null
[03:50:28] [PASSED] drm_test_connector_hdmi_init_formats_empty
[03:50:28] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[03:50:28] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:50:28] [PASSED] supported_formats=0x9 yuv420_allowed=1
[03:50:28] [PASSED] supported_formats=0x9 yuv420_allowed=0
[03:50:28] [PASSED] supported_formats=0x5 yuv420_allowed=1
[03:50:28] [PASSED] supported_formats=0x5 yuv420_allowed=0
[03:50:28] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:50:28] [PASSED] drm_test_connector_hdmi_init_null_ddc
[03:50:28] [PASSED] drm_test_connector_hdmi_init_null_product
[03:50:28] [PASSED] drm_test_connector_hdmi_init_null_vendor
[03:50:28] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[03:50:28] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[03:50:28] [PASSED] drm_test_connector_hdmi_init_product_valid
[03:50:28] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[03:50:28] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[03:50:28] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[03:50:28] ========= drm_test_connector_hdmi_init_type_valid =========
[03:50:28] [PASSED] HDMI-A
[03:50:28] [PASSED] HDMI-B
[03:50:28] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[03:50:28] ======== drm_test_connector_hdmi_init_type_invalid ========
[03:50:28] [PASSED] Unknown
[03:50:28] [PASSED] VGA
[03:50:28] [PASSED] DVI-I
[03:50:28] [PASSED] DVI-D
[03:50:28] [PASSED] DVI-A
[03:50:28] [PASSED] Composite
[03:50:28] [PASSED] SVIDEO
[03:50:28] [PASSED] LVDS
[03:50:28] [PASSED] Component
[03:50:28] [PASSED] DIN
[03:50:28] [PASSED] DP
[03:50:28] [PASSED] TV
[03:50:28] [PASSED] eDP
[03:50:28] [PASSED] Virtual
[03:50:28] [PASSED] DSI
[03:50:28] [PASSED] DPI
[03:50:28] [PASSED] Writeback
[03:50:28] [PASSED] SPI
[03:50:28] [PASSED] USB
[03:50:28] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[03:50:28] ============ [PASSED] drmm_connector_hdmi_init =============
[03:50:28] ============= drmm_connector_init (3 subtests) =============
[03:50:28] [PASSED] drm_test_drmm_connector_init
[03:50:28] [PASSED] drm_test_drmm_connector_init_null_ddc
[03:50:28] ========= drm_test_drmm_connector_init_type_valid =========
[03:50:28] [PASSED] Unknown
[03:50:28] [PASSED] VGA
[03:50:28] [PASSED] DVI-I
[03:50:28] [PASSED] DVI-D
[03:50:28] [PASSED] DVI-A
[03:50:28] [PASSED] Composite
[03:50:28] [PASSED] SVIDEO
[03:50:28] [PASSED] LVDS
[03:50:28] [PASSED] Component
[03:50:28] [PASSED] DIN
[03:50:28] [PASSED] DP
[03:50:28] [PASSED] HDMI-A
[03:50:28] [PASSED] HDMI-B
[03:50:28] [PASSED] TV
[03:50:28] [PASSED] eDP
[03:50:28] [PASSED] Virtual
[03:50:28] [PASSED] DSI
[03:50:28] [PASSED] DPI
[03:50:28] [PASSED] Writeback
[03:50:28] [PASSED] SPI
[03:50:28] [PASSED] USB
[03:50:28] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[03:50:28] =============== [PASSED] drmm_connector_init ===============
[03:50:28] ========= drm_connector_dynamic_init (6 subtests) ==========
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_init
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_init_properties
[03:50:28] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[03:50:28] [PASSED] Unknown
[03:50:28] [PASSED] VGA
[03:50:28] [PASSED] DVI-I
[03:50:28] [PASSED] DVI-D
[03:50:28] [PASSED] DVI-A
[03:50:28] [PASSED] Composite
[03:50:28] [PASSED] SVIDEO
[03:50:28] [PASSED] LVDS
[03:50:28] [PASSED] Component
[03:50:28] [PASSED] DIN
[03:50:28] [PASSED] DP
[03:50:28] [PASSED] HDMI-A
[03:50:28] [PASSED] HDMI-B
[03:50:28] [PASSED] TV
[03:50:28] [PASSED] eDP
[03:50:28] [PASSED] Virtual
[03:50:28] [PASSED] DSI
[03:50:28] [PASSED] DPI
[03:50:28] [PASSED] Writeback
[03:50:28] [PASSED] SPI
[03:50:28] [PASSED] USB
[03:50:28] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[03:50:28] ======== drm_test_drm_connector_dynamic_init_name =========
[03:50:28] [PASSED] Unknown
[03:50:28] [PASSED] VGA
[03:50:28] [PASSED] DVI-I
[03:50:28] [PASSED] DVI-D
[03:50:28] [PASSED] DVI-A
[03:50:28] [PASSED] Composite
[03:50:28] [PASSED] SVIDEO
[03:50:28] [PASSED] LVDS
[03:50:28] [PASSED] Component
[03:50:28] [PASSED] DIN
[03:50:28] [PASSED] DP
[03:50:28] [PASSED] HDMI-A
[03:50:28] [PASSED] HDMI-B
[03:50:28] [PASSED] TV
[03:50:28] [PASSED] eDP
[03:50:28] [PASSED] Virtual
[03:50:28] [PASSED] DSI
[03:50:28] [PASSED] DPI
[03:50:28] [PASSED] Writeback
[03:50:28] [PASSED] SPI
[03:50:28] [PASSED] USB
[03:50:28] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[03:50:28] =========== [PASSED] drm_connector_dynamic_init ============
[03:50:28] ==== drm_connector_dynamic_register_early (4 subtests) =====
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[03:50:28] ====== [PASSED] drm_connector_dynamic_register_early =======
[03:50:28] ======= drm_connector_dynamic_register (7 subtests) ========
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[03:50:28] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[03:50:28] ========= [PASSED] drm_connector_dynamic_register ==========
[03:50:28] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[03:50:28] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[03:50:28] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[03:50:28] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[03:50:28] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[03:50:28] ========== drm_test_get_tv_mode_from_name_valid ===========
[03:50:28] [PASSED] NTSC
[03:50:28] [PASSED] NTSC-443
[03:50:28] [PASSED] NTSC-J
[03:50:28] [PASSED] PAL
[03:50:28] [PASSED] PAL-M
[03:50:28] [PASSED] PAL-N
[03:50:28] [PASSED] SECAM
[03:50:28] [PASSED] Mono
[03:50:28] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[03:50:28] [PASSED] drm_test_get_tv_mode_from_name_truncated
[03:50:28] ============ [PASSED] drm_get_tv_mode_from_name ============
[03:50:28] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[03:50:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[03:50:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[03:50:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[03:50:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[03:50:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[03:50:28] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[03:50:28] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[03:50:28] [PASSED] VIC 96
[03:50:28] [PASSED] VIC 97
[03:50:28] [PASSED] VIC 101
[03:50:28] [PASSED] VIC 102
[03:50:28] [PASSED] VIC 106
[03:50:28] [PASSED] VIC 107
[03:50:28] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[03:50:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[03:50:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[03:50:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[03:50:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[03:50:28] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[03:50:28] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[03:50:28] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[03:50:28] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[03:50:28] [PASSED] Automatic
[03:50:28] [PASSED] Full
[03:50:28] [PASSED] Limited 16:235
[03:50:28] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[03:50:28] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[03:50:28] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[03:50:28] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[03:50:28] === drm_test_drm_hdmi_connector_get_output_format_name ====
[03:50:28] [PASSED] RGB
[03:50:28] [PASSED] YUV 4:2:0
[03:50:28] [PASSED] YUV 4:2:2
[03:50:28] [PASSED] YUV 4:4:4
[03:50:28] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[03:50:28] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[03:50:28] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[03:50:28] ============= drm_damage_helper (21 subtests) ==============
[03:50:28] [PASSED] drm_test_damage_iter_no_damage
[03:50:28] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[03:50:28] [PASSED] drm_test_damage_iter_no_damage_src_moved
[03:50:28] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[03:50:28] [PASSED] drm_test_damage_iter_no_damage_not_visible
[03:50:28] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[03:50:28] [PASSED] drm_test_damage_iter_no_damage_no_fb
[03:50:28] [PASSED] drm_test_damage_iter_simple_damage
[03:50:28] [PASSED] drm_test_damage_iter_single_damage
[03:50:28] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[03:50:28] [PASSED] drm_test_damage_iter_single_damage_outside_src
[03:50:28] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[03:50:28] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[03:50:28] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[03:50:28] [PASSED] drm_test_damage_iter_single_damage_src_moved
[03:50:28] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[03:50:28] [PASSED] drm_test_damage_iter_damage
[03:50:28] [PASSED] drm_test_damage_iter_damage_one_intersect
[03:50:28] [PASSED] drm_test_damage_iter_damage_one_outside
[03:50:28] [PASSED] drm_test_damage_iter_damage_src_moved
[03:50:28] [PASSED] drm_test_damage_iter_damage_not_visible
[03:50:28] ================ [PASSED] drm_damage_helper ================
[03:50:28] ============== drm_dp_mst_helper (3 subtests) ==============
[03:50:28] ============== drm_test_dp_mst_calc_pbn_mode ==============
[03:50:28] [PASSED] Clock 154000 BPP 30 DSC disabled
[03:50:28] [PASSED] Clock 234000 BPP 30 DSC disabled
[03:50:28] [PASSED] Clock 297000 BPP 24 DSC disabled
[03:50:28] [PASSED] Clock 332880 BPP 24 DSC enabled
[03:50:28] [PASSED] Clock 324540 BPP 24 DSC enabled
[03:50:28] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[03:50:28] ============== drm_test_dp_mst_calc_pbn_div ===============
[03:50:28] [PASSED] Link rate 2000000 lane count 4
[03:50:28] [PASSED] Link rate 2000000 lane count 2
[03:50:28] [PASSED] Link rate 2000000 lane count 1
[03:50:28] [PASSED] Link rate 1350000 lane count 4
[03:50:28] [PASSED] Link rate 1350000 lane count 2
[03:50:28] [PASSED] Link rate 1350000 lane count 1
[03:50:28] [PASSED] Link rate 1000000 lane count 4
[03:50:28] [PASSED] Link rate 1000000 lane count 2
[03:50:28] [PASSED] Link rate 1000000 lane count 1
[03:50:28] [PASSED] Link rate 810000 lane count 4
[03:50:28] [PASSED] Link rate 810000 lane count 2
[03:50:28] [PASSED] Link rate 810000 lane count 1
[03:50:28] [PASSED] Link rate 540000 lane count 4
[03:50:28] [PASSED] Link rate 540000 lane count 2
[03:50:28] [PASSED] Link rate 540000 lane count 1
[03:50:28] [PASSED] Link rate 270000 lane count 4
[03:50:28] [PASSED] Link rate 270000 lane count 2
[03:50:28] [PASSED] Link rate 270000 lane count 1
[03:50:28] [PASSED] Link rate 162000 lane count 4
[03:50:28] [PASSED] Link rate 162000 lane count 2
[03:50:28] [PASSED] Link rate 162000 lane count 1
[03:50:28] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[03:50:28] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[03:50:28] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[03:50:28] [PASSED] DP_POWER_UP_PHY with port number
[03:50:28] [PASSED] DP_POWER_DOWN_PHY with port number
[03:50:28] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[03:50:28] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[03:50:28] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[03:50:28] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[03:50:28] [PASSED] DP_QUERY_PAYLOAD with port number
[03:50:28] [PASSED] DP_QUERY_PAYLOAD with VCPI
[03:50:28] [PASSED] DP_REMOTE_DPCD_READ with port number
[03:50:28] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[03:50:28] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[03:50:28] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[03:50:28] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[03:50:28] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[03:50:28] [PASSED] DP_REMOTE_I2C_READ with port number
[03:50:28] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[03:50:28] [PASSED] DP_REMOTE_I2C_READ with transactions array
[03:50:28] [PASSED] DP_REMOTE_I2C_WRITE with port number
[03:50:28] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[03:50:28] [PASSED] DP_REMOTE_I2C_WRITE with data array
[03:50:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[03:50:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[03:50:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[03:50:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[03:50:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[03:50:28] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[03:50:28] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[03:50:28] ================ [PASSED] drm_dp_mst_helper ================
[03:50:28] ================== drm_exec (7 subtests) ===================
[03:50:28] [PASSED] sanitycheck
[03:50:28] [PASSED] test_lock
[03:50:28] [PASSED] test_lock_unlock
[03:50:28] [PASSED] test_duplicates
[03:50:28] [PASSED] test_prepare
[03:50:28] [PASSED] test_prepare_array
[03:50:28] [PASSED] test_multiple_loops
[03:50:28] ==================== [PASSED] drm_exec =====================
[03:50:28] =========== drm_format_helper_test (17 subtests) ===========
[03:50:28] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[03:50:28] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[03:50:28] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[03:50:28] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[03:50:28] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[03:50:28] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[03:50:28] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[03:50:28] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[03:50:28] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[03:50:28] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[03:50:28] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[03:50:28] ============== drm_test_fb_xrgb8888_to_mono ===============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[03:50:28] ==================== drm_test_fb_swab =====================
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ================ [PASSED] drm_test_fb_swab =================
[03:50:28] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[03:50:28] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[03:50:28] [PASSED] single_pixel_source_buffer
[03:50:28] [PASSED] single_pixel_clip_rectangle
[03:50:28] [PASSED] well_known_colors
[03:50:28] [PASSED] destination_pitch
[03:50:28] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[03:50:28] ================= drm_test_fb_clip_offset =================
[03:50:28] [PASSED] pass through
[03:50:28] [PASSED] horizontal offset
[03:50:28] [PASSED] vertical offset
[03:50:28] [PASSED] horizontal and vertical offset
[03:50:28] [PASSED] horizontal offset (custom pitch)
[03:50:28] [PASSED] vertical offset (custom pitch)
[03:50:28] [PASSED] horizontal and vertical offset (custom pitch)
[03:50:28] ============= [PASSED] drm_test_fb_clip_offset =============
[03:50:28] =================== drm_test_fb_memcpy ====================
[03:50:28] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[03:50:28] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[03:50:28] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[03:50:28] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[03:50:28] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[03:50:28] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[03:50:28] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[03:50:28] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[03:50:28] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[03:50:28] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[03:50:28] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[03:50:28] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[03:50:28] =============== [PASSED] drm_test_fb_memcpy ================
[03:50:28] ============= [PASSED] drm_format_helper_test ==============
[03:50:28] ================= drm_format (18 subtests) =================
[03:50:28] [PASSED] drm_test_format_block_width_invalid
[03:50:28] [PASSED] drm_test_format_block_width_one_plane
[03:50:28] [PASSED] drm_test_format_block_width_two_plane
[03:50:28] [PASSED] drm_test_format_block_width_three_plane
[03:50:28] [PASSED] drm_test_format_block_width_tiled
[03:50:28] [PASSED] drm_test_format_block_height_invalid
[03:50:28] [PASSED] drm_test_format_block_height_one_plane
[03:50:28] [PASSED] drm_test_format_block_height_two_plane
[03:50:28] [PASSED] drm_test_format_block_height_three_plane
[03:50:28] [PASSED] drm_test_format_block_height_tiled
[03:50:28] [PASSED] drm_test_format_min_pitch_invalid
[03:50:28] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[03:50:28] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[03:50:28] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[03:50:28] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[03:50:28] [PASSED] drm_test_format_min_pitch_two_plane
[03:50:28] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[03:50:28] [PASSED] drm_test_format_min_pitch_tiled
[03:50:28] =================== [PASSED] drm_format ====================
[03:50:28] ============== drm_framebuffer (10 subtests) ===============
[03:50:28] ========== drm_test_framebuffer_check_src_coords ==========
[03:50:28] [PASSED] Success: source fits into fb
[03:50:28] [PASSED] Fail: overflowing fb with x-axis coordinate
[03:50:28] [PASSED] Fail: overflowing fb with y-axis coordinate
[03:50:28] [PASSED] Fail: overflowing fb with source width
[03:50:28] [PASSED] Fail: overflowing fb with source height
[03:50:28] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[03:50:28] [PASSED] drm_test_framebuffer_cleanup
[03:50:28] =============== drm_test_framebuffer_create ===============
[03:50:28] [PASSED] ABGR8888 normal sizes
[03:50:28] [PASSED] ABGR8888 max sizes
[03:50:28] [PASSED] ABGR8888 pitch greater than min required
[03:50:28] [PASSED] ABGR8888 pitch less than min required
[03:50:28] [PASSED] ABGR8888 Invalid width
[03:50:28] [PASSED] ABGR8888 Invalid buffer handle
[03:50:28] [PASSED] No pixel format
[03:50:28] [PASSED] ABGR8888 Width 0
[03:50:28] [PASSED] ABGR8888 Height 0
[03:50:28] [PASSED] ABGR8888 Out of bound height * pitch combination
[03:50:28] [PASSED] ABGR8888 Large buffer offset
[03:50:28] [PASSED] ABGR8888 Buffer offset for inexistent plane
[03:50:28] [PASSED] ABGR8888 Invalid flag
[03:50:28] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[03:50:28] [PASSED] ABGR8888 Valid buffer modifier
[03:50:28] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[03:50:28] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[03:50:28] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[03:50:28] [PASSED] NV12 Normal sizes
[03:50:28] [PASSED] NV12 Max sizes
[03:50:28] [PASSED] NV12 Invalid pitch
[03:50:28] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[03:50:28] [PASSED] NV12 different modifier per-plane
[03:50:28] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[03:50:28] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[03:50:28] [PASSED] NV12 Modifier for inexistent plane
[03:50:28] [PASSED] NV12 Handle for inexistent plane
[03:50:28] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[03:50:28] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[03:50:28] [PASSED] YVU420 Normal sizes
[03:50:28] [PASSED] YVU420 Max sizes
[03:50:28] [PASSED] YVU420 Invalid pitch
[03:50:28] [PASSED] YVU420 Different pitches
[03:50:28] [PASSED] YVU420 Different buffer offsets/pitches
[03:50:28] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[03:50:28] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[03:50:28] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[03:50:28] [PASSED] YVU420 Valid modifier
[03:50:28] [PASSED] YVU420 Different modifiers per plane
[03:50:28] [PASSED] YVU420 Modifier for inexistent plane
[03:50:28] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[03:50:28] [PASSED] X0L2 Normal sizes
[03:50:28] [PASSED] X0L2 Max sizes
[03:50:28] [PASSED] X0L2 Invalid pitch
[03:50:28] [PASSED] X0L2 Pitch greater than minimum required
[03:50:28] [PASSED] X0L2 Handle for inexistent plane
[03:50:28] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[03:50:28] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[03:50:28] [PASSED] X0L2 Valid modifier
[03:50:28] [PASSED] X0L2 Modifier for inexistent plane
[03:50:28] =========== [PASSED] drm_test_framebuffer_create ===========
[03:50:28] [PASSED] drm_test_framebuffer_free
[03:50:28] [PASSED] drm_test_framebuffer_init
[03:50:28] [PASSED] drm_test_framebuffer_init_bad_format
[03:50:28] [PASSED] drm_test_framebuffer_init_dev_mismatch
[03:50:28] [PASSED] drm_test_framebuffer_lookup
[03:50:28] [PASSED] drm_test_framebuffer_lookup_inexistent
[03:50:28] [PASSED] drm_test_framebuffer_modifiers_not_supported
[03:50:28] ================= [PASSED] drm_framebuffer =================
[03:50:28] ================ drm_gem_shmem (8 subtests) ================
[03:50:28] [PASSED] drm_gem_shmem_test_obj_create
[03:50:28] [PASSED] drm_gem_shmem_test_obj_create_private
[03:50:28] [PASSED] drm_gem_shmem_test_pin_pages
[03:50:28] [PASSED] drm_gem_shmem_test_vmap
[03:50:28] [PASSED] drm_gem_shmem_test_get_sg_table
[03:50:28] [PASSED] drm_gem_shmem_test_get_pages_sgt
[03:50:28] [PASSED] drm_gem_shmem_test_madvise
[03:50:28] [PASSED] drm_gem_shmem_test_purge
[03:50:28] ================== [PASSED] drm_gem_shmem ==================
[03:50:28] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[03:50:28] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[03:50:28] [PASSED] Automatic
[03:50:28] [PASSED] Full
[03:50:28] [PASSED] Limited 16:235
[03:50:28] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[03:50:28] [PASSED] drm_test_check_disable_connector
[03:50:28] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[03:50:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[03:50:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[03:50:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[03:50:28] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[03:50:28] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[03:50:28] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[03:50:28] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[03:50:28] [PASSED] drm_test_check_output_bpc_dvi
[03:50:28] [PASSED] drm_test_check_output_bpc_format_vic_1
[03:50:28] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[03:50:28] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[03:50:28] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[03:50:28] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[03:50:28] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[03:50:28] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[03:50:28] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[03:50:28] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[03:50:28] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[03:50:28] [PASSED] drm_test_check_broadcast_rgb_value
[03:50:28] [PASSED] drm_test_check_bpc_8_value
[03:50:28] [PASSED] drm_test_check_bpc_10_value
[03:50:28] [PASSED] drm_test_check_bpc_12_value
[03:50:28] [PASSED] drm_test_check_format_value
[03:50:28] [PASSED] drm_test_check_tmds_char_value
[03:50:28] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[03:50:28] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[03:50:28] [PASSED] drm_test_check_mode_valid
[03:50:28] [PASSED] drm_test_check_mode_valid_reject
[03:50:28] [PASSED] drm_test_check_mode_valid_reject_rate
[03:50:28] [PASSED] drm_test_check_mode_valid_reject_max_clock
[03:50:28] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[03:50:28] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[03:50:28] [PASSED] drm_test_check_infoframes
[03:50:28] [PASSED] drm_test_check_reject_avi_infoframe
[03:50:28] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[03:50:28] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[03:50:28] [PASSED] drm_test_check_reject_audio_infoframe
[03:50:28] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[03:50:28] ================= drm_managed (2 subtests) =================
[03:50:28] [PASSED] drm_test_managed_release_action
[03:50:28] [PASSED] drm_test_managed_run_action
[03:50:28] =================== [PASSED] drm_managed ===================
[03:50:28] =================== drm_mm (6 subtests) ====================
[03:50:28] [PASSED] drm_test_mm_init
[03:50:28] [PASSED] drm_test_mm_debug
[03:50:28] [PASSED] drm_test_mm_align32
[03:50:28] [PASSED] drm_test_mm_align64
[03:50:28] [PASSED] drm_test_mm_lowest
[03:50:28] [PASSED] drm_test_mm_highest
[03:50:28] ===================== [PASSED] drm_mm ======================
[03:50:28] ============= drm_modes_analog_tv (5 subtests) =============
[03:50:28] [PASSED] drm_test_modes_analog_tv_mono_576i
[03:50:28] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[03:50:28] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[03:50:28] [PASSED] drm_test_modes_analog_tv_pal_576i
[03:50:28] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[03:50:28] =============== [PASSED] drm_modes_analog_tv ===============
[03:50:28] ============== drm_plane_helper (2 subtests) ===============
[03:50:28] =============== drm_test_check_plane_state ================
[03:50:28] [PASSED] clipping_simple
[03:50:28] [PASSED] clipping_rotate_reflect
[03:50:28] [PASSED] positioning_simple
[03:50:28] [PASSED] upscaling
[03:50:28] [PASSED] downscaling
[03:50:28] [PASSED] rounding1
[03:50:28] [PASSED] rounding2
[03:50:28] [PASSED] rounding3
[03:50:28] [PASSED] rounding4
[03:50:28] =========== [PASSED] drm_test_check_plane_state ============
[03:50:28] =========== drm_test_check_invalid_plane_state ============
[03:50:28] [PASSED] positioning_invalid
[03:50:28] [PASSED] upscaling_invalid
[03:50:28] [PASSED] downscaling_invalid
[03:50:28] ======= [PASSED] drm_test_check_invalid_plane_state ========
[03:50:28] ================ [PASSED] drm_plane_helper =================
[03:50:28] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[03:50:28] ====== drm_test_connector_helper_tv_get_modes_check =======
[03:50:28] [PASSED] None
[03:50:28] [PASSED] PAL
[03:50:28] [PASSED] NTSC
[03:50:28] [PASSED] Both, NTSC Default
[03:50:28] [PASSED] Both, PAL Default
[03:50:28] [PASSED] Both, NTSC Default, with PAL on command-line
[03:50:28] [PASSED] Both, PAL Default, with NTSC on command-line
[03:50:28] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[03:50:28] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[03:50:28] ================== drm_rect (9 subtests) ===================
[03:50:28] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[03:50:28] [PASSED] drm_test_rect_clip_scaled_not_clipped
[03:50:28] [PASSED] drm_test_rect_clip_scaled_clipped
[03:50:28] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[03:50:28] ================= drm_test_rect_intersect =================
[03:50:28] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[03:50:28] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[03:50:28] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[03:50:28] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[03:50:28] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[03:50:28] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[03:50:28] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[03:50:28] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[03:50:28] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[03:50:28] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[03:50:28] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[03:50:28] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[03:50:28] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[03:50:28] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[03:50:28] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[03:50:28] ============= [PASSED] drm_test_rect_intersect =============
[03:50:28] ================ drm_test_rect_calc_hscale ================
[03:50:28] [PASSED] normal use
[03:50:28] [PASSED] out of max range
[03:50:28] [PASSED] out of min range
[03:50:28] [PASSED] zero dst
[03:50:28] [PASSED] negative src
[03:50:28] [PASSED] negative dst
[03:50:28] ============ [PASSED] drm_test_rect_calc_hscale ============
[03:50:28] ================ drm_test_rect_calc_vscale ================
[03:50:28] [PASSED] normal use
[03:50:28] [PASSED] out of max range
[03:50:28] [PASSED] out of min range
[03:50:28] [PASSED] zero dst
[03:50:28] [PASSED] negative src
[03:50:28] [PASSED] negative dst
[03:50:28] ============ [PASSED] drm_test_rect_calc_vscale ============
[03:50:28] ================== drm_test_rect_rotate ===================
[03:50:28] [PASSED] reflect-x
[03:50:28] [PASSED] reflect-y
[03:50:28] [PASSED] rotate-0
[03:50:28] [PASSED] rotate-90
[03:50:28] [PASSED] rotate-180
[03:50:28] [PASSED] rotate-270
[03:50:28] ============== [PASSED] drm_test_rect_rotate ===============
[03:50:28] ================ drm_test_rect_rotate_inv =================
[03:50:28] [PASSED] reflect-x
[03:50:28] [PASSED] reflect-y
[03:50:28] [PASSED] rotate-0
[03:50:28] [PASSED] rotate-90
[03:50:28] [PASSED] rotate-180
[03:50:28] [PASSED] rotate-270
[03:50:28] ============ [PASSED] drm_test_rect_rotate_inv =============
[03:50:28] ==================== [PASSED] drm_rect =====================
[03:50:28] ============ drm_sysfb_modeset_test (1 subtest) ============
[03:50:28] ============ drm_test_sysfb_build_fourcc_list =============
[03:50:28] [PASSED] no native formats
[03:50:28] [PASSED] XRGB8888 as native format
[03:50:28] [PASSED] remove duplicates
[03:50:28] [PASSED] convert alpha formats
[03:50:28] [PASSED] random formats
[03:50:28] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[03:50:28] ============= [PASSED] drm_sysfb_modeset_test ==============
[03:50:28] ================== drm_fixp (2 subtests) ===================
[03:50:28] [PASSED] drm_test_int2fixp
[03:50:28] [PASSED] drm_test_sm2fixp
[03:50:28] ==================== [PASSED] drm_fixp =====================
[03:50:28] ============================================================
[03:50:28] Testing complete. Ran 621 tests: passed: 621
[03:50:28] Elapsed time: 25.906s total, 1.726s configuring, 24.010s building, 0.138s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[03:50:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:50:30] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:50:39] Starting KUnit Kernel (1/1)...
[03:50:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:50:40] ================= ttm_device (5 subtests) ==================
[03:50:40] [PASSED] ttm_device_init_basic
[03:50:40] [PASSED] ttm_device_init_multiple
[03:50:40] [PASSED] ttm_device_fini_basic
[03:50:40] [PASSED] ttm_device_init_no_vma_man
[03:50:40] ================== ttm_device_init_pools ==================
[03:50:40] [PASSED] No DMA allocations, no DMA32 required
[03:50:40] [PASSED] DMA allocations, DMA32 required
[03:50:40] [PASSED] No DMA allocations, DMA32 required
[03:50:40] [PASSED] DMA allocations, no DMA32 required
[03:50:40] ============== [PASSED] ttm_device_init_pools ==============
[03:50:40] =================== [PASSED] ttm_device ====================
[03:50:40] ================== ttm_pool (8 subtests) ===================
[03:50:40] ================== ttm_pool_alloc_basic ===================
[03:50:40] [PASSED] One page
[03:50:40] [PASSED] More than one page
[03:50:40] [PASSED] Above the allocation limit
[03:50:40] [PASSED] One page, with coherent DMA mappings enabled
[03:50:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:50:40] ============== [PASSED] ttm_pool_alloc_basic ===============
[03:50:40] ============== ttm_pool_alloc_basic_dma_addr ==============
[03:50:40] [PASSED] One page
[03:50:40] [PASSED] More than one page
[03:50:40] [PASSED] Above the allocation limit
[03:50:40] [PASSED] One page, with coherent DMA mappings enabled
[03:50:40] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:50:40] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[03:50:40] [PASSED] ttm_pool_alloc_order_caching_match
[03:50:40] [PASSED] ttm_pool_alloc_caching_mismatch
[03:50:40] [PASSED] ttm_pool_alloc_order_mismatch
[03:50:40] [PASSED] ttm_pool_free_dma_alloc
[03:50:40] [PASSED] ttm_pool_free_no_dma_alloc
[03:50:40] [PASSED] ttm_pool_fini_basic
[03:50:40] ==================== [PASSED] ttm_pool =====================
[03:50:40] ================ ttm_resource (8 subtests) =================
[03:50:40] ================= ttm_resource_init_basic =================
[03:50:40] [PASSED] Init resource in TTM_PL_SYSTEM
[03:50:40] [PASSED] Init resource in TTM_PL_VRAM
[03:50:40] [PASSED] Init resource in a private placement
[03:50:40] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[03:50:40] ============= [PASSED] ttm_resource_init_basic =============
[03:50:40] [PASSED] ttm_resource_init_pinned
[03:50:40] [PASSED] ttm_resource_fini_basic
[03:50:40] [PASSED] ttm_resource_manager_init_basic
[03:50:40] [PASSED] ttm_resource_manager_usage_basic
[03:50:40] [PASSED] ttm_resource_manager_set_used_basic
[03:50:40] [PASSED] ttm_sys_man_alloc_basic
[03:50:40] [PASSED] ttm_sys_man_free_basic
[03:50:40] ================== [PASSED] ttm_resource ===================
[03:50:40] =================== ttm_tt (15 subtests) ===================
[03:50:40] ==================== ttm_tt_init_basic ====================
[03:50:40] [PASSED] Page-aligned size
[03:50:40] [PASSED] Extra pages requested
[03:50:40] ================ [PASSED] ttm_tt_init_basic ================
[03:50:40] [PASSED] ttm_tt_init_misaligned
[03:50:40] [PASSED] ttm_tt_fini_basic
[03:50:40] [PASSED] ttm_tt_fini_sg
[03:50:40] [PASSED] ttm_tt_fini_shmem
[03:50:40] [PASSED] ttm_tt_create_basic
[03:50:40] [PASSED] ttm_tt_create_invalid_bo_type
[03:50:40] [PASSED] ttm_tt_create_ttm_exists
[03:50:40] [PASSED] ttm_tt_create_failed
[03:50:40] [PASSED] ttm_tt_destroy_basic
[03:50:40] [PASSED] ttm_tt_populate_null_ttm
[03:50:40] [PASSED] ttm_tt_populate_populated_ttm
[03:50:40] [PASSED] ttm_tt_unpopulate_basic
[03:50:40] [PASSED] ttm_tt_unpopulate_empty_ttm
[03:50:40] [PASSED] ttm_tt_swapin_basic
[03:50:40] ===================== [PASSED] ttm_tt ======================
[03:50:40] =================== ttm_bo (14 subtests) ===================
[03:50:40] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[03:50:40] [PASSED] Cannot be interrupted and sleeps
[03:50:40] [PASSED] Cannot be interrupted, locks straight away
[03:50:40] [PASSED] Can be interrupted, sleeps
[03:50:40] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[03:50:40] [PASSED] ttm_bo_reserve_locked_no_sleep
[03:50:40] [PASSED] ttm_bo_reserve_no_wait_ticket
[03:50:40] [PASSED] ttm_bo_reserve_double_resv
[03:50:40] [PASSED] ttm_bo_reserve_interrupted
[03:50:40] [PASSED] ttm_bo_reserve_deadlock
[03:50:40] [PASSED] ttm_bo_unreserve_basic
[03:50:40] [PASSED] ttm_bo_unreserve_pinned
[03:50:40] [PASSED] ttm_bo_unreserve_bulk
[03:50:40] [PASSED] ttm_bo_fini_basic
[03:50:40] [PASSED] ttm_bo_fini_shared_resv
[03:50:40] [PASSED] ttm_bo_pin_basic
[03:50:40] [PASSED] ttm_bo_pin_unpin_resource
[03:50:40] [PASSED] ttm_bo_multiple_pin_one_unpin
[03:50:40] ===================== [PASSED] ttm_bo ======================
[03:50:40] ============== ttm_bo_validate (22 subtests) ===============
[03:50:40] ============== ttm_bo_init_reserved_sys_man ===============
[03:50:40] [PASSED] Buffer object for userspace
[03:50:40] [PASSED] Kernel buffer object
[03:50:40] [PASSED] Shared buffer object
[03:50:40] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[03:50:40] ============== ttm_bo_init_reserved_mock_man ==============
[03:50:40] [PASSED] Buffer object for userspace
[03:50:40] [PASSED] Kernel buffer object
[03:50:40] [PASSED] Shared buffer object
[03:50:40] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[03:50:40] [PASSED] ttm_bo_init_reserved_resv
[03:50:40] ================== ttm_bo_validate_basic ==================
[03:50:40] [PASSED] Buffer object for userspace
[03:50:40] [PASSED] Kernel buffer object
[03:50:40] [PASSED] Shared buffer object
[03:50:40] ============== [PASSED] ttm_bo_validate_basic ==============
[03:50:40] [PASSED] ttm_bo_validate_invalid_placement
[03:50:40] ============= ttm_bo_validate_same_placement ==============
[03:50:40] [PASSED] System manager
[03:50:40] [PASSED] VRAM manager
[03:50:40] ========= [PASSED] ttm_bo_validate_same_placement ==========
[03:50:40] [PASSED] ttm_bo_validate_failed_alloc
[03:50:40] [PASSED] ttm_bo_validate_pinned
[03:50:40] [PASSED] ttm_bo_validate_busy_placement
[03:50:40] ================ ttm_bo_validate_multihop =================
[03:50:40] [PASSED] Buffer object for userspace
[03:50:40] [PASSED] Kernel buffer object
[03:50:40] [PASSED] Shared buffer object
[03:50:40] ============ [PASSED] ttm_bo_validate_multihop =============
[03:50:40] ========== ttm_bo_validate_no_placement_signaled ==========
[03:50:40] [PASSED] Buffer object in system domain, no page vector
[03:50:40] [PASSED] Buffer object in system domain with an existing page vector
[03:50:40] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[03:50:40] ======== ttm_bo_validate_no_placement_not_signaled ========
[03:50:40] [PASSED] Buffer object for userspace
[03:50:40] [PASSED] Kernel buffer object
[03:50:40] [PASSED] Shared buffer object
[03:50:40] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[03:50:40] [PASSED] ttm_bo_validate_move_fence_signaled
[03:50:40] ========= ttm_bo_validate_move_fence_not_signaled =========
[03:50:40] [PASSED] Waits for GPU
[03:50:40] [PASSED] Tries to lock straight away
[03:50:40] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[03:50:40] [PASSED] ttm_bo_validate_swapout
[03:50:40] [PASSED] ttm_bo_validate_happy_evict
[03:50:40] [PASSED] ttm_bo_validate_all_pinned_evict
[03:50:40] [PASSED] ttm_bo_validate_allowed_only_evict
[03:50:40] [PASSED] ttm_bo_validate_deleted_evict
[03:50:40] [PASSED] ttm_bo_validate_busy_domain_evict
[03:50:40] [PASSED] ttm_bo_validate_evict_gutting
[03:50:40] [PASSED] ttm_bo_validate_recrusive_evict
[03:50:40] ================= [PASSED] ttm_bo_validate =================
[03:50:40] ============================================================
[03:50:40] Testing complete. Ran 102 tests: passed: 102
[03:50:40] Elapsed time: 11.389s total, 1.711s configuring, 9.464s building, 0.176s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✓ Xe.CI.BAT: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3)
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (7 preceding siblings ...)
2026-05-17 3:50 ` ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3) Patchwork
@ 2026-05-17 4:30 ` Patchwork
2026-05-17 5:49 ` ✗ Xe.CI.FULL: failure " Patchwork
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-17 4:30 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 975 bytes --]
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3)
URL : https://patchwork.freedesktop.org/series/166667/
State : success
== Summary ==
CI Bug Log - changes from xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40_BAT -> xe-pw-166667v3_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Changes
-------
No changes found
Build changes
-------------
* Linux: xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40 -> xe-pw-166667v3
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40: d47455904378e2bd24294dae67bfc7e442f58c40
xe-pw-166667v3: 166667v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/index.html
[-- Attachment #2: Type: text/html, Size: 1533 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* ✗ Xe.CI.FULL: failure for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3)
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
` (8 preceding siblings ...)
2026-05-17 4:30 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-05-17 5:49 ` Patchwork
9 siblings, 0 replies; 22+ messages in thread
From: Patchwork @ 2026-05-17 5:49 UTC (permalink / raw)
To: Suraj Kandpal; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 14930 bytes --]
== Series Details ==
Series: Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3)
URL : https://patchwork.freedesktop.org/series/166667/
State : failure
== Summary ==
CI Bug Log - changes from xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40_FULL -> xe-pw-166667v3_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-166667v3_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-166667v3_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (2 -> 2)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-166667v3_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-blt:
- shard-bmg: NOTRUN -> [INCOMPLETE][1]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-6/igt@kms_frontbuffer_tracking@fbchdr-rgb101010-draw-blt.html
* igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset:
- shard-lnl: [PASS][2] -> [ABORT][3]
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40/shard-lnl-1/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-lnl-7/igt@xe_exec_system_allocator@process-many-large-malloc-busy-nomemset.html
Known issues
------------
Here are the changes found in xe-pw-166667v3_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-16bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][4] ([Intel XE#2327]) +1 other test skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-180:
- shard-bmg: NOTRUN -> [SKIP][5] ([Intel XE#1124])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_big_fb@y-tiled-64bpp-rotate-180.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][6] ([Intel XE#2887])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#3432])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode:
- shard-bmg: NOTRUN -> [SKIP][8] ([Intel XE#2252]) +1 other test skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-bmg: NOTRUN -> [SKIP][9] ([Intel XE#2390] / [Intel XE#6974])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][10] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +1 other test fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-bmg: NOTRUN -> [SKIP][11] ([Intel XE#2320]) +3 other tests skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][12] ([Intel XE#7178] / [Intel XE#7351])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][13] ([Intel XE#4141]) +4 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][14] ([Intel XE#7061] / [Intel XE#7356]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-msflip-blt:
- shard-bmg: NOTRUN -> [SKIP][15] ([Intel XE#2311]) +13 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#2313]) +11 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][17] ([Intel XE#7061])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-abgr161616f-draw-render.html
* igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010:
- shard-bmg: [PASS][18] -> [SKIP][19] ([Intel XE#7915]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40/shard-bmg-9/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-3/igt@kms_hdr@static-toggle-dpms@pipe-a-hdmi-a-3-xrgb2101010.html
* igt@kms_plane@pixel-format-y-tiled-modifier:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#7283]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_plane@pixel-format-y-tiled-modifier.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][21] ([Intel XE#2938] / [Intel XE#7376] / [Intel XE#7760])
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_backlight@fade:
- shard-bmg: NOTRUN -> [SKIP][22] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_pm_backlight@fade.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][23] ([Intel XE#1489]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr@fbc-psr-suspend:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#2234] / [Intel XE#2850])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_psr@fbc-psr-suspend.html
* igt@kms_scaling_modes@scaling-mode-full:
- shard-bmg: NOTRUN -> [SKIP][25] ([Intel XE#2413])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@kms_scaling_modes@scaling-mode-full.html
* igt@xe_eudebug@read-metadata:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#7636]) +2 other tests skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@xe_eudebug@read-metadata.html
* igt@xe_exec_basic@multigpu-once-basic-defer-bind:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@xe_exec_basic@multigpu-once-basic-defer-bind.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-dyn-priority:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#6874]) +3 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-dyn-priority.html
* igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr:
- shard-bmg: NOTRUN -> [SKIP][29] ([Intel XE#7138]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@xe_exec_threads@threads-multi-queue-cm-fd-userptr.html
* igt@xe_multigpu_svm@mgpu-atomic-op-conflict:
- shard-bmg: NOTRUN -> [SKIP][30] ([Intel XE#6964]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@xe_multigpu_svm@mgpu-atomic-op-conflict.html
* igt@xe_prefetch_fault@prefetch-fault-svm:
- shard-bmg: NOTRUN -> [SKIP][31] ([Intel XE#7599])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@xe_prefetch_fault@prefetch-fault-svm.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-bmg: NOTRUN -> [SKIP][32] ([Intel XE#4733] / [Intel XE#7417])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-8/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#944])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@xe_query@multigpu-query-invalid-extension.html
#### Possible fixes ####
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-lnl: [FAIL][34] ([Intel XE#301]) -> [PASS][35] +2 other tests pass
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_hdr@bpc-switch:
- shard-bmg: [INCOMPLETE][36] -> [PASS][37] +1 other test pass
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40/shard-bmg-5/igt@kms_hdr@bpc-switch.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-bmg-7/igt@kms_hdr@bpc-switch.html
#### Warnings ####
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][38] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][39] ([Intel XE#309] / [Intel XE#7343])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/shard-lnl-3/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#6874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6874
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7138
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
[Intel XE#7636]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7636
[Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
[Intel XE#7915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7915
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40 -> xe-pw-166667v3
IGT_8917: 65d691069f26fc2a42c79e2364241320b85d48bc @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-5073-d47455904378e2bd24294dae67bfc7e442f58c40: d47455904378e2bd24294dae67bfc7e442f58c40
xe-pw-166667v3: 166667v3
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-166667v3/index.html
[-- Attachment #2: Type: text/html, Size: 16563 bytes --]
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-15 16:10 ` [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
@ 2026-05-18 14:17 ` Ville Syrjälä
2026-05-19 2:33 ` Kandpal, Suraj
0 siblings, 1 reply; 22+ messages in thread
From: Ville Syrjälä @ 2026-05-18 14:17 UTC (permalink / raw)
To: Suraj Kandpal
Cc: intel-xe, intel-gfx, ankit.k.nautiyal, arun.r.murthy,
gustavo.sousa, jani.nikula
On Fri, May 15, 2026 at 09:40:56PM +0530, Suraj Kandpal wrote:
> Starting with display version 30, the per-pipe frame timestamp is read
> from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
> legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the display
> and select the appropriate register based on DISPLAY_VER(), and update
> all callers intel_vblank accordingly.
>
> Bspec: 79482
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> v1 -> v2:
> - Define registers in correct location (Jani)
> - Use the intel_display_wa() helper to select the correct register (Gustavo)
> - Fix early vblank timeout issue when DMC is not loaded
>
> .../gpu/drm/i915/display/intel_display_wa.c | 2 ++
> .../gpu/drm/i915/display/intel_display_wa.h | 1 +
> drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 ++++++
> drivers/gpu/drm/i915/display/intel_vblank.c | 18 ++++++++++++++----
> 4 files changed, 23 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
> index 7d3d63a59882..44c2a503c911 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> @@ -110,6 +110,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
> return DISPLAY_VERx100(display) == 3000 ||
> DISPLAY_VERx100(display) == 2000 ||
> DISPLAY_VERx100(display) == 1401;
> + case INTEL_DISPLAY_WA_14022946399:
> + return DISPLAY_VER(display) >= 30;
According to bspec PIPEDMC_FRMTMSTMP shouldn't even exist on PTL.
Did you actually check that the register works?
And I believe the hw register corruption issue being addressed by
w/a 14022946399 (also applies to LNL) should anyway be fixed on the
platforms that have PIPEDMC_FRMTMSTMP so this w/a stuff here makes
no sense.
> case INTEL_DISPLAY_WA_14025769978:
> return DISPLAY_VER(display) == 35;
> case INTEL_DISPLAY_WA_15013987218:
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
> index 15fec843f15e..884463a894c8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> @@ -42,6 +42,7 @@ enum intel_display_wa {
> INTEL_DISPLAY_WA_14014143976,
> INTEL_DISPLAY_WA_14016740474,
> INTEL_DISPLAY_WA_14020863754,
> + INTEL_DISPLAY_WA_14022946399,
> INTEL_DISPLAY_WA_14025769978,
> INTEL_DISPLAY_WA_15013987218,
> INTEL_DISPLAY_WA_15018326506,
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> index 38e342b45af0..985642a79a52 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> @@ -644,4 +644,10 @@ enum pipedmc_event_id {
> #define _PIPEDMC_DCB_BALANCE_RESET_B 0x986a8
> #define PIPEDMC_DCB_BALANCE_RESET(pipe) _MMIO_PIPE(pipe, _PIPEDMC_DCB_BALANCE_RESET_A,\
> _PIPEDMC_DCB_BALANCE_RESET_B)
> +
> +#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
> +#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
> +#define PIPEDMC_FRMTMSTMP(pipe) \
> + _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A, _PIPEDMC_FRMTMSTMP_B)
> +
> #endif /* __INTEL_DMC_REGS_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 28d81199792e..145c342f445f 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -15,6 +15,8 @@
> #include "intel_display_regs.h"
> #include "intel_display_types.h"
> #include "intel_display_utils.h"
> +#include "intel_display_wa.h"
> +#include "intel_dmc_regs.h"
> #include "intel_vblank.h"
> #include "intel_vrr.h"
>
> @@ -156,8 +158,12 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> * pipe frame time stamp. The time stamp value
> * is sampled at every start of vertical blank.
> */
> - scan_prev_time = intel_de_read_fw(display,
> - PIPE_FRMTMSTMP(crtc->pipe));
> + if (intel_display_wa(display, INTEL_DISPLAY_WA_14022946399))
> + scan_prev_time = intel_de_read_fw(display,
> + PIPEDMC_FRMTMSTMP(crtc->pipe));
> + else
> + scan_prev_time = intel_de_read_fw(display,
> + PIPE_FRMTMSTMP(crtc->pipe));
>
> /*
> * The TIMESTAMP_CTR register has the current
> @@ -165,8 +171,12 @@ static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> */
> scan_curr_time = intel_de_read_fw(display, IVB_TIMESTAMP_CTR);
>
> - scan_post_time = intel_de_read_fw(display,
> - PIPE_FRMTMSTMP(crtc->pipe));
> + if (intel_display_wa(display, INTEL_DISPLAY_WA_14022946399))
> + scan_post_time = intel_de_read_fw(display,
> + PIPEDMC_FRMTMSTMP(crtc->pipe));
> + else
> + scan_post_time = intel_de_read_fw(display,
> + PIPE_FRMTMSTMP(crtc->pipe));
> } while (scan_post_time != scan_prev_time);
>
> return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
> --
> 2.34.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* RE: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-18 14:17 ` Ville Syrjälä
@ 2026-05-19 2:33 ` Kandpal, Suraj
2026-05-19 12:02 ` Ville Syrjälä
0 siblings, 1 reply; 22+ messages in thread
From: Kandpal, Suraj @ 2026-05-19 2:33 UTC (permalink / raw)
To: Ville Syrjälä
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Nautiyal, Ankit K, Murthy, Arun R, Sousa, Gustavo, Nikula, Jani
> Subject: Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on
> display ver >= 30
>
> On Fri, May 15, 2026 at 09:40:56PM +0530, Suraj Kandpal wrote:
> > Starting with display version 30, the per-pipe frame timestamp is read
> > from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
> > legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the
> > display and select the appropriate register based on DISPLAY_VER(),
> > and update all callers intel_vblank accordingly.
> >
> > Bspec: 79482
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > ---
> > v1 -> v2:
> > - Define registers in correct location (Jani)
> > - Use the intel_display_wa() helper to select the correct register
> > (Gustavo)
> > - Fix early vblank timeout issue when DMC is not loaded
> >
> > .../gpu/drm/i915/display/intel_display_wa.c | 2 ++
> > .../gpu/drm/i915/display/intel_display_wa.h | 1 +
> > drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 ++++++
> > drivers/gpu/drm/i915/display/intel_vblank.c | 18 ++++++++++++++----
> > 4 files changed, 23 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c
> > b/drivers/gpu/drm/i915/display/intel_display_wa.c
> > index 7d3d63a59882..44c2a503c911 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> > @@ -110,6 +110,8 @@ bool __intel_display_wa(struct intel_display
> *display, enum intel_display_wa wa,
> > return DISPLAY_VERx100(display) == 3000 ||
> > DISPLAY_VERx100(display) == 2000 ||
> > DISPLAY_VERx100(display) == 1401;
> > + case INTEL_DISPLAY_WA_14022946399:
> > + return DISPLAY_VER(display) >= 30;
>
> According to bspec PIPEDMC_FRMTMSTMP shouldn't even exist on PTL.
> Did you actually check that the register works?
Yes you are correct seems like this does not exist on PTL, weird that the Xe.CI does not throw any error In relation to this.
>
> And I believe the hw register corruption issue being addressed by w/a
> 14022946399 (also applies to LNL) should anyway be fixed on the platforms
> that have PIPEDMC_FRMTMSTMP so this w/a stuff here makes no sense.
Hmm the confusing thing here is this same WA has two ways to go about it. From NVL onwards we need to ready the PIPEDMC_FRMTMSPTMP
But before that it was that we read the FRMTMSTMP register once per frame.
So for display ver >= 35 we maybe should still switch to PIPEDMC_FRMTMSTMP
Regards,
Suraj Kandpal
>
> > case INTEL_DISPLAY_WA_14025769978:
> > return DISPLAY_VER(display) == 35;
> > case INTEL_DISPLAY_WA_15013987218:
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h
> > b/drivers/gpu/drm/i915/display/intel_display_wa.h
> > index 15fec843f15e..884463a894c8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> > @@ -42,6 +42,7 @@ enum intel_display_wa {
> > INTEL_DISPLAY_WA_14014143976,
> > INTEL_DISPLAY_WA_14016740474,
> > INTEL_DISPLAY_WA_14020863754,
> > + INTEL_DISPLAY_WA_14022946399,
> > INTEL_DISPLAY_WA_14025769978,
> > INTEL_DISPLAY_WA_15013987218,
> > INTEL_DISPLAY_WA_15018326506,
> > diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> > b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> > index 38e342b45af0..985642a79a52 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
> > @@ -644,4 +644,10 @@ enum pipedmc_event_id {
> > #define _PIPEDMC_DCB_BALANCE_RESET_B 0x986a8
> > #define PIPEDMC_DCB_BALANCE_RESET(pipe)
> _MMIO_PIPE(pipe, _PIPEDMC_DCB_BALANCE_RESET_A,\
> >
> _PIPEDMC_DCB_BALANCE_RESET_B)
> > +
> > +#define _PIPEDMC_FRMTMSTMP_A 0x5f0ac
> > +#define _PIPEDMC_FRMTMSTMP_B 0x5f4ac
> > +#define PIPEDMC_FRMTMSTMP(pipe) \
> > + _MMIO_PIPE(pipe, _PIPEDMC_FRMTMSTMP_A,
> _PIPEDMC_FRMTMSTMP_B)
> > +
> > #endif /* __INTEL_DMC_REGS_H__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> > b/drivers/gpu/drm/i915/display/intel_vblank.c
> > index 28d81199792e..145c342f445f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > @@ -15,6 +15,8 @@
> > #include "intel_display_regs.h"
> > #include "intel_display_types.h"
> > #include "intel_display_utils.h"
> > +#include "intel_display_wa.h"
> > +#include "intel_dmc_regs.h"
> > #include "intel_vblank.h"
> > #include "intel_vrr.h"
> >
> > @@ -156,8 +158,12 @@ static u32
> intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc *crtc)
> > * pipe frame time stamp. The time stamp value
> > * is sampled at every start of vertical blank.
> > */
> > - scan_prev_time = intel_de_read_fw(display,
> > - PIPE_FRMTMSTMP(crtc-
> >pipe));
> > + if (intel_display_wa(display,
> INTEL_DISPLAY_WA_14022946399))
> > + scan_prev_time = intel_de_read_fw(display,
> > +
> PIPEDMC_FRMTMSTMP(crtc->pipe));
> > + else
> > + scan_prev_time = intel_de_read_fw(display,
> > +
> PIPE_FRMTMSTMP(crtc->pipe));
> >
> > /*
> > * The TIMESTAMP_CTR register has the current @@ -165,8
> +171,12 @@
> > static u32 intel_crtc_scanlines_since_frame_timestamp(struct intel_crtc
> *crtc)
> > */
> > scan_curr_time = intel_de_read_fw(display,
> IVB_TIMESTAMP_CTR);
> >
> > - scan_post_time = intel_de_read_fw(display,
> > - PIPE_FRMTMSTMP(crtc-
> >pipe));
> > + if (intel_display_wa(display,
> INTEL_DISPLAY_WA_14022946399))
> > + scan_post_time = intel_de_read_fw(display,
> > +
> PIPEDMC_FRMTMSTMP(crtc->pipe));
> > + else
> > + scan_post_time = intel_de_read_fw(display,
> > +
> PIPE_FRMTMSTMP(crtc->pipe));
> > } while (scan_post_time != scan_prev_time);
> >
> > return div_u64(mul_u32_u32(scan_curr_time - scan_prev_time,
> > --
> > 2.34.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30
2026-05-19 2:33 ` Kandpal, Suraj
@ 2026-05-19 12:02 ` Ville Syrjälä
0 siblings, 0 replies; 22+ messages in thread
From: Ville Syrjälä @ 2026-05-19 12:02 UTC (permalink / raw)
To: Kandpal, Suraj
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
Nautiyal, Ankit K, Murthy, Arun R, Sousa, Gustavo, Nikula, Jani
On Tue, May 19, 2026 at 02:33:38AM +0000, Kandpal, Suraj wrote:
> > Subject: Re: [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on
> > display ver >= 30
> >
> > On Fri, May 15, 2026 at 09:40:56PM +0530, Suraj Kandpal wrote:
> > > Starting with display version 30, the per-pipe frame timestamp is read
> > > from the PIPEDMC register block (PIPEDMC_FRMTMSTMP) instead of the
> > > legacy PIPE_FRMTMSTMP MMIO. Extend PIPE_FRMTMSTMP() to take the
> > > display and select the appropriate register based on DISPLAY_VER(),
> > > and update all callers intel_vblank accordingly.
> > >
> > > Bspec: 79482
> > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > > ---
> > > v1 -> v2:
> > > - Define registers in correct location (Jani)
> > > - Use the intel_display_wa() helper to select the correct register
> > > (Gustavo)
> > > - Fix early vblank timeout issue when DMC is not loaded
> > >
> > > .../gpu/drm/i915/display/intel_display_wa.c | 2 ++
> > > .../gpu/drm/i915/display/intel_display_wa.h | 1 +
> > > drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 ++++++
> > > drivers/gpu/drm/i915/display/intel_vblank.c | 18 ++++++++++++++----
> > > 4 files changed, 23 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c
> > > b/drivers/gpu/drm/i915/display/intel_display_wa.c
> > > index 7d3d63a59882..44c2a503c911 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> > > @@ -110,6 +110,8 @@ bool __intel_display_wa(struct intel_display
> > *display, enum intel_display_wa wa,
> > > return DISPLAY_VERx100(display) == 3000 ||
> > > DISPLAY_VERx100(display) == 2000 ||
> > > DISPLAY_VERx100(display) == 1401;
> > > + case INTEL_DISPLAY_WA_14022946399:
> > > + return DISPLAY_VER(display) >= 30;
> >
> > According to bspec PIPEDMC_FRMTMSTMP shouldn't even exist on PTL.
> > Did you actually check that the register works?
>
> Yes you are correct seems like this does not exist on PTL, weird that the Xe.CI does not throw any error In relation to this.
>
> >
> > And I believe the hw register corruption issue being addressed by w/a
> > 14022946399 (also applies to LNL) should anyway be fixed on the platforms
> > that have PIPEDMC_FRMTMSTMP so this w/a stuff here makes no sense.
>
> Hmm the confusing thing here is this same WA has two ways to go about it. From NVL onwards we need to ready the PIPEDMC_FRMTMSPTMP
> But before that it was that we read the FRMTMSTMP register once per frame.
> So for display ver >= 35 we maybe should still switch to PIPEDMC_FRMTMSTMP
IIRC I read somewhere that the PIPEDMC register is going to be
removed in the near future, so not sure there's much point in
using it at all.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface"
2026-05-17 2:47 ` [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
@ 2026-05-20 8:08 ` Nautiyal, Ankit K
2026-05-20 8:26 ` Jani Nikula
0 siblings, 1 reply; 22+ messages in thread
From: Nautiyal, Ankit K @ 2026-05-20 8:08 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx; +Cc: arun.r.murthy
On 5/17/2026 8:17 AM, Suraj Kandpal wrote:
> This reverts commit 40d2f5820951dee818d05c14677277048bd85f9f.
>
> Removing the try_vesa_interface gate caused a backlight regression on
> panels whose VBT correctly reports INTEL_BACKLIGHT_DISPLAY_DDI and whose
> PWM path is the actual backlight control, but whose DPCD optimistically
> advertises DP_EDP_BACKLIGHT_AUX_ENABLE_CAP / _BRIGHTNESS_AUX_SET_CAP.
> After the commit such panels silently bind to the VESA AUX backlight
> funcs; AUX writes complete but the panel ignores them, leaving
> brightness stuck (no-op backlight). Observed on at least KBL and TGL
> eDP setups.
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
This will re-open the gitlab issue:
https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15679
We might need to add a quirk for the above cases where VBT cannot be
trusted.
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> .../drm/i915/display/intel_dp_aux_backlight.c | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index a8d56ebf06a2..7a6c07f6aaeb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -691,10 +691,9 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> struct drm_device *dev = connector->base.dev;
> struct intel_panel *panel = &connector->panel;
> - bool try_intel_interface = false;
> + bool try_intel_interface = false, try_vesa_interface = false;
>
> - /*
> - * Check the VBT and user's module parameters to figure out which
> + /* Check the VBT and user's module parameters to figure out which
> * interfaces to probe
> */
> switch (display->params.enable_dpcd_backlight) {
> @@ -703,6 +702,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
> case INTEL_DP_AUX_BACKLIGHT_AUTO:
> switch (panel->vbt.backlight.type) {
> case INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE:
> + try_vesa_interface = true;
> break;
> case INTEL_BACKLIGHT_DISPLAY_DDI:
> try_intel_interface = true;
> @@ -715,12 +715,20 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
> if (panel->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE)
> try_intel_interface = true;
>
> + try_vesa_interface = true;
> + break;
> + case INTEL_DP_AUX_BACKLIGHT_FORCE_VESA:
> + try_vesa_interface = true;
> break;
> case INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL:
> try_intel_interface = true;
> break;
> }
>
> + /* For eDP 1.5 and above we are supposed to use VESA interface for brightness control */
> + if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
> + try_vesa_interface = true;
> +
> /*
> * Since Intel has their own backlight control interface, the majority of machines out there
> * using DPCD backlight controls with Intel GPUs will be using this interface as opposed to
> @@ -733,9 +741,6 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
> * panel with Intel's OUI - which is also required for us to be able to detect Intel's
> * backlight interface at all. This means that the only sensible way for us to detect both
> * interfaces is to probe for Intel's first, and VESA's second.
> - *
> - * Also there is a chance some VBTs may advertise false Intel backlight support even if the
> - * TCON DPCD says otherwise. This means we keep VESA interface as fallback in that case.
> */
> if (try_intel_interface && intel_dp->edp_dpcd[0] <= DP_EDP_14b &&
> intel_dp_aux_supports_hdr_backlight(connector)) {
> @@ -745,7 +750,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
> return 0;
> }
>
> - if (intel_dp_aux_supports_vesa_backlight(connector)) {
> + if (try_vesa_interface && intel_dp_aux_supports_vesa_backlight(connector)) {
> drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Using VESA eDP backlight controls\n",
> connector->base.base.id, connector->base.name);
> panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface"
2026-05-20 8:08 ` Nautiyal, Ankit K
@ 2026-05-20 8:26 ` Jani Nikula
0 siblings, 0 replies; 22+ messages in thread
From: Jani Nikula @ 2026-05-20 8:26 UTC (permalink / raw)
To: Nautiyal, Ankit K, Suraj Kandpal, intel-xe, intel-gfx; +Cc: arun.r.murthy
On Wed, 20 May 2026, "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com> wrote:
> On 5/17/2026 8:17 AM, Suraj Kandpal wrote:
>> This reverts commit 40d2f5820951dee818d05c14677277048bd85f9f.
>>
>> Removing the try_vesa_interface gate caused a backlight regression on
>> panels whose VBT correctly reports INTEL_BACKLIGHT_DISPLAY_DDI and whose
>> PWM path is the actual backlight control, but whose DPCD optimistically
>> advertises DP_EDP_BACKLIGHT_AUX_ENABLE_CAP / _BRIGHTNESS_AUX_SET_CAP.
>> After the commit such panels silently bind to the VESA AUX backlight
>> funcs; AUX writes complete but the panel ignores them, leaving
>> brightness stuck (no-op backlight). Observed on at least KBL and TGL
>> eDP setups.
>>
>> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
>
> This will re-open the gitlab issue:
> https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15679
>
> We might need to add a quirk for the above cases where VBT cannot be
> trusted.
>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
I think this is a mess of a thread, with two completely different things
in one. Needs to be sent separately.
BR,
Jani.
>
>
>> ---
>> .../drm/i915/display/intel_dp_aux_backlight.c | 19 ++++++++++++-------
>> 1 file changed, 12 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> index a8d56ebf06a2..7a6c07f6aaeb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> @@ -691,10 +691,9 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
>> struct intel_dp *intel_dp = intel_attached_dp(connector);
>> struct drm_device *dev = connector->base.dev;
>> struct intel_panel *panel = &connector->panel;
>> - bool try_intel_interface = false;
>> + bool try_intel_interface = false, try_vesa_interface = false;
>>
>> - /*
>> - * Check the VBT and user's module parameters to figure out which
>> + /* Check the VBT and user's module parameters to figure out which
>> * interfaces to probe
>> */
>> switch (display->params.enable_dpcd_backlight) {
>> @@ -703,6 +702,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
>> case INTEL_DP_AUX_BACKLIGHT_AUTO:
>> switch (panel->vbt.backlight.type) {
>> case INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE:
>> + try_vesa_interface = true;
>> break;
>> case INTEL_BACKLIGHT_DISPLAY_DDI:
>> try_intel_interface = true;
>> @@ -715,12 +715,20 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
>> if (panel->vbt.backlight.type != INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE)
>> try_intel_interface = true;
>>
>> + try_vesa_interface = true;
>> + break;
>> + case INTEL_DP_AUX_BACKLIGHT_FORCE_VESA:
>> + try_vesa_interface = true;
>> break;
>> case INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL:
>> try_intel_interface = true;
>> break;
>> }
>>
>> + /* For eDP 1.5 and above we are supposed to use VESA interface for brightness control */
>> + if (intel_dp->edp_dpcd[0] >= DP_EDP_15)
>> + try_vesa_interface = true;
>> +
>> /*
>> * Since Intel has their own backlight control interface, the majority of machines out there
>> * using DPCD backlight controls with Intel GPUs will be using this interface as opposed to
>> @@ -733,9 +741,6 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
>> * panel with Intel's OUI - which is also required for us to be able to detect Intel's
>> * backlight interface at all. This means that the only sensible way for us to detect both
>> * interfaces is to probe for Intel's first, and VESA's second.
>> - *
>> - * Also there is a chance some VBTs may advertise false Intel backlight support even if the
>> - * TCON DPCD says otherwise. This means we keep VESA interface as fallback in that case.
>> */
>> if (try_intel_interface && intel_dp->edp_dpcd[0] <= DP_EDP_14b &&
>> intel_dp_aux_supports_hdr_backlight(connector)) {
>> @@ -745,7 +750,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
>> return 0;
>> }
>>
>> - if (intel_dp_aux_supports_vesa_backlight(connector)) {
>> + if (try_vesa_interface && intel_dp_aux_supports_vesa_backlight(connector)) {
>> drm_dbg_kms(dev, "[CONNECTOR:%d:%s] Using VESA eDP backlight controls\n",
>> connector->base.base.id, connector->base.name);
>> panel->backlight.funcs = &intel_dp_vesa_bl_funcs;
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2026-05-20 8:26 UTC | newest]
Thread overview: 22+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-15 15:53 [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
2026-05-15 16:00 ` ✓ CI.KUnit: success for " Patchwork
2026-05-15 16:10 ` [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
2026-05-18 14:17 ` Ville Syrjälä
2026-05-19 2:33 ` Kandpal, Suraj
2026-05-19 12:02 ` Ville Syrjälä
2026-05-15 16:52 ` ✓ Xe.CI.BAT: success for Revert "drm/i915/backlight: Remove try_vesa_interface" Patchwork
2026-05-15 17:19 ` ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev2) Patchwork
2026-05-15 17:57 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-16 8:16 ` ✓ Xe.CI.FULL: " Patchwork
2026-05-17 2:47 ` [PATCH] Revert "drm/i915/backlight: Remove try_vesa_interface" Suraj Kandpal
2026-05-20 8:08 ` Nautiyal, Ankit K
2026-05-20 8:26 ` Jani Nikula
2026-05-17 3:50 ` ✓ CI.KUnit: success for Revert "drm/i915/backlight: Remove try_vesa_interface" (rev3) Patchwork
2026-05-17 4:30 ` ✓ Xe.CI.BAT: " Patchwork
2026-05-17 5:49 ` ✗ Xe.CI.FULL: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2026-05-15 8:24 [PATCH] drm/i915/display: Use PIPEDMC_FRMTMSTMP on display ver >= 30 Suraj Kandpal
2026-05-15 10:21 ` Jani Nikula
2026-05-15 15:04 ` Kandpal, Suraj
2026-05-15 14:55 ` Gustavo Sousa
2026-05-15 15:07 ` Kandpal, Suraj
2026-05-17 2:45 ` Suraj Kandpal
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