Re: [PATCH 4/5] drm/xe: add force option for global invalidation

[Matthew Brost <matthew.brost@intel.com>]

On Fri, Aug 28, 2026 at 04:14:10PM +0100, Matthew Auld wrote:
> The flush is gated by the WA, since there would no valid use for it
> otherwise, but for some very special usecases allow bypassing the WA.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Cc: Matthew Brost <matthew.brost@intel.com>

Reviewed-by: Matthew Brost <matthew.brost@intel.com>

> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/xe/display/xe_dsb_buffer.c | 2 +-
>  drivers/gpu/drm/xe/display/xe_fb_pin.c     | 2 +-
>  drivers/gpu/drm/xe/xe_device.c             | 6 +++---
>  drivers/gpu/drm/xe/xe_device.h             | 2 +-
>  4 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/display/xe_dsb_buffer.c b/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
> index a7158c73a14c..82974e933e8d 100644
> --- a/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
> +++ b/drivers/gpu/drm/xe/display/xe_dsb_buffer.c
> @@ -88,7 +88,7 @@ static void xe_dsb_buffer_flush_map(struct intel_dsb_buffer *dsb_buf)
>  	 * both for weak ordering archs and discrete cards.
>  	 */
>  	xe_device_wmb(xe);
> -	xe_device_l2_flush(xe);
> +	xe_device_l2_flush(xe, false);
>  }
>  
>  const struct intel_display_dsb_interface xe_display_dsb_interface = {
> diff --git a/drivers/gpu/drm/xe/display/xe_fb_pin.c b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> index 73469ea5f333..b46a2c32ac07 100644
> --- a/drivers/gpu/drm/xe/display/xe_fb_pin.c
> +++ b/drivers/gpu/drm/xe/display/xe_fb_pin.c
> @@ -203,7 +203,7 @@ static int __xe_pin_fb_vma_dpt(struct drm_gem_object *obj,
>  	vma->node = dpt->ggtt_node[tile0->id];
>  
>  	/* Ensure DPT writes are flushed */
> -	xe_device_l2_flush(xe);
> +	xe_device_l2_flush(xe, false);
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 74d566693dfd..82e0a555fa69 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -1270,7 +1270,7 @@ bool xe_device_is_l2_flush_optimized(struct xe_device *xe)
>  	return false;
>  }
>  
> -void xe_device_l2_flush(struct xe_device *xe)
> +void xe_device_l2_flush(struct xe_device *xe, bool force)
>  {
>  	struct xe_gt *gt;
>  
> @@ -1278,7 +1278,7 @@ void xe_device_l2_flush(struct xe_device *xe)
>  	if (!gt)
>  		return;
>  
> -	if (!XE_GT_WA(gt, 16023588340))
> +	if (!force && !XE_GT_WA(gt, 16023588340))
>  		return;
>  
>  	CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GT);
> @@ -1333,7 +1333,7 @@ void xe_device_td_flush(struct xe_device *xe)
>  
>  	if (XE_GT_WA(root_gt, 16023588340)) {
>  		/* A transient flush is not sufficient: flush the L2 */
> -		xe_device_l2_flush(xe);
> +		xe_device_l2_flush(xe, false);
>  	} else {
>  		xe_guc_pc_apply_flush_freq_limit(&root_gt->uc.guc.pc);
>  		tdf_request_sync(xe);
> diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
> index 6c4cfaebc44a..6d3d6d5eba29 100644
> --- a/drivers/gpu/drm/xe/xe_device.h
> +++ b/drivers/gpu/drm/xe/xe_device.h
> @@ -205,7 +205,7 @@ u64 xe_device_uncanonicalize_addr(struct xe_device *xe, u64 address);
>  
>  bool xe_device_is_l2_flush_optimized(struct xe_device *xe);
>  void xe_device_td_flush(struct xe_device *xe);
> -void xe_device_l2_flush(struct xe_device *xe);
> +void xe_device_l2_flush(struct xe_device *xe, bool force);
>  
>  static inline bool xe_device_wedged(struct xe_device *xe)
>  {
> -- 
> 2.55.0
>