From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Karthik Poosa <karthik.poosa@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
<badal.nilawar@intel.com>, <raag.jadav@intel.com>,
<riana.tauro@intel.com>, <sk.anirban@intel.com>,
<mallesh.koujalagi@intel.com>, <soham.purkait@intel.com>
Subject: Re: [PATCH v6 02/13] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude
Date: Sun, 27 Sep 2026 20:15:45 -0400 [thread overview]
Message-ID: <armxsfvROOsR1DRL@intel.com> (raw)
In-Reply-To: <20260924205429.2846256-3-karthik.poosa@intel.com>
On Fri, Sep 25, 2026 at 02:24:18AM +0530, Karthik Poosa wrote:
> The mailbox temperature is an 8-bit sign-magnitude value (bit 7 sign,
> bits 6:0 magnitude, range -127..127), not two's-complement. Casting the
> raw byte to s8 decodes negative readings incorrectly.
>
> Add mbx_temp_decode(), store the raw byte as u8, and use it in
> get_mc_temp() and get_pcie_temp() so temperatures are decoded correctly.
>
> Fixes: 3a0cb885e111 ("drm/xe/hwmon: Expose memory controller temperature")
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/xe/xe_hwmon.c | 20 ++++++++++++++++----
> 1 file changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index be3fb6733b6f..57199ea00a60 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -104,6 +104,10 @@ enum sensor_attr_power {
> /* Index of memory controller in READ_THERMAL_DATA output */
> #define TEMP_INDEX_MCTRL 2
>
> +/* Mailbox temperature is sign-magnitude: bit 7 sign, bits 6:0 magnitude. */
> +#define TEMP_MBX_SIGN BIT(7)
> +#define TEMP_MBX_MAG GENMASK(6, 0)
> +
> /* Maximum characters in hwmon label name */
> #define MAX_LABEL_SIZE 16
>
> @@ -139,8 +143,8 @@ struct xe_hwmon_thermal_info {
> };
> /** @count: no of temperature sensors available for the platform */
> u8 count;
> - /** @value: signed value from each sensor */
> - s8 value[U8_MAX];
> + /** @value: per-sensor raw mailbox temperature; bit7=sign, bits6:0=magnitude */
> + u8 value[U8_MAX];
> /** @vram_label: vram label names */
> char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
> };
> @@ -814,6 +818,14 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
> return ret;
> }
>
> +/* Decode an 8-bit sign-magnitude mailbox temperature to degrees Celsius. */
> +static int mbx_temp_decode(u8 value)
> +{
> + int temp = value & TEMP_MBX_MAG;
> +
> + return (value & TEMP_MBX_SIGN) ? -temp : temp;
> +}
> +
> static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
> {
> struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> @@ -830,7 +842,7 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
> }
>
> for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
> - average += hwmon->temp.value[i];
> + average += mbx_temp_decode(hwmon->temp.value[i]);
>
> average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
> *val = average * MILLIDEGREE_PER_DEGREE;
> @@ -853,7 +865,7 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
> data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
>
> data = REG_FIELD_GET(TEMP_MASK, data);
> - *val = (s8)data * MILLIDEGREE_PER_DEGREE;
> + *val = mbx_temp_decode(data) * MILLIDEGREE_PER_DEGREE;
>
> return 0;
> }
> --
> 2.25.1
>
next prev parent reply other threads:[~2026-09-28 0:16 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-24 20:54 [PATCH v6 00/13] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-09-24 20:54 ` [PATCH v6 01/13] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit Karthik Poosa
2026-09-28 0:11 ` Rodrigo Vivi
2026-09-28 15:32 ` Poosa, Karthik
2026-09-24 20:54 ` [PATCH v6 02/13] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-09-28 0:15 ` Rodrigo Vivi [this message]
2026-09-24 20:54 ` [PATCH v6 03/13] drm/xe/hwmon: Fix memory controller thermal data handling Karthik Poosa
2026-09-24 20:54 ` [PATCH v6 04/13] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-09-28 0:19 ` Rodrigo Vivi
2026-09-28 16:08 ` Poosa, Karthik
2026-09-28 17:59 ` Rodrigo Vivi
2026-09-28 19:38 ` Rodrigo Vivi
2026-09-29 16:48 ` Poosa, Karthik
2026-09-29 18:26 ` Rodrigo Vivi
2026-09-24 20:54 ` [PATCH v6 05/13] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-09-28 16:08 ` Rodrigo Vivi
2026-09-24 20:54 ` [PATCH v6 06/13] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-09-28 16:10 ` Rodrigo Vivi
2026-09-24 20:54 ` [PATCH v6 07/13] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-09-28 19:39 ` Rodrigo Vivi
2026-09-24 20:54 ` [PATCH v6 08/13] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-09-28 21:17 ` Rodrigo Vivi
2026-09-24 20:54 ` [PATCH v6 09/13] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-09-24 20:54 ` [PATCH v6 10/13] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-09-29 18:04 ` Rodrigo Vivi
2026-10-01 19:02 ` Poosa, Karthik
2026-09-24 20:54 ` [PATCH v6 11/13] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-09-29 18:24 ` Rodrigo Vivi
2026-09-24 20:54 ` [PATCH v6 12/13] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-09-29 18:27 ` Rodrigo Vivi
2026-09-24 20:54 ` [PATCH v6 13/13] drm/xe/hwmon: Update PCIE temperature sensor " Karthik Poosa
2026-09-29 18:29 ` Rodrigo Vivi
2026-09-30 17:11 ` Poosa, Karthik
2026-09-24 21:05 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox (rev3) Patchwork
2026-09-24 22:34 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-25 11:16 ` ✗ Xe.CI.FULL: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=armxsfvROOsR1DRL@intel.com \
--to=rodrigo.vivi@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=badal.nilawar@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=karthik.poosa@intel.com \
--cc=mallesh.koujalagi@intel.com \
--cc=raag.jadav@intel.com \
--cc=riana.tauro@intel.com \
--cc=sk.anirban@intel.com \
--cc=soham.purkait@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox