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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Karthik Poosa <karthik.poosa@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <anshuman.gupta@intel.com>,
	<badal.nilawar@intel.com>, <raag.jadav@intel.com>,
	<riana.tauro@intel.com>
Subject: Re: [PATCH v13 12/16] drm/xe/hwmon: Update memory controller temperature offset for CRI
Date: Wed, 14 Oct 2026 13:52:13 -0400	[thread overview]
Message-ID: <as_BTb-GDagB03do@intel.com> (raw)
In-Reply-To: <20261014115806.831459-13-karthik.poosa@intel.com>

On Wed, Oct 14, 2026 at 05:28:02PM +0530, Karthik Poosa wrote:
> On CRI the memory controller temperatures moved in the READ_THERMAL_DATA
> output: they now occupy bytes 16..19 instead of starting at byte 2.
> 
> Read and average the CRI memory controller sensors from bytes 16..19,
> keeping the existing byte 2..count-1 range for earlier platforms. Only
> the group(s) covering the used bytes are fetched.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
> 
> v2: Use the CRI memory temperature mapping only on
>     Crescent Island. (sashiko)
> 
>  drivers/gpu/drm/xe/xe_hwmon.c | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index dad2397db141..eef6560569ce 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -109,6 +109,10 @@ enum sensor_attr_power {
>  /* Index of memory controller in READ_THERMAL_DATA output */
>  #define TEMP_INDEX_MCTRL	2
>  
> +/* On CRI the memory controller temperatures are READ_THERMAL_DATA bytes 16..19. */
> +#define CRI_TEMP_INDEX_MCTRL	16
> +#define CRI_TEMP_MCTRL_COUNT	4
> +
>  /* Mailbox sentinel reported for an unavailable temperature sensor */
>  #define TEMP_MBX_INVALID	0xFF
>  
> @@ -986,14 +990,22 @@ static int mbx_temp_decode(u8 value)
>  static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
>  {
>  	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> -	int ret, i, count = 0;
> +	int ret, i, start, end, count = 0;
>  	s32 average = 0;
> +	u32 data = 0;
>  
>  	guard(mutex)(&hwmon->hwmon_lock);
>  
> -	for (i = 0; i < DIV_ROUND_UP(hwmon->temp.count, sizeof(u32)); i++) {
> -		u32 data = 0;
> +	/* CRI relocated the memory controller temperatures to READ_THERMAL_DATA bytes 16..19. */
> +	if (hwmon->xe->info.platform == XE_CRESCENTISLAND) {

we need to be consistent... we either use >= cri everywhere or we use ==... 

> +		start = CRI_TEMP_INDEX_MCTRL;
> +		end = CRI_TEMP_INDEX_MCTRL + CRI_TEMP_MCTRL_COUNT;
> +	} else {
> +		start = TEMP_INDEX_MCTRL;
> +		end = hwmon->temp.count - 1;
> +	}
>  
> +	for (i = start / sizeof(u32); i < DIV_ROUND_UP(end, sizeof(u32)); i++) {
>  		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
>  				    &data, NULL);
>  		if (ret)
> @@ -1002,7 +1014,7 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
>  		hwmon->temp.dword[i] = cpu_to_le32(data);
>  	}
>  
> -	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
> +	for (i = start; i < end; i++) {
>  		if (!mbx_temp_valid(hwmon, hwmon->temp.value[i]))
>  			continue;
>  		average += mbx_temp_decode(hwmon->temp.value[i]);
> -- 
> 2.25.1
> 

  reply	other threads:[~2026-10-14 17:52 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-14 11:57 [PATCH v13 00/16] drm/xe/hwmon: Update hwmon thermal mailbox Karthik Poosa
2026-10-14 11:57 ` [PATCH v13 01/16] drm/xe/hwmon: Fix pcode power limit handling Karthik Poosa
2026-10-14 17:46   ` Rodrigo Vivi
2026-10-14 11:57 ` [PATCH v13 02/16] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude Karthik Poosa
2026-10-14 11:57 ` [PATCH v13 03/16] drm/xe/hwmon: Fix thermal sensor data handling Karthik Poosa
2026-10-14 12:16   ` sashiko-bot
2026-10-14 13:42     ` Poosa, Karthik
2026-10-14 17:49       ` Rodrigo Vivi
2026-10-14 11:57 ` [PATCH v13 04/16] drm/xe/hwmon: Add helpers to validate thermal sensor readings Karthik Poosa
2026-10-14 12:11   ` sashiko-bot
2026-10-14 13:17     ` Poosa, Karthik
2026-10-14 17:51       ` Rodrigo Vivi
2026-10-14 11:57 ` [PATCH v13 05/16] drm/xe/hwmon: Handle unavailable memory controller sensors Karthik Poosa
2026-10-14 11:57 ` [PATCH v13 06/16] drm/xe/hwmon: Detect unavailable PCIe thermal sensors Karthik Poosa
2026-10-14 11:57 ` [PATCH v13 07/16] drm/xe/hwmon: Consolidate temperature sensor availability checks Karthik Poosa
2026-10-14 11:57 ` [PATCH v13 08/16] drm/xe/hwmon: Cache temperature availability to reduce probe time Karthik Poosa
2026-10-14 11:57 ` [PATCH v13 09/16] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers Karthik Poosa
2026-10-14 11:58 ` [PATCH v13 10/16] drm/xe/hwmon: Add platform-aware VRAM thermal channel support Karthik Poosa
2026-10-14 11:58 ` [PATCH v13 11/16] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754 Karthik Poosa
2026-10-14 17:53   ` Rodrigo Vivi
2026-10-14 11:58 ` [PATCH v13 12/16] drm/xe/hwmon: Update memory controller temperature offset for CRI Karthik Poosa
2026-10-14 17:52   ` Rodrigo Vivi [this message]
2026-10-14 19:33     ` Poosa, Karthik
2026-10-14 20:01       ` Rodrigo Vivi
2026-10-14 11:58 ` [PATCH v13 13/16] drm/xe/hwmon: add PCIe temperature support " Karthik Poosa
2026-10-14 11:58 ` [PATCH v13 14/16] drm/xe/hwmon: Simplify temperature channels config Karthik Poosa
2026-10-14 11:58 ` [PATCH v13 15/16] drm/xe: Validate thermal sensor count before reads Karthik Poosa
2026-10-14 17:53   ` Rodrigo Vivi
2026-10-14 11:58 ` [PATCH v13 16/16] drm/xe/hwmon: Propagate all hardware read errors Karthik Poosa
2026-10-14 12:12 ` ✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox Patchwork
2026-10-14 18:40 ` ✓ Xe.CI.BAT: " Patchwork

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