[PATCH v8 00/15] drm/xe/hwmon: Update hwmon thermal mailbox

[PATCH v8 00/15] drm/xe/hwmon: Update hwmon thermal mailbox

[Karthik Poosa]

This series adds CRI-specific temperature sensor handling to the Xe
hwmon implementation and fixes couple of hwmon issues.

CRI platforms may report unavailable temperature sensors and support
a variable number of VRAM temperature channels depending on platform
configuration. This series adds the required sensor presence checks and
uses platform-reported thermal configuration data to expose only valid
temperature-related hwmon attributes.

The series also corrects the telemetry group selection used for memory
controller temperature reporting.

v2:
 - Address review comments from Sashiko, Badal and Raag.
 - Enable IEEE 754 temperature decoding for MMIO temperature registers.
  - Split sensor validity check into mailbox vs MMIO handling; add
    is_temp_available() / is_temp_is_visible().
 - Temporarily disable memory controller and PCIe temperatures on CRI.

v3:
  - Detect unavailable temperature sensors: rephrase a debug log.
  - Decode mailbox temperatures as 8-bit sign-magnitude values instead of
    s8.
  - Use VRAM temperature sensor count from thermal config on CRI: address
    review comments from sashiko-bot@kernel.org and Rodrigo.
  - Decode CRI temperature registers as IEEE-754: reject temperatures that
    overflow long on 32-bit systems.

v4:
  - Address review comments and issues report from Rodrigo and
    sashiko-bot@kernel.org.
  - Decode mailbox temperatures as 8-bit sign-magnitude values.
  - Cache sensor availability during registration.
  - Enable memory controller and pcie sensors for CRI.
  - Derive the VRAM channel count from the CRI MSU enable mask.
  - Use CRI-specific package and VRAM temperature registers.
  - Handle the CRI memory controller and pcie sensor offsets as per CRI.

v5:
 - Remove the unintended IGT prefix from the patch titles.

v6:
 - Address issues reported by sashiko-bot@kernel.org.
 - Add VRAM individual channel CRI_VRAM_TEMPERATURE_N register for CRI.

v7:
 - Address review comments from Rodrigo.
    - Use ret instead of count in patch 1.
    - Return true for platforms without temperature sentinels support.
    - Rename has_mbx_temp_sentinel to has_temp_sentinel.
    - Add a info flag for pcie sensor offset.
    - Simplify temperature channels config.

v8:
 - Address review comment from Sashiko.
 - Revert the unconditional validation of temperature readings on
   non-sentinel platforms.
   This avoids creating spurious VRAM temperature channels when the
   corresponding sensors are unavailable.

Karthik Poosa (15):
  drm/xe/hwmon: Handle pcode read failures of
    xe_hwmon_pcode_rmw_power_limit
  drm/xe/hwmon: Decode mailbox temperature as sign-magnitude
  drm/xe/hwmon: Fix memory controller thermal data handling
  drm/xe/hwmon: Add helpers to validate thermal sensor readings
  drm/xe/hwmon: Handle unavailable memory controller sensors
  drm/xe/hwmon: Detect unavailable PCIe thermal sensors
  drm/xe/hwmon: Consolidate temperature sensor availability checks
  drm/xe/hwmon: Cache temperature availability to reduce probe time
  drm/xe/hwmon: use CRI-specific package and VRAM temperature registers
  drm/xe/hwmon: Add platform-aware VRAM thermal channel support
  drm/xe/hwmon: Decode CRI temperature registers as IEEE-754
  drm/xe/hwmon: Update memory controller temperature offset for CRI
  drm/xe/hwmon: Get PCIe temperature sensor offset from xe info
  drm/xe/hwmon: Add CRI PCIe temperature sensor offset
  drm/xe/hwmon: Simplify temperature channels config

 drivers/gpu/drm/xe/regs/xe_pcode_regs.h |   4 +
 drivers/gpu/drm/xe/xe_device_types.h    |   6 +
 drivers/gpu/drm/xe/xe_hwmon.c           | 436 ++++++++++++++++++------
 drivers/gpu/drm/xe/xe_pci.c             |   9 +
 drivers/gpu/drm/xe/xe_pci_types.h       |   3 +
 drivers/gpu/drm/xe/xe_pcode_api.h       |   2 -
 6 files changed, 360 insertions(+), 100 deletions(-)

-- 
2.25.1

[PATCH v8 01/15] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit

[Karthik Poosa]

Return early when the pcode read operation fails in
xe_hwmon_pcode_rmw_power_limit() and check the returned error in
callers to avoid updating power limit settings with invalid data.

Fixes: 8aa7306631f0 ("drm/xe/hwmon: Fix xe_hwmon_power_max_write")
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---

v2: Use ret for return instead of count in
    xe_hwmon_power_max_interval_store(). (Rodrigo)

v3: Return the error from xe_hwmon_pcode_rmw_power_limit() directly
    instead of mapping all failures to -EIO.

 drivers/gpu/drm/xe/xe_hwmon.c | 22 +++++++++++++++-------
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 5edeac961ec3..9884e06f83e5 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -232,9 +232,11 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
 						  READ_PSYSGPU_POWER_LIMIT :
 						  READ_PACKAGE_POWER_LIMIT,
 						  prepare_power_limit_param2(hwmon)), &val0, &val1);
-	if (ret)
-		drm_dbg(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, val1 0x%08x, ret %d\n",
+	if (ret) {
+		drm_err(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, val1 0x%08x, ret %d\n",
 			channel, val0, val1, ret);
+		return ret;
+	}
 
 	if (attr == PL1_HWMON_ATTR)
 		val0 = (val0 & ~clr) | set;
@@ -394,7 +396,9 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, u32 attr, int channe
 		if (hwmon->xe->info.has_mbx_power_limits) {
 			drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
 				PWR_ATTR_TO_STR(attr), channel);
-			xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN, 0);
+			ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN, 0);
+			if (ret)
+				goto unlock;
 			xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, &reg_val);
 		} else {
 			reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN, 0);
@@ -679,15 +683,19 @@ xe_hwmon_power_max_interval_store(struct device *dev, struct device_attribute *a
 
 	mutex_lock(&hwmon->hwmon_lock);
 
-	if (hwmon->xe->info.has_mbx_power_limits)
-		xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);
-	else
+	ret = count;
+	if (hwmon->xe->info.has_mbx_power_limits) {
+		ret = xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);
+		if (!ret)
+			ret = count;
+	} else {
 		r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel),
 				  PWR_LIM_TIME, rxy);
+	}
 
 	mutex_unlock(&hwmon->hwmon_lock);
 
-	return count;
+	return ret;
 }
 
 /* PSYS PL1 */
-- 
2.25.1

Re: [PATCH v8 01/15] drm/xe/hwmon: Handle pcode read failures of xe_hwmon_pcode_rmw_power_limit

[Rodrigo Vivi]

On Tue, Oct 06, 2026 at 09:05:20AM +0530, Karthik Poosa wrote:
> Return early when the pcode read operation fails in
> xe_hwmon_pcode_rmw_power_limit() and check the returned error in
> callers to avoid updating power limit settings with invalid data.
> 
> Fixes: 8aa7306631f0 ("drm/xe/hwmon: Fix xe_hwmon_power_max_write")
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
> 
> v2: Use ret for return instead of count in
>     xe_hwmon_power_max_interval_store(). (Rodrigo)
> 
> v3: Return the error from xe_hwmon_pcode_rmw_power_limit() directly
>     instead of mapping all failures to -EIO.
> 
>  drivers/gpu/drm/xe/xe_hwmon.c | 22 +++++++++++++++-------
>  1 file changed, 15 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 5edeac961ec3..9884e06f83e5 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -232,9 +232,11 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
>  						  READ_PSYSGPU_POWER_LIMIT :
>  						  READ_PACKAGE_POWER_LIMIT,
>  						  prepare_power_limit_param2(hwmon)), &val0, &val1);
> -	if (ret)
> -		drm_dbg(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, val1 0x%08x, ret %d\n",
> +	if (ret) {
> +		drm_err(&hwmon->xe->drm, "read failed ch %d val0 0x%08x, val1 0x%08x, ret %d\n",
>  			channel, val0, val1, ret);
> +		return ret;
> +	}
>  
>  	if (attr == PL1_HWMON_ATTR)
>  		val0 = (val0 & ~clr) | set;
> @@ -394,7 +396,9 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, u32 attr, int channe
>  		if (hwmon->xe->info.has_mbx_power_limits) {
>  			drm_dbg(&hwmon->xe->drm, "disabling %s on channel %d\n",
>  				PWR_ATTR_TO_STR(attr), channel);
> -			xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN, 0);
> +			ret = xe_hwmon_pcode_rmw_power_limit(hwmon, attr, channel, PWR_LIM_EN, 0);
> +			if (ret)
> +				goto unlock;
>  			xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, &reg_val);
>  		} else {
>  			reg_val = xe_mmio_rmw32(mmio, rapl_limit, PWR_LIM_EN, 0);
> @@ -679,15 +683,19 @@ xe_hwmon_power_max_interval_store(struct device *dev, struct device_attribute *a
>  
>  	mutex_lock(&hwmon->hwmon_lock);
>  
> -	if (hwmon->xe->info.has_mbx_power_limits)
> -		xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);
> -	else
> +	ret = count;
> +	if (hwmon->xe->info.has_mbx_power_limits) {
> +		ret = xe_hwmon_pcode_rmw_power_limit(hwmon, power_attr, channel, PWR_LIM_TIME, rxy);
> +		if (!ret)
> +			ret = count;
> +	} else {
>  		r = xe_mmio_rmw32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel),
>  				  PWR_LIM_TIME, rxy);
> +	}
>  
>  	mutex_unlock(&hwmon->hwmon_lock);
>  
> -	return count;
> +	return ret;
>  }
>  
>  /* PSYS PL1 */
> -- 
> 2.25.1
> 

[PATCH v8 02/15] drm/xe/hwmon: Decode mailbox temperature as sign-magnitude

[Karthik Poosa]

The mailbox temperature is an 8-bit sign-magnitude value (bit 7 sign,
bits 6:0 magnitude, range -127..127), not two's-complement. Casting the
raw byte to s8 decodes negative readings incorrectly.

Add mbx_temp_decode(), store the raw byte as u8, and use it in
get_mc_temp() and get_pcie_temp() so temperatures are decoded correctly.

Fixes: 3a0cb885e111 ("drm/xe/hwmon: Expose memory controller temperature")
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 9884e06f83e5..c63aa708ab6f 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -104,6 +104,10 @@ enum sensor_attr_power {
 /* Index of memory controller in READ_THERMAL_DATA output */
 #define TEMP_INDEX_MCTRL	2
 
+/* Mailbox temperature is sign-magnitude: bit 7 sign, bits 6:0 magnitude. */
+#define TEMP_MBX_SIGN		BIT(7)
+#define TEMP_MBX_MAG		GENMASK(6, 0)
+
 /* Maximum characters in hwmon label name */
 #define MAX_LABEL_SIZE		16
 
@@ -139,8 +143,8 @@ struct xe_hwmon_thermal_info {
 	};
 	/** @count: no of temperature sensors available for the platform */
 	u8 count;
-	/** @value: signed value from each sensor */
-	s8 value[U8_MAX];
+	/** @value: per-sensor raw mailbox temperature; bit7=sign, bits6:0=magnitude */
+	u8 value[U8_MAX];
 	/** @vram_label: vram label names */
 	char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
 };
@@ -816,6 +820,14 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
 	return ret;
 }
 
+/* Decode an 8-bit sign-magnitude mailbox temperature to degrees Celsius. */
+static int mbx_temp_decode(u8 value)
+{
+	int temp = value & TEMP_MBX_MAG;
+
+	return (value & TEMP_MBX_SIGN) ? -temp : temp;
+}
+
 static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
@@ -832,7 +844,7 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 	}
 
 	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
-		average += hwmon->temp.value[i];
+		average += mbx_temp_decode(hwmon->temp.value[i]);
 
 	average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
 	*val = average * MILLIDEGREE_PER_DEGREE;
@@ -855,7 +867,7 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
 		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
 
 	data = REG_FIELD_GET(TEMP_MASK, data);
-	*val = (s8)data * MILLIDEGREE_PER_DEGREE;
+	*val = mbx_temp_decode(data) * MILLIDEGREE_PER_DEGREE;
 
 	return 0;
 }
-- 
2.25.1

[PATCH v8 03/15] drm/xe/hwmon: Fix memory controller thermal data handling

[Karthik Poosa]

Read all required thermal groups in get_mc_temp() and use an aligned
u32 buffer for PCODE accesses to avoid unaligned memory accesses and
ensure correct MC temperature reporting.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Fixes: 3a0cb885e111 ("drm/xe/hwmon: Expose memory controller temperature")
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index c63aa708ab6f..33d0ca7d86e4 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -143,8 +143,12 @@ struct xe_hwmon_thermal_info {
 	};
 	/** @count: no of temperature sensors available for the platform */
 	u8 count;
-	/** @value: per-sensor raw mailbox temperature; bit7=sign, bits6:0=magnitude */
-	u8 value[U8_MAX];
+	union {
+		/** @value: per-sensor raw mailbox temperature; bit7=sign, bits6:0=magnitude */
+		u8 value[U8_MAX + 1];
+		/** @dword: sensor values as dwords, u32-aligned for pcode reads */
+		u32 dword[DIV_ROUND_UP(U8_MAX + 1, sizeof(u32))];
+	};
 	/** @vram_label: vram label names */
 	char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
 };
@@ -831,16 +835,16 @@ static int mbx_temp_decode(u8 value)
 static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
-	u32 *dword = (u32 *)hwmon->temp.value;
 	s32 average = 0;
 	int ret, i;
 
-	for (i = 0; i < DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32)); i++) {
+	for (i = 0; i < DIV_ROUND_UP(hwmon->temp.count, sizeof(u32)); i++) {
 		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
-				    (dword + i), NULL);
+				    &hwmon->temp.dword[i], NULL);
 		if (ret)
 			return ret;
-		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i, dword[i]);
+		drm_dbg(&hwmon->xe->drm, "thermal data for group %d val 0x%x\n", i,
+			hwmon->temp.dword[i]);
 	}
 
 	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
-- 
2.25.1

[PATCH v8 04/15] drm/xe/hwmon: Add helpers to validate thermal sensor readings

[Karthik Poosa]

Add mmio_temp_valid() and mbx_temp_valid() to check whether a temperature
sensor reading is valid. An MMIO value of 0xFFFFFFFF or a mailbox value of
0xFF indicates the sensor is unavailable.

Gate these checks behind has_temp_sentinel, enabled on CRI currently.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---

v2:
 - Rename info.has_mbx_temp_sentinel to has_temp_sentinel. (Rodrigo)
 - Return true from mmio_temp_valid() and mbx_temp_valid() for platforms
   not having support for temperature sentinels. (Rodrigo)

v3:
 - Revert the unconditional validation of temperature readings on
   non-sentinel platforms.
   This avoids creating spurious VRAM temperature channels when the
   corresponding sensors are unavailable.

 drivers/gpu/drm/xe/xe_device_types.h |  2 ++
 drivers/gpu/drm/xe/xe_hwmon.c        | 20 ++++++++++++++++++++
 drivers/gpu/drm/xe/xe_pci.c          |  2 ++
 drivers/gpu/drm/xe/xe_pci_types.h    |  1 +
 4 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 4e0e1bc040c1..beb0ceaabb3f 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -227,6 +227,8 @@ struct xe_device {
 		u8 has_sriov:1;
 		/** @info.has_sysctrl: Supports System Controller */
 		u8 has_sysctrl:1;
+		/** @info.has_temp_sentinel: Device has temperature-unavailable sentinels */
+		u8 has_temp_sentinel:1;
 		/** @info.has_usm: Device has unified shared memory support */
 		u8 has_usm:1;
 		/** @info.has_64bit_timestamp: Device supports 64-bit timestamps */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 33d0ca7d86e4..5bbcb81529db 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -104,6 +104,9 @@ enum sensor_attr_power {
 /* Index of memory controller in READ_THERMAL_DATA output */
 #define TEMP_INDEX_MCTRL	2
 
+/* Mailbox sentinel reported for an unavailable temperature sensor */
+#define TEMP_MBX_INVALID	0xFF
+
 /* Mailbox temperature is sign-magnitude: bit 7 sign, bits 6:0 magnitude. */
 #define TEMP_MBX_SIGN		BIT(7)
 #define TEMP_MBX_MAG		GENMASK(6, 0)
@@ -824,6 +827,23 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
 	return ret;
 }
 
+static inline bool mmio_temp_valid(const struct xe_hwmon *hwmon, u32 value)
+{
+	/*
+	 * On platforms lacking temperature sentinel support, a value of 0 is treated
+	 * as invalid. While 0°C is theoretically possible, it is highly unlikely for
+	 * a discrete GPU in normal environments, making it a reasonable fallback
+	 * indicator for invalid or uninitialized temperature readings.
+	 */
+	return hwmon->xe->info.has_temp_sentinel ? value != U32_MAX : value != 0;
+}
+
+/* Mailbox temperature is sign-magnitude (bit 7 sign, bits 6:0 magnitude). */
+static inline bool mbx_temp_valid(const struct xe_hwmon *hwmon, u8 value)
+{
+	return hwmon->xe->info.has_temp_sentinel ? value != TEMP_MBX_INVALID : value != 0;
+}
+
 /* Decode an 8-bit sign-magnitude mailbox temperature to degrees Celsius. */
 static int mbx_temp_decode(u8 value)
 {
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index e44b74b9aa27..111d0aa45b10 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -486,6 +486,7 @@ static const struct xe_device_desc cri_desc = {
 	.has_soc_remapper_telem = true,
 	.has_sriov = true,
 	.has_sysctrl = true,
+	.has_temp_sentinel = true,
 	.max_gt_per_tile = 2,
 	MULTI_LRC_MASK,
 	.require_force_probe = true,
@@ -817,6 +818,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
 		desc->has_sriov;
 	xe->info.has_sysctrl = desc->has_sysctrl;
+	xe->info.has_temp_sentinel = desc->has_temp_sentinel;
 	xe->info.skip_guc_pc = desc->skip_guc_pc;
 	xe->info.skip_pcode = desc->skip_pcode;
 	xe->info.needs_scratch = desc->needs_scratch;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 448bbe5ba1d7..15eedac8467a 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -61,6 +61,7 @@ struct xe_device_desc {
 	u8 has_soc_remapper_telem:1;
 	u8 has_sriov:1;
 	u8 has_sysctrl:1;
+	u8 has_temp_sentinel:1;
 	u8 needs_scratch:1;
 	u8 skip_guc_pc:1;
 	u8 skip_pcode:1;
-- 
2.25.1

Re: [PATCH v8 04/15] drm/xe/hwmon: Add helpers to validate thermal sensor readings

[Rodrigo Vivi]

On Tue, Oct 06, 2026 at 09:05:23AM +0530, Karthik Poosa wrote:
> Add mmio_temp_valid() and mbx_temp_valid() to check whether a temperature
> sensor reading is valid. An MMIO value of 0xFFFFFFFF or a mailbox value of
> 0xFF indicates the sensor is unavailable.
> 
> Gate these checks behind has_temp_sentinel, enabled on CRI currently.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> 
> v2:
>  - Rename info.has_mbx_temp_sentinel to has_temp_sentinel. (Rodrigo)
>  - Return true from mmio_temp_valid() and mbx_temp_valid() for platforms
>    not having support for temperature sentinels. (Rodrigo)
> 
> v3:
>  - Revert the unconditional validation of temperature readings on
>    non-sentinel platforms.
>    This avoids creating spurious VRAM temperature channels when the
>    corresponding sensors are unavailable.

my rv-b remains

> 
>  drivers/gpu/drm/xe/xe_device_types.h |  2 ++
>  drivers/gpu/drm/xe/xe_hwmon.c        | 20 ++++++++++++++++++++
>  drivers/gpu/drm/xe/xe_pci.c          |  2 ++
>  drivers/gpu/drm/xe/xe_pci_types.h    |  1 +
>  4 files changed, 25 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 4e0e1bc040c1..beb0ceaabb3f 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -227,6 +227,8 @@ struct xe_device {
>  		u8 has_sriov:1;
>  		/** @info.has_sysctrl: Supports System Controller */
>  		u8 has_sysctrl:1;
> +		/** @info.has_temp_sentinel: Device has temperature-unavailable sentinels */
> +		u8 has_temp_sentinel:1;
>  		/** @info.has_usm: Device has unified shared memory support */
>  		u8 has_usm:1;
>  		/** @info.has_64bit_timestamp: Device supports 64-bit timestamps */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 33d0ca7d86e4..5bbcb81529db 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -104,6 +104,9 @@ enum sensor_attr_power {
>  /* Index of memory controller in READ_THERMAL_DATA output */
>  #define TEMP_INDEX_MCTRL	2
>  
> +/* Mailbox sentinel reported for an unavailable temperature sensor */
> +#define TEMP_MBX_INVALID	0xFF
> +
>  /* Mailbox temperature is sign-magnitude: bit 7 sign, bits 6:0 magnitude. */
>  #define TEMP_MBX_SIGN		BIT(7)
>  #define TEMP_MBX_MAG		GENMASK(6, 0)
> @@ -824,6 +827,23 @@ static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>  	return ret;
>  }
>  
> +static inline bool mmio_temp_valid(const struct xe_hwmon *hwmon, u32 value)
> +{
> +	/*
> +	 * On platforms lacking temperature sentinel support, a value of 0 is treated
> +	 * as invalid. While 0°C is theoretically possible, it is highly unlikely for
> +	 * a discrete GPU in normal environments, making it a reasonable fallback
> +	 * indicator for invalid or uninitialized temperature readings.
> +	 */
> +	return hwmon->xe->info.has_temp_sentinel ? value != U32_MAX : value != 0;
> +}
> +
> +/* Mailbox temperature is sign-magnitude (bit 7 sign, bits 6:0 magnitude). */
> +static inline bool mbx_temp_valid(const struct xe_hwmon *hwmon, u8 value)
> +{
> +	return hwmon->xe->info.has_temp_sentinel ? value != TEMP_MBX_INVALID : value != 0;
> +}
> +
>  /* Decode an 8-bit sign-magnitude mailbox temperature to degrees Celsius. */
>  static int mbx_temp_decode(u8 value)
>  {
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index e44b74b9aa27..111d0aa45b10 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -486,6 +486,7 @@ static const struct xe_device_desc cri_desc = {
>  	.has_soc_remapper_telem = true,
>  	.has_sriov = true,
>  	.has_sysctrl = true,
> +	.has_temp_sentinel = true,
>  	.max_gt_per_tile = 2,
>  	MULTI_LRC_MASK,
>  	.require_force_probe = true,
> @@ -817,6 +818,7 @@ static int xe_info_init_early(struct xe_device *xe,
>  	xe->info.has_sriov = xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.dev)) &&
>  		desc->has_sriov;
>  	xe->info.has_sysctrl = desc->has_sysctrl;
> +	xe->info.has_temp_sentinel = desc->has_temp_sentinel;
>  	xe->info.skip_guc_pc = desc->skip_guc_pc;
>  	xe->info.skip_pcode = desc->skip_pcode;
>  	xe->info.needs_scratch = desc->needs_scratch;
> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
> index 448bbe5ba1d7..15eedac8467a 100644
> --- a/drivers/gpu/drm/xe/xe_pci_types.h
> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
> @@ -61,6 +61,7 @@ struct xe_device_desc {
>  	u8 has_soc_remapper_telem:1;
>  	u8 has_sriov:1;
>  	u8 has_sysctrl:1;
> +	u8 has_temp_sentinel:1;
>  	u8 needs_scratch:1;
>  	u8 skip_guc_pc:1;
>  	u8 skip_pcode:1;
> -- 
> 2.25.1
> 

[PATCH v8 05/15] drm/xe/hwmon: Handle unavailable memory controller sensors

[Karthik Poosa]

Skip memory controller sensors that report invalid readings when
computing the average temperature in get_mc_temp(). Return -ENXIO when
no valid sensor data is available, and allow the helper to be used as
an availability probe by making the output parameter optional.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Fixes: 3a0cb885e111 ("drm/xe/hwmon: Expose memory controller temperature")
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 5bbcb81529db..89e47d013dc6 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -855,8 +855,8 @@ static int mbx_temp_decode(u8 value)
 static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+	int ret, i, count = 0;
 	s32 average = 0;
-	int ret, i;
 
 	for (i = 0; i < DIV_ROUND_UP(hwmon->temp.count, sizeof(u32)); i++) {
 		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
@@ -867,11 +867,23 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 			hwmon->temp.dword[i]);
 	}
 
-	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++)
+	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
+		if (!mbx_temp_valid(hwmon, hwmon->temp.value[i]))
+			continue;
 		average += mbx_temp_decode(hwmon->temp.value[i]);
+		count++;
+	}
+
+	if (!count) {
+		drm_dbg(&hwmon->xe->drm, "Memory controller temperature unavailable!\n");
+		return -ENXIO;
+	}
+
+	average /= count;
+
+	if (val)
+		*val = average * MILLIDEGREE_PER_DEGREE;
 
-	average /= (hwmon->temp.count - TEMP_INDEX_MCTRL - 1);
-	*val = average * MILLIDEGREE_PER_DEGREE;
 	return 0;
 }
 
-- 
2.25.1

[PATCH v8 06/15] drm/xe/hwmon: Detect unavailable PCIe thermal sensors

[Karthik Poosa]

Return -ENXIO from get_pcie_temp() when the mailbox reports an invalid
reading, so the PCIe sensor can be treated as unavailable. Guard the val
store so the function can be used purely as an availability probe. No
sysfs visibility changes.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 89e47d013dc6..accccadbe3e6 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -903,7 +903,13 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
 		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
 
 	data = REG_FIELD_GET(TEMP_MASK, data);
-	*val = mbx_temp_decode(data) * MILLIDEGREE_PER_DEGREE;
+	if (!mbx_temp_valid(hwmon, data)) {
+		drm_dbg(&hwmon->xe->drm, "PCIe temperature not available\n");
+		return -ENXIO;
+	}
+
+	if (val)
+		*val = mbx_temp_decode(data) * MILLIDEGREE_PER_DEGREE;
 
 	return 0;
 }
-- 
2.25.1

[PATCH v8 07/15] drm/xe/hwmon: Consolidate temperature sensor availability checks

[Karthik Poosa]

Replace is_vram_ch_available() with a generalized is_temp_available()
that validates PKG, VRAM, per-channel VRAM, memory controller and PCIe
sensors using the new validity helpers. Rename the existing callers to
the new helper.

Use is_temp_available() from xe_hwmon_temp_is_visible() so attributes for
sensors that are not present are not exposed during hwmon registration.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Assisted-by: LLM
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 64 ++++++++++++++++++++++-------------
 1 file changed, 40 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index accccadbe3e6..62e341ef37e9 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -1008,19 +1008,39 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
 	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
 }
 
-static inline bool is_vram_ch_available(struct xe_hwmon *hwmon, int channel)
+static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
 {
 	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
-	int vram_id = channel - CHANNEL_VRAM_N;
-	struct xe_reg vram_reg;
+	struct xe_reg reg;
+	u32 reg_val;
 
-	vram_reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
-	if (!xe_reg_is_valid(vram_reg) || !xe_mmio_read32(mmio, vram_reg))
-		return false;
+	switch (channel) {
+	case CHANNEL_PKG:
+	case CHANNEL_VRAM:
+	case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
+		reg = xe_hwmon_get_reg(hwmon, REG_TEMP, channel);
+		if (!xe_reg_is_valid(reg))
+			return false;
+
+		reg_val = xe_mmio_read32(mmio, reg);
+		if (!mmio_temp_valid(hwmon, reg_val)) {
+			drm_dbg(&hwmon->xe->drm,
+				"channel %d temperature unavailable, val 0x%x\n", channel, reg_val);
+			return false;
+		}
+
+		if (channel >= CHANNEL_VRAM_N)
+			sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N],
+				"vram_ch_%d", channel - CHANNEL_VRAM_N);
 
-	/* Create label only for available vram channel */
-	sprintf(hwmon->temp.vram_label[vram_id], "vram_ch_%d", vram_id);
-	return true;
+		return true;
+	case CHANNEL_MCTRL:
+		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
+	case CHANNEL_PCIE:
+		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
+	default:
+		return false;
+	}
 }
 
 static umode_t
@@ -1030,14 +1050,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	case hwmon_temp_emergency:
 		switch (channel) {
 		case CHANNEL_PKG:
-			return hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN] ? 0444 : 0;
-		case CHANNEL_VRAM:
-			return hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN] ? 0444 : 0;
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return hwmon->temp.count ? 0444 : 0;
+			return (is_temp_available(hwmon, channel) &&
+				hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN]) ? 0444 : 0;
+		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return (is_vram_ch_available(hwmon, channel) &&
+			return (is_temp_available(hwmon, channel) &&
 				hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]) ? 0444 : 0;
 		default:
 			return 0;
@@ -1045,14 +1064,13 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	case hwmon_temp_crit:
 		switch (channel) {
 		case CHANNEL_PKG:
-			return hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT] ? 0444 : 0;
-		case CHANNEL_VRAM:
-			return hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT] ? 0444 : 0;
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return hwmon->temp.count ? 0444 : 0;
+			return (is_temp_available(hwmon, channel) &&
+				hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT]) ? 0444 : 0;
+		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return (is_vram_ch_available(hwmon, channel) &&
+			return (is_temp_available(hwmon, channel) &&
 				hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]) ? 0444 : 0;
 		default:
 			return 0;
@@ -1060,7 +1078,8 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	case hwmon_temp_max:
 		switch (channel) {
 		case CHANNEL_PKG:
-			return hwmon->temp.limit[TEMP_LIMIT_PKG_MAX] ? 0444 : 0;
+			return (is_temp_available(hwmon, channel) &&
+				hwmon->temp.limit[TEMP_LIMIT_PKG_MAX]) ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -1069,13 +1088,10 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		switch (channel) {
 		case CHANNEL_PKG:
 		case CHANNEL_VRAM:
-			return xe_reg_is_valid(xe_hwmon_get_reg(hwmon, REG_TEMP,
-								channel)) ? 0444 : 0;
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return hwmon->temp.count ? 0444 : 0;
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return is_vram_ch_available(hwmon, channel) ? 0444 : 0;
+			return is_temp_available(hwmon, channel) ? 0444 : 0;
 		default:
 			return 0;
 		}
-- 
2.25.1

[PATCH v8 08/15] drm/xe/hwmon: Cache temperature availability to reduce probe time

[Karthik Poosa]

Avoid probing temperature sensor availability from the hwmon is_visible()
callback. For MCTRL and PCIe channels, that path can trigger repeated
blocking mailbox reads while sysfs attributes are being created, increasing
probe time and making attribute creation sensitive to transient failures.

Probe temperature availability once during preregistration and cache the
result for subsequent visibility checks.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Assisted-by: LLM
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 39 +++++++++++++++++++++++------------
 1 file changed, 26 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 62e341ef37e9..b8682eb233e4 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -146,6 +146,8 @@ struct xe_hwmon_thermal_info {
 	};
 	/** @count: no of temperature sensors available for the platform */
 	u8 count;
+	/** @available: temperature sensor availability cached at registration */
+	bool available[CHANNEL_MAX];
 	union {
 		/** @value: per-sensor raw mailbox temperature; bit7=sign, bits6:0=magnitude */
 		u8 value[U8_MAX + 1];
@@ -1008,7 +1010,7 @@ static void xe_hwmon_get_voltage(struct xe_hwmon *hwmon, int channel, long *valu
 	*value = DIV_ROUND_CLOSEST(REG_FIELD_GET(VOLTAGE_MASK, reg_val) * 2500, SF_VOLTAGE);
 }
 
-static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
+static bool xe_hwmon_temp_probe(struct xe_hwmon *hwmon, int channel)
 {
 	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
 	struct xe_reg reg;
@@ -1029,10 +1031,6 @@ static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
 			return false;
 		}
 
-		if (channel >= CHANNEL_VRAM_N)
-			sprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N],
-				"vram_ch_%d", channel - CHANNEL_VRAM_N);
-
 		return true;
 	case CHANNEL_MCTRL:
 		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
@@ -1043,6 +1041,22 @@ static bool is_temp_available(struct xe_hwmon *hwmon, int channel)
 	}
 }
 
+static void xe_hwmon_init_temp_info(struct xe_hwmon *hwmon)
+{
+	int channel;
+
+	if (hwmon->xe->info.has_mbx_thermal_info && xe_hwmon_pcode_read_thermal_info(hwmon))
+		drm_warn(&hwmon->xe->drm, "Thermal mailbox not supported by card firmware\n");
+
+	for (channel = 0; channel < CHANNEL_MAX; channel++) {
+		hwmon->temp.available[channel] = xe_hwmon_temp_probe(hwmon, channel);
+		if (hwmon->temp.available[channel] &&
+		    in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+			snprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], MAX_LABEL_SIZE,
+				 "vram_ch_%d", channel - CHANNEL_VRAM_N);
+	}
+}
+
 static umode_t
 xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 {
@@ -1052,11 +1066,11 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_PKG:
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return (is_temp_available(hwmon, channel) &&
+			return (hwmon->temp.available[channel] &&
 				hwmon->temp.limit[TEMP_LIMIT_PKG_SHUTDOWN]) ? 0444 : 0;
 		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return (is_temp_available(hwmon, channel) &&
+			return (hwmon->temp.available[channel] &&
 				hwmon->temp.limit[TEMP_LIMIT_MEM_SHUTDOWN]) ? 0444 : 0;
 		default:
 			return 0;
@@ -1066,11 +1080,11 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_PKG:
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
-			return (is_temp_available(hwmon, channel) &&
+			return (hwmon->temp.available[channel] &&
 				hwmon->temp.limit[TEMP_LIMIT_PKG_CRIT]) ? 0444 : 0;
 		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return (is_temp_available(hwmon, channel) &&
+			return (hwmon->temp.available[channel] &&
 				hwmon->temp.limit[TEMP_LIMIT_MEM_CRIT]) ? 0444 : 0;
 		default:
 			return 0;
@@ -1078,7 +1092,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	case hwmon_temp_max:
 		switch (channel) {
 		case CHANNEL_PKG:
-			return (is_temp_available(hwmon, channel) &&
+			return (hwmon->temp.available[channel] &&
 				hwmon->temp.limit[TEMP_LIMIT_PKG_MAX]) ? 0444 : 0;
 		default:
 			return 0;
@@ -1091,7 +1105,7 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 		case CHANNEL_MCTRL:
 		case CHANNEL_PCIE:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
-			return is_temp_available(hwmon, channel) ? 0444 : 0;
+			return hwmon->temp.available[channel] ? 0444 : 0;
 		default:
 			return 0;
 		}
@@ -1633,8 +1647,7 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
 		if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
 			xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
 
-	if (hwmon->xe->info.has_mbx_thermal_info && xe_hwmon_pcode_read_thermal_info(hwmon))
-		drm_warn(&hwmon->xe->drm, "Thermal mailbox not supported by card firmware\n");
+	xe_hwmon_init_temp_info(hwmon);
 }
 
 int xe_hwmon_register(struct xe_device *xe)
-- 
2.25.1

[PATCH v8 09/15] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers

[Karthik Poosa]

Crescent Island uses different MMIO offsets for package and VRAM
temperature than Battlemage. Add CRI-specific register definitions
and select them in xe_hwmon_get_reg() for REG_TEMP handling.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_pcode_regs.h | 3 +++
 drivers/gpu/drm/xe/xe_hwmon.c           | 9 ++++++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
index c63b409d7a82..a969661f0c95 100644
--- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
@@ -28,6 +28,9 @@
 #define BMG_PACKAGE_TEMPERATURE			XE_REG(0x138434)
 
 #define CRI_PACKAGE_ENERGY_STATUS		XE_REG(0x138120)
+#define CRI_PACKAGE_TEMPERATURE			XE_REG(0x138344)
+#define CRI_VRAM_TEMPERATURE			XE_REG(0x138348)
 #define CRI_PLATFORM_ENERGY_STATUS		XE_REG(0x138458)
+#define CRI_VRAM_TEMPERATURE_N(n)		XE_REG(0x138a00 + ((n) * (sizeof(u32))))
 
 #endif /* _XE_PCODE_REGS_H_ */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index b8682eb233e4..bafa175f8457 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -276,7 +276,14 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
 
 	switch (hwmon_reg) {
 	case REG_TEMP:
-		if (xe->info.platform == XE_BATTLEMAGE || xe->info.platform == XE_CRESCENTISLAND) {
+		if (xe->info.platform == XE_CRESCENTISLAND) {
+			if (channel == CHANNEL_PKG)
+				return CRI_PACKAGE_TEMPERATURE;
+			else if (channel == CHANNEL_VRAM)
+				return CRI_VRAM_TEMPERATURE;
+			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+				return CRI_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
+		} else if (xe->info.platform == XE_BATTLEMAGE) {
 			if (channel == CHANNEL_PKG)
 				return BMG_PACKAGE_TEMPERATURE;
 			else if (channel == CHANNEL_VRAM)
-- 
2.25.1

Re: [PATCH v8 09/15] drm/xe/hwmon: use CRI-specific package and VRAM temperature registers

[Rodrigo Vivi]

On Tue, Oct 06, 2026 at 09:05:28AM +0530, Karthik Poosa wrote:
> Crescent Island uses different MMIO offsets for package and VRAM
> temperature than Battlemage. Add CRI-specific register definitions
> and select them in xe_hwmon_get_reg() for REG_TEMP handling.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_pcode_regs.h | 3 +++
>  drivers/gpu/drm/xe/xe_hwmon.c           | 9 ++++++++-
>  2 files changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> index c63b409d7a82..a969661f0c95 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> @@ -28,6 +28,9 @@
>  #define BMG_PACKAGE_TEMPERATURE			XE_REG(0x138434)
>  
>  #define CRI_PACKAGE_ENERGY_STATUS		XE_REG(0x138120)
> +#define CRI_PACKAGE_TEMPERATURE			XE_REG(0x138344)
> +#define CRI_VRAM_TEMPERATURE			XE_REG(0x138348)
>  #define CRI_PLATFORM_ENERGY_STATUS		XE_REG(0x138458)
> +#define CRI_VRAM_TEMPERATURE_N(n)		XE_REG(0x138a00 + ((n) * (sizeof(u32))))
>  
>  #endif /* _XE_PCODE_REGS_H_ */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index b8682eb233e4..bafa175f8457 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -276,7 +276,14 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>  
>  	switch (hwmon_reg) {
>  	case REG_TEMP:
> -		if (xe->info.platform == XE_BATTLEMAGE || xe->info.platform == XE_CRESCENTISLAND) {
> +		if (xe->info.platform == XE_CRESCENTISLAND) {
> +			if (channel == CHANNEL_PKG)
> +				return CRI_PACKAGE_TEMPERATURE;
> +			else if (channel == CHANNEL_VRAM)
> +				return CRI_VRAM_TEMPERATURE;
> +			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
> +				return CRI_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
> +		} else if (xe->info.platform == XE_BATTLEMAGE) {
>  			if (channel == CHANNEL_PKG)
>  				return BMG_PACKAGE_TEMPERATURE;
>  			else if (channel == CHANNEL_VRAM)
> -- 
> 2.25.1
> 

[PATCH v8 10/15] drm/xe/hwmon: Add platform-aware VRAM thermal channel support

[Karthik Poosa]

On CRI, derive the number of available VRAM temperature channels from the
CRI_MSU_VRAM_ENABLE register, where each enabled MSU contributes
VRAM_CHANNELS_PER_MSU channels.
 
Increase the maximum supported VRAM channel count to 80 and use the
derived count to control VRAM sensor enumeration, channel access, and
VRAM label allocation. Add a has_fixed_vram_channels platform flag to
preserve the existing fixed-channel behavior on non-CRI platforms.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_pcode_regs.h |   1 +
 drivers/gpu/drm/xe/xe_device_types.h    |   2 +
 drivers/gpu/drm/xe/xe_hwmon.c           | 164 +++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_pci.c             |   2 +
 drivers/gpu/drm/xe/xe_pci_types.h       |   1 +
 5 files changed, 154 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
index a969661f0c95..d9e4847dd68e 100644
--- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
@@ -28,6 +28,7 @@
 #define BMG_PACKAGE_TEMPERATURE			XE_REG(0x138434)
 
 #define CRI_PACKAGE_ENERGY_STATUS		XE_REG(0x138120)
+#define CRI_MSU_VRAM_ENABLE			XE_REG(0x138340)
 #define CRI_PACKAGE_TEMPERATURE			XE_REG(0x138344)
 #define CRI_VRAM_TEMPERATURE			XE_REG(0x138348)
 #define CRI_PLATFORM_ENERGY_STATUS		XE_REG(0x138458)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index beb0ceaabb3f..161ba2b27f47 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -185,6 +185,8 @@ struct xe_device {
 		u8 has_drm_ras:1;
 		/** @info.has_fan_control: Device supports fan control */
 		u8 has_fan_control:1;
+		/** @info.has_fixed_vram_channels: Device has fixed VRAM temperature channels */
+		u8 has_fixed_vram_channels:1;
 		/** @info.has_flat_ccs: Whether flat CCS metadata is used */
 		u8 has_flat_ccs:1;
 		/** @info.has_gsc_nvm: Device has gsc non-volatile memory */
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index bafa175f8457..9d83d9d2286e 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -39,7 +39,11 @@ enum xe_hwmon_reg_operation {
 	REG_READ64,
 };
 
-#define MAX_VRAM_CHANNELS      (16)
+#define MAX_VRAM_CHANNELS	80
+#define FIXED_VRAM_CHANNELS	16
+
+/* Each MSU enable bit maps to one VRAM subsystem of 4 channels. */
+#define VRAM_CHANNELS_PER_MSU	4
 
 enum xe_hwmon_channel {
 	CHANNEL_CARD,
@@ -48,6 +52,7 @@ enum xe_hwmon_channel {
 	CHANNEL_MCTRL,
 	CHANNEL_PCIE,
 	CHANNEL_VRAM_N,
+	/* Compile-time upper bound; actual channel count is hwmon->temp.vram_count */
 	CHANNEL_VRAM_N_MAX = CHANNEL_VRAM_N + MAX_VRAM_CHANNELS - 1,
 	CHANNEL_MAX,
 };
@@ -144,18 +149,22 @@ struct xe_hwmon_thermal_info {
 		/** @data: temperature limits in dwords */
 		u32 data[DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32))];
 	};
-	/** @count: no of temperature sensors available for the platform */
+	/** @count: temperature sensors count from READ_THERMAL_CONFIG */
 	u8 count;
+	/** @vram_count: exclusive upper bound for VRAM temperature channel indices */
+	u8 vram_count;
 	/** @available: temperature sensor availability cached at registration */
 	bool available[CHANNEL_MAX];
+	/** @msu_mask: VRAM subsystem enable mask read from MMIO */
+	u32 msu_mask;
 	union {
 		/** @value: per-sensor raw mailbox temperature; bit7=sign, bits6:0=magnitude */
 		u8 value[U8_MAX + 1];
 		/** @dword: sensor values as dwords, u32-aligned for pcode reads */
 		u32 dword[DIV_ROUND_UP(U8_MAX + 1, sizeof(u32))];
 	};
-	/** @vram_label: vram label names */
-	char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
+	/** @vram_label: vram label names, dynamically allocated based on vram_count */
+	char (*vram_label)[MAX_LABEL_SIZE];
 };
 
 /**
@@ -269,6 +278,14 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
 	return ret;
 }
 
+static bool xe_hwmon_vram_channel_enabled(const struct xe_hwmon *hwmon, int index)
+{
+	if (hwmon->xe->info.platform == XE_CRESCENTISLAND)
+		return hwmon->temp.msu_mask & BIT(index / VRAM_CHANNELS_PER_MSU);
+
+	return true;
+}
+
 static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg hwmon_reg,
 				      int channel)
 {
@@ -281,14 +298,16 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
 				return CRI_PACKAGE_TEMPERATURE;
 			else if (channel == CHANNEL_VRAM)
 				return CRI_VRAM_TEMPERATURE;
-			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count) &&
+				 xe_hwmon_vram_channel_enabled(hwmon, channel - CHANNEL_VRAM_N))
 				return CRI_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
 		} else if (xe->info.platform == XE_BATTLEMAGE) {
 			if (channel == CHANNEL_PKG)
 				return BMG_PACKAGE_TEMPERATURE;
 			else if (channel == CHANNEL_VRAM)
 				return BMG_VRAM_TEMPERATURE;
-			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count) &&
+				 xe_hwmon_vram_channel_enabled(hwmon, channel - CHANNEL_VRAM_N))
 				return BMG_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
 		} else if (xe->info.platform == XE_DG2) {
 			if (channel == CHANNEL_PKG)
@@ -800,6 +819,70 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
+			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
 			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
 	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
 			   HWMON_P_CAP,
@@ -814,15 +897,37 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
 static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
+	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
 	u32 config = 0;
 	int ret;
 
+	/*
+	 * Only CRI reports dynamic VRAM channel state. Fixed-channel platforms
+	 * set the count up front so those sensors stay visible even if the thermal
+	 * mailbox reads below fail.
+	 */
+	if (hwmon->xe->info.has_fixed_vram_channels)
+		hwmon->temp.vram_count = FIXED_VRAM_CHANNELS;
+
+	if (hwmon->xe->info.platform == XE_CRESCENTISLAND) {
+		hwmon->temp.msu_mask = xe_mmio_read32(mmio, CRI_MSU_VRAM_ENABLE);
+		hwmon->temp.vram_count = fls(hwmon->temp.msu_mask) * VRAM_CHANNELS_PER_MSU;
+		drm_dbg(&hwmon->xe->drm, "MSU VRAM enable mask 0x%x, VRAM channel bound %d\n",
+			hwmon->temp.msu_mask, hwmon->temp.vram_count);
+		if (hwmon->temp.vram_count > MAX_VRAM_CHANNELS) {
+			drm_warn(&hwmon->xe->drm,
+				 "VRAM channel bound %d exceeds max %d, clamping\n",
+				 hwmon->temp.vram_count, MAX_VRAM_CHANNELS);
+			hwmon->temp.vram_count = MAX_VRAM_CHANNELS;
+		}
+	}
+
 	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
 			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
 	if (ret)
 		return ret;
 
-	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
+	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%08x val1 0x%08x\n",
 		hwmon->temp.data[0], hwmon->temp.data[1]);
 
 	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
@@ -1031,6 +1136,14 @@ static bool xe_hwmon_temp_probe(struct xe_hwmon *hwmon, int channel)
 		if (!xe_reg_is_valid(reg))
 			return false;
 
+		/*
+		 * On CRI, VRAM channel presence comes from the MSU enable mask
+		 * (applied in xe_hwmon_get_reg()); the temperature register's
+		 * 0xffffffff sentinel is not reliable for VRAM channels.
+		 */
+		if (hwmon->xe->info.platform == XE_CRESCENTISLAND && channel >= CHANNEL_VRAM_N)
+			return true;
+
 		reg_val = xe_mmio_read32(mmio, reg);
 		if (!mmio_temp_valid(hwmon, reg_val)) {
 			drm_dbg(&hwmon->xe->drm,
@@ -1048,20 +1161,31 @@ static bool xe_hwmon_temp_probe(struct xe_hwmon *hwmon, int channel)
 	}
 }
 
-static void xe_hwmon_init_temp_info(struct xe_hwmon *hwmon)
+static int xe_hwmon_init_temp_info(struct xe_hwmon *hwmon)
 {
+	struct device *dev = hwmon->xe->drm.dev;
 	int channel;
 
 	if (hwmon->xe->info.has_mbx_thermal_info && xe_hwmon_pcode_read_thermal_info(hwmon))
 		drm_warn(&hwmon->xe->drm, "Thermal mailbox not supported by card firmware\n");
 
+	/* vram_count is known only after reading thermal info above. */
+	if (hwmon->temp.vram_count) {
+		hwmon->temp.vram_label = devm_kcalloc(dev, hwmon->temp.vram_count,
+						      MAX_LABEL_SIZE, GFP_KERNEL);
+		if (!hwmon->temp.vram_label)
+			return -ENOMEM;
+	}
+
 	for (channel = 0; channel < CHANNEL_MAX; channel++) {
 		hwmon->temp.available[channel] = xe_hwmon_temp_probe(hwmon, channel);
-		if (hwmon->temp.available[channel] &&
-		    in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+		if (hwmon->temp.available[channel] && hwmon->temp.vram_label &&
+		    in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
 			snprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], MAX_LABEL_SIZE,
 				 "vram_ch_%d", channel - CHANNEL_VRAM_N);
 	}
+
+	return 0;
 }
 
 static umode_t
@@ -1557,8 +1681,10 @@ static int xe_hwmon_read_label(struct device *dev,
 			*str = "mctrl";
 		else if (channel == CHANNEL_PCIE)
 			*str = "pcie";
-		else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
+		else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
 			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
+		else
+			return -EOPNOTSUPP;
 		return 0;
 	case hwmon_power:
 	case hwmon_energy:
@@ -1586,7 +1712,7 @@ static const struct hwmon_chip_info hwmon_chip_info = {
 	.info = hwmon_info,
 };
 
-static void
+static int
 xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
 {
 	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
@@ -1654,7 +1780,7 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
 		if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
 			xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
 
-	xe_hwmon_init_temp_info(hwmon);
+	return xe_hwmon_init_temp_info(hwmon);
 }
 
 int xe_hwmon_register(struct xe_device *xe)
@@ -1683,7 +1809,9 @@ int xe_hwmon_register(struct xe_device *xe)
 	hwmon->xe = xe;
 	xe->hwmon = hwmon;
 
-	xe_hwmon_get_preregistration_info(hwmon);
+	ret = xe_hwmon_get_preregistration_info(hwmon);
+	if (ret)
+		goto err_null_hwmon;
 
 	drm_dbg(&xe->drm, "Register xe hwmon interface\n");
 
@@ -1693,10 +1821,14 @@ int xe_hwmon_register(struct xe_device *xe)
 								hwmon_groups);
 	if (IS_ERR(hwmon->hwmon_dev)) {
 		drm_err(&xe->drm, "Failed to register xe hwmon (%pe)\n", hwmon->hwmon_dev);
-		xe->hwmon = NULL;
-		return PTR_ERR(hwmon->hwmon_dev);
+		ret = PTR_ERR(hwmon->hwmon_dev);
+		goto err_null_hwmon;
 	}
 
 	return 0;
+
+err_null_hwmon:
+	xe->hwmon = NULL;
+	return ret;
 }
 MODULE_IMPORT_NS("INTEL_PMT_TELEMETRY");
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 111d0aa45b10..e754668100cf 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -417,6 +417,7 @@ static const struct xe_device_desc bmg_desc = {
 	.dma_mask_size = 46,
 	.has_display = true,
 	.has_fan_control = true,
+	.has_fixed_vram_channels = true,
 	.has_flat_ccs = 1,
 	.has_mbx_power_limits = true,
 	.has_mbx_thermal_info = true,
@@ -798,6 +799,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_device_uid = desc->has_device_uid;
 	xe->info.has_drm_ras = desc->has_drm_ras;
 	xe->info.has_fan_control = desc->has_fan_control;
+	xe->info.has_fixed_vram_channels = desc->has_fixed_vram_channels;
 	/* runtime fusing may force flat_ccs to disabled later */
 	xe->info.has_flat_ccs = desc->has_flat_ccs;
 	xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 15eedac8467a..ce0b0f6c5b18 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -43,6 +43,7 @@ struct xe_device_desc {
 	u8 has_device_uid:1;
 	u8 has_drm_ras:1;
 	u8 has_fan_control:1;
+	u8 has_fixed_vram_channels:1;
 	u8 has_flat_ccs:1;
 	u8 has_gsc_nvm:1;
 	u8 has_heci_gscfi:1;
-- 
2.25.1

Re: [PATCH v8 10/15] drm/xe/hwmon: Add platform-aware VRAM thermal channel support

[Rodrigo Vivi]

On Tue, Oct 06, 2026 at 09:05:29AM +0530, Karthik Poosa wrote:
> On CRI, derive the number of available VRAM temperature channels from the
> CRI_MSU_VRAM_ENABLE register, where each enabled MSU contributes
> VRAM_CHANNELS_PER_MSU channels.
>  
> Increase the maximum supported VRAM channel count to 80 and use the
> derived count to control VRAM sensor enumeration, channel access, and
> VRAM label allocation. Add a has_fixed_vram_channels platform flag to
> preserve the existing fixed-channel behavior on non-CRI platforms.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/regs/xe_pcode_regs.h |   1 +
>  drivers/gpu/drm/xe/xe_device_types.h    |   2 +
>  drivers/gpu/drm/xe/xe_hwmon.c           | 164 +++++++++++++++++++++---
>  drivers/gpu/drm/xe/xe_pci.c             |   2 +
>  drivers/gpu/drm/xe/xe_pci_types.h       |   1 +
>  5 files changed, 154 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> index a969661f0c95..d9e4847dd68e 100644
> --- a/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_pcode_regs.h
> @@ -28,6 +28,7 @@
>  #define BMG_PACKAGE_TEMPERATURE			XE_REG(0x138434)
>  
>  #define CRI_PACKAGE_ENERGY_STATUS		XE_REG(0x138120)
> +#define CRI_MSU_VRAM_ENABLE			XE_REG(0x138340)
>  #define CRI_PACKAGE_TEMPERATURE			XE_REG(0x138344)
>  #define CRI_VRAM_TEMPERATURE			XE_REG(0x138348)
>  #define CRI_PLATFORM_ENERGY_STATUS		XE_REG(0x138458)
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index beb0ceaabb3f..161ba2b27f47 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -185,6 +185,8 @@ struct xe_device {
>  		u8 has_drm_ras:1;
>  		/** @info.has_fan_control: Device supports fan control */
>  		u8 has_fan_control:1;
> +		/** @info.has_fixed_vram_channels: Device has fixed VRAM temperature channels */
> +		u8 has_fixed_vram_channels:1;
>  		/** @info.has_flat_ccs: Whether flat CCS metadata is used */
>  		u8 has_flat_ccs:1;
>  		/** @info.has_gsc_nvm: Device has gsc non-volatile memory */
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index bafa175f8457..9d83d9d2286e 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -39,7 +39,11 @@ enum xe_hwmon_reg_operation {
>  	REG_READ64,
>  };
>  
> -#define MAX_VRAM_CHANNELS      (16)
> +#define MAX_VRAM_CHANNELS	80
> +#define FIXED_VRAM_CHANNELS	16
> +
> +/* Each MSU enable bit maps to one VRAM subsystem of 4 channels. */
> +#define VRAM_CHANNELS_PER_MSU	4
>  
>  enum xe_hwmon_channel {
>  	CHANNEL_CARD,
> @@ -48,6 +52,7 @@ enum xe_hwmon_channel {
>  	CHANNEL_MCTRL,
>  	CHANNEL_PCIE,
>  	CHANNEL_VRAM_N,
> +	/* Compile-time upper bound; actual channel count is hwmon->temp.vram_count */
>  	CHANNEL_VRAM_N_MAX = CHANNEL_VRAM_N + MAX_VRAM_CHANNELS - 1,
>  	CHANNEL_MAX,
>  };
> @@ -144,18 +149,22 @@ struct xe_hwmon_thermal_info {
>  		/** @data: temperature limits in dwords */
>  		u32 data[DIV_ROUND_UP(TEMP_LIMIT_MAX, sizeof(u32))];
>  	};
> -	/** @count: no of temperature sensors available for the platform */
> +	/** @count: temperature sensors count from READ_THERMAL_CONFIG */
>  	u8 count;
> +	/** @vram_count: exclusive upper bound for VRAM temperature channel indices */
> +	u8 vram_count;
>  	/** @available: temperature sensor availability cached at registration */
>  	bool available[CHANNEL_MAX];
> +	/** @msu_mask: VRAM subsystem enable mask read from MMIO */
> +	u32 msu_mask;
>  	union {
>  		/** @value: per-sensor raw mailbox temperature; bit7=sign, bits6:0=magnitude */
>  		u8 value[U8_MAX + 1];
>  		/** @dword: sensor values as dwords, u32-aligned for pcode reads */
>  		u32 dword[DIV_ROUND_UP(U8_MAX + 1, sizeof(u32))];
>  	};
> -	/** @vram_label: vram label names */
> -	char vram_label[MAX_VRAM_CHANNELS][MAX_LABEL_SIZE];
> +	/** @vram_label: vram label names, dynamically allocated based on vram_count */
> +	char (*vram_label)[MAX_LABEL_SIZE];
>  };
>  
>  /**
> @@ -269,6 +278,14 @@ static int xe_hwmon_pcode_rmw_power_limit(const struct xe_hwmon *hwmon, u32 attr
>  	return ret;
>  }
>  
> +static bool xe_hwmon_vram_channel_enabled(const struct xe_hwmon *hwmon, int index)
> +{
> +	if (hwmon->xe->info.platform == XE_CRESCENTISLAND)
> +		return hwmon->temp.msu_mask & BIT(index / VRAM_CHANNELS_PER_MSU);
> +
> +	return true;
> +}
> +
>  static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg hwmon_reg,
>  				      int channel)
>  {
> @@ -281,14 +298,16 @@ static struct xe_reg xe_hwmon_get_reg(struct xe_hwmon *hwmon, enum xe_hwmon_reg
>  				return CRI_PACKAGE_TEMPERATURE;
>  			else if (channel == CHANNEL_VRAM)
>  				return CRI_VRAM_TEMPERATURE;
> -			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
> +			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count) &&
> +				 xe_hwmon_vram_channel_enabled(hwmon, channel - CHANNEL_VRAM_N))
>  				return CRI_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
>  		} else if (xe->info.platform == XE_BATTLEMAGE) {
>  			if (channel == CHANNEL_PKG)
>  				return BMG_PACKAGE_TEMPERATURE;
>  			else if (channel == CHANNEL_VRAM)
>  				return BMG_VRAM_TEMPERATURE;
> -			else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
> +			else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count) &&
> +				 xe_hwmon_vram_channel_enabled(hwmon, channel - CHANNEL_VRAM_N))
>  				return BMG_VRAM_TEMPERATURE_N(channel - CHANNEL_VRAM_N);
>  		} else if (xe->info.platform == XE_DG2) {
>  			if (channel == CHANNEL_PKG)
> @@ -800,6 +819,70 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> +			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
>  			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
>  	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
>  			   HWMON_P_CAP,
> @@ -814,15 +897,37 @@ static const struct hwmon_channel_info * const hwmon_info[] = {
>  static int xe_hwmon_pcode_read_thermal_info(struct xe_hwmon *hwmon)
>  {
>  	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
> +	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
>  	u32 config = 0;
>  	int ret;
>  
> +	/*
> +	 * Only CRI reports dynamic VRAM channel state. Fixed-channel platforms
> +	 * set the count up front so those sensors stay visible even if the thermal
> +	 * mailbox reads below fail.
> +	 */
> +	if (hwmon->xe->info.has_fixed_vram_channels)
> +		hwmon->temp.vram_count = FIXED_VRAM_CHANNELS;
> +
> +	if (hwmon->xe->info.platform == XE_CRESCENTISLAND) {
> +		hwmon->temp.msu_mask = xe_mmio_read32(mmio, CRI_MSU_VRAM_ENABLE);
> +		hwmon->temp.vram_count = fls(hwmon->temp.msu_mask) * VRAM_CHANNELS_PER_MSU;
> +		drm_dbg(&hwmon->xe->drm, "MSU VRAM enable mask 0x%x, VRAM channel bound %d\n",
> +			hwmon->temp.msu_mask, hwmon->temp.vram_count);
> +		if (hwmon->temp.vram_count > MAX_VRAM_CHANNELS) {
> +			drm_warn(&hwmon->xe->drm,
> +				 "VRAM channel bound %d exceeds max %d, clamping\n",
> +				 hwmon->temp.vram_count, MAX_VRAM_CHANNELS);
> +			hwmon->temp.vram_count = MAX_VRAM_CHANNELS;
> +		}
> +	}
> +
>  	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_LIMITS, 0),
>  			    &hwmon->temp.data[0], &hwmon->temp.data[1]);
>  	if (ret)
>  		return ret;
>  
> -	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%x val1 0x%x\n",
> +	drm_dbg(&hwmon->xe->drm, "thermal info read val 0x%08x val1 0x%08x\n",
>  		hwmon->temp.data[0], hwmon->temp.data[1]);
>  
>  	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_CONFIG, 0),
> @@ -1031,6 +1136,14 @@ static bool xe_hwmon_temp_probe(struct xe_hwmon *hwmon, int channel)
>  		if (!xe_reg_is_valid(reg))
>  			return false;
>  
> +		/*
> +		 * On CRI, VRAM channel presence comes from the MSU enable mask
> +		 * (applied in xe_hwmon_get_reg()); the temperature register's
> +		 * 0xffffffff sentinel is not reliable for VRAM channels.
> +		 */
> +		if (hwmon->xe->info.platform == XE_CRESCENTISLAND && channel >= CHANNEL_VRAM_N)
> +			return true;
> +
>  		reg_val = xe_mmio_read32(mmio, reg);
>  		if (!mmio_temp_valid(hwmon, reg_val)) {
>  			drm_dbg(&hwmon->xe->drm,
> @@ -1048,20 +1161,31 @@ static bool xe_hwmon_temp_probe(struct xe_hwmon *hwmon, int channel)
>  	}
>  }
>  
> -static void xe_hwmon_init_temp_info(struct xe_hwmon *hwmon)
> +static int xe_hwmon_init_temp_info(struct xe_hwmon *hwmon)
>  {
> +	struct device *dev = hwmon->xe->drm.dev;
>  	int channel;
>  
>  	if (hwmon->xe->info.has_mbx_thermal_info && xe_hwmon_pcode_read_thermal_info(hwmon))
>  		drm_warn(&hwmon->xe->drm, "Thermal mailbox not supported by card firmware\n");
>  
> +	/* vram_count is known only after reading thermal info above. */
> +	if (hwmon->temp.vram_count) {
> +		hwmon->temp.vram_label = devm_kcalloc(dev, hwmon->temp.vram_count,
> +						      MAX_LABEL_SIZE, GFP_KERNEL);
> +		if (!hwmon->temp.vram_label)
> +			return -ENOMEM;
> +	}
> +
>  	for (channel = 0; channel < CHANNEL_MAX; channel++) {
>  		hwmon->temp.available[channel] = xe_hwmon_temp_probe(hwmon, channel);
> -		if (hwmon->temp.available[channel] &&
> -		    in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
> +		if (hwmon->temp.available[channel] && hwmon->temp.vram_label &&
> +		    in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
>  			snprintf(hwmon->temp.vram_label[channel - CHANNEL_VRAM_N], MAX_LABEL_SIZE,
>  				 "vram_ch_%d", channel - CHANNEL_VRAM_N);
>  	}
> +
> +	return 0;
>  }
>  
>  static umode_t
> @@ -1557,8 +1681,10 @@ static int xe_hwmon_read_label(struct device *dev,
>  			*str = "mctrl";
>  		else if (channel == CHANNEL_PCIE)
>  			*str = "pcie";
> -		else if (in_range(channel, CHANNEL_VRAM_N, MAX_VRAM_CHANNELS))
> +		else if (in_range(channel, CHANNEL_VRAM_N, hwmon->temp.vram_count))
>  			*str = hwmon->temp.vram_label[channel - CHANNEL_VRAM_N];
> +		else
> +			return -EOPNOTSUPP;
>  		return 0;
>  	case hwmon_power:
>  	case hwmon_energy:
> @@ -1586,7 +1712,7 @@ static const struct hwmon_chip_info hwmon_chip_info = {
>  	.info = hwmon_info,
>  };
>  
> -static void
> +static int
>  xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
>  {
>  	struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
> @@ -1654,7 +1780,7 @@ xe_hwmon_get_preregistration_info(struct xe_hwmon *hwmon)
>  		if (xe_hwmon_is_visible(hwmon, hwmon_fan, hwmon_fan_input, channel))
>  			xe_hwmon_fan_input_read(hwmon, channel, &fan_speed);
>  
> -	xe_hwmon_init_temp_info(hwmon);
> +	return xe_hwmon_init_temp_info(hwmon);
>  }
>  
>  int xe_hwmon_register(struct xe_device *xe)
> @@ -1683,7 +1809,9 @@ int xe_hwmon_register(struct xe_device *xe)
>  	hwmon->xe = xe;
>  	xe->hwmon = hwmon;
>  
> -	xe_hwmon_get_preregistration_info(hwmon);
> +	ret = xe_hwmon_get_preregistration_info(hwmon);
> +	if (ret)
> +		goto err_null_hwmon;
>  
>  	drm_dbg(&xe->drm, "Register xe hwmon interface\n");
>  
> @@ -1693,10 +1821,14 @@ int xe_hwmon_register(struct xe_device *xe)
>  								hwmon_groups);
>  	if (IS_ERR(hwmon->hwmon_dev)) {
>  		drm_err(&xe->drm, "Failed to register xe hwmon (%pe)\n", hwmon->hwmon_dev);
> -		xe->hwmon = NULL;
> -		return PTR_ERR(hwmon->hwmon_dev);
> +		ret = PTR_ERR(hwmon->hwmon_dev);
> +		goto err_null_hwmon;
>  	}
>  
>  	return 0;
> +
> +err_null_hwmon:
> +	xe->hwmon = NULL;
> +	return ret;
>  }
>  MODULE_IMPORT_NS("INTEL_PMT_TELEMETRY");
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 111d0aa45b10..e754668100cf 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -417,6 +417,7 @@ static const struct xe_device_desc bmg_desc = {
>  	.dma_mask_size = 46,
>  	.has_display = true,
>  	.has_fan_control = true,
> +	.has_fixed_vram_channels = true,
>  	.has_flat_ccs = 1,
>  	.has_mbx_power_limits = true,
>  	.has_mbx_thermal_info = true,
> @@ -798,6 +799,7 @@ static int xe_info_init_early(struct xe_device *xe,
>  	xe->info.has_device_uid = desc->has_device_uid;
>  	xe->info.has_drm_ras = desc->has_drm_ras;
>  	xe->info.has_fan_control = desc->has_fan_control;
> +	xe->info.has_fixed_vram_channels = desc->has_fixed_vram_channels;
>  	/* runtime fusing may force flat_ccs to disabled later */
>  	xe->info.has_flat_ccs = desc->has_flat_ccs;
>  	xe->info.has_mbx_power_limits = desc->has_mbx_power_limits;
> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
> index 15eedac8467a..ce0b0f6c5b18 100644
> --- a/drivers/gpu/drm/xe/xe_pci_types.h
> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
> @@ -43,6 +43,7 @@ struct xe_device_desc {
>  	u8 has_device_uid:1;
>  	u8 has_drm_ras:1;
>  	u8 has_fan_control:1;
> +	u8 has_fixed_vram_channels:1;
>  	u8 has_flat_ccs:1;
>  	u8 has_gsc_nvm:1;
>  	u8 has_heci_gscfi:1;
> -- 
> 2.25.1
> 

[PATCH v8 11/15] drm/xe/hwmon: Decode CRI temperature registers as IEEE-754

[Karthik Poosa]

CRI temperature registers encode package and VRAM temperatures as
IEEE-754 floating-point values. Decode these values before exposing
them through hwmon.
 
Use integer-based IEEE-754 decoding since kernel code does not use
floating-point operations and hwmon reports integer temperatures.

v2: Add missing description for parameter 'temperature' in
    xe_hwmon_temperature_decode().

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Assisted-by: LLM
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 93 +++++++++++++++++++++++++++++------
 1 file changed, 79 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 9d83d9d2286e..8617b5e84b50 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -1245,6 +1245,70 @@ xe_hwmon_temp_is_visible(struct xe_hwmon *hwmon, u32 attr, int channel)
 	}
 }
 
+#define IEEE754_SIGN		REG_BIT(31)
+#define IEEE754_EXP_MASK	REG_GENMASK(30, 23)
+#define IEEE754_MANTISSA_MASK	REG_GENMASK(22, 0)
+#define IEEE754_EXP_BIAS	127 /* Exponent bias to obtain the actual exponent */
+#define IEEE754_MANTISSA_BITS	23 /* Mantissa width and implicit leading-1 bit position */
+#define IEEE754_EXP_SPECIAL	0xff /* reserved exponent value encoding infinity or NaN */
+
+/**
+ * xe_hwmon_temperature_decode - Decode an IEEE-754 temperature register value
+ * @reg_val: The raw register value to decode
+ * @temperature: Pointer to store the decoded temperature in millidegrees Celsius.
+ *
+ * IEEE-754 single-precision format:
+ *
+ *  31 30                         23 22                         0
+ * +--+-----------------------------+----------------------------+
+ * | S|          exponent           |          fraction          |
+ * +--+-----------------------------+----------------------------+
+ *
+ * value = (-1)^S * 1.fraction * 2^(exponent - 127)
+ *
+ * Return: 0 on success or an error if @reg_val is non-finite or cannot be
+ * represented in millidegrees Celsius.
+ */
+static int xe_hwmon_temperature_decode(u32 reg_val, long *temperature)
+{
+	u32 exponent = REG_FIELD_GET(IEEE754_EXP_MASK, reg_val);
+	u32 mantissa = REG_FIELD_GET(IEEE754_MANTISSA_MASK, reg_val);
+	s64 value;
+	int shift;
+
+	/* Exponent 0xff encodes infinity or NaN. */
+	if (exponent == IEEE754_EXP_SPECIAL)
+		return -EINVAL;
+
+	/* Subnormal values are smaller than one millidegree Celsius. */
+	if (!exponent) {
+		*temperature = 0;
+		return 0;
+	}
+
+	value = (s64)(mantissa | BIT(IEEE754_MANTISSA_BITS)) * MILLIDEGREE_PER_DEGREE;
+	shift = exponent - (IEEE754_EXP_BIAS + IEEE754_MANTISSA_BITS);
+	if (shift >= 0) {
+		if (shift >= BITS_PER_LONG || value > (LONG_MAX >> shift))
+			return -ERANGE;
+		value <<= shift;
+	} else if (shift > -64) {
+		value >>= -shift;
+	} else {
+		value = 0;
+	}
+
+	/* Ensure the magnitude fits in long, which is 32-bit on some arches. */
+	if (value > LONG_MAX)
+		return -ERANGE;
+
+	if (reg_val & IEEE754_SIGN)
+		value = -value;
+
+	*temperature = value;
+	return 0;
+}
+
 static int
 xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 {
@@ -1254,26 +1318,27 @@ xe_hwmon_temp_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *val)
 	switch (attr) {
 	case hwmon_temp_input:
 		switch (channel) {
-		case CHANNEL_PKG:
-		case CHANNEL_VRAM:
-			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
-
-			/* HW register value is in degrees Celsius, convert to millidegrees. */
-			*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
-			return 0;
 		case CHANNEL_MCTRL:
 			return get_mc_temp(hwmon, val);
 		case CHANNEL_PCIE:
 			return get_pcie_temp(hwmon, val);
+		case CHANNEL_PKG:
+		case CHANNEL_VRAM:
 		case CHANNEL_VRAM_N...CHANNEL_VRAM_N_MAX:
 			reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_TEMP, channel));
-			/*
-			 * This temperature format is 24 bit [31:8] signed integer and 8 bit
-			 * [7:0] fraction.
-			 */
-			*val = (s32)(REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val)) *
-				(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
-				 MILLIDEGREE_PER_DEGREE;
+			if (hwmon->xe->info.platform >= XE_CRESCENTISLAND) {
+				return xe_hwmon_temperature_decode((u32)reg_val, val);
+			} else if (channel >= CHANNEL_VRAM_N) {
+				/*
+				 * This temperature format is 24 bit [31:8] signed integer and 8 bit
+				 * [7:0] fraction for platforms before CRI.
+				 */
+				*val = (s32)REG_FIELD_GET(TEMP_MASK_VRAM_N, reg_val) *
+					(REG_FIELD_GET(TEMP_SIGN_MASK, reg_val) ? -1 : 1) *
+					MILLIDEGREE_PER_DEGREE;
+			} else {
+				*val = REG_FIELD_GET(TEMP_MASK, reg_val) * MILLIDEGREE_PER_DEGREE;
+			}
 			return 0;
 		default:
 			return -EOPNOTSUPP;
-- 
2.25.1

[PATCH v8 12/15] drm/xe/hwmon: Update memory controller temperature offset for CRI

[Karthik Poosa]

On CRI the memory controller temperatures moved in the READ_THERMAL_DATA
output: they now occupy bytes 16..19 instead of starting at byte 2.

Read and average the CRI memory controller sensors from bytes 16..19,
keeping the existing byte 2..count-1 range for earlier platforms. Only
the group(s) covering the used bytes are fetched.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 8617b5e84b50..7fe3ba422cc8 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -109,6 +109,10 @@ enum sensor_attr_power {
 /* Index of memory controller in READ_THERMAL_DATA output */
 #define TEMP_INDEX_MCTRL	2
 
+/* On CRI the memory controller temperatures are READ_THERMAL_DATA bytes 16..19. */
+#define CRI_TEMP_INDEX_MCTRL	16
+#define CRI_TEMP_MCTRL_COUNT	4
+
 /* Mailbox sentinel reported for an unavailable temperature sensor */
 #define TEMP_MBX_INVALID	0xFF
 
@@ -969,10 +973,19 @@ static int mbx_temp_decode(u8 value)
 static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
-	int ret, i, count = 0;
+	int ret, i, start, end, count = 0;
 	s32 average = 0;
 
-	for (i = 0; i < DIV_ROUND_UP(hwmon->temp.count, sizeof(u32)); i++) {
+	/* CRI relocated the memory controller temperatures to READ_THERMAL_DATA bytes 16..19. */
+	if (hwmon->xe->info.platform >= XE_CRESCENTISLAND) {
+		start = CRI_TEMP_INDEX_MCTRL;
+		end = CRI_TEMP_INDEX_MCTRL + CRI_TEMP_MCTRL_COUNT;
+	} else {
+		start = TEMP_INDEX_MCTRL;
+		end = hwmon->temp.count - 1;
+	}
+
+	for (i = start / sizeof(u32); i < DIV_ROUND_UP(end, sizeof(u32)); i++) {
 		ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA, i),
 				    &hwmon->temp.dword[i], NULL);
 		if (ret)
@@ -981,7 +994,7 @@ static int get_mc_temp(struct xe_hwmon *hwmon, long *val)
 			hwmon->temp.dword[i]);
 	}
 
-	for (i = TEMP_INDEX_MCTRL; i < hwmon->temp.count - 1; i++) {
+	for (i = start; i < end; i++) {
 		if (!mbx_temp_valid(hwmon, hwmon->temp.value[i]))
 			continue;
 		average += mbx_temp_decode(hwmon->temp.value[i]);
-- 
2.25.1

[PATCH v8 13/15] drm/xe/hwmon: Get PCIe temperature sensor offset from xe info

[Karthik Poosa]

Store the PCIe temperature sensor byte offset in xe device info and derive
the thermal mailbox group and byte from it. Read the configured offset
inside get_pcie_temp().

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 drivers/gpu/drm/xe/xe_device_types.h |  2 ++
 drivers/gpu/drm/xe/xe_hwmon.c        | 14 ++++++++------
 drivers/gpu/drm/xe/xe_pci.c          |  4 ++++
 drivers/gpu/drm/xe/xe_pci_types.h    |  1 +
 drivers/gpu/drm/xe/xe_pcode_api.h    |  2 --
 5 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 161ba2b27f47..4b2da72ed136 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -164,6 +164,8 @@ struct xe_device {
 		u8 vm_max_level;
 		/** @info.va_bits: Maximum bits of a virtual address */
 		u8 va_bits;
+		/** @info.pcie_temp_sensor_offset: PCIe sensor byte offset in READ_THERMAL_DATA */
+		u8 pcie_temp_sensor_offset;
 
 		/*
 		 * Keep all flags below alphabetically sorted
diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 7fe3ba422cc8..54b2fd29ccbe 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -1018,17 +1018,18 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
 {
 	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
 	u32 data = 0;
+	u32 group;
+	u32 byte;
 	int ret;
 
+	group = hwmon->xe->info.pcie_temp_sensor_offset / sizeof(data);
+	byte = hwmon->xe->info.pcie_temp_sensor_offset % sizeof(data);
 	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
-						  PCIE_SENSOR_GROUP_ID), &data, NULL);
+						  group), &data, NULL);
 	if (ret)
 		return ret;
 
-	/* Sensor offset is different for G21 */
-	if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
-		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
-
+	data >>= byte * BITS_PER_BYTE;
 	data = REG_FIELD_GET(TEMP_MASK, data);
 	if (!mbx_temp_valid(hwmon, data)) {
 		drm_dbg(&hwmon->xe->drm, "PCIe temperature not available\n");
@@ -1168,7 +1169,8 @@ static bool xe_hwmon_temp_probe(struct xe_hwmon *hwmon, int channel)
 	case CHANNEL_MCTRL:
 		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
 	case CHANNEL_PCIE:
-		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
+		return hwmon->temp.count &&
+		       !get_pcie_temp(hwmon, NULL);
 	default:
 		return false;
 	}
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index e754668100cf..1cbd49933b2c 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -421,6 +421,7 @@ static const struct xe_device_desc bmg_desc = {
 	.has_flat_ccs = 1,
 	.has_mbx_power_limits = true,
 	.has_mbx_thermal_info = true,
+	.pcie_temp_sensor_offset = 10,
 	.has_gsc_nvm = 1,
 	.has_heci_cscfi = 1,
 	.has_i2c = true,
@@ -793,6 +794,9 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.va_bits = desc->va_bits;
 	xe->info.vm_max_level = desc->vm_max_level;
 	xe->info.vram_flags = desc->vram_flags;
+	xe->info.pcie_temp_sensor_offset = desc->pcie_temp_sensor_offset;
+	if (xe->info.subplatform == XE_SUBPLATFORM_BATTLEMAGE_G21)
+		xe->info.pcie_temp_sensor_offset = 8;
 
 	xe->info.is_dgfx = desc->is_dgfx;
 	xe->info.has_cached_pt = desc->has_cached_pt;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index ce0b0f6c5b18..a613bd4ed94c 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -34,6 +34,7 @@ struct xe_device_desc {
 	u8 va_bits;
 	u8 vm_max_level;
 	u8 vram_flags;
+	u8 pcie_temp_sensor_offset;
 
 	u8 require_force_probe:1;
 	u8 is_dgfx:1;
diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
index 94575c476e3d..00c4fc7d0124 100644
--- a/drivers/gpu/drm/xe/xe_pcode_api.h
+++ b/drivers/gpu/drm/xe/xe_pcode_api.h
@@ -58,8 +58,6 @@
 #define     READ_THERMAL_LIMITS			0x0
 #define     READ_THERMAL_CONFIG			0x1
 #define     READ_THERMAL_DATA			0x2
-#define       PCIE_SENSOR_GROUP_ID		0x2
-#define       PCIE_SENSOR_MASK			REG_GENMASK(31, 16)
 
 #define   PCODE_LATE_BINDING			0x5C
 #define     GET_CAPABILITY_STATUS		0x0
-- 
2.25.1

Re: [PATCH v8 13/15] drm/xe/hwmon: Get PCIe temperature sensor offset from xe info

[Rodrigo Vivi]

On Tue, Oct 06, 2026 at 09:05:32AM +0530, Karthik Poosa wrote:
> Store the PCIe temperature sensor byte offset in xe device info and derive
> the thermal mailbox group and byte from it. Read the configured offset
> inside get_pcie_temp().
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_device_types.h |  2 ++
>  drivers/gpu/drm/xe/xe_hwmon.c        | 14 ++++++++------
>  drivers/gpu/drm/xe/xe_pci.c          |  4 ++++
>  drivers/gpu/drm/xe/xe_pci_types.h    |  1 +
>  drivers/gpu/drm/xe/xe_pcode_api.h    |  2 --
>  5 files changed, 15 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 161ba2b27f47..4b2da72ed136 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -164,6 +164,8 @@ struct xe_device {
>  		u8 vm_max_level;
>  		/** @info.va_bits: Maximum bits of a virtual address */
>  		u8 va_bits;
> +		/** @info.pcie_temp_sensor_offset: PCIe sensor byte offset in READ_THERMAL_DATA */
> +		u8 pcie_temp_sensor_offset;
>  
>  		/*
>  		 * Keep all flags below alphabetically sorted
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 7fe3ba422cc8..54b2fd29ccbe 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -1018,17 +1018,18 @@ static int get_pcie_temp(struct xe_hwmon *hwmon, long *val)
>  {
>  	struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe);
>  	u32 data = 0;
> +	u32 group;
> +	u32 byte;
>  	int ret;
>  
> +	group = hwmon->xe->info.pcie_temp_sensor_offset / sizeof(data);
> +	byte = hwmon->xe->info.pcie_temp_sensor_offset % sizeof(data);
>  	ret = xe_pcode_read(root_tile, PCODE_MBOX(PCODE_THERMAL_INFO, READ_THERMAL_DATA,
> -						  PCIE_SENSOR_GROUP_ID), &data, NULL);
> +						  group), &data, NULL);
>  	if (ret)
>  		return ret;
>  
> -	/* Sensor offset is different for G21 */
> -	if (hwmon->xe->info.subplatform != XE_SUBPLATFORM_BATTLEMAGE_G21)
> -		data = REG_FIELD_GET(PCIE_SENSOR_MASK, data);
> -
> +	data >>= byte * BITS_PER_BYTE;
>  	data = REG_FIELD_GET(TEMP_MASK, data);
>  	if (!mbx_temp_valid(hwmon, data)) {
>  		drm_dbg(&hwmon->xe->drm, "PCIe temperature not available\n");
> @@ -1168,7 +1169,8 @@ static bool xe_hwmon_temp_probe(struct xe_hwmon *hwmon, int channel)
>  	case CHANNEL_MCTRL:
>  		return hwmon->temp.count && !get_mc_temp(hwmon, NULL);
>  	case CHANNEL_PCIE:
> -		return hwmon->temp.count && !get_pcie_temp(hwmon, NULL);
> +		return hwmon->temp.count &&
> +		       !get_pcie_temp(hwmon, NULL);
>  	default:
>  		return false;
>  	}
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index e754668100cf..1cbd49933b2c 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -421,6 +421,7 @@ static const struct xe_device_desc bmg_desc = {
>  	.has_flat_ccs = 1,
>  	.has_mbx_power_limits = true,
>  	.has_mbx_thermal_info = true,
> +	.pcie_temp_sensor_offset = 10,
>  	.has_gsc_nvm = 1,
>  	.has_heci_cscfi = 1,
>  	.has_i2c = true,
> @@ -793,6 +794,9 @@ static int xe_info_init_early(struct xe_device *xe,
>  	xe->info.va_bits = desc->va_bits;
>  	xe->info.vm_max_level = desc->vm_max_level;
>  	xe->info.vram_flags = desc->vram_flags;
> +	xe->info.pcie_temp_sensor_offset = desc->pcie_temp_sensor_offset;
> +	if (xe->info.subplatform == XE_SUBPLATFORM_BATTLEMAGE_G21)
> +		xe->info.pcie_temp_sensor_offset = 8;
>  
>  	xe->info.is_dgfx = desc->is_dgfx;
>  	xe->info.has_cached_pt = desc->has_cached_pt;
> diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
> index ce0b0f6c5b18..a613bd4ed94c 100644
> --- a/drivers/gpu/drm/xe/xe_pci_types.h
> +++ b/drivers/gpu/drm/xe/xe_pci_types.h
> @@ -34,6 +34,7 @@ struct xe_device_desc {
>  	u8 va_bits;
>  	u8 vm_max_level;
>  	u8 vram_flags;
> +	u8 pcie_temp_sensor_offset;
>  
>  	u8 require_force_probe:1;
>  	u8 is_dgfx:1;
> diff --git a/drivers/gpu/drm/xe/xe_pcode_api.h b/drivers/gpu/drm/xe/xe_pcode_api.h
> index 94575c476e3d..00c4fc7d0124 100644
> --- a/drivers/gpu/drm/xe/xe_pcode_api.h
> +++ b/drivers/gpu/drm/xe/xe_pcode_api.h
> @@ -58,8 +58,6 @@
>  #define     READ_THERMAL_LIMITS			0x0
>  #define     READ_THERMAL_CONFIG			0x1
>  #define     READ_THERMAL_DATA			0x2
> -#define       PCIE_SENSOR_GROUP_ID		0x2
> -#define       PCIE_SENSOR_MASK			REG_GENMASK(31, 16)
>  
>  #define   PCODE_LATE_BINDING			0x5C
>  #define     GET_CAPABILITY_STATUS		0x0
> -- 
> 2.25.1
> 

[PATCH v8 14/15] drm/xe/hwmon: Add CRI PCIe temperature sensor offset

[Karthik Poosa]

Describe the Crescent Island PCIe temperature sensor at byte offset 20 in
READ_THERMAL_DATA.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 1cbd49933b2c..c7ab7b1abd25 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -482,6 +482,7 @@ static const struct xe_device_desc cri_desc = {
 	.has_i2c = true,
 	.has_mbx_power_limits = true,
 	.has_mbx_thermal_info = true,
+	.pcie_temp_sensor_offset = 20,
 	.has_mert = true,
 	.has_pre_prod_wa = 1,
 	.has_soc_remapper_sysctrl = true,
-- 
2.25.1

Re: [PATCH v8 14/15] drm/xe/hwmon: Add CRI PCIe temperature sensor offset

[Rodrigo Vivi]

On Tue, Oct 06, 2026 at 09:05:33AM +0530, Karthik Poosa wrote:
> Describe the Crescent Island PCIe temperature sensor at byte offset 20 in
> READ_THERMAL_DATA.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> ---
>  drivers/gpu/drm/xe/xe_pci.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 1cbd49933b2c..c7ab7b1abd25 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -482,6 +482,7 @@ static const struct xe_device_desc cri_desc = {
>  	.has_i2c = true,
>  	.has_mbx_power_limits = true,
>  	.has_mbx_thermal_info = true,
> +	.pcie_temp_sensor_offset = 20,

wrong place and bad name and it should be squashed to the previous patch.

But also, please disregard the rv-b that I gave there... seeing this again
this is a bad naming... I'm also bad with naming, but pcie_ as a prefix
seems something related to the pci spec itself, what is not the case,
so we need something different....

>  	.has_mert = true,
>  	.has_pre_prod_wa = 1,
>  	.has_soc_remapper_sysctrl = true,
> -- 
> 2.25.1
> 

Re: [PATCH v8 14/15] drm/xe/hwmon: Add CRI PCIe temperature sensor offset

[Poosa, Karthik]

On 07-10-2026 23:57, Rodrigo Vivi wrote:
> On Tue, Oct 06, 2026 at 09:05:33AM +0530, Karthik Poosa wrote:
>> Describe the Crescent Island PCIe temperature sensor at byte offset 20 in
>> READ_THERMAL_DATA.
>>
>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>> ---
>>   drivers/gpu/drm/xe/xe_pci.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
>> index 1cbd49933b2c..c7ab7b1abd25 100644
>> --- a/drivers/gpu/drm/xe/xe_pci.c
>> +++ b/drivers/gpu/drm/xe/xe_pci.c
>> @@ -482,6 +482,7 @@ static const struct xe_device_desc cri_desc = {
>>   	.has_i2c = true,
>>   	.has_mbx_power_limits = true,
>>   	.has_mbx_thermal_info = true,
>> +	.pcie_temp_sensor_offset = 20,
> wrong place and bad name and it should be squashed to the previous patch.
by wrong place you mean, order here in the list alphabetically ?
>
> But also, please disregard the rv-b that I gave there... seeing this again
> this is a bad naming... I'm also bad with naming, but pcie_ as a prefix
> seems something related to the pci spec itself, what is not the case,
> so we need something different....
how about .mbx_pcie_sensor_offset ?
>
>>   	.has_mert = true,
>>   	.has_pre_prod_wa = 1,
>>   	.has_soc_remapper_sysctrl = true,
>> -- 
>> 2.25.1
>>

Re: [PATCH v8 14/15] drm/xe/hwmon: Add CRI PCIe temperature sensor offset

[Poosa, Karthik]

On 08-10-2026 00:11, Poosa, Karthik wrote:
>
> On 07-10-2026 23:57, Rodrigo Vivi wrote:
>> On Tue, Oct 06, 2026 at 09:05:33AM +0530, Karthik Poosa wrote:
>>> Describe the Crescent Island PCIe temperature sensor at byte offset 
>>> 20 in
>>> READ_THERMAL_DATA.
>>>
>>> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
>>> ---
>>>   drivers/gpu/drm/xe/xe_pci.c | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
>>> index 1cbd49933b2c..c7ab7b1abd25 100644
>>> --- a/drivers/gpu/drm/xe/xe_pci.c
>>> +++ b/drivers/gpu/drm/xe/xe_pci.c
>>> @@ -482,6 +482,7 @@ static const struct xe_device_desc cri_desc = {
>>>       .has_i2c = true,
>>>       .has_mbx_power_limits = true,
>>>       .has_mbx_thermal_info = true,
>>> +    .pcie_temp_sensor_offset = 20,
>> wrong place and bad name and it should be squashed to the previous 
>> patch.
> by wrong place you mean, order here in the list alphabetically ?
also

having two patches seems right,

in previus one we are getting the offset,

this one enables offset of CRI

>>
>> But also, please disregard the rv-b that I gave there... seeing this 
>> again
>> this is a bad naming... I'm also bad with naming, but pcie_ as a prefix
>> seems something related to the pci spec itself, what is not the case,
>> so we need something different....
> how about .mbx_pcie_sensor_offset ?
>>
>>>       .has_mert = true,
>>>       .has_pre_prod_wa = 1,
>>>       .has_soc_remapper_sysctrl = true,
>>> -- 
>>> 2.25.1
>>>

Re: [PATCH v8 14/15] drm/xe/hwmon: Add CRI PCIe temperature sensor offset

[Rodrigo Vivi]

On Thu, Oct 08, 2026 at 12:11:01AM +0530, Poosa, Karthik wrote:
> 
> On 07-10-2026 23:57, Rodrigo Vivi wrote:
> > On Tue, Oct 06, 2026 at 09:05:33AM +0530, Karthik Poosa wrote:
> > > Describe the Crescent Island PCIe temperature sensor at byte offset 20 in
> > > READ_THERMAL_DATA.
> > > 
> > > Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> > > ---
> > >   drivers/gpu/drm/xe/xe_pci.c | 1 +
> > >   1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> > > index 1cbd49933b2c..c7ab7b1abd25 100644
> > > --- a/drivers/gpu/drm/xe/xe_pci.c
> > > +++ b/drivers/gpu/drm/xe/xe_pci.c
> > > @@ -482,6 +482,7 @@ static const struct xe_device_desc cri_desc = {
> > >   	.has_i2c = true,
> > >   	.has_mbx_power_limits = true,
> > >   	.has_mbx_thermal_info = true,
> > > +	.pcie_temp_sensor_offset = 20,
> > wrong place and bad name and it should be squashed to the previous patch.
> by wrong place you mean, order here in the list alphabetically ?
> > 
> > But also, please disregard the rv-b that I gave there... seeing this again
> > this is a bad naming... I'm also bad with naming, but pcie_ as a prefix
> > seems something related to the pci spec itself, what is not the case,
> > so we need something different....
> how about .mbx_pcie_sensor_offset ?

as I told I'm bad with naming, so I asked AI and I fully agree with AI now:

"""
Recommendation: drop the info field and follow the existing TEMP_INDEX_MCTRL convention:
#define TEMP_INDEX_PCIE          10
#define BMG_G21_TEMP_INDEX_PCIE   8
#define CRI_TEMP_INDEX_PCIE      20

A small xe_hwmon_pcie_temp_index() helper would choose between them.
Because the TEMP_INDEX_ prefix already reads as "index in the thermal mailbox",
nobody will mistake it for a PCIe-spec value. This also removes the G21 special
case from xe_pci.c.

If they want to keep the info field, a name like mbx_thermal_pcie_index makes
it clear it's a mailbox thing (it pairs with has_mbx_thermal_info).

I'd still push for the local defines.
"""

So, let's go for the local defines for this. no need for the info flag.
And a single patch.

Thanks,
Rodrigo.

> > 
> > >   	.has_mert = true,
> > >   	.has_pre_prod_wa = 1,
> > >   	.has_soc_remapper_sysctrl = true,
> > > -- 
> > > 2.25.1
> > > 

[PATCH v8 15/15] drm/xe/hwmon: Simplify temperature channels config

[Karthik Poosa]

Replace the repeated temperature channels list with an indexed config
array. Use range designators for channels sharing the same attributes.

Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Assisted-by: LLM
---
 drivers/gpu/drm/xe/xe_hwmon.c | 104 ++++++----------------------------
 1 file changed, 17 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index 54b2fd29ccbe..589d2d1cdb4e 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -800,94 +800,24 @@ static const struct attribute_group *hwmon_groups[] = {
 	NULL
 };
 
+static const u32 hwmon_temp_config[CHANNEL_MAX + 1] = {
+	[CHANNEL_CARD] = HWMON_T_LABEL,
+	[CHANNEL_PKG] = HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT |
+			 HWMON_T_LABEL | HWMON_T_MAX,
+	[CHANNEL_VRAM ... CHANNEL_PCIE] = HWMON_T_CRIT | HWMON_T_EMERGENCY |
+					 HWMON_T_INPUT | HWMON_T_LABEL,
+	[CHANNEL_VRAM_N ... CHANNEL_VRAM_N_MAX] = HWMON_T_CRIT | HWMON_T_EMERGENCY |
+							 HWMON_T_INPUT | HWMON_T_LABEL,
+	[CHANNEL_MAX] = 0, /* hwmon config terminator */
+};
+
+static const struct hwmon_channel_info hwmon_temp_info = {
+	.type = hwmon_temp,
+	.config = hwmon_temp_config,
+};
+
 static const struct hwmon_channel_info * const hwmon_info[] = {
-	HWMON_CHANNEL_INFO(temp,
-			   HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL |
-			   HWMON_T_MAX,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
-			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
+	&hwmon_temp_info,
 	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
 			   HWMON_P_CAP,
 			   HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CAP),
-- 
2.25.1

Re: [PATCH v8 15/15] drm/xe/hwmon: Simplify temperature channels config

[Rodrigo Vivi]

On Tue, Oct 06, 2026 at 09:05:34AM +0530, Karthik Poosa wrote:
> Replace the repeated temperature channels list with an indexed config
> array. Use range designators for channels sharing the same attributes.
> 
> Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
> Assisted-by: LLM

Thank you!

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_hwmon.c | 104 ++++++----------------------------
>  1 file changed, 17 insertions(+), 87 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
> index 54b2fd29ccbe..589d2d1cdb4e 100644
> --- a/drivers/gpu/drm/xe/xe_hwmon.c
> +++ b/drivers/gpu/drm/xe/xe_hwmon.c
> @@ -800,94 +800,24 @@ static const struct attribute_group *hwmon_groups[] = {
>  	NULL
>  };
>  
> +static const u32 hwmon_temp_config[CHANNEL_MAX + 1] = {
> +	[CHANNEL_CARD] = HWMON_T_LABEL,
> +	[CHANNEL_PKG] = HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT |
> +			 HWMON_T_LABEL | HWMON_T_MAX,
> +	[CHANNEL_VRAM ... CHANNEL_PCIE] = HWMON_T_CRIT | HWMON_T_EMERGENCY |
> +					 HWMON_T_INPUT | HWMON_T_LABEL,
> +	[CHANNEL_VRAM_N ... CHANNEL_VRAM_N_MAX] = HWMON_T_CRIT | HWMON_T_EMERGENCY |
> +							 HWMON_T_INPUT | HWMON_T_LABEL,
> +	[CHANNEL_MAX] = 0, /* hwmon config terminator */
> +};
> +
> +static const struct hwmon_channel_info hwmon_temp_info = {
> +	.type = hwmon_temp,
> +	.config = hwmon_temp_config,
> +};
> +
>  static const struct hwmon_channel_info * const hwmon_info[] = {
> -	HWMON_CHANNEL_INFO(temp,
> -			   HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL |
> -			   HWMON_T_MAX,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL,
> -			   HWMON_T_CRIT | HWMON_T_EMERGENCY | HWMON_T_INPUT | HWMON_T_LABEL),
> +	&hwmon_temp_info,
>  	HWMON_CHANNEL_INFO(power, HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CRIT |
>  			   HWMON_P_CAP,
>  			   HWMON_P_MAX | HWMON_P_RATED_MAX | HWMON_P_LABEL | HWMON_P_CAP),
> -- 
> 2.25.1
> 

✓ CI.KUnit: success for drm/xe/hwmon: Update hwmon thermal mailbox (rev5)

[Patchwork]

== Series Details ==

Series: drm/xe/hwmon: Update hwmon thermal mailbox (rev5)
URL   : https://patchwork.freedesktop.org/series/174898/
State : success

== Summary ==

+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[03:43:46] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:43:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:44:10] Starting KUnit Kernel (1/1)...
[03:44:10] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:44:11] ================= gpu_buddy (14 subtests) ==================
[03:44:11] [PASSED] gpu_test_buddy_alloc_limit
[03:44:11] [PASSED] gpu_test_buddy_alloc_optimistic
[03:44:11] [PASSED] gpu_test_buddy_alloc_pessimistic
[03:44:11] [PASSED] gpu_test_buddy_alloc_pathological
[03:44:11] [PASSED] gpu_test_buddy_alloc_contiguous
[03:44:11] [PASSED] gpu_test_buddy_alloc_clear
[03:44:11] [PASSED] gpu_test_buddy_alloc_range
[03:44:11] [PASSED] gpu_test_buddy_alloc_range_bias
[03:44:12] [PASSED] gpu_test_buddy_fragmentation_performance
[03:44:13] [PASSED] gpu_test_buddy_dirty_tracker_performance
[03:44:13] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[03:44:13] [PASSED] gpu_test_buddy_offset_aligned_allocation
[03:44:13] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[03:44:13] [PASSED] gpu_test_buddy_addr_to_block
[03:44:13] ==================== [PASSED] gpu_buddy ====================
[03:44:13] ============================================================
[03:44:13] Testing complete. Ran 14 tests: passed: 14
[03:44:13] Elapsed time: 26.897s total, 4.437s configuring, 20.340s building, 2.055s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[03:44:13] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:44:15] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:44:49] Starting KUnit Kernel (1/1)...
[03:44:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:44:49] ================== guc_buf (11 subtests) ===================
[03:44:49] [PASSED] test_smallest
[03:44:49] [PASSED] test_largest
[03:44:49] [PASSED] test_granular
[03:44:49] [PASSED] test_unique
[03:44:49] [PASSED] test_overlap
[03:44:49] [PASSED] test_reusable
[03:44:49] [PASSED] test_too_big
[03:44:49] [PASSED] test_flush
[03:44:49] [PASSED] test_lookup
[03:44:49] [PASSED] test_data
[03:44:49] [PASSED] test_class
[03:44:49] ===================== [PASSED] guc_buf =====================
[03:44:49] =================== guc_dbm (7 subtests) ===================
[03:44:49] [PASSED] test_empty
[03:44:49] [PASSED] test_default
[03:44:49] ======================== test_size  ========================
[03:44:49] [PASSED] 4
[03:44:49] [PASSED] 8
[03:44:49] [PASSED] 32
[03:44:49] [PASSED] 256
[03:44:49] ==================== [PASSED] test_size ====================
[03:44:49] ======================= test_reuse  ========================
[03:44:49] [PASSED] 4
[03:44:49] [PASSED] 8
[03:44:49] [PASSED] 32
[03:44:49] [PASSED] 256
[03:44:49] =================== [PASSED] test_reuse ====================
[03:44:49] =================== test_range_overlap  ====================
[03:44:49] [PASSED] 4
[03:44:49] [PASSED] 8
[03:44:49] [PASSED] 32
[03:44:49] [PASSED] 256
[03:44:49] =============== [PASSED] test_range_overlap ================
[03:44:49] =================== test_range_compact  ====================
[03:44:49] [PASSED] 4
[03:44:49] [PASSED] 8
[03:44:49] [PASSED] 32
[03:44:49] [PASSED] 256
[03:44:49] =============== [PASSED] test_range_compact ================
[03:44:49] ==================== test_range_spare  =====================
[03:44:49] [PASSED] 4
[03:44:49] [PASSED] 8
[03:44:49] [PASSED] 32
[03:44:49] [PASSED] 256
[03:44:49] ================ [PASSED] test_range_spare =================
[03:44:49] ===================== [PASSED] guc_dbm =====================
[03:44:49] =================== guc_idm (6 subtests) ===================
[03:44:49] [PASSED] bad_init
[03:44:49] [PASSED] no_init
[03:44:49] [PASSED] init_fini
[03:44:49] [PASSED] check_used
[03:44:49] [PASSED] check_quota
[03:44:49] [PASSED] check_all
[03:44:49] ===================== [PASSED] guc_idm =====================
[03:44:49] ============== guc_klv_helpers (13 subtests) ===============
[03:44:49] [PASSED] test_count
[03:44:49] [PASSED] test_encode_u32
[03:44:49] [PASSED] test_encode_u64
[03:44:49] [PASSED] test_encode_string
[03:44:49] [PASSED] test_encode_object_raw
[03:44:49] [PASSED] test_encode_object_klv
[03:44:49] [PASSED] test_encode_object_nested
[03:44:49] [PASSED] test_encode_object_basic
[03:44:49] ===================== test_decode_u16  =====================
[03:44:49] [PASSED] empty
[03:44:49] [PASSED] valid
[03:44:49] [PASSED] max
[03:44:49] [PASSED] big
[03:44:49] [PASSED] long
[03:44:49] ================= [PASSED] test_decode_u16 =================
[03:44:49] ===================== test_decode_u32  =====================
[03:44:49] [PASSED] empty
[03:44:49] [PASSED] valid
[03:44:49] [PASSED] max
[03:44:49] [PASSED] long
[03:44:49] ================= [PASSED] test_decode_u32 =================
[03:44:49] ===================== test_decode_u64  =====================
[03:44:49] [PASSED] empty
[03:44:49] [PASSED] short
[03:44:49] [PASSED] valid
[03:44:49] [PASSED] max
[03:44:49] [PASSED] long
[03:44:49] ================= [PASSED] test_decode_u64 =================
[03:44:49] ===================== test_decode_str  =====================
[03:44:49] [PASSED] empty
[03:44:49] [PASSED] one
[03:44:49] [PASSED] one_trash
[03:44:49] [PASSED] two
[03:44:49] [PASSED] two_trash
[03:44:49] [PASSED] three
[03:44:49] [PASSED] dword
[03:44:49] [PASSED] four
[03:44:49] [PASSED] five
[03:44:49] [PASSED] six
[03:44:49] [PASSED] seven
[03:44:49] [PASSED] qword
[03:44:49] ================= [PASSED] test_decode_str =================
[03:44:49] [PASSED] test_print
[03:44:49] ================= [PASSED] guc_klv_helpers =================
[03:44:49] =================== xe_log (4 subtests) ====================
[03:44:49] [PASSED] demo_cper
[03:44:49] [PASSED] demo_dmesg
[03:44:49] ======================= test_dmesg  ========================
[03:44:49] [PASSED] test_fatal
[03:44:49] [PASSED] test_fatal_tile
[03:44:49] [PASSED] test_fatal_gt
[03:44:49] [PASSED] test_fatal_comp
[03:44:49] [PASSED] test_fatal_comp_tile
[03:44:49] [PASSED] test_fatal_comp_gt
[03:44:49] [PASSED] test_fatal_all
[03:44:49] [PASSED] test_recoverable
[03:44:49] [PASSED] test_recoverable_tile
[03:44:49] [PASSED] test_recoverable_gt
[03:44:49] [PASSED] test_recoverable_comp
[03:44:49] [PASSED] test_recoverable_comp_tile
[03:44:49] [PASSED] test_recoverable_comp_gt
[03:44:49] [PASSED] test_recoverable_all
[03:44:49] [PASSED] test_info
[03:44:49] [PASSED] test_info_tile
[03:44:49] [PASSED] test_info_gt
[03:44:49] [PASSED] test_info_err
[03:44:49] [PASSED] test_info_comp
[03:44:49] [PASSED] test_info_comp_tile
[03:44:49] [PASSED] test_info_comp_gt
[03:44:49] [PASSED] test_info_all
[03:44:49] [PASSED] test_hw_fatal
[03:44:49] [PASSED] test_hw_recoverable
[03:44:49] [PASSED] test_hw_corrected
[03:44:49] [PASSED] test_hw_informational
[03:44:49] =================== [PASSED] test_dmesg ====================
[03:44:49] ====================== test_invalid  =======================
[03:44:49] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[03:44:49] ================== [SKIPPED] test_invalid ==================
[03:44:49] ===================== [PASSED] xe_log ======================
[03:44:49] ================== no_relay (3 subtests) ===================
[03:44:49] [PASSED] xe_drops_guc2pf_if_not_ready
[03:44:49] [PASSED] xe_drops_guc2vf_if_not_ready
[03:44:49] [PASSED] xe_rejects_send_if_not_ready
[03:44:49] ==================== [PASSED] no_relay =====================
[03:44:49] ================== pf_relay (14 subtests) ==================
[03:44:49] [PASSED] pf_rejects_guc2pf_too_short
[03:44:49] [PASSED] pf_rejects_guc2pf_too_long
[03:44:49] [PASSED] pf_rejects_guc2pf_no_payload
[03:44:49] [PASSED] pf_fails_no_payload
[03:44:49] [PASSED] pf_fails_bad_origin
[03:44:49] [PASSED] pf_fails_bad_type
[03:44:49] [PASSED] pf_txn_reports_error
[03:44:49] [PASSED] pf_txn_sends_pf2guc
[03:44:49] [PASSED] pf_sends_pf2guc
[03:44:49] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:44:49] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:44:49] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:44:49] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:44:49] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[03:44:49] ==================== [PASSED] pf_relay =====================
[03:44:49] ================== vf_relay (3 subtests) ===================
[03:44:49] [PASSED] vf_rejects_guc2vf_too_short
[03:44:49] [PASSED] vf_rejects_guc2vf_too_long
[03:44:49] [PASSED] vf_rejects_guc2vf_no_payload
[03:44:49] ==================== [PASSED] vf_relay =====================
[03:44:49] ================ pf_gt_config (9 subtests) =================
[03:44:49] [PASSED] fair_contexts_1vf
[03:44:49] [PASSED] fair_doorbells_1vf
[03:44:49] [PASSED] fair_ggtt_1vf
[03:44:49] ====================== fair_vram_1vf  ======================
[03:44:49] [PASSED] 3.50 GiB
[03:44:49] [PASSED] 11.5 GiB
[03:44:49] [PASSED] 15.5 GiB
[03:44:49] [PASSED] 31.5 GiB
[03:44:49] [PASSED] 63.5 GiB
[03:44:49] [PASSED] 1.91 GiB
[03:44:49] ================== [PASSED] fair_vram_1vf ==================
[03:44:49] ================ fair_vram_1vf_admin_only  =================
[03:44:49] [PASSED] 3.50 GiB
[03:44:49] [PASSED] 11.5 GiB
[03:44:49] [PASSED] 15.5 GiB
[03:44:49] [PASSED] 31.5 GiB
[03:44:49] [PASSED] 63.5 GiB
[03:44:49] [PASSED] 1.91 GiB
[03:44:49] ============ [PASSED] fair_vram_1vf_admin_only =============
[03:44:49] ====================== fair_contexts  ======================
[03:44:49] [PASSED] 1 VF
[03:44:49] [PASSED] 2 VFs
[03:44:49] [PASSED] 3 VFs
[03:44:49] [PASSED] 4 VFs
[03:44:49] [PASSED] 5 VFs
[03:44:49] [PASSED] 6 VFs
[03:44:49] [PASSED] 7 VFs
[03:44:49] [PASSED] 8 VFs
[03:44:49] [PASSED] 9 VFs
[03:44:50] [PASSED] 10 VFs
[03:44:50] [PASSED] 11 VFs
[03:44:50] [PASSED] 12 VFs
[03:44:50] [PASSED] 13 VFs
[03:44:50] [PASSED] 14 VFs
[03:44:50] [PASSED] 15 VFs
[03:44:50] [PASSED] 16 VFs
[03:44:50] [PASSED] 17 VFs
[03:44:50] [PASSED] 18 VFs
[03:44:50] [PASSED] 19 VFs
[03:44:50] [PASSED] 20 VFs
[03:44:50] [PASSED] 21 VFs
[03:44:50] [PASSED] 22 VFs
[03:44:50] [PASSED] 23 VFs
[03:44:50] [PASSED] 24 VFs
[03:44:50] [PASSED] 25 VFs
[03:44:50] [PASSED] 26 VFs
[03:44:50] [PASSED] 27 VFs
[03:44:50] [PASSED] 28 VFs
[03:44:50] [PASSED] 29 VFs
[03:44:50] [PASSED] 30 VFs
[03:44:50] [PASSED] 31 VFs
[03:44:50] [PASSED] 32 VFs
[03:44:50] [PASSED] 33 VFs
[03:44:50] [PASSED] 34 VFs
[03:44:50] [PASSED] 35 VFs
[03:44:50] [PASSED] 36 VFs
[03:44:50] [PASSED] 37 VFs
[03:44:50] [PASSED] 38 VFs
[03:44:50] [PASSED] 39 VFs
[03:44:50] [PASSED] 40 VFs
[03:44:50] [PASSED] 41 VFs
[03:44:50] [PASSED] 42 VFs
[03:44:50] [PASSED] 43 VFs
[03:44:50] [PASSED] 44 VFs
[03:44:50] [PASSED] 45 VFs
[03:44:50] [PASSED] 46 VFs
[03:44:50] [PASSED] 47 VFs
[03:44:50] [PASSED] 48 VFs
[03:44:50] [PASSED] 49 VFs
[03:44:50] [PASSED] 50 VFs
[03:44:50] [PASSED] 51 VFs
[03:44:50] [PASSED] 52 VFs
[03:44:50] [PASSED] 53 VFs
[03:44:50] [PASSED] 54 VFs
[03:44:50] [PASSED] 55 VFs
[03:44:50] [PASSED] 56 VFs
[03:44:50] [PASSED] 57 VFs
[03:44:50] [PASSED] 58 VFs
[03:44:50] [PASSED] 59 VFs
[03:44:50] [PASSED] 60 VFs
[03:44:50] [PASSED] 61 VFs
[03:44:50] [PASSED] 62 VFs
[03:44:50] [PASSED] 63 VFs
[03:44:50] ================== [PASSED] fair_contexts ==================
[03:44:50] ===================== fair_doorbells  ======================
[03:44:50] [PASSED] 1 VF
[03:44:50] [PASSED] 2 VFs
[03:44:50] [PASSED] 3 VFs
[03:44:50] [PASSED] 4 VFs
[03:44:50] [PASSED] 5 VFs
[03:44:50] [PASSED] 6 VFs
[03:44:50] [PASSED] 7 VFs
[03:44:50] [PASSED] 8 VFs
[03:44:50] [PASSED] 9 VFs
[03:44:50] [PASSED] 10 VFs
[03:44:50] [PASSED] 11 VFs
[03:44:50] [PASSED] 12 VFs
[03:44:50] [PASSED] 13 VFs
[03:44:50] [PASSED] 14 VFs
[03:44:50] [PASSED] 15 VFs
[03:44:50] [PASSED] 16 VFs
[03:44:50] [PASSED] 17 VFs
[03:44:50] [PASSED] 18 VFs
[03:44:50] [PASSED] 19 VFs
[03:44:50] [PASSED] 20 VFs
[03:44:50] [PASSED] 21 VFs
[03:44:50] [PASSED] 22 VFs
[03:44:50] [PASSED] 23 VFs
[03:44:50] [PASSED] 24 VFs
[03:44:50] [PASSED] 25 VFs
[03:44:50] [PASSED] 26 VFs
[03:44:50] [PASSED] 27 VFs
[03:44:50] [PASSED] 28 VFs
[03:44:50] [PASSED] 29 VFs
[03:44:50] [PASSED] 30 VFs
[03:44:50] [PASSED] 31 VFs
[03:44:50] [PASSED] 32 VFs
[03:44:50] [PASSED] 33 VFs
[03:44:50] [PASSED] 34 VFs
[03:44:50] [PASSED] 35 VFs
[03:44:50] [PASSED] 36 VFs
[03:44:50] [PASSED] 37 VFs
[03:44:50] [PASSED] 38 VFs
[03:44:50] [PASSED] 39 VFs
[03:44:50] [PASSED] 40 VFs
[03:44:50] [PASSED] 41 VFs
[03:44:50] [PASSED] 42 VFs
[03:44:50] [PASSED] 43 VFs
[03:44:50] [PASSED] 44 VFs
[03:44:50] [PASSED] 45 VFs
[03:44:50] [PASSED] 46 VFs
[03:44:50] [PASSED] 47 VFs
[03:44:50] [PASSED] 48 VFs
[03:44:50] [PASSED] 49 VFs
[03:44:50] [PASSED] 50 VFs
[03:44:50] [PASSED] 51 VFs
[03:44:50] [PASSED] 52 VFs
[03:44:50] [PASSED] 53 VFs
[03:44:50] [PASSED] 54 VFs
[03:44:50] [PASSED] 55 VFs
[03:44:50] [PASSED] 56 VFs
[03:44:50] [PASSED] 57 VFs
[03:44:50] [PASSED] 58 VFs
[03:44:50] [PASSED] 59 VFs
[03:44:50] [PASSED] 60 VFs
[03:44:50] [PASSED] 61 VFs
[03:44:50] [PASSED] 62 VFs
[03:44:50] [PASSED] 63 VFs
[03:44:50] ================= [PASSED] fair_doorbells ==================
[03:44:50] ======================== fair_ggtt  ========================
[03:44:50] [PASSED] 1 VF
[03:44:50] [PASSED] 2 VFs
[03:44:50] [PASSED] 3 VFs
[03:44:50] [PASSED] 4 VFs
[03:44:50] [PASSED] 5 VFs
[03:44:50] [PASSED] 6 VFs
[03:44:50] [PASSED] 7 VFs
[03:44:50] [PASSED] 8 VFs
[03:44:50] [PASSED] 9 VFs
[03:44:50] [PASSED] 10 VFs
[03:44:50] [PASSED] 11 VFs
[03:44:50] [PASSED] 12 VFs
[03:44:50] [PASSED] 13 VFs
[03:44:50] [PASSED] 14 VFs
[03:44:50] [PASSED] 15 VFs
[03:44:50] [PASSED] 16 VFs
[03:44:50] [PASSED] 17 VFs
[03:44:50] [PASSED] 18 VFs
[03:44:50] [PASSED] 19 VFs
[03:44:50] [PASSED] 20 VFs
[03:44:50] [PASSED] 21 VFs
[03:44:50] [PASSED] 22 VFs
[03:44:50] [PASSED] 23 VFs
[03:44:50] [PASSED] 24 VFs
[03:44:50] [PASSED] 25 VFs
[03:44:50] [PASSED] 26 VFs
[03:44:50] [PASSED] 27 VFs
[03:44:50] [PASSED] 28 VFs
[03:44:50] [PASSED] 29 VFs
[03:44:50] [PASSED] 30 VFs
[03:44:50] [PASSED] 31 VFs
[03:44:50] [PASSED] 32 VFs
[03:44:50] [PASSED] 33 VFs
[03:44:50] [PASSED] 34 VFs
[03:44:50] [PASSED] 35 VFs
[03:44:50] [PASSED] 36 VFs
[03:44:50] [PASSED] 37 VFs
[03:44:50] [PASSED] 38 VFs
[03:44:50] [PASSED] 39 VFs
[03:44:50] [PASSED] 40 VFs
[03:44:50] [PASSED] 41 VFs
[03:44:50] [PASSED] 42 VFs
[03:44:50] [PASSED] 43 VFs
[03:44:50] [PASSED] 44 VFs
[03:44:50] [PASSED] 45 VFs
[03:44:50] [PASSED] 46 VFs
[03:44:50] [PASSED] 47 VFs
[03:44:50] [PASSED] 48 VFs
[03:44:50] [PASSED] 49 VFs
[03:44:50] [PASSED] 50 VFs
[03:44:50] [PASSED] 51 VFs
[03:44:50] [PASSED] 52 VFs
[03:44:50] [PASSED] 53 VFs
[03:44:50] [PASSED] 54 VFs
[03:44:50] [PASSED] 55 VFs
[03:44:50] [PASSED] 56 VFs
[03:44:50] [PASSED] 57 VFs
[03:44:50] [PASSED] 58 VFs
[03:44:50] [PASSED] 59 VFs
[03:44:50] [PASSED] 60 VFs
[03:44:50] [PASSED] 61 VFs
[03:44:50] [PASSED] 62 VFs
[03:44:50] [PASSED] 63 VFs
[03:44:50] ==================== [PASSED] fair_ggtt ====================
[03:44:50] ======================== fair_vram  ========================
[03:44:50] [PASSED] 1 VF
[03:44:50] [PASSED] 2 VFs
[03:44:50] [PASSED] 3 VFs
[03:44:50] [PASSED] 4 VFs
[03:44:50] [PASSED] 5 VFs
[03:44:50] [PASSED] 6 VFs
[03:44:50] [PASSED] 7 VFs
[03:44:50] [PASSED] 8 VFs
[03:44:50] [PASSED] 9 VFs
[03:44:50] [PASSED] 10 VFs
[03:44:50] [PASSED] 11 VFs
[03:44:50] [PASSED] 12 VFs
[03:44:50] [PASSED] 13 VFs
[03:44:50] [PASSED] 14 VFs
[03:44:50] [PASSED] 15 VFs
[03:44:50] [PASSED] 16 VFs
[03:44:50] [PASSED] 17 VFs
[03:44:50] [PASSED] 18 VFs
[03:44:50] [PASSED] 19 VFs
[03:44:50] [PASSED] 20 VFs
[03:44:50] [PASSED] 21 VFs
[03:44:50] [PASSED] 22 VFs
[03:44:50] [PASSED] 23 VFs
[03:44:50] [PASSED] 24 VFs
[03:44:50] [PASSED] 25 VFs
[03:44:50] [PASSED] 26 VFs
[03:44:50] [PASSED] 27 VFs
[03:44:50] [PASSED] 28 VFs
[03:44:50] [PASSED] 29 VFs
[03:44:50] [PASSED] 30 VFs
[03:44:50] [PASSED] 31 VFs
[03:44:50] [PASSED] 32 VFs
[03:44:50] [PASSED] 33 VFs
[03:44:50] [PASSED] 34 VFs
[03:44:50] [PASSED] 35 VFs
[03:44:50] [PASSED] 36 VFs
[03:44:50] [PASSED] 37 VFs
[03:44:50] [PASSED] 38 VFs
[03:44:50] [PASSED] 39 VFs
[03:44:50] [PASSED] 40 VFs
[03:44:50] [PASSED] 41 VFs
[03:44:50] [PASSED] 42 VFs
[03:44:50] [PASSED] 43 VFs
[03:44:50] [PASSED] 44 VFs
[03:44:50] [PASSED] 45 VFs
[03:44:50] [PASSED] 46 VFs
[03:44:50] [PASSED] 47 VFs
[03:44:50] [PASSED] 48 VFs
[03:44:50] [PASSED] 49 VFs
[03:44:50] [PASSED] 50 VFs
[03:44:50] [PASSED] 51 VFs
[03:44:50] [PASSED] 52 VFs
[03:44:50] [PASSED] 53 VFs
[03:44:50] [PASSED] 54 VFs
[03:44:50] [PASSED] 55 VFs
[03:44:50] [PASSED] 56 VFs
[03:44:50] [PASSED] 57 VFs
[03:44:50] [PASSED] 58 VFs
[03:44:50] [PASSED] 59 VFs
[03:44:50] [PASSED] 60 VFs
[03:44:50] [PASSED] 61 VFs
[03:44:50] [PASSED] 62 VFs
[03:44:50] [PASSED] 63 VFs
[03:44:50] ==================== [PASSED] fair_vram ====================
[03:44:50] ================== [PASSED] pf_gt_config ===================
[03:44:50] ===================== lmtt (1 subtest) =====================
[03:44:50] ======================== test_ops  =========================
[03:44:50] [PASSED] 2-level
[03:44:50] [PASSED] multi-level
[03:44:50] ==================== [PASSED] test_ops =====================
[03:44:50] ====================== [PASSED] lmtt =======================
[03:44:50] ================= sriov_packet (1 subtest) =================
[03:44:50] [PASSED] test_descriptor_init
[03:44:50] ================== [PASSED] sriov_packet ===================
[03:44:50] ================= pf_service (11 subtests) =================
[03:44:50] [PASSED] pf_negotiate_any
[03:44:50] [PASSED] pf_negotiate_base_match
[03:44:50] [PASSED] pf_negotiate_base_newer
[03:44:50] [PASSED] pf_negotiate_base_next
[03:44:50] [SKIPPED] pf_negotiate_base_older (no older minor)
[03:44:50] [PASSED] pf_negotiate_base_prev
[03:44:50] [PASSED] pf_negotiate_latest_match
[03:44:50] [PASSED] pf_negotiate_latest_newer
[03:44:50] [PASSED] pf_negotiate_latest_next
[03:44:50] [SKIPPED] pf_negotiate_latest_older (no older minor)
[03:44:50] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[03:44:50] =================== [PASSED] pf_service ====================
[03:44:50] ================= xe_guc_g2g (2 subtests) ==================
[03:44:50] ============== xe_live_guc_g2g_kunit_default  ==============
[03:44:50] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[03:44:50] ============== xe_live_guc_g2g_kunit_allmem  ===============
[03:44:50] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[03:44:50] =================== [SKIPPED] xe_guc_g2g ===================
[03:44:50] =================== xe_mocs (2 subtests) ===================
[03:44:50] ================ xe_live_mocs_kernel_kunit  ================
[03:44:50] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[03:44:50] ================ xe_live_mocs_reset_kunit  =================
[03:44:50] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[03:44:50] ==================== [SKIPPED] xe_mocs =====================
[03:44:50] ================= xe_migrate (2 subtests) ==================
[03:44:50] ================= xe_migrate_sanity_kunit  =================
[03:44:50] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[03:44:50] ================== xe_validate_ccs_kunit  ==================
[03:44:50] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[03:44:50] =================== [SKIPPED] xe_migrate ===================
[03:44:50] ================== xe_dma_buf (1 subtest) ==================
[03:44:50] ==================== xe_dma_buf_kunit  =====================
[03:44:50] ================ [SKIPPED] xe_dma_buf_kunit ================
[03:44:50] =================== [SKIPPED] xe_dma_buf ===================
[03:44:50] ================= xe_bo_shrink (1 subtest) =================
[03:44:50] =================== xe_bo_shrink_kunit  ====================
[03:44:50] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[03:44:50] ================== [SKIPPED] xe_bo_shrink ==================
[03:44:50] ==================== xe_bo (2 subtests) ====================
[03:44:50] ================== xe_ccs_migrate_kunit  ===================
[03:44:50] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[03:44:50] ==================== xe_bo_evict_kunit  ====================
[03:44:50] =============== [SKIPPED] xe_bo_evict_kunit ================
[03:44:50] ===================== [SKIPPED] xe_bo ======================
[03:44:50] =================== xe_any (9 subtests) ====================
[03:44:50] [PASSED] test_to_xe
[03:44:50] [PASSED] test_to_dev
[03:44:50] [PASSED] test_to_pdev
[03:44:50] [PASSED] test_to_drm
[03:44:50] [PASSED] test_if_pdev
[03:44:50] [PASSED] test_if_xe
[03:44:50] [PASSED] test_if_tile
[03:44:50] [PASSED] test_if_gt
[03:44:50] [PASSED] test_to_id
[03:44:50] ===================== [PASSED] xe_any ======================
[03:44:50] ==================== args (13 subtests) ====================
[03:44:50] [PASSED] count_args_test
[03:44:50] [PASSED] call_args_example
[03:44:50] [PASSED] call_args_test
[03:44:50] [PASSED] drop_first_arg_example
[03:44:50] [PASSED] drop_first_arg_test
[03:44:50] [PASSED] first_arg_example
[03:44:50] [PASSED] first_arg_test
[03:44:50] [PASSED] last_arg_example
[03:44:50] [PASSED] last_arg_test
[03:44:50] [PASSED] pick_arg_example
[03:44:50] [PASSED] if_args_example
[03:44:50] [PASSED] if_args_test
[03:44:50] [PASSED] sep_comma_example
[03:44:50] ====================== [PASSED] args =======================
[03:44:50] =================== xe_pci (3 subtests) ====================
[03:44:50] ==================== check_graphics_ip  ====================
[03:44:50] [PASSED] 12.00 Xe_LP
[03:44:50] [PASSED] 12.10 Xe_LP+
[03:44:50] [PASSED] 12.55 Xe_HPG
[03:44:50] [PASSED] 12.60 Xe_HPC
[03:44:50] [PASSED] 12.70 Xe_LPG
[03:44:50] [PASSED] 12.71 Xe_LPG
[03:44:50] [PASSED] 12.74 Xe_LPG+
[03:44:50] [PASSED] 20.01 Xe2_HPG
[03:44:50] [PASSED] 20.02 Xe2_HPG
[03:44:50] [PASSED] 20.04 Xe2_LPG
[03:44:50] [PASSED] 30.00 Xe3_LPG
[03:44:50] [PASSED] 30.01 Xe3_LPG
[03:44:50] [PASSED] 30.03 Xe3_LPG
[03:44:50] [PASSED] 30.04 Xe3_LPG
[03:44:50] [PASSED] 30.05 Xe3_LPG
[03:44:50] [PASSED] 35.10 Xe3p_LPG
[03:44:50] [PASSED] 35.11 Xe3p_XPC
[03:44:50] ================ [PASSED] check_graphics_ip ================
[03:44:50] ===================== check_media_ip  ======================
[03:44:50] [PASSED] 12.00 Xe_M
[03:44:50] [PASSED] 12.55 Xe_HPM
[03:44:50] [PASSED] 13.00 Xe_LPM+
[03:44:50] [PASSED] 13.01 Xe2_HPM
[03:44:50] [PASSED] 20.00 Xe2_LPM
[03:44:50] [PASSED] 30.00 Xe3_LPM
[03:44:50] [PASSED] 30.02 Xe3_LPM
[03:44:50] [PASSED] 35.00 Xe3p_LPM
[03:44:50] [PASSED] 35.03 Xe3p_HPM
[03:44:50] ================= [PASSED] check_media_ip ==================
[03:44:50] =================== check_platform_desc  ===================
[03:44:50] [PASSED] 0x9A60 (TIGERLAKE)
[03:44:50] [PASSED] 0x9A68 (TIGERLAKE)
[03:44:50] [PASSED] 0x9A70 (TIGERLAKE)
[03:44:50] [PASSED] 0x9A40 (TIGERLAKE)
[03:44:50] [PASSED] 0x9A49 (TIGERLAKE)
[03:44:50] [PASSED] 0x9A59 (TIGERLAKE)
[03:44:50] [PASSED] 0x9A78 (TIGERLAKE)
[03:44:50] [PASSED] 0x9AC0 (TIGERLAKE)
[03:44:50] [PASSED] 0x9AC9 (TIGERLAKE)
[03:44:50] [PASSED] 0x9AD9 (TIGERLAKE)
[03:44:50] [PASSED] 0x9AF8 (TIGERLAKE)
[03:44:50] [PASSED] 0x4C80 (ROCKETLAKE)
[03:44:50] [PASSED] 0x4C8A (ROCKETLAKE)
[03:44:50] [PASSED] 0x4C8B (ROCKETLAKE)
[03:44:50] [PASSED] 0x4C8C (ROCKETLAKE)
[03:44:50] [PASSED] 0x4C90 (ROCKETLAKE)
[03:44:50] [PASSED] 0x4C9A (ROCKETLAKE)
[03:44:50] [PASSED] 0x4680 (ALDERLAKE_S)
[03:44:50] [PASSED] 0x4682 (ALDERLAKE_S)
[03:44:50] [PASSED] 0x4688 (ALDERLAKE_S)
[03:44:50] [PASSED] 0x468A (ALDERLAKE_S)
[03:44:50] [PASSED] 0x468B (ALDERLAKE_S)
[03:44:50] [PASSED] 0x4690 (ALDERLAKE_S)
[03:44:50] [PASSED] 0x4692 (ALDERLAKE_S)
[03:44:50] [PASSED] 0x4693 (ALDERLAKE_S)
[03:44:50] [PASSED] 0x46A0 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46A1 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46A2 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46A3 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46A6 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46A8 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46AA (ALDERLAKE_P)
[03:44:50] [PASSED] 0x462A (ALDERLAKE_P)
[03:44:50] [PASSED] 0x4626 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x4628 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46B0 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46B1 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46B2 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46B3 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46C0 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46C1 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46C2 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46C3 (ALDERLAKE_P)
[03:44:50] [PASSED] 0x46D0 (ALDERLAKE_N)
[03:44:50] [PASSED] 0x46D1 (ALDERLAKE_N)
[03:44:50] [PASSED] 0x46D2 (ALDERLAKE_N)
[03:44:50] [PASSED] 0x46D3 (ALDERLAKE_N)
[03:44:50] [PASSED] 0x46D4 (ALDERLAKE_N)
[03:44:50] [PASSED] 0xA721 (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7A1 (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7A9 (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7AC (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7AD (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA720 (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7A0 (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7A8 (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7AA (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA7AB (ALDERLAKE_P)
[03:44:50] [PASSED] 0xA780 (ALDERLAKE_S)
[03:44:50] [PASSED] 0xA781 (ALDERLAKE_S)
[03:44:50] [PASSED] 0xA782 (ALDERLAKE_S)
[03:44:50] [PASSED] 0xA783 (ALDERLAKE_S)
[03:44:50] [PASSED] 0xA788 (ALDERLAKE_S)
[03:44:50] [PASSED] 0xA789 (ALDERLAKE_S)
[03:44:50] [PASSED] 0xA78A (ALDERLAKE_S)
[03:44:50] [PASSED] 0xA78B (ALDERLAKE_S)
[03:44:50] [PASSED] 0x4905 (DG1)
[03:44:50] [PASSED] 0x4906 (DG1)
[03:44:50] [PASSED] 0x4907 (DG1)
[03:44:50] [PASSED] 0x4908 (DG1)
[03:44:50] [PASSED] 0x4909 (DG1)
[03:44:50] [PASSED] 0x56C0 (DG2)
[03:44:50] [PASSED] 0x56C2 (DG2)
[03:44:50] [PASSED] 0x56C1 (DG2)
[03:44:50] [PASSED] 0x7D51 (METEORLAKE)
[03:44:50] [PASSED] 0x7DD1 (METEORLAKE)
[03:44:50] [PASSED] 0x7D41 (METEORLAKE)
[03:44:50] [PASSED] 0x7D67 (METEORLAKE)
[03:44:50] [PASSED] 0xB640 (METEORLAKE)
[03:44:50] [PASSED] 0x56A0 (DG2)
[03:44:50] [PASSED] 0x56A1 (DG2)
[03:44:50] [PASSED] 0x56A2 (DG2)
[03:44:50] [PASSED] 0x56BE (DG2)
[03:44:50] [PASSED] 0x56BF (DG2)
[03:44:50] [PASSED] 0x5690 (DG2)
[03:44:50] [PASSED] 0x5691 (DG2)
[03:44:50] [PASSED] 0x5692 (DG2)
[03:44:50] [PASSED] 0x56A5 (DG2)
[03:44:50] [PASSED] 0x56A6 (DG2)
[03:44:50] [PASSED] 0x56B0 (DG2)
[03:44:50] [PASSED] 0x56B1 (DG2)
[03:44:50] [PASSED] 0x56BA (DG2)
[03:44:50] [PASSED] 0x56BB (DG2)
[03:44:50] [PASSED] 0x56BC (DG2)
[03:44:50] [PASSED] 0x56BD (DG2)
[03:44:50] [PASSED] 0x5693 (DG2)
[03:44:50] [PASSED] 0x5694 (DG2)
[03:44:50] [PASSED] 0x5695 (DG2)
[03:44:50] [PASSED] 0x56A3 (DG2)
[03:44:50] [PASSED] 0x56A4 (DG2)
[03:44:50] [PASSED] 0x56B2 (DG2)
[03:44:50] [PASSED] 0x56B3 (DG2)
[03:44:50] [PASSED] 0x5696 (DG2)
[03:44:50] [PASSED] 0x5697 (DG2)
[03:44:50] [PASSED] 0xB69 (PVC)
[03:44:50] [PASSED] 0xB6E (PVC)
[03:44:50] [PASSED] 0xBD4 (PVC)
[03:44:50] [PASSED] 0xBD5 (PVC)
[03:44:50] [PASSED] 0xBD6 (PVC)
[03:44:50] [PASSED] 0xBD7 (PVC)
[03:44:50] [PASSED] 0xBD8 (PVC)
[03:44:50] [PASSED] 0xBD9 (PVC)
[03:44:50] [PASSED] 0xBDA (PVC)
[03:44:50] [PASSED] 0xBDB (PVC)
[03:44:50] [PASSED] 0xBE0 (PVC)
[03:44:50] [PASSED] 0xBE1 (PVC)
[03:44:50] [PASSED] 0xBE5 (PVC)
[03:44:50] [PASSED] 0x7D40 (METEORLAKE)
[03:44:50] [PASSED] 0x7D45 (METEORLAKE)
[03:44:50] [PASSED] 0x7D55 (METEORLAKE)
[03:44:50] [PASSED] 0x7D60 (METEORLAKE)
[03:44:50] [PASSED] 0x7DD5 (METEORLAKE)
[03:44:50] [PASSED] 0x6420 (LUNARLAKE)
[03:44:50] [PASSED] 0x64A0 (LUNARLAKE)
[03:44:50] [PASSED] 0x64B0 (LUNARLAKE)
[03:44:50] [PASSED] 0xE202 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE209 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE20B (BATTLEMAGE)
[03:44:50] [PASSED] 0xE20C (BATTLEMAGE)
[03:44:50] [PASSED] 0xE20D (BATTLEMAGE)
[03:44:50] [PASSED] 0xE210 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE211 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE212 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE216 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE220 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE221 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE222 (BATTLEMAGE)
[03:44:50] [PASSED] 0xE223 (BATTLEMAGE)
[03:44:50] [PASSED] 0xB080 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB081 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB082 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB083 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB084 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB085 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB086 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB087 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB08F (PANTHERLAKE)
[03:44:50] [PASSED] 0xB090 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB0A0 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB0A1 (PANTHERLAKE)
[03:44:50] [PASSED] 0xB0B0 (PANTHERLAKE)
[03:44:50] [PASSED] 0xFD80 (PANTHERLAKE)
[03:44:50] [PASSED] 0xFD81 (PANTHERLAKE)
[03:44:50] [PASSED] 0xD740 (NOVALAKE_S)
[03:44:50] [PASSED] 0xD741 (NOVALAKE_S)
[03:44:50] [PASSED] 0xD742 (NOVALAKE_S)
[03:44:50] [PASSED] 0xD743 (NOVALAKE_S)
[03:44:50] [PASSED] 0xD745 (NOVALAKE_S)
[03:44:50] [PASSED] 0xD74A (NOVALAKE_S)
[03:44:50] [PASSED] 0xD74B (NOVALAKE_S)
[03:44:50] [PASSED] 0x674C (CRESCENTISLAND)
[03:44:50] [PASSED] 0x674D (CRESCENTISLAND)
[03:44:50] [PASSED] 0x674E (CRESCENTISLAND)
[03:44:50] [PASSED] 0x674F (CRESCENTISLAND)
[03:44:50] [PASSED] 0x6750 (CRESCENTISLAND)
[03:44:50] [PASSED] 0x6751 (CRESCENTISLAND)
[03:44:50] [PASSED] 0xD750 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD751 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD752 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD753 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD754 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD755 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD756 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD757 (NOVALAKE_P)
[03:44:50] [PASSED] 0xD75F (NOVALAKE_P)
[03:44:50] =============== [PASSED] check_platform_desc ===============
[03:44:50] ===================== [PASSED] xe_pci ======================
[03:44:50] ============= xe_rtp_tables_test (5 subtests) ==============
[03:44:50] ================== xe_rtp_table_gt_test  ===================
[03:44:50] [PASSED] gt_was/14011060649
[03:44:50] [PASSED] gt_was/14011059788
[03:44:50] [PASSED] gt_was/14015795083
[03:44:50] [PASSED] gt_was/16021867713
[03:44:50] [PASSED] gt_was/14019449301
[03:44:50] [PASSED] gt_was/16028005424
[03:44:50] [PASSED] gt_was/14026578760
[03:44:50] [PASSED] gt_was/1409420604
[03:44:50] [PASSED] gt_was/1408615072
[03:44:50] [PASSED] gt_was/22010523718
[03:44:50] [PASSED] gt_was/14011006942
[03:44:50] [PASSED] gt_was/14014830051
[03:44:50] [PASSED] gt_was/18018781329
[03:44:50] [PASSED] gt_was/1509235366
[03:44:50] [PASSED] gt_was/18018781329
[03:44:50] [PASSED] gt_was/16016694945
[03:44:50] [PASSED] gt_was/14018575942
[03:44:50] [PASSED] gt_was/22016670082
[03:44:50] [PASSED] gt_was/22016670082
[03:44:50] [PASSED] gt_was/14017421178
[03:44:50] [PASSED] gt_was/16025250150
[03:44:50] [PASSED] gt_was/14021871409
[03:44:50] [PASSED] gt_was/16021865536
[03:44:50] [PASSED] gt_was/14021486841
[03:44:50] [PASSED] gt_was/14025160223
[03:44:50] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[03:44:50] [PASSED] gt_was/14025635424
[03:44:50] [PASSED] gt_was/16028005424
[03:44:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[03:44:50] ================== xe_rtp_table_gt_test  ===================
[03:44:50] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[03:44:50] [PASSED] gt_tunings/Tuning: 32B Access Enable
[03:44:50] [PASSED] gt_tunings/Tuning: L3 cache
[03:44:50] [PASSED] gt_tunings/Tuning: L3 cache - media
[03:44:50] [PASSED] gt_tunings/Tuning: Compression Overfetch
[03:44:50] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[03:44:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[03:44:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[03:44:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[03:44:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[03:44:50] [PASSED] gt_tunings/Tuning: Stateless compression control
[03:44:50] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[03:44:50] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[03:44:50] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[03:44:50] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[03:44:50] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[03:44:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[03:44:50] ================== xe_rtp_table_oob_test  ==================
[03:44:50] [PASSED] oob_was/1607983814
[03:44:50] [PASSED] oob_was/16010904313
[03:44:50] [PASSED] oob_was/18022495364
[03:44:50] [PASSED] oob_was/22012773006
[03:44:50] [PASSED] oob_was/14014475959
[03:44:50] [PASSED] oob_was/22011391025
[03:44:50] [PASSED] oob_was/22012727170
[03:44:50] [PASSED] oob_was/22012727685
[03:44:50] [PASSED] oob_was/22016596838
[03:44:50] [PASSED] oob_was/18020744125
[03:44:50] [PASSED] oob_was/1409600907
[03:44:50] [PASSED] oob_was/22014953428
[03:44:50] [PASSED] oob_was/16017236439
[03:44:50] [PASSED] oob_was/14019821291
[03:44:50] [PASSED] oob_was/14015076503
[03:44:50] [PASSED] oob_was/22016122933
[03:44:50] [PASSED] oob_was/14018913170
[03:44:50] [PASSED] oob_was/14018094691
[03:44:50] [PASSED] oob_was/18024947630
[03:44:50] [PASSED] oob_was/16022287689
[03:44:50] [PASSED] oob_was/13011645652
[03:44:50] [PASSED] oob_was/14022293748
[03:44:50] [PASSED] oob_was/22019794406
[03:44:50] [PASSED] oob_was/22019338487
[03:44:50] [PASSED] oob_was/16023588340
[03:44:50] [PASSED] oob_was/14019789679
[03:44:50] [PASSED] oob_was/14022866841
[03:44:50] [PASSED] oob_was/16021333562
[03:44:50] [PASSED] oob_was/14016712196
[03:44:50] [PASSED] oob_was/14015568240
[03:44:50] [PASSED] oob_was/18013179988
[03:44:50] [PASSED] oob_was/1508761755
[03:44:50] [PASSED] oob_was/16023105232
[03:44:50] [PASSED] oob_was/16026508708
[03:44:50] [PASSED] oob_was/14020001231
[03:44:50] [PASSED] oob_was/16023683509
[03:44:50] [PASSED] oob_was/14025515070
[03:44:50] [PASSED] oob_was/15015404425_disable
[03:44:50] [PASSED] oob_was/16026007364
[03:44:50] [PASSED] oob_was/14020316580
[03:44:50] [PASSED] oob_was/14025883347
[03:44:50] [PASSED] oob_was/16029380221
[03:44:50] [PASSED] oob_was/22022079272
[03:44:50] [PASSED] oob_was/16029897822
[03:44:50] [PASSED] oob_was/14027054324
[03:44:50] [PASSED] oob_was/14025941587
[03:44:50] [PASSED] oob_was/16030224309
[03:44:50] ============== [PASSED] xe_rtp_table_oob_test ==============
[03:44:50] ================ xe_rtp_table_dev_oob_test  ================
[03:44:50] [PASSED] device_oob_was/22010954014
[03:44:50] [PASSED] device_oob_was/15015404425
[03:44:50] [PASSED] device_oob_was/22019338487_display
[03:44:50] [PASSED] device_oob_was/14022085890
[03:44:50] [PASSED] device_oob_was/14026539277
[03:44:50] [PASSED] device_oob_was/14026633728
[03:44:50] [PASSED] device_oob_was/14026746987
[03:44:50] [PASSED] device_oob_was/14026779378
[03:44:50] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[03:44:50] ========== xe_rtp_table_missing_upper_bound_test  ==========
[03:44:50] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[03:44:50] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[03:44:50] [PASSED] register_whitelist/1806527549
[03:44:50] [PASSED] register_whitelist/allow_read_ctx_timestamp
[03:44:50] [PASSED] register_whitelist/allow_read_queue_timestamp
[03:44:50] [PASSED] register_whitelist/16014440446
[03:44:50] [PASSED] register_whitelist/16017236439
[03:44:50] [PASSED] register_whitelist/16020183090
[03:44:50] [PASSED] register_whitelist/14024997852
[03:44:50] [PASSED] register_whitelist/14024997852
[03:44:50] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[03:44:50] =============== [PASSED] xe_rtp_tables_test ================
[03:44:50] =================== xe_rtp (3 subtests) ====================
[03:44:50] =================== xe_rtp_rules_tests  ====================
[03:44:50] [PASSED] no
[03:44:50] [PASSED] yes
[03:44:50] [PASSED] no-and-no
[03:44:50] [PASSED] no-and-yes
[03:44:50] [PASSED] yes-and-no
[03:44:50] [PASSED] yes-and-yes
[03:44:50] [PASSED] no-or-no
[03:44:50] [PASSED] no-or-yes
[03:44:50] [PASSED] yes-or-no
[03:44:50] [PASSED] yes-or-yes
[03:44:50] [PASSED] no-yes-or-yes-no
[03:44:50] [PASSED] no-yes-or-yes-yes
[03:44:50] [PASSED] yes-yes-or-no-yes
[03:44:50] [PASSED] yes-yes-or-yes-yes
[03:44:50] [PASSED] no-no-or-yes-or-no
[03:44:50] [PASSED] or
[03:44:50] [PASSED] or-yes
[03:44:50] [PASSED] or-no
[03:44:50] [PASSED] yes-or
[03:44:50] [PASSED] no-or
[03:44:50] [PASSED] no-or-or-yes
[03:44:50] [PASSED] yes-or-or-no
[03:44:50] [PASSED] no-or-or-no
[03:44:50] [PASSED] missing-context-engine-class
[03:44:50] [PASSED] missing-context-engine-class-or-yes
[03:44:50] [PASSED] missing-context-engine-class-or-or-yes
[03:44:50] =============== [PASSED] xe_rtp_rules_tests ================
[03:44:50] =============== xe_rtp_process_to_sr_tests  ================
[03:44:50] [PASSED] coalesce-same-reg
[03:44:50] [PASSED] coalesce-same-reg-literal-and-func
[03:44:50] [PASSED] no-match-no-add
[03:44:50] [PASSED] two-regs-two-entries
[03:44:50] [PASSED] clr-one-set-other
[03:44:50] [PASSED] set-field
[03:44:50] [PASSED] conflict-duplicate
[03:44:50] [PASSED] conflict-not-disjoint
[03:44:50] [PASSED] conflict-not-disjoint-literal-and-func
[03:44:50] [PASSED] conflict-reg-type
[03:44:50] [PASSED] bad-mcr-reg-forced-to-regular
[03:44:50] [PASSED] bad-regular-reg-forced-to-mcr
[03:44:50] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[03:44:50] ================== xe_rtp_process_tests  ===================
[03:44:50] [PASSED] active1
[03:44:50] [PASSED] active2
[03:44:50] [PASSED] active-inactive
[03:44:50] [PASSED] inactive-active
[03:44:50] [PASSED] inactive-active-inactive
[03:44:50] [PASSED] inactive-inactive-inactive
[03:44:50] ============== [PASSED] xe_rtp_process_tests ===============
[03:44:50] ===================== [PASSED] xe_rtp ======================
[03:44:50] ==================== xe_wa (1 subtest) =====================
[03:44:50] ======================== xe_wa_gt  =========================
[03:44:50] [PASSED] TIGERLAKE B0
[03:44:50] [PASSED] DG1 A0
[03:44:50] [PASSED] DG1 B0
[03:44:50] [PASSED] ALDERLAKE_S A0
[03:44:50] [PASSED] ALDERLAKE_S B0
[03:44:50] [PASSED] ALDERLAKE_S C0
[03:44:50] [PASSED] ALDERLAKE_S D0
[03:44:50] [PASSED] ALDERLAKE_P A0
[03:44:50] [PASSED] ALDERLAKE_P B0
[03:44:50] [PASSED] ALDERLAKE_P C0
[03:44:50] [PASSED] ALDERLAKE_S RPLS D0
[03:44:50] [PASSED] ALDERLAKE_P RPLU E0
[03:44:50] [PASSED] DG2 G10 C0
[03:44:50] [PASSED] DG2 G11 B1
[03:44:50] [PASSED] DG2 G12 A1
[03:44:50] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:44:50] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[03:44:50] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[03:44:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[03:44:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[03:44:50] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[03:44:50] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[03:44:50] ==================== [PASSED] xe_wa_gt =====================
[03:44:50] ====================== [PASSED] xe_wa ======================
[03:44:50] ============================================================
[03:44:50] Testing complete. Ran 821 tests: passed: 793, skipped: 28
[03:44:50] Elapsed time: 37.137s total, 1.892s configuring, 34.529s building, 0.704s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[03:44:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:44:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:45:17] Starting KUnit Kernel (1/1)...
[03:45:17] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:45:17] ============ drm_test_pick_cmdline (2 subtests) ============
[03:45:17] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[03:45:17] =============== drm_test_pick_cmdline_named  ===============
[03:45:17] [PASSED] NTSC
[03:45:17] [PASSED] NTSC-J
[03:45:17] [PASSED] PAL
[03:45:17] [PASSED] PAL-M
[03:45:17] =========== [PASSED] drm_test_pick_cmdline_named ===========
[03:45:17] ============== [PASSED] drm_test_pick_cmdline ==============
[03:45:17] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[03:45:17] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[03:45:17] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[03:45:17] =========== drm_validate_clone_mode (2 subtests) ===========
[03:45:17] ============== drm_test_check_in_clone_mode  ===============
[03:45:17] [PASSED] in_clone_mode
[03:45:17] [PASSED] not_in_clone_mode
[03:45:17] ========== [PASSED] drm_test_check_in_clone_mode ===========
[03:45:17] =============== drm_test_check_valid_clones  ===============
[03:45:17] [PASSED] not_in_clone_mode
[03:45:17] [PASSED] valid_clone
[03:45:17] [PASSED] invalid_clone
[03:45:17] =========== [PASSED] drm_test_check_valid_clones ===========
[03:45:17] ============= [PASSED] drm_validate_clone_mode =============
[03:45:17] ============= drm_validate_modeset (1 subtest) =============
[03:45:17] [PASSED] drm_test_check_connector_changed_modeset
[03:45:17] ============== [PASSED] drm_validate_modeset ===============
[03:45:17] ====== drm_test_bridge_get_current_state (1 subtest) =======
[03:45:17] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[03:45:17] ======== [PASSED] drm_test_bridge_get_current_state ========
[03:45:17] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[03:45:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[03:45:17] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[03:45:17] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[03:45:17] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[03:45:17] ============== drm_bridge_alloc (2 subtests) ===============
[03:45:17] [PASSED] drm_test_drm_bridge_alloc_basic
[03:45:17] [PASSED] drm_test_drm_bridge_alloc_get_put
[03:45:17] ================ [PASSED] drm_bridge_alloc =================
[03:45:17] ============= drm_bridge_bus_fmt (5 subtests) ==============
[03:45:17] [PASSED] drm_test_bridge_rgb_yuv_rgb
[03:45:17] [PASSED] drm_test_bridge_must_convert_to_yuv444
[03:45:17] [PASSED] drm_test_bridge_hdmi_auto_rgb
[03:45:17] [PASSED] drm_test_bridge_auto_first
[03:45:17] [PASSED] drm_test_bridge_rgb_yuv_no_path
[03:45:17] =============== [PASSED] drm_bridge_bus_fmt ================
[03:45:17] ============= drm_cmdline_parser (40 subtests) =============
[03:45:17] [PASSED] drm_test_cmdline_force_d_only
[03:45:17] [PASSED] drm_test_cmdline_force_D_only_dvi
[03:45:17] [PASSED] drm_test_cmdline_force_D_only_hdmi
[03:45:17] [PASSED] drm_test_cmdline_force_D_only_not_digital
[03:45:17] [PASSED] drm_test_cmdline_force_e_only
[03:45:17] [PASSED] drm_test_cmdline_res
[03:45:17] [PASSED] drm_test_cmdline_res_vesa
[03:45:17] [PASSED] drm_test_cmdline_res_vesa_rblank
[03:45:17] [PASSED] drm_test_cmdline_res_rblank
[03:45:17] [PASSED] drm_test_cmdline_res_bpp
[03:45:17] [PASSED] drm_test_cmdline_res_refresh
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[03:45:17] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[03:45:17] [PASSED] drm_test_cmdline_res_margins_force_on
[03:45:17] [PASSED] drm_test_cmdline_res_vesa_margins
[03:45:17] [PASSED] drm_test_cmdline_name
[03:45:17] [PASSED] drm_test_cmdline_name_bpp
[03:45:17] [PASSED] drm_test_cmdline_name_option
[03:45:17] [PASSED] drm_test_cmdline_name_bpp_option
[03:45:17] [PASSED] drm_test_cmdline_rotate_0
[03:45:17] [PASSED] drm_test_cmdline_rotate_90
[03:45:17] [PASSED] drm_test_cmdline_rotate_180
[03:45:17] [PASSED] drm_test_cmdline_rotate_270
[03:45:17] [PASSED] drm_test_cmdline_hmirror
[03:45:17] [PASSED] drm_test_cmdline_vmirror
[03:45:17] [PASSED] drm_test_cmdline_margin_options
[03:45:17] [PASSED] drm_test_cmdline_multiple_options
[03:45:17] [PASSED] drm_test_cmdline_bpp_extra_and_option
[03:45:17] [PASSED] drm_test_cmdline_extra_and_option
[03:45:17] [PASSED] drm_test_cmdline_freestanding_options
[03:45:17] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[03:45:17] [PASSED] drm_test_cmdline_panel_orientation
[03:45:17] ================ drm_test_cmdline_invalid  =================
[03:45:17] [PASSED] margin_only
[03:45:17] [PASSED] interlace_only
[03:45:17] [PASSED] res_missing_x
[03:45:17] [PASSED] res_missing_y
[03:45:17] [PASSED] res_bad_y
[03:45:17] [PASSED] res_missing_y_bpp
[03:45:17] [PASSED] res_bad_bpp
[03:45:17] [PASSED] res_bad_refresh
[03:45:17] [PASSED] res_bpp_refresh_force_on_off
[03:45:17] [PASSED] res_invalid_mode
[03:45:17] [PASSED] res_bpp_wrong_place_mode
[03:45:17] [PASSED] name_bpp_refresh
[03:45:17] [PASSED] name_refresh
[03:45:17] [PASSED] name_refresh_wrong_mode
[03:45:17] [PASSED] name_refresh_invalid_mode
[03:45:17] [PASSED] rotate_multiple
[03:45:17] [PASSED] rotate_invalid_val
[03:45:17] [PASSED] rotate_truncated
[03:45:17] [PASSED] invalid_option
[03:45:17] [PASSED] invalid_tv_option
[03:45:17] [PASSED] truncated_tv_option
[03:45:17] ============ [PASSED] drm_test_cmdline_invalid =============
[03:45:17] =============== drm_test_cmdline_tv_options  ===============
[03:45:17] [PASSED] NTSC
[03:45:17] [PASSED] NTSC_443
[03:45:17] [PASSED] NTSC_J
[03:45:17] [PASSED] PAL
[03:45:17] [PASSED] PAL_M
[03:45:17] [PASSED] PAL_N
[03:45:17] [PASSED] SECAM
[03:45:17] [PASSED] MONO_525
[03:45:17] [PASSED] MONO_625
[03:45:17] =========== [PASSED] drm_test_cmdline_tv_options ===========
[03:45:17] =============== [PASSED] drm_cmdline_parser ================
[03:45:17] ========== drmm_connector_hdmi_init (20 subtests) ==========
[03:45:17] [PASSED] drm_test_connector_hdmi_init_valid
[03:45:17] [PASSED] drm_test_connector_hdmi_init_bpc_8
[03:45:17] [PASSED] drm_test_connector_hdmi_init_bpc_10
[03:45:17] [PASSED] drm_test_connector_hdmi_init_bpc_12
[03:45:17] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[03:45:17] [PASSED] drm_test_connector_hdmi_init_bpc_null
[03:45:17] [PASSED] drm_test_connector_hdmi_init_formats_empty
[03:45:17] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[03:45:17] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[03:45:17] [PASSED] supported_formats=0x9 yuv420_allowed=1
[03:45:17] [PASSED] supported_formats=0x9 yuv420_allowed=0
[03:45:17] [PASSED] supported_formats=0x5 yuv420_allowed=1
[03:45:17] [PASSED] supported_formats=0x5 yuv420_allowed=0
[03:45:17] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[03:45:17] [PASSED] drm_test_connector_hdmi_init_null_ddc
[03:45:17] [PASSED] drm_test_connector_hdmi_init_null_product
[03:45:17] [PASSED] drm_test_connector_hdmi_init_null_vendor
[03:45:17] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[03:45:17] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[03:45:17] [PASSED] drm_test_connector_hdmi_init_product_valid
[03:45:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[03:45:17] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[03:45:17] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[03:45:17] ========= drm_test_connector_hdmi_init_type_valid  =========
[03:45:17] [PASSED] HDMI-A
[03:45:17] [PASSED] HDMI-B
[03:45:17] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[03:45:17] ======== drm_test_connector_hdmi_init_type_invalid  ========
[03:45:17] [PASSED] Unknown
[03:45:17] [PASSED] VGA
[03:45:17] [PASSED] DVI-I
[03:45:17] [PASSED] DVI-D
[03:45:17] [PASSED] DVI-A
[03:45:17] [PASSED] Composite
[03:45:17] [PASSED] SVIDEO
[03:45:17] [PASSED] LVDS
[03:45:17] [PASSED] Component
[03:45:17] [PASSED] DIN
[03:45:17] [PASSED] DP
[03:45:17] [PASSED] TV
[03:45:17] [PASSED] eDP
[03:45:17] [PASSED] Virtual
[03:45:17] [PASSED] DSI
[03:45:17] [PASSED] DPI
[03:45:17] [PASSED] Writeback
[03:45:17] [PASSED] SPI
[03:45:17] [PASSED] USB
[03:45:17] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[03:45:17] ============ [PASSED] drmm_connector_hdmi_init =============
[03:45:17] ============= drmm_connector_init (3 subtests) =============
[03:45:17] [PASSED] drm_test_drmm_connector_init
[03:45:17] [PASSED] drm_test_drmm_connector_init_null_ddc
[03:45:17] ========= drm_test_drmm_connector_init_type_valid  =========
[03:45:17] [PASSED] Unknown
[03:45:17] [PASSED] VGA
[03:45:17] [PASSED] DVI-I
[03:45:17] [PASSED] DVI-D
[03:45:17] [PASSED] DVI-A
[03:45:17] [PASSED] Composite
[03:45:17] [PASSED] SVIDEO
[03:45:17] [PASSED] LVDS
[03:45:17] [PASSED] Component
[03:45:17] [PASSED] DIN
[03:45:17] [PASSED] DP
[03:45:17] [PASSED] HDMI-A
[03:45:17] [PASSED] HDMI-B
[03:45:17] [PASSED] TV
[03:45:17] [PASSED] eDP
[03:45:17] [PASSED] Virtual
[03:45:17] [PASSED] DSI
[03:45:17] [PASSED] DPI
[03:45:17] [PASSED] Writeback
[03:45:17] [PASSED] SPI
[03:45:17] [PASSED] USB
[03:45:17] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[03:45:17] =============== [PASSED] drmm_connector_init ===============
[03:45:17] ========= drm_connector_dynamic_init (6 subtests) ==========
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_init
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_init_properties
[03:45:17] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[03:45:17] [PASSED] Unknown
[03:45:17] [PASSED] VGA
[03:45:17] [PASSED] DVI-I
[03:45:17] [PASSED] DVI-D
[03:45:17] [PASSED] DVI-A
[03:45:17] [PASSED] Composite
[03:45:17] [PASSED] SVIDEO
[03:45:17] [PASSED] LVDS
[03:45:17] [PASSED] Component
[03:45:17] [PASSED] DIN
[03:45:17] [PASSED] DP
[03:45:17] [PASSED] HDMI-A
[03:45:17] [PASSED] HDMI-B
[03:45:17] [PASSED] TV
[03:45:17] [PASSED] eDP
[03:45:17] [PASSED] Virtual
[03:45:17] [PASSED] DSI
[03:45:17] [PASSED] DPI
[03:45:17] [PASSED] Writeback
[03:45:17] [PASSED] SPI
[03:45:17] [PASSED] USB
[03:45:17] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[03:45:17] ======== drm_test_drm_connector_dynamic_init_name  =========
[03:45:17] [PASSED] Unknown
[03:45:17] [PASSED] VGA
[03:45:17] [PASSED] DVI-I
[03:45:17] [PASSED] DVI-D
[03:45:17] [PASSED] DVI-A
[03:45:17] [PASSED] Composite
[03:45:17] [PASSED] SVIDEO
[03:45:17] [PASSED] LVDS
[03:45:17] [PASSED] Component
[03:45:17] [PASSED] DIN
[03:45:17] [PASSED] DP
[03:45:17] [PASSED] HDMI-A
[03:45:17] [PASSED] HDMI-B
[03:45:17] [PASSED] TV
[03:45:17] [PASSED] eDP
[03:45:17] [PASSED] Virtual
[03:45:17] [PASSED] DSI
[03:45:17] [PASSED] DPI
[03:45:17] [PASSED] Writeback
[03:45:17] [PASSED] SPI
[03:45:17] [PASSED] USB
[03:45:17] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[03:45:17] =========== [PASSED] drm_connector_dynamic_init ============
[03:45:17] ==== drm_connector_dynamic_register_early (4 subtests) =====
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[03:45:17] ====== [PASSED] drm_connector_dynamic_register_early =======
[03:45:17] ======= drm_connector_dynamic_register (7 subtests) ========
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[03:45:17] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[03:45:17] ========= [PASSED] drm_connector_dynamic_register ==========
[03:45:17] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[03:45:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[03:45:17] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[03:45:17] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[03:45:17] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[03:45:17] ========== drm_test_get_tv_mode_from_name_valid  ===========
[03:45:17] [PASSED] NTSC
[03:45:17] [PASSED] NTSC-443
[03:45:17] [PASSED] NTSC-J
[03:45:17] [PASSED] PAL
[03:45:17] [PASSED] PAL-M
[03:45:17] [PASSED] PAL-N
[03:45:17] [PASSED] SECAM
[03:45:17] [PASSED] Mono
[03:45:17] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[03:45:17] [PASSED] drm_test_get_tv_mode_from_name_truncated
[03:45:17] ============ [PASSED] drm_get_tv_mode_from_name ============
[03:45:17] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[03:45:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[03:45:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[03:45:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[03:45:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[03:45:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[03:45:17] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[03:45:17] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[03:45:17] [PASSED] VIC 96
[03:45:17] [PASSED] VIC 97
[03:45:17] [PASSED] VIC 101
[03:45:17] [PASSED] VIC 102
[03:45:17] [PASSED] VIC 106
[03:45:17] [PASSED] VIC 107
[03:45:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[03:45:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[03:45:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[03:45:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[03:45:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[03:45:17] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[03:45:17] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[03:45:17] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[03:45:17] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[03:45:17] [PASSED] Automatic
[03:45:17] [PASSED] Full
[03:45:17] [PASSED] Limited 16:235
[03:45:17] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[03:45:17] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[03:45:17] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[03:45:17] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[03:45:17] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[03:45:17] [PASSED] RGB
[03:45:17] [PASSED] YUV 4:2:0
[03:45:17] [PASSED] YUV 4:2:2
[03:45:17] [PASSED] YUV 4:4:4
[03:45:17] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[03:45:17] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[03:45:17] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[03:45:17] ============= drm_damage_helper (21 subtests) ==============
[03:45:17] [PASSED] drm_test_damage_iter_no_damage
[03:45:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[03:45:17] [PASSED] drm_test_damage_iter_no_damage_src_moved
[03:45:17] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[03:45:17] [PASSED] drm_test_damage_iter_no_damage_not_visible
[03:45:17] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[03:45:17] [PASSED] drm_test_damage_iter_no_damage_no_fb
[03:45:17] [PASSED] drm_test_damage_iter_simple_damage
[03:45:17] [PASSED] drm_test_damage_iter_single_damage
[03:45:17] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[03:45:17] [PASSED] drm_test_damage_iter_single_damage_outside_src
[03:45:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[03:45:17] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[03:45:17] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[03:45:17] [PASSED] drm_test_damage_iter_single_damage_src_moved
[03:45:17] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[03:45:17] [PASSED] drm_test_damage_iter_damage
[03:45:17] [PASSED] drm_test_damage_iter_damage_one_intersect
[03:45:17] [PASSED] drm_test_damage_iter_damage_one_outside
[03:45:17] [PASSED] drm_test_damage_iter_damage_src_moved
[03:45:17] [PASSED] drm_test_damage_iter_damage_not_visible
[03:45:17] ================ [PASSED] drm_damage_helper ================
[03:45:17] ============== drm_dp_mst_helper (3 subtests) ==============
[03:45:17] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[03:45:17] [PASSED] Clock 154000 BPP 30 DSC disabled
[03:45:17] [PASSED] Clock 234000 BPP 30 DSC disabled
[03:45:17] [PASSED] Clock 297000 BPP 24 DSC disabled
[03:45:17] [PASSED] Clock 332880 BPP 24 DSC enabled
[03:45:17] [PASSED] Clock 324540 BPP 24 DSC enabled
[03:45:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[03:45:17] ============== drm_test_dp_mst_calc_pbn_div  ===============
[03:45:17] [PASSED] Link rate 2000000 lane count 4
[03:45:17] [PASSED] Link rate 2000000 lane count 2
[03:45:17] [PASSED] Link rate 2000000 lane count 1
[03:45:17] [PASSED] Link rate 1350000 lane count 4
[03:45:17] [PASSED] Link rate 1350000 lane count 2
[03:45:17] [PASSED] Link rate 1350000 lane count 1
[03:45:17] [PASSED] Link rate 1000000 lane count 4
[03:45:17] [PASSED] Link rate 1000000 lane count 2
[03:45:17] [PASSED] Link rate 1000000 lane count 1
[03:45:17] [PASSED] Link rate 810000 lane count 4
[03:45:17] [PASSED] Link rate 810000 lane count 2
[03:45:17] [PASSED] Link rate 810000 lane count 1
[03:45:17] [PASSED] Link rate 540000 lane count 4
[03:45:17] [PASSED] Link rate 540000 lane count 2
[03:45:17] [PASSED] Link rate 540000 lane count 1
[03:45:17] [PASSED] Link rate 270000 lane count 4
[03:45:17] [PASSED] Link rate 270000 lane count 2
[03:45:17] [PASSED] Link rate 270000 lane count 1
[03:45:17] [PASSED] Link rate 162000 lane count 4
[03:45:17] [PASSED] Link rate 162000 lane count 2
[03:45:17] [PASSED] Link rate 162000 lane count 1
[03:45:17] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[03:45:17] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[03:45:17] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[03:45:17] [PASSED] DP_POWER_UP_PHY with port number
[03:45:17] [PASSED] DP_POWER_DOWN_PHY with port number
[03:45:17] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[03:45:17] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[03:45:17] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[03:45:17] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[03:45:17] [PASSED] DP_QUERY_PAYLOAD with port number
[03:45:17] [PASSED] DP_QUERY_PAYLOAD with VCPI
[03:45:17] [PASSED] DP_REMOTE_DPCD_READ with port number
[03:45:17] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[03:45:17] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[03:45:17] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[03:45:17] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[03:45:17] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[03:45:17] [PASSED] DP_REMOTE_I2C_READ with port number
[03:45:17] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[03:45:17] [PASSED] DP_REMOTE_I2C_READ with transactions array
[03:45:17] [PASSED] DP_REMOTE_I2C_WRITE with port number
[03:45:17] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[03:45:17] [PASSED] DP_REMOTE_I2C_WRITE with data array
[03:45:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[03:45:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[03:45:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[03:45:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[03:45:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[03:45:17] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[03:45:17] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[03:45:17] ================ [PASSED] drm_dp_mst_helper ================
[03:45:17] ================== drm_exec (7 subtests) ===================
[03:45:17] [PASSED] sanitycheck
[03:45:17] [PASSED] test_lock
[03:45:17] [PASSED] test_lock_unlock
[03:45:17] [PASSED] test_duplicates
[03:45:17] [PASSED] test_prepare
[03:45:17] [PASSED] test_prepare_array
[03:45:17] [PASSED] test_multiple_loops
[03:45:17] ==================== [PASSED] drm_exec =====================
[03:45:17] =========== drm_format_helper_test (17 subtests) ===========
[03:45:17] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[03:45:17] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[03:45:17] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[03:45:17] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[03:45:17] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[03:45:17] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[03:45:17] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[03:45:17] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[03:45:17] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[03:45:17] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[03:45:17] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[03:45:17] ============== drm_test_fb_xrgb8888_to_mono  ===============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[03:45:17] ==================== drm_test_fb_swab  =====================
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ================ [PASSED] drm_test_fb_swab =================
[03:45:17] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[03:45:17] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[03:45:17] [PASSED] single_pixel_source_buffer
[03:45:17] [PASSED] single_pixel_clip_rectangle
[03:45:17] [PASSED] well_known_colors
[03:45:17] [PASSED] destination_pitch
[03:45:17] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[03:45:17] ================= drm_test_fb_clip_offset  =================
[03:45:17] [PASSED] pass through
[03:45:17] [PASSED] horizontal offset
[03:45:17] [PASSED] vertical offset
[03:45:17] [PASSED] horizontal and vertical offset
[03:45:17] [PASSED] horizontal offset (custom pitch)
[03:45:17] [PASSED] vertical offset (custom pitch)
[03:45:17] [PASSED] horizontal and vertical offset (custom pitch)
[03:45:17] ============= [PASSED] drm_test_fb_clip_offset =============
[03:45:17] =================== drm_test_fb_memcpy  ====================
[03:45:17] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[03:45:17] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[03:45:17] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[03:45:17] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[03:45:17] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[03:45:17] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[03:45:17] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[03:45:17] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[03:45:17] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[03:45:17] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[03:45:17] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[03:45:17] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[03:45:17] =============== [PASSED] drm_test_fb_memcpy ================
[03:45:17] ============= [PASSED] drm_format_helper_test ==============
[03:45:17] ================= drm_format (18 subtests) =================
[03:45:17] [PASSED] drm_test_format_block_width_invalid
[03:45:17] [PASSED] drm_test_format_block_width_one_plane
[03:45:17] [PASSED] drm_test_format_block_width_two_plane
[03:45:17] [PASSED] drm_test_format_block_width_three_plane
[03:45:17] [PASSED] drm_test_format_block_width_tiled
[03:45:17] [PASSED] drm_test_format_block_height_invalid
[03:45:17] [PASSED] drm_test_format_block_height_one_plane
[03:45:17] [PASSED] drm_test_format_block_height_two_plane
[03:45:17] [PASSED] drm_test_format_block_height_three_plane
[03:45:17] [PASSED] drm_test_format_block_height_tiled
[03:45:17] [PASSED] drm_test_format_min_pitch_invalid
[03:45:17] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[03:45:17] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[03:45:17] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[03:45:17] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[03:45:17] [PASSED] drm_test_format_min_pitch_two_plane
[03:45:17] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[03:45:17] [PASSED] drm_test_format_min_pitch_tiled
[03:45:17] =================== [PASSED] drm_format ====================
[03:45:17] ============== drm_framebuffer (10 subtests) ===============
[03:45:17] ========== drm_test_framebuffer_check_src_coords  ==========
[03:45:17] [PASSED] Success: source fits into fb
[03:45:17] [PASSED] Fail: overflowing fb with x-axis coordinate
[03:45:17] [PASSED] Fail: overflowing fb with y-axis coordinate
[03:45:17] [PASSED] Fail: overflowing fb with source width
[03:45:17] [PASSED] Fail: overflowing fb with source height
[03:45:17] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[03:45:17] [PASSED] drm_test_framebuffer_cleanup
[03:45:17] =============== drm_test_framebuffer_create  ===============
[03:45:17] [PASSED] ABGR8888 normal sizes
[03:45:17] [PASSED] ABGR8888 max sizes
[03:45:17] [PASSED] ABGR8888 pitch greater than min required
[03:45:17] [PASSED] ABGR8888 pitch less than min required
[03:45:17] [PASSED] ABGR8888 Invalid width
[03:45:17] [PASSED] ABGR8888 Invalid buffer handle
[03:45:17] [PASSED] No pixel format
[03:45:17] [PASSED] ABGR8888 Width 0
[03:45:17] [PASSED] ABGR8888 Height 0
[03:45:17] [PASSED] ABGR8888 Out of bound height * pitch combination
[03:45:17] [PASSED] ABGR8888 Large buffer offset
[03:45:17] [PASSED] ABGR8888 Buffer offset for inexistent plane
[03:45:17] [PASSED] ABGR8888 Invalid flag
[03:45:17] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[03:45:17] [PASSED] ABGR8888 Valid buffer modifier
[03:45:17] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[03:45:17] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[03:45:17] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[03:45:17] [PASSED] NV12 Normal sizes
[03:45:17] [PASSED] NV12 Max sizes
[03:45:17] [PASSED] NV12 Invalid pitch
[03:45:17] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[03:45:17] [PASSED] NV12 different  modifier per-plane
[03:45:17] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[03:45:17] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[03:45:17] [PASSED] NV12 Modifier for inexistent plane
[03:45:17] [PASSED] NV12 Handle for inexistent plane
[03:45:17] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[03:45:17] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[03:45:17] [PASSED] YVU420 Normal sizes
[03:45:17] [PASSED] YVU420 Max sizes
[03:45:17] [PASSED] YVU420 Invalid pitch
[03:45:17] [PASSED] YVU420 Different pitches
[03:45:17] [PASSED] YVU420 Different buffer offsets/pitches
[03:45:17] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[03:45:17] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[03:45:17] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[03:45:17] [PASSED] YVU420 Valid modifier
[03:45:17] [PASSED] YVU420 Different modifiers per plane
[03:45:17] [PASSED] YVU420 Modifier for inexistent plane
[03:45:17] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[03:45:17] [PASSED] X0L2 Normal sizes
[03:45:17] [PASSED] X0L2 Max sizes
[03:45:17] [PASSED] X0L2 Invalid pitch
[03:45:17] [PASSED] X0L2 Pitch greater than minimum required
[03:45:17] [PASSED] X0L2 Handle for inexistent plane
[03:45:17] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[03:45:17] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[03:45:17] [PASSED] X0L2 Valid modifier
[03:45:17] [PASSED] X0L2 Modifier for inexistent plane
[03:45:17] =========== [PASSED] drm_test_framebuffer_create ===========
[03:45:17] [PASSED] drm_test_framebuffer_free
[03:45:17] [PASSED] drm_test_framebuffer_init
[03:45:17] [PASSED] drm_test_framebuffer_init_bad_format
[03:45:17] [PASSED] drm_test_framebuffer_init_dev_mismatch
[03:45:17] [PASSED] drm_test_framebuffer_lookup
[03:45:17] [PASSED] drm_test_framebuffer_lookup_inexistent
[03:45:17] [PASSED] drm_test_framebuffer_modifiers_not_supported
[03:45:17] ================= [PASSED] drm_framebuffer =================
[03:45:17] ================ drm_gem_shmem (8 subtests) ================
[03:45:17] [PASSED] drm_gem_shmem_test_obj_create
[03:45:17] [PASSED] drm_gem_shmem_test_obj_create_private
[03:45:17] [PASSED] drm_gem_shmem_test_pin_pages
[03:45:17] [PASSED] drm_gem_shmem_test_vmap
[03:45:17] [PASSED] drm_gem_shmem_test_get_sg_table
[03:45:17] [PASSED] drm_gem_shmem_test_get_pages_sgt
[03:45:17] [PASSED] drm_gem_shmem_test_madvise
[03:45:17] [PASSED] drm_gem_shmem_test_purge
[03:45:17] ================== [PASSED] drm_gem_shmem ==================
[03:45:17] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[03:45:17] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[03:45:17] [PASSED] Automatic
[03:45:17] [PASSED] Full
[03:45:17] [PASSED] Limited 16:235
[03:45:17] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[03:45:17] [PASSED] drm_test_check_disable_connector
[03:45:17] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[03:45:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[03:45:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[03:45:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[03:45:17] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[03:45:17] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[03:45:17] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[03:45:17] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[03:45:17] [PASSED] drm_test_check_output_bpc_dvi
[03:45:17] [PASSED] drm_test_check_output_bpc_format_vic_1
[03:45:17] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[03:45:17] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[03:45:17] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[03:45:17] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[03:45:17] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[03:45:17] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[03:45:17] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[03:45:17] ============ drm_test_check_hdmi_color_format  =============
[03:45:17] [PASSED] AUTO -> RGB
[03:45:17] [PASSED] YCBCR422 -> YUV422
[03:45:17] [PASSED] YCBCR420 -> YUV420
[03:45:17] [PASSED] YCBCR444 -> YUV444
[03:45:17] [PASSED] RGB -> RGB
[03:45:17] ======== [PASSED] drm_test_check_hdmi_color_format =========
[03:45:17] ======== drm_test_check_hdmi_color_format_420_only  ========
[03:45:17] [PASSED] RGB should fail
[03:45:17] [PASSED] YUV444 should fail
[03:45:17] [PASSED] YUV422 should fail
[03:45:17] [PASSED] YUV420 should work
[03:45:17] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[03:45:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[03:45:17] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[03:45:17] [PASSED] drm_test_check_broadcast_rgb_value
[03:45:17] [PASSED] drm_test_check_bpc_8_value
[03:45:17] [PASSED] drm_test_check_bpc_10_value
[03:45:17] [PASSED] drm_test_check_bpc_12_value
[03:45:17] [PASSED] drm_test_check_format_value
[03:45:17] [PASSED] drm_test_check_tmds_char_value
[03:45:17] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[03:45:17] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[03:45:17] [PASSED] drm_test_check_mode_valid
[03:45:17] [PASSED] drm_test_check_mode_valid_reject
[03:45:17] [PASSED] drm_test_check_mode_valid_reject_rate
[03:45:17] [PASSED] drm_test_check_mode_valid_reject_max_clock
[03:45:17] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[03:45:17] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[03:45:17] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[03:45:17] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[03:45:17] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[03:45:17] [PASSED] drm_test_check_infoframes
[03:45:17] [PASSED] drm_test_check_reject_avi_infoframe
[03:45:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[03:45:17] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[03:45:17] [PASSED] drm_test_check_reject_audio_infoframe
[03:45:17] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[03:45:17] ================= drm_managed (2 subtests) =================
[03:45:17] [PASSED] drm_test_managed_release_action
[03:45:17] [PASSED] drm_test_managed_run_action
[03:45:17] =================== [PASSED] drm_managed ===================
[03:45:17] =================== drm_mm (6 subtests) ====================
[03:45:17] [PASSED] drm_test_mm_init
[03:45:17] [PASSED] drm_test_mm_debug
[03:45:17] [PASSED] drm_test_mm_align32
[03:45:17] [PASSED] drm_test_mm_align64
[03:45:17] [PASSED] drm_test_mm_lowest
[03:45:17] [PASSED] drm_test_mm_highest
[03:45:17] ===================== [PASSED] drm_mm ======================
[03:45:17] ============= drm_modes_analog_tv (5 subtests) =============
[03:45:17] [PASSED] drm_test_modes_analog_tv_mono_576i
[03:45:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[03:45:17] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[03:45:17] [PASSED] drm_test_modes_analog_tv_pal_576i
[03:45:17] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[03:45:17] =============== [PASSED] drm_modes_analog_tv ===============
[03:45:17] ============== drm_panic_helper (3 subtests) ===============
[03:45:17] ============= drm_test_panic_screen_user_map  ==============
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[03:45:17] ========= [PASSED] drm_test_panic_screen_user_map ==========
[03:45:17] ============= drm_test_panic_screen_user_page  =============
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[03:45:17] ========= [PASSED] drm_test_panic_screen_user_page =========
[03:45:17] ========== drm_test_panic_screen_user_set_pixel  ===========
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 494 x 494 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[03:45:17] [PASSED] Panic screen user, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 494 x 494 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1920 x 1080 	XR24 little-endian (0x34325258)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG16 little-endian (0x36314752)
[03:45:17] [PASSED] Panic screen kmsg, mode: 1024 x 768 	RG24 little-endian (0x34324752)
[03:45:17] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[03:45:17] ================ [PASSED] drm_panic_helper =================
[03:45:17] ============== drm_plane_helper (2 subtests) ===============
[03:45:17] =============== drm_test_check_plane_state  ================
[03:45:17] [PASSED] clipping_simple
[03:45:17] [PASSED] clipping_rotate_reflect
[03:45:17] [PASSED] positioning_simple
[03:45:17] [PASSED] upscaling
[03:45:17] [PASSED] downscaling
[03:45:17] [PASSED] rounding1
[03:45:17] [PASSED] rounding2
[03:45:17] [PASSED] rounding3
[03:45:17] [PASSED] rounding4
[03:45:17] =========== [PASSED] drm_test_check_plane_state ============
[03:45:17] =========== drm_test_check_invalid_plane_state  ============
[03:45:17] [PASSED] positioning_invalid
[03:45:17] [PASSED] upscaling_invalid
[03:45:17] [PASSED] downscaling_invalid
[03:45:17] ======= [PASSED] drm_test_check_invalid_plane_state ========
[03:45:17] ================ [PASSED] drm_plane_helper =================
[03:45:17] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[03:45:17] ====== drm_test_connector_helper_tv_get_modes_check  =======
[03:45:17] [PASSED] None
[03:45:17] [PASSED] PAL
[03:45:17] [PASSED] NTSC
[03:45:17] [PASSED] Both, NTSC Default
[03:45:17] [PASSED] Both, PAL Default
[03:45:17] [PASSED] Both, NTSC Default, with PAL on command-line
[03:45:17] [PASSED] Both, PAL Default, with NTSC on command-line
[03:45:17] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[03:45:17] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[03:45:17] ================== drm_rect (9 subtests) ===================
[03:45:17] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[03:45:17] [PASSED] drm_test_rect_clip_scaled_not_clipped
[03:45:17] [PASSED] drm_test_rect_clip_scaled_clipped
[03:45:17] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[03:45:17] ================= drm_test_rect_intersect  =================
[03:45:17] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[03:45:17] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[03:45:17] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[03:45:17] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[03:45:17] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[03:45:17] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[03:45:17] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[03:45:17] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[03:45:17] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[03:45:17] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[03:45:17] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[03:45:17] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[03:45:17] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[03:45:17] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[03:45:17] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[03:45:17] ============= [PASSED] drm_test_rect_intersect =============
[03:45:17] ================ drm_test_rect_calc_hscale  ================
[03:45:17] [PASSED] normal use
[03:45:17] [PASSED] out of max range
[03:45:17] [PASSED] out of min range
[03:45:17] [PASSED] zero dst
[03:45:17] [PASSED] negative src
[03:45:17] [PASSED] negative dst
[03:45:17] ============ [PASSED] drm_test_rect_calc_hscale ============
[03:45:17] ================ drm_test_rect_calc_vscale  ================
[03:45:17] [PASSED] normal use
[03:45:17] [PASSED] out of max range
[03:45:17] [PASSED] out of min range
[03:45:17] [PASSED] zero dst
[03:45:17] [PASSED] negative src
[03:45:17] [PASSED] negative dst
[03:45:17] ============ [PASSED] drm_test_rect_calc_vscale ============
[03:45:17] ================== drm_test_rect_rotate  ===================
[03:45:17] [PASSED] reflect-x
[03:45:17] [PASSED] reflect-y
[03:45:17] [PASSED] rotate-0
[03:45:17] [PASSED] rotate-90
[03:45:17] [PASSED] rotate-180
[03:45:17] [PASSED] rotate-270
[03:45:17] ============== [PASSED] drm_test_rect_rotate ===============
[03:45:17] ================ drm_test_rect_rotate_inv  =================
[03:45:17] [PASSED] reflect-x
[03:45:17] [PASSED] reflect-y
[03:45:17] [PASSED] rotate-0
[03:45:17] [PASSED] rotate-90
[03:45:17] [PASSED] rotate-180
[03:45:17] [PASSED] rotate-270
[03:45:17] ============ [PASSED] drm_test_rect_rotate_inv =============
[03:45:17] ==================== [PASSED] drm_rect =====================
[03:45:17] ============ drm_sysfb_modeset_test (1 subtest) ============
[03:45:17] ============ drm_test_sysfb_build_fourcc_list  =============
[03:45:17] [PASSED] no native formats
[03:45:17] [PASSED] XRGB8888 as native format
[03:45:17] [PASSED] remove duplicates
[03:45:17] [PASSED] convert alpha formats
[03:45:17] [PASSED] random formats
[03:45:17] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[03:45:17] ============= [PASSED] drm_sysfb_modeset_test ==============
[03:45:17] ================== drm_fixp (2 subtests) ===================
[03:45:17] [PASSED] drm_test_int2fixp
[03:45:17] [PASSED] drm_test_sm2fixp
[03:45:17] ==================== [PASSED] drm_fixp =====================
[03:45:17] ============================================================
[03:45:17] Testing complete. Ran 667 tests: passed: 667
[03:45:17] Elapsed time: 27.318s total, 1.841s configuring, 25.007s building, 0.419s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[03:45:17] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:45:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:45:30] Starting KUnit Kernel (1/1)...
[03:45:30] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:45:30] ================= ttm_device (5 subtests) ==================
[03:45:30] [PASSED] ttm_device_init_basic
[03:45:30] [PASSED] ttm_device_init_multiple
[03:45:30] [PASSED] ttm_device_fini_basic
[03:45:30] [PASSED] ttm_device_init_no_vma_man
[03:45:30] ================== ttm_device_init_pools  ==================
[03:45:30] [PASSED] No DMA allocations, no DMA32 required
[03:45:30] [PASSED] DMA allocations, DMA32 required
[03:45:30] [PASSED] No DMA allocations, DMA32 required
[03:45:30] [PASSED] DMA allocations, no DMA32 required
[03:45:30] ============== [PASSED] ttm_device_init_pools ==============
[03:45:30] =================== [PASSED] ttm_device ====================
[03:45:30] ================== ttm_pool (8 subtests) ===================
[03:45:30] ================== ttm_pool_alloc_basic  ===================
[03:45:30] [PASSED] One page
[03:45:30] [PASSED] More than one page
[03:45:30] [PASSED] Above the allocation limit
[03:45:30] [PASSED] One page, with coherent DMA mappings enabled
[03:45:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:45:30] ============== [PASSED] ttm_pool_alloc_basic ===============
[03:45:30] ============== ttm_pool_alloc_basic_dma_addr  ==============
[03:45:30] [PASSED] One page
[03:45:30] [PASSED] More than one page
[03:45:30] [PASSED] Above the allocation limit
[03:45:30] [PASSED] One page, with coherent DMA mappings enabled
[03:45:30] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[03:45:30] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[03:45:30] [PASSED] ttm_pool_alloc_order_caching_match
[03:45:30] [PASSED] ttm_pool_alloc_caching_mismatch
[03:45:30] [PASSED] ttm_pool_alloc_order_mismatch
[03:45:30] [PASSED] ttm_pool_free_dma_alloc
[03:45:30] [PASSED] ttm_pool_free_no_dma_alloc
[03:45:30] [PASSED] ttm_pool_fini_basic
[03:45:30] ==================== [PASSED] ttm_pool =====================
[03:45:30] ================ ttm_resource (8 subtests) =================
[03:45:30] ================= ttm_resource_init_basic  =================
[03:45:30] [PASSED] Init resource in TTM_PL_SYSTEM
[03:45:30] [PASSED] Init resource in TTM_PL_VRAM
[03:45:30] [PASSED] Init resource in a private placement
[03:45:30] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[03:45:30] ============= [PASSED] ttm_resource_init_basic =============
[03:45:30] [PASSED] ttm_resource_init_pinned
[03:45:30] [PASSED] ttm_resource_fini_basic
[03:45:30] [PASSED] ttm_resource_manager_init_basic
[03:45:30] [PASSED] ttm_resource_manager_usage_basic
[03:45:30] [PASSED] ttm_resource_manager_set_used_basic
[03:45:30] [PASSED] ttm_sys_man_alloc_basic
[03:45:30] [PASSED] ttm_sys_man_free_basic
[03:45:30] ================== [PASSED] ttm_resource ===================
[03:45:30] =================== ttm_tt (15 subtests) ===================
[03:45:30] ==================== ttm_tt_init_basic  ====================
[03:45:30] [PASSED] Page-aligned size
[03:45:30] [PASSED] Extra pages requested
[03:45:30] ================ [PASSED] ttm_tt_init_basic ================
[03:45:30] [PASSED] ttm_tt_init_misaligned
[03:45:30] [PASSED] ttm_tt_fini_basic
[03:45:30] [PASSED] ttm_tt_fini_sg
[03:45:30] [PASSED] ttm_tt_fini_shmem
[03:45:30] [PASSED] ttm_tt_create_basic
[03:45:30] [PASSED] ttm_tt_create_invalid_bo_type
[03:45:30] [PASSED] ttm_tt_create_ttm_exists
[03:45:30] [PASSED] ttm_tt_create_failed
[03:45:30] [PASSED] ttm_tt_destroy_basic
[03:45:30] [PASSED] ttm_tt_populate_null_ttm
[03:45:30] [PASSED] ttm_tt_populate_populated_ttm
[03:45:30] [PASSED] ttm_tt_unpopulate_basic
[03:45:30] [PASSED] ttm_tt_unpopulate_empty_ttm
[03:45:30] [PASSED] ttm_tt_swapin_basic
[03:45:30] ===================== [PASSED] ttm_tt ======================
[03:45:30] =================== ttm_bo (14 subtests) ===================
[03:45:30] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[03:45:30] [PASSED] Cannot be interrupted and sleeps
[03:45:30] [PASSED] Cannot be interrupted, locks straight away
[03:45:30] [PASSED] Can be interrupted, sleeps
[03:45:30] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[03:45:30] [PASSED] ttm_bo_reserve_locked_no_sleep
[03:45:30] [PASSED] ttm_bo_reserve_no_wait_ticket
[03:45:30] [PASSED] ttm_bo_reserve_double_resv
[03:45:30] [PASSED] ttm_bo_reserve_interrupted
[03:45:30] [PASSED] ttm_bo_reserve_deadlock
[03:45:30] [PASSED] ttm_bo_unreserve_basic
[03:45:30] [PASSED] ttm_bo_unreserve_pinned
[03:45:30] [PASSED] ttm_bo_unreserve_bulk
[03:45:30] [PASSED] ttm_bo_fini_basic
[03:45:30] [PASSED] ttm_bo_fini_shared_resv
[03:45:30] [PASSED] ttm_bo_pin_basic
[03:45:30] [PASSED] ttm_bo_pin_unpin_resource
[03:45:30] [PASSED] ttm_bo_multiple_pin_one_unpin
[03:45:30] ===================== [PASSED] ttm_bo ======================
[03:45:30] ============== ttm_bo_validate (22 subtests) ===============
[03:45:30] ============== ttm_bo_init_reserved_sys_man  ===============
[03:45:30] [PASSED] Buffer object for userspace
[03:45:30] [PASSED] Kernel buffer object
[03:45:30] [PASSED] Shared buffer object
[03:45:30] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[03:45:30] ============== ttm_bo_init_reserved_mock_man  ==============
[03:45:30] [PASSED] Buffer object for userspace
[03:45:30] [PASSED] Kernel buffer object
[03:45:30] [PASSED] Shared buffer object
[03:45:30] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[03:45:30] [PASSED] ttm_bo_init_reserved_resv
[03:45:30] ================== ttm_bo_validate_basic  ==================
[03:45:30] [PASSED] Buffer object for userspace
[03:45:30] [PASSED] Kernel buffer object
[03:45:30] [PASSED] Shared buffer object
[03:45:30] ============== [PASSED] ttm_bo_validate_basic ==============
[03:45:30] [PASSED] ttm_bo_validate_invalid_placement
[03:45:30] ============= ttm_bo_validate_same_placement  ==============
[03:45:30] [PASSED] System manager
[03:45:30] [PASSED] VRAM manager
[03:45:30] ========= [PASSED] ttm_bo_validate_same_placement ==========
[03:45:30] [PASSED] ttm_bo_validate_failed_alloc
[03:45:30] [PASSED] ttm_bo_validate_pinned
[03:45:30] [PASSED] ttm_bo_validate_busy_placement
[03:45:30] ================ ttm_bo_validate_multihop  =================
[03:45:30] [PASSED] Buffer object for userspace
[03:45:30] [PASSED] Kernel buffer object
[03:45:30] [PASSED] Shared buffer object
[03:45:30] ============ [PASSED] ttm_bo_validate_multihop =============
[03:45:30] ========== ttm_bo_validate_no_placement_signaled  ==========
[03:45:30] [PASSED] Buffer object in system domain, no page vector
[03:45:30] [PASSED] Buffer object in system domain with an existing page vector
[03:45:30] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[03:45:30] ======== ttm_bo_validate_no_placement_not_signaled  ========
[03:45:30] [PASSED] Buffer object for userspace
[03:45:30] [PASSED] Kernel buffer object
[03:45:30] [PASSED] Shared buffer object
[03:45:30] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[03:45:30] [PASSED] ttm_bo_validate_move_fence_signaled
[03:45:30] ========= ttm_bo_validate_move_fence_not_signaled  =========
[03:45:30] [PASSED] Waits for GPU
[03:45:30] [PASSED] Tries to lock straight away
[03:45:30] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[03:45:30] [PASSED] ttm_bo_validate_swapout
[03:45:30] [PASSED] ttm_bo_validate_happy_evict
[03:45:30] [PASSED] ttm_bo_validate_all_pinned_evict
[03:45:30] [PASSED] ttm_bo_validate_allowed_only_evict
[03:45:30] [PASSED] ttm_bo_validate_deleted_evict
[03:45:30] [PASSED] ttm_bo_validate_busy_domain_evict
[03:45:30] [PASSED] ttm_bo_validate_evict_gutting
[03:45:30] [PASSED] ttm_bo_validate_recrusive_evict
[03:45:30] ================= [PASSED] ttm_bo_validate =================
[03:45:30] ============================================================
[03:45:30] Testing complete. Ran 102 tests: passed: 102
[03:45:30] Elapsed time: 12.289s total, 1.885s configuring, 10.189s building, 0.179s running

+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[03:45:30] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[03:45:32] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[03:45:40] Starting KUnit Kernel (1/1)...
[03:45:40] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[03:45:41] =============== dma-buf-fence (12 subtests) ================
[03:45:41] [PASSED] test_sanitycheck
[03:45:41] [PASSED] test_signaling
[03:45:41] [PASSED] test_add_callback
[03:45:41] [PASSED] test_late_add_callback
[03:45:41] [PASSED] test_rm_callback
[03:45:41] [PASSED] test_late_rm_callback
[03:45:41] [PASSED] test_status
[03:45:41] [PASSED] test_error
[03:45:41] [PASSED] test_wait
[03:45:41] [PASSED] test_wait_timeout
[03:45:41] [PASSED] test_stub
[03:45:41] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[03:45:41] ================== [PASSED] dma-buf-fence ==================
[03:45:41] ============ dma-buf-fence-chain (11 subtests) =============
[03:45:41] [PASSED] test_sanitycheck
[03:45:41] [PASSED] test_find_seqno
[03:45:41] [PASSED] test_find_signaled
[03:45:41] [PASSED] test_find_out_of_order
[03:45:46] [PASSED] test_find_gap
[03:45:46] [PASSED] test_find_race
[03:45:46] [PASSED] test_signal_forward
[03:45:46] [PASSED] test_signal_backward
[03:45:46] [PASSED] test_wait_forward
[03:45:46] [PASSED] test_wait_backward
[03:45:46] [PASSED] test_wait_random
[03:45:46] =============== [PASSED] dma-buf-fence-chain ===============
[03:45:46] ============ dma-buf-fence-unwrap (10 subtests) ============
[03:45:46] [PASSED] test_sanitycheck
[03:45:46] [PASSED] test_unwrap_array
[03:45:46] [PASSED] test_unwrap_chain
[03:45:46] [PASSED] test_unwrap_chain_array
[03:45:46] [PASSED] test_unwrap_merge
[03:45:46] [PASSED] test_unwrap_merge_duplicate
[03:45:46] [PASSED] test_unwrap_merge_seqno
[03:45:46] [PASSED] test_unwrap_merge_order
[03:45:46] [PASSED] test_unwrap_merge_complex
[03:45:46] [PASSED] test_unwrap_merge_complex_seqno
[03:45:46] ============== [PASSED] dma-buf-fence-unwrap ===============
[03:45:46] ================ dma-buf-resv (5 subtests) =================
[03:45:46] [PASSED] test_sanitycheck
[03:45:46] ===================== test_signaling  ======================
[03:45:46] [PASSED] kernel
[03:45:46] [PASSED] write
[03:45:46] [PASSED] read
[03:45:46] [PASSED] bookkeep
[03:45:46] ================= [PASSED] test_signaling ==================
[03:45:46] ====================== test_for_each  ======================
[03:45:46] [PASSED] kernel
[03:45:46] [PASSED] write
[03:45:46] [PASSED] read
[03:45:46] [PASSED] bookkeep
[03:45:46] ================== [PASSED] test_for_each ==================
[03:45:46] ================= test_for_each_unlocked  ==================
[03:45:46] [PASSED] kernel
[03:45:46] [PASSED] write
[03:45:46] [PASSED] read
[03:45:46] [PASSED] bookkeep
[03:45:46] ============= [PASSED] test_for_each_unlocked ==============
[03:45:46] ===================== test_get_fences  =====================
[03:45:46] [PASSED] kernel
[03:45:46] [PASSED] write
[03:45:46] [PASSED] read
[03:45:46] [PASSED] bookkeep
[03:45:46] ================= [PASSED] test_get_fences =================
[03:45:46] ================== [PASSED] dma-buf-resv ===================
[03:45:46] ============================================================
[03:45:46] Testing complete. Ran 50 tests: passed: 49, skipped: 1
[03:45:46] Elapsed time: 15.973s total, 1.835s configuring, 8.765s building, 5.355s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for drm/xe/hwmon: Update hwmon thermal mailbox (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 872 bytes --]

== Series Details ==

Series: drm/xe/hwmon: Update hwmon thermal mailbox (rev5)
URL   : https://patchwork.freedesktop.org/series/174898/
State : success

== Summary ==

CI Bug Log - changes from xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5_BAT -> xe-pw-174898v5_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (15 -> 15)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5 -> xe-pw-174898v5

  IGT_9130: 9130
  xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5: 475230f9a51fc19f5097ddcbf94ebf3906d623d5
  xe-pw-174898v5: 174898v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/index.html

[-- Attachment #2: Type: text/html, Size: 1420 bytes --]

✗ Xe.CI.FULL: failure for drm/xe/hwmon: Update hwmon thermal mailbox (rev5)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 77181 bytes --]

== Series Details ==

Series: drm/xe/hwmon: Update hwmon thermal mailbox (rev5)
URL   : https://patchwork.freedesktop.org/series/174898/
State : failure

== Summary ==

CI Bug Log - changes from xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5_FULL -> xe-pw-174898v5_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-174898v5_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-174898v5_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (3 -> 3)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-174898v5_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_configfs@engines-allowed-invalid:
    - shard-bmg:          NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@xe_configfs@engines-allowed-invalid.html

  
New tests
---------

  New tests have been introduced between xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5_FULL and xe-pw-174898v5_FULL:

### New IGT tests (1) ###

  * igt@kms_rmfb@close-fd@pipe-b-hdmi-a-3:
    - Statuses : 1 pass(s)
    - Exec time: [0.32] s

  

Known issues
------------

  Here are the changes found in xe-pw-174898v5_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@intel_hwmon@hwmon-write:
    - shard-lnl:          NOTRUN -> [SKIP][2] ([Intel XE#1125] / [Intel XE#7312])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@intel_hwmon@hwmon-write.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-ptl:          NOTRUN -> [SKIP][3] ([Intel XE#5765])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_async_flips@async-flip-suspend-resume@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [ABORT][4] ([Intel XE#9394])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-4/igt@kms_async_flips@async-flip-suspend-resume@pipe-b-edp-1.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-lnl:          NOTRUN -> [SKIP][5] ([Intel XE#1407]) +4 other tests skip
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#2327]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-ptl:          NOTRUN -> [SKIP][7] ([Intel XE#6925])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-ptl:          NOTRUN -> [SKIP][8] ([Intel XE#7085]) +1 other test skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#7059] / [Intel XE#7085])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@x-tiled-32bpp-rotate-180:
    - shard-ptl:          NOTRUN -> [SKIP][10] ([Intel XE#5808]) +15 other tests skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +10 other tests skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#1124]) +2 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p:
    - shard-ptl:          NOTRUN -> [SKIP][13] ([Intel XE#7679])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_bw@connected-linear-tiling-3-displays-target-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p:
    - shard-lnl:          NOTRUN -> [SKIP][14] ([Intel XE#7679])
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_bw@connected-linear-tiling-3-displays-target-2160x1440p.html

  * igt@kms_bw@linear-tiling-2-displays-target-1920x1080p:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#367])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_bw@linear-tiling-2-displays-target-1920x1080p.html

  * igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
    - shard-ptl:          NOTRUN -> [SKIP][16] ([Intel XE#367])
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2887]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][18] ([Intel XE#5823] / [Intel XE#6918]) +4 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-1:
    - shard-bmg:          NOTRUN -> [INCOMPLETE][19] ([Intel XE#7084] / [Intel XE#8150])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-c-dp-1.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1:
    - shard-ptl:          [PASS][20] -> [ABORT][21] ([Intel XE#7084] / [Intel XE#9362]) +1 other test abort
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc:
    - shard-lnl:          NOTRUN -> [SKIP][22] ([Intel XE#3432]) +1 other test skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc:
    - shard-ptl:          NOTRUN -> [SKIP][23] ([Intel XE#5822]) +12 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][24] ([Intel XE#2887]) +9 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs.html

  * igt@kms_chamelium_audio@dp-audio:
    - shard-ptl:          NOTRUN -> [SKIP][25] ([Intel XE#2252]) +8 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_chamelium_audio@dp-audio.html

  * igt@kms_chamelium_color@gamma:
    - shard-ptl:          NOTRUN -> [SKIP][26] ([Intel XE#5824])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_chamelium_color@gamma.html
    - shard-bmg:          NOTRUN -> [SKIP][27] ([Intel XE#2325] / [Intel XE#7358])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_chamelium_color@gamma.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4:
    - shard-lnl:          NOTRUN -> [SKIP][28] ([Intel XE#7358]) +4 other tests skip
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_chamelium_color_pipeline@plane-lut1d-ctm3x4.html

  * igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d:
    - shard-ptl:          NOTRUN -> [SKIP][29] ([Intel XE#8391]) +1 other test skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_chamelium_color_pipeline@plane-lut1d-lut1d.html

  * igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
    - shard-lnl:          NOTRUN -> [SKIP][30] ([Intel XE#373]) +6 other tests skip
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-bmg:          NOTRUN -> [SKIP][31] ([Intel XE#2252]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-3:
    - shard-ptl:          NOTRUN -> [SKIP][32] ([Intel XE#6969]) +23 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-d-plane-3.html

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#6969]) +7 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_color_pipeline@plane-lut1d-ctm3x4-lut1d@pipe-d-plane-4.html

  * igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4:
    - shard-lnl:          NOTRUN -> [SKIP][34] ([Intel XE#6969]) +11 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_color_pipeline@plane-lut1d-ctm3x4@pipe-a-plane-4.html

  * igt@kms_content_protection@atomic-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#7642]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_content_protection@atomic-hdcp14.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-lnl:          NOTRUN -> [SKIP][36] ([Intel XE#307] / [Intel XE#6974])
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_content_protection@dp-mst-lic-type-0.html
    - shard-bmg:          NOTRUN -> [SKIP][37] ([Intel XE#2390] / [Intel XE#6974])
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-0-hdcp14:
    - shard-lnl:          NOTRUN -> [SKIP][38] ([Intel XE#6974])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_content_protection@dp-mst-type-0-hdcp14.html

  * igt@kms_content_protection@dp-mst-type-0-suspend-resume:
    - shard-ptl:          NOTRUN -> [SKIP][39] ([Intel XE#6974])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_content_protection@dp-mst-type-0-suspend-resume.html

  * igt@kms_content_protection@legacy:
    - shard-ptl:          NOTRUN -> [SKIP][40] ([Intel XE#7642]) +1 other test skip
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1:
    - shard-bmg:          NOTRUN -> [FAIL][41] ([Intel XE#3304])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-7/igt@kms_content_protection@lic-type-0-hdcp14@pipe-a-dp-1.html

  * igt@kms_cursor_crc@cursor-offscreen-256x85:
    - shard-lnl:          NOTRUN -> [SKIP][42] ([Intel XE#1424]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_cursor_crc@cursor-offscreen-256x85.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-ptl:          NOTRUN -> [SKIP][43] ([Intel XE#5846])
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
    - shard-bmg:          NOTRUN -> [SKIP][44] ([Intel XE#2321] / [Intel XE#7355])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-ptl:          NOTRUN -> [SKIP][45] ([Intel XE#5900]) +1 other test skip
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-ptl:          NOTRUN -> [SKIP][46] ([Intel XE#5962]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-lnl:          NOTRUN -> [SKIP][47] ([Intel XE#309] / [Intel XE#7343]) +4 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-ptl:          NOTRUN -> [SKIP][48] ([Intel XE#6035])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-lnl:          NOTRUN -> [SKIP][49] ([Intel XE#323] / [Intel XE#6035])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-ptl:          NOTRUN -> [SKIP][50] ([Intel XE#4302])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-lnl:          NOTRUN -> [SKIP][51] ([Intel XE#9536])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_dp_link_training@non-uhbr-mst.html
    - shard-bmg:          NOTRUN -> [SKIP][52] ([Intel XE#9536])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_dp_link_training@non-uhbr-mst-direct-train:
    - shard-ptl:          NOTRUN -> [SKIP][53] ([Intel XE#9532])
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_dp_link_training@non-uhbr-mst-direct-train.html

  * igt@kms_dp_link_training@non-uhbr-mst-tbtalt-train:
    - shard-ptl:          NOTRUN -> [SKIP][54] ([Intel XE#9528])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_dp_link_training@non-uhbr-mst-tbtalt-train.html

  * igt@kms_dp_link_training@uhbr-mst-direct-train:
    - shard-ptl:          NOTRUN -> [SKIP][55] ([Intel XE#9527])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_dp_link_training@uhbr-mst-direct-train.html

  * igt@kms_dp_link_training@uhbr-sst:
    - shard-bmg:          NOTRUN -> [SKIP][56] ([Intel XE#9535])
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_dp_link_training@uhbr-sst.html
    - shard-ptl:          NOTRUN -> [SKIP][57] ([Intel XE#9535])
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_dp_link_training@uhbr-sst.html

  * igt@kms_dp_link_training@uhbr-sst-tbtalt-train:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#9537])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@kms_dp_link_training@uhbr-sst-tbtalt-train.html
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#9537])
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_dp_link_training@uhbr-sst-tbtalt-train.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-lnl:          NOTRUN -> [SKIP][60] ([Intel XE#9009])
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-lnl:          NOTRUN -> [SKIP][61] ([Intel XE#8265]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc-formats-ultrajoiner:
    - shard-ptl:          NOTRUN -> [SKIP][62] ([Intel XE#5907])
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_dsc@dsc-with-bpc-formats-ultrajoiner.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-lnl:          NOTRUN -> [SKIP][63] ([Intel XE#4422] / [Intel XE#7442])
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_feature_discovery@display-2x:
    - shard-ptl:          NOTRUN -> [SKIP][64] ([Intel XE#7344])
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_feature_discovery@display-2x.html

  * igt@kms_feature_discovery@display-3x:
    - shard-ptl:          NOTRUN -> [SKIP][65] ([Intel XE#7448])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_feature_discovery@display-3x.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-lnl:          NOTRUN -> [SKIP][66] ([Intel XE#1421]) +4 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@2x-wf_vblank-ts-check-interruptible:
    - shard-ptl:          NOTRUN -> [SKIP][67] ([Intel XE#2316]) +2 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_flip@2x-wf_vblank-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
    - shard-lnl:          [PASS][68] -> [FAIL][69] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html

  * igt@kms_flip@flip-vs-expired-vblank@b-edp1:
    - shard-lnl:          NOTRUN -> [FAIL][70] ([Intel XE#301]) +1 other test fail
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
    - shard-lnl:          NOTRUN -> [SKIP][71] ([Intel XE#7178] / [Intel XE#7349])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-linear-to-32bpp-linear-reflect-x:
    - shard-ptl:          NOTRUN -> [SKIP][72] ([Intel XE#7179])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-32bpp-linear-reflect-x.html
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#7179])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-32bpp-linear-reflect-x.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-ptl:          NOTRUN -> [SKIP][74] ([Intel XE#7178]) +2 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling:
    - shard-ptl:          NOTRUN -> [SKIP][75] ([Intel XE#5828]) +3 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][76] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode:
    - shard-lnl:          NOTRUN -> [SKIP][77] ([Intel XE#1397] / [Intel XE#7385] / [Intel XE#9144])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-bmg:          NOTRUN -> [SKIP][78] ([Intel XE#7178] / [Intel XE#7351])
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
    - shard-lnl:          NOTRUN -> [SKIP][79] ([Intel XE#7178] / [Intel XE#7351]) +4 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][80] ([Intel XE#5800] / [Intel XE#6312]) +8 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][81] ([Intel XE#6312] / [Intel XE#651]) +9 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-draw-blt:
    - shard-bmg:          NOTRUN -> [SKIP][82] ([Intel XE#2311]) +15 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-10/igt@kms_frontbuffer_tracking@drrshdr-2p-scndscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][83] ([Intel XE#4141]) +2 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-ptl:          NOTRUN -> [SKIP][84] ([Intel XE#5812]) +67 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][85] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_frontbuffer_tracking@fbc-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][86] ([Intel XE#7061] / [Intel XE#7356])
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-argb161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][87] ([Intel XE#7061] / [Intel XE#7356]) +5 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcdrrs-abgr161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-offscreen-pri-indfb-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][88] ([Intel XE#6312]) +12 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-offscreen-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][89] ([Intel XE#6312]) +12 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y:
    - shard-bmg:          NOTRUN -> [SKIP][90] ([Intel XE#7399])
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html
    - shard-ptl:          NOTRUN -> [SKIP][91] ([Intel XE#7399])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][92] ([Intel XE#7061]) +5 other tests skip
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][93] ([Intel XE#7061])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@kms_frontbuffer_tracking@fbchdr-abgr161616f-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff:
    - shard-lnl:          NOTRUN -> [SKIP][94] ([Intel XE#656] / [Intel XE#7905]) +30 other tests skip
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-ptl:          NOTRUN -> [SKIP][95] ([Intel XE#5865] / [Intel XE#7399])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][96] ([Intel XE#7865]) +18 other tests skip
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][97] ([Intel XE#7061]) +6 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_frontbuffer_tracking@fbcpsrhdr-argb161616f-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsrhdr-rgb565-draw-blt:
    - shard-ptl:          NOTRUN -> [SKIP][98] ([Intel XE#7865]) +18 other tests skip
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcpsrhdr-rgb565-draw-blt.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][99] ([Intel XE#2313]) +14 other tests skip
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-shrfb-plflip-blt:
    - shard-lnl:          NOTRUN -> [SKIP][100] ([Intel XE#7905]) +37 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_frontbuffer_tracking@psrhdr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_hdmi_audio_bw@audio-bw-hblank80:
    - shard-lnl:          NOTRUN -> [SKIP][101] ([Intel XE#9312])
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_hdmi_audio_bw@audio-bw-hblank80.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-bmg:          [PASS][102] -> [ABORT][103] ([Intel XE#9362] / [Intel XE#9438]) +1 other test abort
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-bmg-5/igt@kms_hdr@bpc-switch-suspend.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-1/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-ptl:          NOTRUN -> [SKIP][104] ([Intel XE#5917] / [Intel XE#6174]) +1 other test skip
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-bmg:          [PASS][105] -> [DMESG-WARN][106] ([Intel XE#9365]) +1 other test dmesg-warn
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-2/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-lnl:          NOTRUN -> [SKIP][107] ([Intel XE#6901])
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-ptl:          NOTRUN -> [SKIP][108] ([Intel XE#6900])
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
    - shard-ptl:          NOTRUN -> [SKIP][109] ([Intel XE#7173])
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html

  * igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping:
    - shard-lnl:          NOTRUN -> [SKIP][110] ([Intel XE#7283]) +2 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_plane@pixel-format-4-tiled-bmg-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping:
    - shard-bmg:          NOTRUN -> [SKIP][111] ([Intel XE#7283]) +1 other test skip
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html

  * igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
    - shard-lnl:          NOTRUN -> [SKIP][112] ([Intel XE#8303]) +1 other test skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html

  * igt@kms_plane@pixel-format-y-tiled-modifier:
    - shard-ptl:          NOTRUN -> [SKIP][113] ([Intel XE#7283]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_plane@pixel-format-y-tiled-modifier.html

  * igt@kms_plane_lowres@tiling-y:
    - shard-ptl:          NOTRUN -> [SKIP][114] ([Intel XE#5946])
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_plane_lowres@tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-lnl:          NOTRUN -> [SKIP][115] ([Intel XE#4596] / [Intel XE#5854])
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-ptl:          NOTRUN -> [SKIP][116] ([Intel XE#4596] / [Intel XE#5854]) +1 other test skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-ptl:          NOTRUN -> [SKIP][117] ([Intel XE#5020])
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_plane_multiple@tiling-yf.html
    - shard-lnl:          NOTRUN -> [SKIP][118] ([Intel XE#5020] / [Intel XE#7348])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-ptl:          NOTRUN -> [SKIP][119] ([Intel XE#5879] / [Intel XE#7343])
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-ptl:          [PASS][120] -> [ABORT][121] ([Intel XE#9362]) +5 other tests abort
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-3/igt@kms_pm_backlight@fade-with-suspend.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-7/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888:
    - shard-lnl:          NOTRUN -> [SKIP][122] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_pm_dc@dc3co-after-dc6@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420:
    - shard-lnl:          NOTRUN -> [SKIP][123] ([Intel XE#8396]) +1 other test skip
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_pm_dc@dc3co-after-dc6@psr2-yuv420.html

  * igt@kms_pm_dc@dc3co-vpb-framegap:
    - shard-bmg:          NOTRUN -> [SKIP][124] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_pm_dc@dc3co-vpb-framegap.html

  * igt@kms_pm_dc@dc3co-vpb-framegap@pr-xrgb8888:
    - shard-ptl:          NOTRUN -> [SKIP][125] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_pm_dc@dc3co-vpb-framegap@pr-xrgb8888.html

  * igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888:
    - shard-ptl:          NOTRUN -> [SKIP][126] ([Intel XE#8396]) +1 other test skip
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888.html
    - shard-bmg:          NOTRUN -> [SKIP][127] ([Intel XE#8396]) +1 other test skip
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_pm_dc@dc3co-vpb-framegap@psr2-xrgb8888.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-bmg:          NOTRUN -> [SKIP][128] ([Intel XE#7794])
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-10/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@dc5-retention-flops:
    - shard-lnl:          NOTRUN -> [SKIP][129] ([Intel XE#3309] / [Intel XE#7368])
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_pm_dc@dc5-retention-flops.html

  * igt@kms_pm_rpm@dpms-non-lpsp:
    - shard-ptl:          NOTRUN -> [SKIP][130] ([Intel XE#5849]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_pm_rpm@dpms-non-lpsp.html

  * igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
    - shard-lnl:          NOTRUN -> [SKIP][131] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383]) +1 other test skip
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@package-g7:
    - shard-lnl:          NOTRUN -> [SKIP][132] ([Intel XE#6813])
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@kms_pm_rpm@package-g7.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
    - shard-lnl:          NOTRUN -> [SKIP][133] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][134] ([Intel XE#4608])
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][135] ([Intel XE#4608] / [Intel XE#7304])
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf@pipe-b-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-a-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][136] ([Intel XE#5858])
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][137] ([Intel XE#5858] / [Intel XE#7304]) +1 other test skip
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area@pipe-b-edp-1.html

  * igt@kms_psr2_sf@pr-cursor-plane-update-sf:
    - shard-lnl:          NOTRUN -> [SKIP][138] ([Intel XE#2893] / [Intel XE#7304])
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-ptl:          NOTRUN -> [SKIP][139] ([Intel XE#7304]) +1 other test skip
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html
    - shard-bmg:          NOTRUN -> [SKIP][140] ([Intel XE#1489])
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-lnl:          NOTRUN -> [SKIP][141] ([Intel XE#1128] / [Intel XE#7413])
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@fbc-pr-dpms:
    - shard-lnl:          NOTRUN -> [SKIP][142] ([Intel XE#1406]) +5 other tests skip
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_psr@fbc-pr-dpms.html

  * igt@kms_psr@fbc-psr-primary-render:
    - shard-bmg:          NOTRUN -> [SKIP][143] ([Intel XE#2234] / [Intel XE#2850]) +3 other tests skip
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_psr@fbc-psr-primary-render.html

  * igt@kms_psr@fbc-psr2-basic:
    - shard-lnl:          NOTRUN -> [SKIP][144] ([Intel XE#1406] / [Intel XE#7345]) +1 other test skip
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_psr@fbc-psr2-basic.html

  * igt@kms_psr@fbc-psr2-primary-blt@edp-1:
    - shard-ptl:          NOTRUN -> [SKIP][145] ([Intel XE#1406] / [Intel XE#5835]) +1 other test skip
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html
    - shard-lnl:          NOTRUN -> [SKIP][146] ([Intel XE#1406] / [Intel XE#4609] / [Intel XE#7345]) +1 other test skip
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@kms_psr@fbc-psr2-primary-blt@edp-1.html

  * igt@kms_psr@pr-sprite-plane-onoff:
    - shard-ptl:          NOTRUN -> [SKIP][147] ([Intel XE#1406]) +4 other tests skip
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_psr@pr-sprite-plane-onoff.html

  * igt@kms_rotation_crc@primary-rotation-90:
    - shard-lnl:          NOTRUN -> [SKIP][148] ([Intel XE#3414] / [Intel XE#3904] / [Intel XE#7342]) +1 other test skip
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_rotation_crc@primary-rotation-90.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][149] ([Intel XE#2330] / [Intel XE#5813])
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
    - shard-ptl:          NOTRUN -> [SKIP][150] ([Intel XE#5813]) +2 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-ptl:          NOTRUN -> [SKIP][151] ([Intel XE#5910])
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_sharpness_filter@invalid-filter-with-plane:
    - shard-bmg:          NOTRUN -> [SKIP][152] ([Intel XE#6503])
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@kms_sharpness_filter@invalid-filter-with-plane.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-ptl:          NOTRUN -> [SKIP][153] ([Intel XE#5857])
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_vrr@flip-basic:
    - shard-ptl:          NOTRUN -> [FAIL][154] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@kms_vrr@flip-basic.html

  * igt@kms_vrr@flipline@pipe-a-edp-1:
    - shard-ptl:          [PASS][155] -> [FAIL][156] ([Intel XE#4227] / [Intel XE#7397]) +1 other test fail
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-3/igt@kms_vrr@flipline@pipe-a-edp-1.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-5/igt@kms_vrr@flipline@pipe-a-edp-1.html

  * igt@kms_vrr@lobf-dc3co:
    - shard-lnl:          NOTRUN -> [SKIP][157] ([Intel XE#8397])
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@kms_vrr@lobf-dc3co.html

  * igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-system-system:
    - shard-ptl:          NOTRUN -> [ABORT][158] ([Intel XE#9362])
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-2/igt@xe_ccs@suspend-resume@xmajor-compressed-compfmt0-system-system.html

  * igt@xe_compute@eu-busy-10s:
    - shard-lnl:          NOTRUN -> [SKIP][159] ([Intel XE#6592] / [Intel XE#6645] / [Intel XE#7391])
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_compute@eu-busy-10s.html

  * igt@xe_compute_preempt@compute-preempt-many-vram:
    - shard-lnl:          NOTRUN -> [SKIP][160] ([Intel XE#5191] / [Intel XE#7316] / [Intel XE#7346])
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_compute_preempt@compute-preempt-many-vram.html

  * igt@xe_cw_post_sync@walker-post-sync:
    - shard-ptl:          NOTRUN -> [SKIP][161] ([Intel XE#8608])
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@xe_cw_post_sync@walker-post-sync.html

  * igt@xe_evict@evict-beng-cm-threads-small-multi-vm:
    - shard-lnl:          NOTRUN -> [SKIP][162] ([Intel XE#6540] / [Intel XE#688]) +7 other tests skip
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_evict@evict-beng-cm-threads-small-multi-vm.html

  * igt@xe_evict@evict-large-cm:
    - shard-ptl:          NOTRUN -> [SKIP][163] ([Intel XE#5764]) +7 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_evict@evict-large-cm.html

  * igt@xe_exec_balancer@many-parallel-userptr-invalidate-race:
    - shard-lnl:          NOTRUN -> [SKIP][164] ([Intel XE#7482]) +12 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html

  * igt@xe_exec_balancer@once-cm-parallel-userptr:
    - shard-ptl:          NOTRUN -> [SKIP][165] ([Intel XE#7482]) +14 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_exec_balancer@once-cm-parallel-userptr.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][166] ([Intel XE#1392]) +8 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind:
    - shard-bmg:          NOTRUN -> [SKIP][167] ([Intel XE#2322] / [Intel XE#7372]) +2 other tests skip
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-rebind.html

  * igt@xe_exec_basic@multigpu-once-null-rebind:
    - shard-ptl:          NOTRUN -> [SKIP][168] ([Intel XE#5575] / [Intel XE#7484]) +5 other tests skip
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_exec_basic@multigpu-once-null-rebind.html

  * igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch:
    - shard-ptl:          NOTRUN -> [SKIP][169] ([Intel XE#8374]) +8 other tests skip
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html

  * igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-imm:
    - shard-bmg:          NOTRUN -> [SKIP][170] ([Intel XE#8374]) +2 other tests skip
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@xe_exec_fault_mode@many-multi-queue-userptr-invalidate-imm.html

  * igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind:
    - shard-lnl:          NOTRUN -> [SKIP][171] ([Intel XE#8374]) +11 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_exec_fault_mode@once-multi-queue-userptr-rebind.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-priority:
    - shard-ptl:          NOTRUN -> [SKIP][172] ([Intel XE#8364]) +23 other tests skip
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@xe_exec_multi_queue@many-queues-preempt-mode-fault-priority.html

  * igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr:
    - shard-lnl:          NOTRUN -> [SKIP][173] ([Intel XE#8364]) +22 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_exec_multi_queue@many-queues-preempt-mode-userptr.html

  * igt@xe_exec_multi_queue@max-queues-preempt-mode-close-fd-smem:
    - shard-bmg:          NOTRUN -> [SKIP][174] ([Intel XE#8364]) +6 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@xe_exec_multi_queue@max-queues-preempt-mode-close-fd-smem.html

  * igt@xe_exec_reset@cm-multi-queue-gt-reset:
    - shard-ptl:          NOTRUN -> [SKIP][175] ([Intel XE#8369]) +1 other test skip
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@xe_exec_reset@cm-multi-queue-gt-reset.html

  * igt@xe_exec_reset@gt-reset-fault-injection:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][176] ([Intel XE#9130])
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@xe_exec_reset@gt-reset-fault-injection.html
    - shard-ptl:          NOTRUN -> [DMESG-WARN][177] ([Intel XE#9130])
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_exec_reset@gt-reset-fault-injection.html

  * igt@xe_exec_reset@multi-queue-cancel-on-secondary:
    - shard-lnl:          NOTRUN -> [SKIP][178] ([Intel XE#8369])
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_exec_reset@multi-queue-cancel-on-secondary.html

  * igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma:
    - shard-lnl:          NOTRUN -> [SKIP][179] ([Intel XE#6196])
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-uc-comp-multi-vma.html

  * igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race:
    - shard-lnl:          [PASS][180] -> [FAIL][181] ([Intel XE#9096] / [Intel XE#9297])
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-lnl-5/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@xe_exec_threads@threads-hang-fd-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-hang-userptr-invalidate-race:
    - shard-ptl:          [PASS][182] -> [FAIL][183] ([Intel XE#9096])
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-1/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-1/igt@xe_exec_threads@threads-hang-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-multi-queue-cm-basic:
    - shard-lnl:          NOTRUN -> [SKIP][184] ([Intel XE#8378]) +8 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_exec_threads@threads-multi-queue-cm-basic.html

  * igt@xe_exec_threads@threads-multi-queue-fd-userptr-invalidate-race:
    - shard-bmg:          NOTRUN -> [SKIP][185] ([Intel XE#8378])
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@xe_exec_threads@threads-multi-queue-fd-userptr-invalidate-race.html

  * igt@xe_exec_threads@threads-multi-queue-mixed-basic:
    - shard-ptl:          NOTRUN -> [SKIP][186] ([Intel XE#8378]) +8 other tests skip
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@xe_exec_threads@threads-multi-queue-mixed-basic.html

  * igt@xe_mmap@pci-membarrier:
    - shard-ptl:          NOTRUN -> [SKIP][187] ([Intel XE#5100] / [Intel XE#7408]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@xe_mmap@pci-membarrier.html

  * igt@xe_multigpu_svm@mgpu-atomic-op-prefetch:
    - shard-bmg:          NOTRUN -> [SKIP][188] ([Intel XE#6964])
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@xe_multigpu_svm@mgpu-atomic-op-prefetch.html
    - shard-lnl:          NOTRUN -> [SKIP][189] ([Intel XE#6964]) +1 other test skip
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@xe_multigpu_svm@mgpu-atomic-op-prefetch.html

  * igt@xe_multigpu_svm@mgpu-latency-copy-prefetch:
    - shard-ptl:          NOTRUN -> [SKIP][190] ([Intel XE#6964]) +3 other tests skip
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@xe_multigpu_svm@mgpu-latency-copy-prefetch.html

  * igt@xe_oa@oa-tlb-invalidate:
    - shard-ptl:          NOTRUN -> [SKIP][191] ([Intel XE#6069])
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@xe_oa@oa-tlb-invalidate.html

  * igt@xe_page_reclaim@pat-index-xd:
    - shard-ptl:          NOTRUN -> [SKIP][192] ([Intel XE#7793])
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@xe_page_reclaim@pat-index-xd.html

  * igt@xe_pat@l2-flush-opt-svm-pat-restrict:
    - shard-ptl:          NOTRUN -> [SKIP][193] ([Intel XE#7590]) +1 other test skip
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_pat@l2-flush-opt-svm-pat-restrict.html
    - shard-bmg:          NOTRUN -> [SKIP][194] ([Intel XE#7590])
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@xe_pat@l2-flush-opt-svm-pat-restrict.html

  * igt@xe_pat@pat-sw-hw-reset-compare:
    - shard-lnl:          NOTRUN -> [FAIL][195] ([Intel XE#7695])
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_pat@pat-sw-hw-reset-compare.html

  * igt@xe_pm@d3cold-mmap-system:
    - shard-bmg:          NOTRUN -> [SKIP][196] ([Intel XE#2284] / [Intel XE#7370]) +1 other test skip
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@xe_pm@d3cold-mmap-system.html

  * igt@xe_pm@d3cold-mmap-vram:
    - shard-lnl:          NOTRUN -> [SKIP][197] ([Intel XE#2284] / [Intel XE#366] / [Intel XE#7370])
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@xe_pm@d3cold-mmap-vram.html

  * igt@xe_pm@s2idle-d3cold-basic-exec:
    - shard-ptl:          NOTRUN -> [SKIP][198] ([Intel XE#5741]) +2 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_pm@s2idle-d3cold-basic-exec.html

  * igt@xe_pm@s3-basic-exec:
    - shard-ptl:          NOTRUN -> [SKIP][199] ([Intel XE#6867]) +2 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@xe_pm@s3-basic-exec.html

  * igt@xe_pm@s4-basic-exec:
    - shard-lnl:          [PASS][200] -> [ABORT][201] ([Intel XE#9362]) +3 other tests abort
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-lnl-5/igt@xe_pm@s4-basic-exec.html
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@xe_pm@s4-basic-exec.html

  * igt@xe_pm@vram-d3cold-threshold-store:
    - shard-ptl:          NOTRUN -> [SKIP][202] ([Intel XE#9487])
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-6/igt@xe_pm@vram-d3cold-threshold-store.html

  * igt@xe_pm_residency@cpg-basic:
    - shard-lnl:          NOTRUN -> [SKIP][203] ([Intel XE#584] / [Intel XE#7369]) +1 other test skip
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@xe_pm_residency@cpg-basic.html

  * igt@xe_pm_residency@gt-c6-freeze@gt1:
    - shard-bmg:          [PASS][204] -> [ABORT][205] ([Intel XE#9362]) +1 other test abort
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-bmg-3/igt@xe_pm_residency@gt-c6-freeze@gt1.html
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-8/igt@xe_pm_residency@gt-c6-freeze@gt1.html

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-lnl:          NOTRUN -> [SKIP][206] ([Intel XE#4650] / [Intel XE#7347])
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  * igt@xe_prefetch_fault@prefetch-fault-svm:
    - shard-lnl:          NOTRUN -> [SKIP][207] ([Intel XE#7599])
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_prefetch_fault@prefetch-fault-svm.html

  * igt@xe_query@multigpu-query-engines:
    - shard-lnl:          NOTRUN -> [SKIP][208] ([Intel XE#944]) +1 other test skip
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_query@multigpu-query-engines.html

  * igt@xe_query@multigpu-query-invalid-size:
    - shard-bmg:          NOTRUN -> [SKIP][209] ([Intel XE#944])
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-10/igt@xe_query@multigpu-query-invalid-size.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-ptl:          NOTRUN -> [SKIP][210] ([Intel XE#6019])
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-3/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  * igt@xe_sriov_admin@sched-priority-vf-write-denied:
    - shard-lnl:          NOTRUN -> [SKIP][211] ([Intel XE#7174]) +1 other test skip
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_sriov_admin@sched-priority-vf-write-denied.html

  * igt@xe_sriov_flr@flr-vf1-clear:
    - shard-lnl:          NOTRUN -> [SKIP][212] ([Intel XE#3342])
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-7/igt@xe_sriov_flr@flr-vf1-clear.html

  * igt@xe_sync_file@sync_file_race:
    - shard-lnl:          NOTRUN -> [FAIL][213] ([Intel XE#9457])
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_sync_file@sync_file_race.html

  * igt@xe_vm@overcommit-nonfault-vram-no-lr:
    - shard-lnl:          NOTRUN -> [SKIP][214] ([Intel XE#7892])
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-8/igt@xe_vm@overcommit-nonfault-vram-no-lr.html

  * igt@xe_wedged@wedged-at-any-timeout:
    - shard-bmg:          NOTRUN -> [DMESG-WARN][215] ([Intel XE#8963])
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-5/igt@xe_wedged@wedged-at-any-timeout.html
    - shard-lnl:          NOTRUN -> [DMESG-WARN][216] ([Intel XE#8963])
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@xe_wedged@wedged-at-any-timeout.html

  
#### Possible fixes ####

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-lnl:          [ABORT][217] -> [PASS][218] +1 other test pass
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-lnl-2/igt@kms_async_flips@async-flip-suspend-resume.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-4/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_async_flips@async-flip-suspend-resume@pipe-a-edp-1:
    - shard-ptl:          [ABORT][219] ([Intel XE#9362]) -> [PASS][220] +7 other tests pass
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-4/igt@kms_async_flips@async-flip-suspend-resume@pipe-a-edp-1.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-4/igt@kms_async_flips@async-flip-suspend-resume@pipe-a-edp-1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-bmg:          [FAIL][221] ([Intel XE#3321]) -> [PASS][222] +1 other test pass
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-bmg-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_pm_rpm@i2c:
    - shard-ptl:          [SKIP][223] ([Intel XE#9400]) -> [PASS][224]
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-5/igt@kms_pm_rpm@i2c.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-2/igt@kms_pm_rpm@i2c.html

  * igt@xe_evict@evict-mixed-many-threads-small:
    - shard-bmg:          [INCOMPLETE][225] ([Intel XE#6321] / [Intel XE#8355]) -> [PASS][226] +1 other test pass
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-bmg-4/igt@xe_evict@evict-mixed-many-threads-small.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-6/igt@xe_evict@evict-mixed-many-threads-small.html

  * igt@xe_fault_injection@exec-queue-create-fail-xe_hw_engine_group_add_exec_queue:
    - shard-bmg:          [ABORT][227] ([Intel XE#9463]) -> [PASS][228]
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-bmg-9/igt@xe_fault_injection@exec-queue-create-fail-xe_hw_engine_group_add_exec_queue.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-4/igt@xe_fault_injection@exec-queue-create-fail-xe_hw_engine_group_add_exec_queue.html

  * igt@xe_pm@s4-basic-exec:
    - shard-ptl:          [DMESG-WARN][229] ([Intel XE#7727]) -> [PASS][230]
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-1/igt@xe_pm@s4-basic-exec.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-1/igt@xe_pm@s4-basic-exec.html

  * igt@xe_pm@s4-vm-bind-userptr:
    - shard-lnl:          [ABORT][231] ([Intel XE#9362]) -> [PASS][232] +1 other test pass
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-lnl-8/igt@xe_pm@s4-vm-bind-userptr.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-lnl-3/igt@xe_pm@s4-vm-bind-userptr.html

  
#### Warnings ####

  * igt@kms_async_flips@async-flip-suspend-resume:
    - shard-ptl:          [ABORT][233] ([Intel XE#9362]) -> [ABORT][234] ([Intel XE#9394])
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-4/igt@kms_async_flips@async-flip-suspend-resume.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-4/igt@kms_async_flips@async-flip-suspend-resume.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-bmg:          [SKIP][235] ([Intel XE#2509] / [Intel XE#7437]) -> [SKIP][236] ([Intel XE#2426] / [Intel XE#5848])
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-bmg-3/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-bmg-6/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_pat@pat-sw-hw-suspend:
    - shard-ptl:          [FAIL][237] ([Intel XE#7695]) -> [ABORT][238] ([Intel XE#9362])
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5/shard-ptl-7/igt@xe_pat@pat-sw-hw-suspend.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/shard-ptl-8/igt@xe_pat@pat-sw-hw-suspend.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
  [Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
  [Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
  [Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
  [Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
  [Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
  [Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
  [Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
  [Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5100]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5100
  [Intel XE#5191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5191
  [Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
  [Intel XE#5741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5741
  [Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
  [Intel XE#5765]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5765
  [Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
  [Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
  [Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
  [Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
  [Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
  [Intel XE#5823]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5823
  [Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
  [Intel XE#5828]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5828
  [Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
  [Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
  [Intel XE#5846]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5846
  [Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
  [Intel XE#5849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5849
  [Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
  [Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857
  [Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
  [Intel XE#5865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5865
  [Intel XE#5879]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5879
  [Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
  [Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
  [Intel XE#5910]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5910
  [Intel XE#5917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5917
  [Intel XE#5946]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5946
  [Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
  [Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
  [Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
  [Intel XE#6069]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6069
  [Intel XE#6174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6174
  [Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
  [Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#6592]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6592
  [Intel XE#6645]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6645
  [Intel XE#6813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6813
  [Intel XE#6867]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6867
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#6900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6900
  [Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
  [Intel XE#6918]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6918
  [Intel XE#6925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6925
  [Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
  [Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
  [Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
  [Intel XE#7059]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7059
  [Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
  [Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
  [Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
  [Intel XE#7173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7173
  [Intel XE#7174]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7174
  [Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
  [Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
  [Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
  [Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
  [Intel XE#7312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7312
  [Intel XE#7316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7316
  [Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
  [Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
  [Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
  [Intel XE#7345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7345
  [Intel XE#7346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7346
  [Intel XE#7347]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7347
  [Intel XE#7348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7348
  [Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
  [Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
  [Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
  [Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
  [Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
  [Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
  [Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
  [Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
  [Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
  [Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
  [Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
  [Intel XE#7391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7391
  [Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
  [Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
  [Intel XE#7408]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7408
  [Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
  [Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
  [Intel XE#7442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7442
  [Intel XE#7448]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7448
  [Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
  [Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
  [Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
  [Intel XE#7599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7599
  [Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
  [Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
  [Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
  [Intel XE#7727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7727
  [Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
  [Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794
  [Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
  [Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
  [Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
  [Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
  [Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
  [Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
  [Intel XE#8355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8355
  [Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
  [Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
  [Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
  [Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
  [Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
  [Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
  [Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
  [Intel XE#8397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8397
  [Intel XE#8608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8608
  [Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
  [Intel XE#9009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9009
  [Intel XE#9096]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9096
  [Intel XE#9130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9130
  [Intel XE#9144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9144
  [Intel XE#9297]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9297
  [Intel XE#9312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9312
  [Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
  [Intel XE#9365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9365
  [Intel XE#9394]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9394
  [Intel XE#9400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9400
  [Intel XE#9438]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9438
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#9457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9457
  [Intel XE#9463]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9463
  [Intel XE#9487]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9487
  [Intel XE#9527]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9527
  [Intel XE#9528]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9528
  [Intel XE#9532]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9532
  [Intel XE#9535]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9535
  [Intel XE#9536]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9536
  [Intel XE#9537]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9537


Build changes
-------------

  * Linux: xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5 -> xe-pw-174898v5

  IGT_9130: 9130
  xe-5893-475230f9a51fc19f5097ddcbf94ebf3906d623d5: 475230f9a51fc19f5097ddcbf94ebf3906d623d5
  xe-pw-174898v5: 174898v5

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174898v5/index.html

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