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From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Matthew Brost <matthew.brost@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>,
	 intel-xe@lists.freedesktop.org,
	Michal Wajdeczko <michal.wajdeczko@intel.com>,
	 Matthew Auld <matthew.auld@intel.com>
Subject: Re: [PATCH v2 2/3] drm/xe/sa: Add lockdep annotations for SA manager swap_guard
Date: Mon, 09 Feb 2026 10:09:11 +0100	[thread overview]
Message-ID: <b5ca8f95ae165a38cf5aa95d1aabd8e6c60847eb.camel@linux.intel.com> (raw)
In-Reply-To: <aYYy6S+wb7LFA0G0@lstrano-desk.jf.intel.com>


Hi,

On Fri, 2026-02-06 at 10:28 -0800, Matthew Brost wrote:
> On Fri, Feb 06, 2026 at 05:17:46PM +0100, Thomas Hellström wrote:
> > Hi
> > 
> > On Wed, 2026-02-04 at 16:46 +0000, Satyanarayana K V P wrote:
> > > Annotate the SA manager init path to model taking swap_guard
> > > while
> > > under
> > > reclaim context. This helps lockdep catch potential circular
> > > dependencies
> > > between fs_reclaim and swap_guard in debug builds.
> > > 
> > > Signed-off-by: Satyanarayana K V P
> > > <satyanarayana.k.v.p@intel.com>
> > > Suggested-by: Matthew Brost <matthew.brost@intel.com>
> > > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> > > Cc: Matthew Auld <matthew.auld@intel.com>
> > > 
> > > ---
> > > V1 -> V2:
> > > - None.
> > > ---
> > >  drivers/gpu/drm/xe/xe_sa.c | 6 ++++++
> > >  1 file changed, 6 insertions(+)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_sa.c
> > > b/drivers/gpu/drm/xe/xe_sa.c
> > > index b738102575d4..5efbb5a09f77 100644
> > > --- a/drivers/gpu/drm/xe/xe_sa.c
> > > +++ b/drivers/gpu/drm/xe/xe_sa.c
> > > @@ -89,6 +89,12 @@ struct xe_sa_manager
> > > *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size,
> > >   if (ret)
> > >   return ERR_PTR(ret);
> > >  
> > > + if (IS_ENABLED(CONFIG_PROVE_LOCKING)) {
> > > + fs_reclaim_acquire(GFP_KERNEL);
> > > + might_lock(&sa_manager->swap_guard);
> > > + fs_reclaim_release(GFP_KERNEL);
> > > + }
> > > +
> > >   shadow = xe_managed_bo_create_pin_map(xe, tile, size,
> > >         XE_BO_FLAG_VRAM_IF_DGFX(tile) |
> > >         XE_BO_FLAG_GGTT |
> > 
> > Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > 
> > In addition to this, a couple of comments to the code that is
> > already
> > in the driver:
> > 
> > It would be beneficial for understanding if a document section was
> > added for the typical usage flow of the shadow buffer, something
> > like
> > the below (hope I got this correct).
> > 
> > *) Clearly stating the use-case: That the whole buffer is bound to
> > HW
> > and can execute at any time. The shadow buffer is part of a double
> > buffering scheme so that updates are visible to the hardware
> > atomically.
> > 
> > *) The flow:
> > -lock()
> > -Swap buffers: The buffers are identical. The buffer bound to
> > hardware
> > becomes the shadow.
> > -Update the primary buffer.
> > -Flush the cpu buffer to primary on DGFX (BTW IIRC this was missing
> > in
> > the code). -Point the HW to the primary buffer.
> > -sync the shadow to the primary.
> > -unlock()
> > 
> 
> This is is roughly correct. I agree a kernel doc section would be
> good.
> 
> > In addition perhaps more lockdep asserts an also perhaps pin the
> > lock
> 
> More lockdep is also good. What functions do you think are missing
> asserts?
> 
> These are two possible ones I came up with:
> 
> xe_sriov_vf_ccs_rw_update_bb_addr


> xe_bb_ccs_new

These are possible candidates, But I was mostly thinking of the xe_sa
functions involved in the above flow. So that would essentially be
xe_sa_bo_flush_write() missing asserts.


> 
> > in swap buffers and unpin in sync to shadow so that if anybody
> > releases
> 
> Pin/unpin isn’t a bad idea. We could also have xe_sa_bo_swap_shadow /
> xe_sa_bo_sync_shadow acquire and release the swap lock, since that
> clearly
> defines the critical section for this lock - what do think?
> 
> > the lock in between you'd get a warning.
> > 
> > But this can be done as a follow-up, (beware the possibly missing
> > cpu
> 
> There are barriers in xe_sriov_vf_ccs_rw_update_bb_addr, do you think
> anything else is missing?

Yes, on DGFX we maintain a system memory buffer to avoid read
operations over PCIe. So writes to the sa memory doesn't immediately
appear in primary gpu memory. It needs a xe_sa_bo_flush_write(). I
might have missed it, but I don't see it in the code?

Also as an unrelated item, I think we should use scoped_guard() instead
of guard() for xe_bo_swap_guard() to clearly mark the region where the
lock is strictly needed? Would make it easier for a new developer
reading the code or somebody updating the code at the end of the
function to not add unnecessary stuff in the critical section.

Thanks,
Thomas

> 
> Matt
> 
> > buffer flush, though). I think it's worth spending some time on
> > this.
> > 
> > Thanks,
> > Thomas
> >    A. 

  reply	other threads:[~2026-02-09  9:09 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-04 16:46 [PATCH v2 0/3] Fix fs_reclaim deadlock caused by CCS save/restore Satyanarayana K V P
2026-02-04 16:46 ` [PATCH v2 1/3] drm/sa: Split drm_suballoc_new() into SA alloc and init helpers Satyanarayana K V P
2026-02-04 19:45   ` Matthew Brost
2026-02-06 12:34   ` Thomas Hellström
2026-02-06 15:27     ` Christian König
2026-02-04 16:46 ` [PATCH v2 2/3] drm/xe/sa: Add lockdep annotations for SA manager swap_guard Satyanarayana K V P
2026-02-04 19:11   ` Matthew Brost
2026-02-06 16:17   ` Thomas Hellström
2026-02-06 18:28     ` Matthew Brost
2026-02-09  9:09       ` Thomas Hellström [this message]
2026-02-09 17:07         ` Matthew Brost
2026-02-04 16:46 ` [PATCH v2 3/3] drm/xe/vf: Fix fs_reclaim warning with CCS save/restore BB allocation Satyanarayana K V P
2026-02-04 19:18   ` Matthew Brost
2026-02-06 12:49   ` Thomas Hellström
2026-02-05  2:49 ` ✓ CI.KUnit: success for Fix fs_reclaim deadlock caused by CCS save/restore (rev2) Patchwork
2026-02-05  3:24 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-05 18:34 ` ✓ Xe.CI.FULL: " Patchwork

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