From: Jani Nikula <jani.nikula@intel.com>
To: Uma Shankar <uma.shankar@intel.com>,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, Uma Shankar <uma.shankar@intel.com>
Subject: Re: [PATCH 08/19] drm/{i915, xe}: Removed i915_reg.h from intel_display.c
Date: Wed, 17 Dec 2025 16:04:15 +0200 [thread overview]
Message-ID: <b72e47f19b42c10825f869a3016d44176be1db25@intel.com> (raw)
In-Reply-To: <20251217062209.852324-9-uma.shankar@intel.com>
On Wed, 17 Dec 2025, Uma Shankar <uma.shankar@intel.com> wrote:
> Move CHICKEN_PIPESL_1 to common header to free intel_display.c
> from including i915_reg.h
Same as before, I think this is display stuff that belongs under
display, intel_clock_gating.c parts that use it belong in display/ too,
and gvt can include the header directly.
BR,
Jani.
>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/i915_reg.h | 23 --------------------
> include/drm/intel/intel_gmd_common_regs.h | 23 ++++++++++++++++++++
> 3 files changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 9c6d3ecdb589..ad2782d85074 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -45,13 +45,13 @@
> #include <drm/drm_probe_helper.h>
> #include <drm/drm_rect.h>
> #include <drm/drm_vblank.h>
> +#include <drm/intel/intel_gmd_common_regs.h>
>
> #include "g4x_dp.h"
> #include "g4x_hdmi.h"
> #include "hsw_ips.h"
> #include "i915_config.h"
> #include "i915_drv.h"
> -#include "i915_reg.h"
> #include "i9xx_plane.h"
> #include "i9xx_plane_regs.h"
> #include "i9xx_wm.h"
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c9fb9af1a35c..e807be4a9962 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -878,29 +878,6 @@
> #define CHICKEN_PAR2_1 _MMIO(0x42090)
> #define KVM_CONFIG_CHANGE_NOTIFICATION_SELECT REG_BIT(14)
>
> -#define _CHICKEN_PIPESL_1_A 0x420b0
> -#define _CHICKEN_PIPESL_1_B 0x420b4
> -#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
> -#define HSW_PRI_STRETCH_MAX_MASK REG_GENMASK(28, 27)
> -#define HSW_PRI_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 0)
> -#define HSW_PRI_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 1)
> -#define HSW_PRI_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 2)
> -#define HSW_PRI_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 3)
> -#define HSW_SPR_STRETCH_MAX_MASK REG_GENMASK(26, 25)
> -#define HSW_SPR_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 0)
> -#define HSW_SPR_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 1)
> -#define HSW_SPR_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 2)
> -#define HSW_SPR_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 3)
> -#define HSW_FBCQ_DIS REG_BIT(22)
> -#define HSW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(15) /* hsw */
> -#define SKL_PSR_MASK_PLANE_FLIP REG_BIT(11) /* skl+ */
> -#define SKL_PLANE1_STRETCH_MAX_MASK REG_GENMASK(1, 0)
> -#define SKL_PLANE1_STRETCH_MAX_X8 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 0)
> -#define SKL_PLANE1_STRETCH_MAX_X4 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 1)
> -#define SKL_PLANE1_STRETCH_MAX_X2 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 2)
> -#define SKL_PLANE1_STRETCH_MAX_X1 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 3)
> -#define BDW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(0) /* bdw */
> -
> #define DISP_ARB_CTL _MMIO(0x45000)
> #define DISP_FBC_MEMORY_WAKE REG_BIT(31)
> #define DISP_TILE_SURFACE_SWIZZLING REG_BIT(13)
> diff --git a/include/drm/intel/intel_gmd_common_regs.h b/include/drm/intel/intel_gmd_common_regs.h
> index d4f91703e8a0..1908c203d54c 100644
> --- a/include/drm/intel/intel_gmd_common_regs.h
> +++ b/include/drm/intel/intel_gmd_common_regs.h
> @@ -80,6 +80,29 @@
> #define CNP_PWM_CGE_GATING_DISABLE (1 << 13)
> #define PCH_LP_PARTITION_LEVEL_DISABLE (1 << 12)
>
> +#define _CHICKEN_PIPESL_1_A 0x420b0
> +#define _CHICKEN_PIPESL_1_B 0x420b4
> +#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
> +#define HSW_PRI_STRETCH_MAX_MASK REG_GENMASK(28, 27)
> +#define HSW_PRI_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 0)
> +#define HSW_PRI_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 1)
> +#define HSW_PRI_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 2)
> +#define HSW_PRI_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_PRI_STRETCH_MAX_MASK, 3)
> +#define HSW_SPR_STRETCH_MAX_MASK REG_GENMASK(26, 25)
> +#define HSW_SPR_STRETCH_MAX_X8 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 0)
> +#define HSW_SPR_STRETCH_MAX_X4 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 1)
> +#define HSW_SPR_STRETCH_MAX_X2 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 2)
> +#define HSW_SPR_STRETCH_MAX_X1 REG_FIELD_PREP(HSW_SPR_STRETCH_MAX_MASK, 3)
> +#define HSW_FBCQ_DIS REG_BIT(22)
> +#define HSW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(15) /* hsw */
> +#define SKL_PSR_MASK_PLANE_FLIP REG_BIT(11) /* skl+ */
> +#define SKL_PLANE1_STRETCH_MAX_MASK REG_GENMASK(1, 0)
> +#define SKL_PLANE1_STRETCH_MAX_X8 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 0)
> +#define SKL_PLANE1_STRETCH_MAX_X4 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 1)
> +#define SKL_PLANE1_STRETCH_MAX_X2 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 2)
> +#define SKL_PLANE1_STRETCH_MAX_X1 REG_FIELD_PREP(SKL_PLANE1_STRETCH_MAX_MASK, 3)
> +#define BDW_UNMASK_VBL_TO_REGS_IN_SRD REG_BIT(0) /* bdw */
> +
> #define _TRANSA_CHICKEN2 0xf0064
> #define _TRANSB_CHICKEN2 0xf1064
> #define TRANS_CHICKEN2(pipe) _MMIO_PIPE(pipe, _TRANSA_CHICKEN2, _TRANSB_CHICKEN2)
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-12-17 14:04 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-17 6:21 [PATCH 00/19] Make Display free from i915_reg.h Uma Shankar
2025-12-17 6:21 ` [PATCH 01/19] drm/{i915, xe}: Extract common registers into a separate file Uma Shankar
2025-12-17 13:57 ` Jani Nikula
2025-12-18 9:06 ` Shankar, Uma
2025-12-17 6:21 ` [PATCH 02/19] drm/{i915, xe}: Extract South chicken registers Uma Shankar
2025-12-17 13:58 ` Jani Nikula
2025-12-17 6:21 ` [PATCH 03/19] drm/{i915, xe}: Extract display interrupt definitions Uma Shankar
2025-12-17 6:21 ` [PATCH 04/19] drm/{i915, xe}: Extract DSPCLK_GATE_D Uma Shankar
2025-12-17 14:01 ` Jani Nikula
2025-12-17 6:21 ` [PATCH 05/19] drm/{i915, xe}: Extract pcode definitions Uma Shankar
2025-12-17 6:21 ` [PATCH 06/19] drm/{i915, xe}: Remove i915_reg.h from intel_display_device.c Uma Shankar
2025-12-17 6:21 ` [PATCH 07/19] drm/{i915, xe}: Remove i915_reg.h from intel_dram.c Uma Shankar
2025-12-17 14:03 ` Jani Nikula
2025-12-17 6:21 ` [PATCH 08/19] drm/{i915, xe}: Removed i915_reg.h from intel_display.c Uma Shankar
2025-12-17 14:04 ` Jani Nikula [this message]
2025-12-17 6:21 ` [PATCH 09/19] drm/{i915, xe}: Remove i915_reg.h from intel_overlay.c Uma Shankar
2025-12-17 6:22 ` [PATCH 10/19] drm/{i915, xe}: Remove i915_reg.h from g4x_dp.c Uma Shankar
2025-12-17 6:22 ` [PATCH 11/19] drm/{i915, xe}: Remove i915_reg.h from i9xx_wm.c Uma Shankar
2025-12-17 6:22 ` [PATCH 12/19] drm/{i915, xe}: Remove i915_reg.h from g4x_hdmi.c Uma Shankar
2025-12-17 6:22 ` [PATCH 13/19] drm/{i915, xe}: Remove i915_reg.h from intel_rom.c Uma Shankar
2025-12-17 6:22 ` [PATCH 14/19] drm/{i915, xe}: Remove i915_reg.h from intel_psr.c Uma Shankar
2025-12-17 6:22 ` [PATCH 15/19] drm/{i915, xe}: Remove i915_reg.h from intel_fifo_underrun.c Uma Shankar
2025-12-17 6:22 ` [PATCH 16/19] drm/{i915, xe}: Remove i915_reg.h from intel_display_irq.c Uma Shankar
2025-12-17 6:22 ` [PATCH 17/19] drm/{i915, xe}: Remove i915_reg.h from intel_display_power_well.c Uma Shankar
2025-12-17 6:22 ` [PATCH 18/19] drm/{i915, xe}: Remove i915_reg.h from intel_modeset_setup.c Uma Shankar
2025-12-17 6:22 ` [PATCH 19/19] drm/{i915, xe}: Removed i915_reg.h from display Uma Shankar
2025-12-17 6:26 ` ✗ CI.checkpatch: warning for Make Display free from i915_reg.h Patchwork
2025-12-17 6:27 ` ✓ CI.KUnit: success " Patchwork
2025-12-17 6:46 ` ✗ CI.checksparse: warning " Patchwork
2025-12-17 7:53 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-17 14:06 ` [PATCH 00/19] " Jani Nikula
2025-12-18 9:08 ` Shankar, Uma
2025-12-18 6:11 ` ✗ Xe.CI.Full: failure for " Patchwork
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