[PATCH v4 0/5] Fix serialization on burst of unbinds - v2

[PATCH v4 0/5] Fix serialization on burst of unbinds - v2

[Matthew Brost]

Attempting to resolve part of [1]; this solution differs than v1 [2] by
changing last fence semantics detailed in the patches.

Overview of issue in [1]:

When a burst of unbind jobs is issued, a dependency chain can form
between the TLB invalidation of a previous unbind job and the current
one. This leads to undesirable serialization, causing current jobs to
wait unnecessarily for prior TLB invalidations, execute on the GPU when
not needed, and significantly slow down the unbind burst—resulting in up
to a 4× to 8× slowdown depending on platform.
 
Matt

[1] https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6047
[2] https://patchwork.freedesktop.org/series/156144/

Matthew Brost (5):
  drm/xe: Add last fence attachment to TLB invalidation job queues
  drm/xe: Decouple bind queue last fence from TLB invalidations
  drm/xe: Do not wait on TLB invalidations in page fault binds
  drm/xe: Don't allow in fences on zero batch exec or zero binds
  drm/xe: Remove last fence dependecy check from binds

 drivers/gpu/drm/xe/xe_exec_queue.c       | 108 ++++++++++++++++++++---
 drivers/gpu/drm/xe/xe_exec_queue.h       |  20 ++++-
 drivers/gpu/drm/xe/xe_exec_queue_types.h |   5 ++
 drivers/gpu/drm/xe/xe_migrate.c          |  14 +++
 drivers/gpu/drm/xe/xe_migrate.h          |   8 ++
 drivers/gpu/drm/xe/xe_pt.c               |  80 ++++++-----------
 drivers/gpu/drm/xe/xe_sync.c             |  74 +++++++++-------
 drivers/gpu/drm/xe/xe_tlb_inval_job.c    |  31 +++++--
 drivers/gpu/drm/xe/xe_tlb_inval_job.h    |   5 +-
 drivers/gpu/drm/xe/xe_vm.c               |  93 +++++++++++--------
 drivers/gpu/drm/xe/xe_vm_types.h         |   6 +-
 11 files changed, 290 insertions(+), 154 deletions(-)

-- 
2.34.1

[PATCH v4 1/5] drm/xe: Add last fence attachment to TLB invalidation job queues

[Matthew Brost]

To address serialization issues with bursts of unbind jobs, this patch
adds support for attaching the last fence to TLB invalidation job
queues. The idea is that user fence signaling for a bind job reflects
both the bind job itself and the last fences of all related TLB
invalidations. The submission order of bind jobs and TLB invalidations
depends solely on the state of their respective queues.

This patch only introduces support functions for last fence attachment
to TLB invalidation queues.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>

---
v3:
 - Fix assert in xe_exec_queue_tlb_inval_last_fence_set (CI)
 - Ensure migrate lock held for migrate queues (Testing)
---
 drivers/gpu/drm/xe/xe_exec_queue.c       | 105 ++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_exec_queue.h       |  18 ++++
 drivers/gpu/drm/xe/xe_exec_queue_types.h |   5 ++
 drivers/gpu/drm/xe/xe_migrate.c          |  14 +++
 drivers/gpu/drm/xe/xe_migrate.h          |   8 ++
 drivers/gpu/drm/xe/xe_vm.c               |   7 +-
 6 files changed, 155 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 90cbc95f8e2e..d7d00d4de93c 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -376,11 +376,15 @@ void xe_exec_queue_destroy(struct kref *ref)
 {
 	struct xe_exec_queue *q = container_of(ref, struct xe_exec_queue, refcount);
 	struct xe_exec_queue *eq, *next;
+	int i;
 
 	if (xe_exec_queue_uses_pxp(q))
 		xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
 
 	xe_exec_queue_last_fence_put_unlocked(q);
+	for_each_tlb_inval(i)
+		xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, i);
+
 	if (!(q->flags & EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD)) {
 		list_for_each_entry_safe(eq, next, &q->multi_gt_list,
 					 multi_gt_link)
@@ -998,7 +1002,9 @@ int xe_exec_queue_destroy_ioctl(struct drm_device *dev, void *data,
 static void xe_exec_queue_last_fence_lockdep_assert(struct xe_exec_queue *q,
 						    struct xe_vm *vm)
 {
-	if (q->flags & EXEC_QUEUE_FLAG_VM) {
+	if (q->flags & EXEC_QUEUE_FLAG_MIGRATE) {
+		xe_migrate_job_lock_assert(q);
+	} else if (q->flags & EXEC_QUEUE_FLAG_VM) {
 		lockdep_assert_held(&vm->lock);
 	} else {
 		xe_vm_assert_held(vm);
@@ -1097,6 +1103,7 @@ void xe_exec_queue_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm,
 				  struct dma_fence *fence)
 {
 	xe_exec_queue_last_fence_lockdep_assert(q, vm);
+	xe_assert(vm->xe, !dma_fence_is_container(fence));
 
 	xe_exec_queue_last_fence_put(q, vm);
 	q->last_fence = dma_fence_get(fence);
@@ -1125,6 +1132,102 @@ int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q, struct xe_vm *vm)
 	return err;
 }
 
+/**
+ * xe_exec_queue_tlb_inval_last_fence_put() - Drop ref to last TLB invalidation fence
+ * @q: The exec queue
+ * @vm: The VM the engine does a bind for
+ * @type: Either primary or media GT
+ */
+void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
+					    struct xe_vm *vm,
+					    unsigned int type)
+{
+	xe_exec_queue_last_fence_lockdep_assert(q, vm);
+	xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
+		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
+
+	xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, type);
+}
+
+/**
+ * xe_exec_queue_tlb_inval_last_fence_put_unlocked() - Drop ref to last TLB
+ * invalidation fence unlocked
+ * @q: The exec queue
+ * @type: Either primary or media GT
+ *
+ * Only safe to be called from xe_exec_queue_destroy().
+ */
+void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct xe_exec_queue *q,
+						     unsigned int type)
+{
+	xe_assert(q->vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
+		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
+
+	if (q->tlb_inval[type].last_fence) {
+		dma_fence_put(q->tlb_inval[type].last_fence);
+		q->tlb_inval[type].last_fence = NULL;
+	}
+}
+
+/**
+ * xe_exec_queue_tlb_inval_last_fence_get() - Get last fence for TLB invalidation
+ * @q: The exec queue
+ * @vm: The VM the engine does a bind for
+ * @type: Either primary or media GT
+ *
+ * Get last fence, takes a ref
+ *
+ * Returns: last fence if not signaled, dma fence stub if signaled
+ */
+struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct xe_exec_queue *q,
+							 struct xe_vm *vm,
+							 unsigned int type)
+{
+	struct dma_fence *fence;
+
+	xe_exec_queue_last_fence_lockdep_assert(q, vm);
+	xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
+		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
+	xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
+				      EXEC_QUEUE_FLAG_MIGRATE));
+
+	if (q->tlb_inval[type].last_fence &&
+	    test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
+		     &q->tlb_inval[type].last_fence->flags))
+		xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
+
+	fence = q->tlb_inval[type].last_fence ?: dma_fence_get_stub();
+	dma_fence_get(fence);
+	return fence;
+}
+
+/**
+ * xe_exec_queue_tlb_inval_last_fence_set() - Set last fence for TLB invalidation
+ * @q: The exec queue
+ * @vm: The VM the engine does a bind for
+ * @fence: The fence
+ * @type: Either primary or media GT
+ *
+ * Set the last fence for the tlb invalidation type on the queue. Increases
+ * reference count for fence, when closing queue
+ * xe_exec_queue_tlb_inval_last_fence_put should be called.
+ */
+void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
+					    struct xe_vm *vm,
+					    struct dma_fence *fence,
+					    unsigned int type)
+{
+	xe_exec_queue_last_fence_lockdep_assert(q, vm);
+	xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
+		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
+	xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
+				      EXEC_QUEUE_FLAG_MIGRATE));
+	xe_assert(vm->xe, !dma_fence_is_container(fence));
+
+	xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
+	q->tlb_inval[type].last_fence = dma_fence_get(fence);
+}
+
 /**
  * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
  * within all LRCs of a queue.
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index a4dfbe858bda..c4b95fad93f1 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -14,6 +14,10 @@ struct drm_file;
 struct xe_device;
 struct xe_file;
 
+#define for_each_tlb_inval(__i)	\
+	for (__i = XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT; \
+	     __i <= XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT; ++__i)
+
 struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
 					   u32 logical_mask, u16 width,
 					   struct xe_hw_engine *hw_engine, u32 flags,
@@ -86,6 +90,20 @@ void xe_exec_queue_last_fence_set(struct xe_exec_queue *e, struct xe_vm *vm,
 				  struct dma_fence *fence);
 int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
 				      struct xe_vm *vm);
+
+void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
+					    struct xe_vm *vm,
+					    unsigned int type);
+void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct xe_exec_queue *q,
+						     unsigned int type);
+struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct xe_exec_queue *q,
+							 struct xe_vm *vm,
+							 unsigned int type);
+void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
+					    struct xe_vm *vm,
+					    struct dma_fence *fence,
+					    unsigned int type);
+
 void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
 
 int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch);
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index 282505fa1377..b4185fee54e1 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -145,6 +145,11 @@ struct xe_exec_queue {
 		 * dependency scheduler
 		 */
 		struct xe_dep_scheduler *dep_scheduler;
+		/**
+		 * @last_fence: last fence for tlb invalidation, protected by
+		 * vm->lock in write mode
+		 */
+		struct dma_fence *last_fence;
 	} tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT];
 
 	/** @pxp: PXP info tracking */
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 921c9c1ea41f..4567bc88a8ec 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -2333,6 +2333,20 @@ void xe_migrate_job_unlock(struct xe_migrate *m, struct xe_exec_queue *q)
 		xe_vm_assert_held(q->vm);	/* User queues VM's should be locked */
 }
 
+#if IS_ENABLED(CONFIG_PROVE_LOCKING)
+/**
+ * xe_migrate_job_lock_assert() - Assert migrate job lock held of queue
+ * @q: Migrate queue
+ */
+void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
+{
+	struct xe_migrate *m = gt_to_tile(q->gt)->migrate;
+
+	xe_gt_assert(q->gt, q == m->q);
+	lockdep_assert_held(&m->job_mutex);
+}
+#endif
+
 #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
 #include "tests/xe_migrate.c"
 #endif
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 4fad324b6253..9b5791617f5e 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -152,6 +152,14 @@ xe_migrate_update_pgtables(struct xe_migrate *m,
 
 void xe_migrate_wait(struct xe_migrate *m);
 
+#if IS_ENABLED(CONFIG_PROVE_LOCKING)
+void xe_migrate_job_lock_assert(struct xe_exec_queue *q);
+#else
+static inline void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
+{
+}
+#endif
+
 void xe_migrate_job_lock(struct xe_migrate *m, struct xe_exec_queue *q);
 void xe_migrate_job_unlock(struct xe_migrate *m, struct xe_exec_queue *q);
 
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 10d77666a425..d2a2f823f1b3 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1731,8 +1731,13 @@ void xe_vm_close_and_put(struct xe_vm *vm)
 
 	down_write(&vm->lock);
 	for_each_tile(tile, xe, id) {
-		if (vm->q[id])
+		if (vm->q[id]) {
+			int i;
+
 			xe_exec_queue_last_fence_put(vm->q[id], vm);
+			for_each_tlb_inval(i)
+				xe_exec_queue_tlb_inval_last_fence_put(vm->q[id], vm, i);
+		}
 	}
 	up_write(&vm->lock);
 
-- 
2.34.1

Re: [PATCH v4 1/5] drm/xe: Add last fence attachment to TLB invalidation job queues

[Thomas Hellström]

On Mon, 2025-10-27 at 11:27 -0700, Matthew Brost wrote:
> To address serialization issues with bursts of unbind jobs, this
> patch
> adds support for attaching the last fence to TLB invalidation job
> queues. The idea is that user fence signaling for a bind job reflects
> both the bind job itself and the last fences of all related TLB
> invalidations. The submission order of bind jobs and TLB
> invalidations
> depends solely on the state of their respective queues.
> 
> This patch only introduces support functions for last fence
> attachment
> to TLB invalidation queues.
> 
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>

LGTM. Mostly style fixes below.

Also imperative language in the commit message.

> 
> ---
> v3:
>  - Fix assert in xe_exec_queue_tlb_inval_last_fence_set (CI)
>  - Ensure migrate lock held for migrate queues (Testing)
> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c       | 105
> ++++++++++++++++++++++-
>  drivers/gpu/drm/xe/xe_exec_queue.h       |  18 ++++
>  drivers/gpu/drm/xe/xe_exec_queue_types.h |   5 ++
>  drivers/gpu/drm/xe/xe_migrate.c          |  14 +++
>  drivers/gpu/drm/xe/xe_migrate.h          |   8 ++
>  drivers/gpu/drm/xe/xe_vm.c               |   7 +-
>  6 files changed, 155 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c
> b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 90cbc95f8e2e..d7d00d4de93c 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -376,11 +376,15 @@ void xe_exec_queue_destroy(struct kref *ref)
>  {
>  	struct xe_exec_queue *q = container_of(ref, struct
> xe_exec_queue, refcount);
>  	struct xe_exec_queue *eq, *next;
> +	int i;
>  
>  	if (xe_exec_queue_uses_pxp(q))
>  		xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
>  
>  	xe_exec_queue_last_fence_put_unlocked(q);
> +	for_each_tlb_inval(i)
> +		xe_exec_queue_tlb_inval_last_fence_put_unlocked(q,
> i);
> +
>  	if (!(q->flags & EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD)) {
>  		list_for_each_entry_safe(eq, next, &q-
> >multi_gt_list,
>  					 multi_gt_link)
> @@ -998,7 +1002,9 @@ int xe_exec_queue_destroy_ioctl(struct
> drm_device *dev, void *data,
>  static void xe_exec_queue_last_fence_lockdep_assert(struct
> xe_exec_queue *q,
>  						    struct xe_vm
> *vm)
>  {
> -	if (q->flags & EXEC_QUEUE_FLAG_VM) {
> +	if (q->flags & EXEC_QUEUE_FLAG_MIGRATE) {
> +		xe_migrate_job_lock_assert(q);
> +	} else if (q->flags & EXEC_QUEUE_FLAG_VM) {
>  		lockdep_assert_held(&vm->lock);
>  	} else {
>  		xe_vm_assert_held(vm);
> @@ -1097,6 +1103,7 @@ void xe_exec_queue_last_fence_set(struct
> xe_exec_queue *q, struct xe_vm *vm,
>  				  struct dma_fence *fence)
>  {
>  	xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +	xe_assert(vm->xe, !dma_fence_is_container(fence));
>  
>  	xe_exec_queue_last_fence_put(q, vm);
>  	q->last_fence = dma_fence_get(fence);
> @@ -1125,6 +1132,102 @@ int xe_exec_queue_last_fence_test_dep(struct
> xe_exec_queue *q, struct xe_vm *vm)
>  	return err;
>  }
>  
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_put() - Drop ref to last TLB
> invalidation fence
> + * @q: The exec queue
> + * @vm: The VM the engine does a bind for
> + * @type: Either primary or media GT
> + */
> +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
> +					    struct xe_vm *vm,
> +					    unsigned int type)
> +{
> +	xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +	xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT
> ||
> +		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +
> +	xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, type);
> +}
> +
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_put_unlocked() - Drop ref to
> last TLB
> + * invalidation fence unlocked
> + * @q: The exec queue
> + * @type: Either primary or media GT
> + *
> + * Only safe to be called from xe_exec_queue_destroy().
> + */
> +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> xe_exec_queue *q,
> +						     unsigned int
> type)
> +{
> +	xe_assert(q->vm->xe, type ==
> XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> +		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +
> +	if (q->tlb_inval[type].last_fence) {

IIRC dma_fence_put() already has a NULL check?

> +		dma_fence_put(q->tlb_inval[type].last_fence);
> +		q->tlb_inval[type].last_fence = NULL;
> +	}
> +}
> +
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_get() - Get last fence for TLB
> invalidation
> + * @q: The exec queue
> + * @vm: The VM the engine does a bind for
> + * @type: Either primary or media GT
> + *
> + * Get last fence, takes a ref
> + *
> + * Returns: last fence if not signaled, dma fence stub if signaled
> + */
> +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> xe_exec_queue *q,
> +							 struct
> xe_vm *vm,
> +							 unsigned
> int type)
> +{
> +	struct dma_fence *fence;
> +
> +	xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +	xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT
> ||
> +		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +	xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> +				      EXEC_QUEUE_FLAG_MIGRATE));
> +
> +	if (q->tlb_inval[type].last_fence &&
> +	    test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
> +		     &q->tlb_inval[type].last_fence->flags))
> +		xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
> +
> +	fence = q->tlb_inval[type].last_fence ?:
> dma_fence_get_stub();
> +	dma_fence_get(fence);
> +	return fence;
> +}
> +
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_set() - Set last fence for TLB
> invalidation
> + * @q: The exec queue
> + * @vm: The VM the engine does a bind for
> + * @fence: The fence
> + * @type: Either primary or media GT
> + *
> + * Set the last fence for the tlb invalidation type on the queue.
> Increases
> + * reference count for fence, when closing queue
> + * xe_exec_queue_tlb_inval_last_fence_put should be called.
> + */
> +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
> +					    struct xe_vm *vm,
> +					    struct dma_fence *fence,
> +					    unsigned int type)
> +{
> +	xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +	xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT
> ||
> +		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +	xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> +				      EXEC_QUEUE_FLAG_MIGRATE));
> +	xe_assert(vm->xe, !dma_fence_is_container(fence));
> +
> +	xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
> +	q->tlb_inval[type].last_fence = dma_fence_get(fence);
> +}
> +
>  /**
>   * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
>   * within all LRCs of a queue.
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h
> b/drivers/gpu/drm/xe/xe_exec_queue.h
> index a4dfbe858bda..c4b95fad93f1 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> @@ -14,6 +14,10 @@ struct drm_file;
>  struct xe_device;
>  struct xe_file;
>  
> +#define for_each_tlb_inval(__i)	\
> +	for (__i = XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT; \
> +	     __i <= XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT; ++__i)
> +
>  struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe,
> struct xe_vm *vm,
>  					   u32 logical_mask, u16
> width,
>  					   struct xe_hw_engine
> *hw_engine, u32 flags,
> @@ -86,6 +90,20 @@ void xe_exec_queue_last_fence_set(struct
> xe_exec_queue *e, struct xe_vm *vm,
>  				  struct dma_fence *fence);
>  int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
>  				      struct xe_vm *vm);
> +
> +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
> +					    struct xe_vm *vm,
> +					    unsigned int type);

An empty line between declarations.

> +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> xe_exec_queue *q,
> +						     unsigned int
> type);
> +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> xe_exec_queue *q,
> +							 struct
> xe_vm *vm,
> +							 unsigned
> int type);
> +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
> +					    struct xe_vm *vm,
> +					    struct dma_fence *fence,
> +					    unsigned int type);
> +
>  void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
>  
>  int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void
> *scratch);
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> index 282505fa1377..b4185fee54e1 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> @@ -145,6 +145,11 @@ struct xe_exec_queue {
>  		 * dependency scheduler
>  		 */
>  		struct xe_dep_scheduler *dep_scheduler;
> +		/**
> +		 * @last_fence: last fence for tlb invalidation,
> protected by
> +		 * vm->lock in write mode
> +		 */
> +		struct dma_fence *last_fence;
>  	} tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT];
>  
>  	/** @pxp: PXP info tracking */
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> b/drivers/gpu/drm/xe/xe_migrate.c
> index 921c9c1ea41f..4567bc88a8ec 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -2333,6 +2333,20 @@ void xe_migrate_job_unlock(struct xe_migrate
> *m, struct xe_exec_queue *q)
>  		xe_vm_assert_held(q->vm);	/* User queues VM's
> should be locked */
>  }
>  
> +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> +/**
> + * xe_migrate_job_lock_assert() - Assert migrate job lock held of
> queue
> + * @q: Migrate queue
> + */
> +void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
> +{
> +	struct xe_migrate *m = gt_to_tile(q->gt)->migrate;
> +
> +	xe_gt_assert(q->gt, q == m->q);
> +	lockdep_assert_held(&m->job_mutex);
> +}
> +#endif
> +
>  #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
>  #include "tests/xe_migrate.c"
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_migrate.h
> b/drivers/gpu/drm/xe/xe_migrate.h
> index 4fad324b6253..9b5791617f5e 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.h
> +++ b/drivers/gpu/drm/xe/xe_migrate.h
> @@ -152,6 +152,14 @@ xe_migrate_update_pgtables(struct xe_migrate *m,
>  
>  void xe_migrate_wait(struct xe_migrate *m);
>  
> +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> +void xe_migrate_job_lock_assert(struct xe_exec_queue *q);
> +#else
> +static inline void xe_migrate_job_lock_assert(struct xe_exec_queue
> *q)
> +{
> +}
> +#endif
> +
>  void xe_migrate_job_lock(struct xe_migrate *m, struct xe_exec_queue
> *q);
>  void xe_migrate_job_unlock(struct xe_migrate *m, struct
> xe_exec_queue *q);
>  
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 10d77666a425..d2a2f823f1b3 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -1731,8 +1731,13 @@ void xe_vm_close_and_put(struct xe_vm *vm)
>  
>  	down_write(&vm->lock);
>  	for_each_tile(tile, xe, id) {
> -		if (vm->q[id])
> +		if (vm->q[id]) {
> +			int i;
> +
>  			xe_exec_queue_last_fence_put(vm->q[id], vm);
> +			for_each_tlb_inval(i)
> +				xe_exec_queue_tlb_inval_last_fence_p
> ut(vm->q[id], vm, i);
> +		}
>  	}
>  	up_write(&vm->lock);
>  

Re: [PATCH v4 1/5] drm/xe: Add last fence attachment to TLB invalidation job queues

[Summers, Stuart]

On Mon, 2025-10-27 at 11:27 -0700, Matthew Brost wrote:
> To address serialization issues with bursts of unbind jobs, this
> patch
> adds support for attaching the last fence to TLB invalidation job
> queues. The idea is that user fence signaling for a bind job reflects
> both the bind job itself and the last fences of all related TLB
> invalidations. The submission order of bind jobs and TLB
> invalidations
> depends solely on the state of their respective queues.
> 
> This patch only introduces support functions for last fence
> attachment
> to TLB invalidation queues.
> 
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> 
> ---
> v3:
>  - Fix assert in xe_exec_queue_tlb_inval_last_fence_set (CI)
>  - Ensure migrate lock held for migrate queues (Testing)
> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c       | 105
> ++++++++++++++++++++++-
>  drivers/gpu/drm/xe/xe_exec_queue.h       |  18 ++++
>  drivers/gpu/drm/xe/xe_exec_queue_types.h |   5 ++
>  drivers/gpu/drm/xe/xe_migrate.c          |  14 +++
>  drivers/gpu/drm/xe/xe_migrate.h          |   8 ++
>  drivers/gpu/drm/xe/xe_vm.c               |   7 +-
>  6 files changed, 155 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c
> b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 90cbc95f8e2e..d7d00d4de93c 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -376,11 +376,15 @@ void xe_exec_queue_destroy(struct kref *ref)
>  {
>         struct xe_exec_queue *q = container_of(ref, struct
> xe_exec_queue, refcount);
>         struct xe_exec_queue *eq, *next;
> +       int i;
>  
>         if (xe_exec_queue_uses_pxp(q))
>                 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
>  
>         xe_exec_queue_last_fence_put_unlocked(q);
> +       for_each_tlb_inval(i)
> +               xe_exec_queue_tlb_inval_last_fence_put_unlocked(q,
> i);
> +
>         if (!(q->flags & EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD)) {
>                 list_for_each_entry_safe(eq, next, &q->multi_gt_list,
>                                          multi_gt_link)
> @@ -998,7 +1002,9 @@ int xe_exec_queue_destroy_ioctl(struct
> drm_device *dev, void *data,
>  static void xe_exec_queue_last_fence_lockdep_assert(struct
> xe_exec_queue *q,
>                                                     struct xe_vm *vm)
>  {
> -       if (q->flags & EXEC_QUEUE_FLAG_VM) {
> +       if (q->flags & EXEC_QUEUE_FLAG_MIGRATE) {
> +               xe_migrate_job_lock_assert(q);
> +       } else if (q->flags & EXEC_QUEUE_FLAG_VM) {
>                 lockdep_assert_held(&vm->lock);
>         } else {
>                 xe_vm_assert_held(vm);
> @@ -1097,6 +1103,7 @@ void xe_exec_queue_last_fence_set(struct
> xe_exec_queue *q, struct xe_vm *vm,
>                                   struct dma_fence *fence)
>  {
>         xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +       xe_assert(vm->xe, !dma_fence_is_container(fence));
>  
>         xe_exec_queue_last_fence_put(q, vm);
>         q->last_fence = dma_fence_get(fence);
> @@ -1125,6 +1132,102 @@ int xe_exec_queue_last_fence_test_dep(struct
> xe_exec_queue *q, struct xe_vm *vm)
>         return err;
>  }
>  
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_put() - Drop ref to last TLB
> invalidation fence
> + * @q: The exec queue
> + * @vm: The VM the engine does a bind for
> + * @type: Either primary or media GT
> + */
> +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
> +                                           struct xe_vm *vm,
> +                                           unsigned int type)
> +{
> +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +       xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);

Do we really need these GT asserts through here?

Thanks,
Stuart

> +
> +       xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, type);
> +}
> +
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_put_unlocked() - Drop ref to
> last TLB
> + * invalidation fence unlocked
> + * @q: The exec queue
> + * @type: Either primary or media GT
> + *
> + * Only safe to be called from xe_exec_queue_destroy().
> + */
> +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> xe_exec_queue *q,
> +                                                    unsigned int
> type)
> +{
> +       xe_assert(q->vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT
> ||
> +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +
> +       if (q->tlb_inval[type].last_fence) {
> +               dma_fence_put(q->tlb_inval[type].last_fence);
> +               q->tlb_inval[type].last_fence = NULL;
> +       }
> +}
> +
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_get() - Get last fence for TLB
> invalidation
> + * @q: The exec queue
> + * @vm: The VM the engine does a bind for
> + * @type: Either primary or media GT
> + *
> + * Get last fence, takes a ref
> + *
> + * Returns: last fence if not signaled, dma fence stub if signaled
> + */
> +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> xe_exec_queue *q,
> +                                                        struct xe_vm
> *vm,
> +                                                        unsigned int
> type)
> +{
> +       struct dma_fence *fence;
> +
> +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +       xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +       xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> +                                     EXEC_QUEUE_FLAG_MIGRATE));
> +
> +       if (q->tlb_inval[type].last_fence &&
> +           test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
> +                    &q->tlb_inval[type].last_fence->flags))
> +               xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
> +
> +       fence = q->tlb_inval[type].last_fence ?:
> dma_fence_get_stub();
> +       dma_fence_get(fence);
> +       return fence;
> +}
> +
> +/**
> + * xe_exec_queue_tlb_inval_last_fence_set() - Set last fence for TLB
> invalidation
> + * @q: The exec queue
> + * @vm: The VM the engine does a bind for
> + * @fence: The fence
> + * @type: Either primary or media GT
> + *
> + * Set the last fence for the tlb invalidation type on the queue.
> Increases
> + * reference count for fence, when closing queue
> + * xe_exec_queue_tlb_inval_last_fence_put should be called.
> + */
> +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
> +                                           struct xe_vm *vm,
> +                                           struct dma_fence *fence,
> +                                           unsigned int type)
> +{
> +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> +       xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> +       xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> +                                     EXEC_QUEUE_FLAG_MIGRATE));
> +       xe_assert(vm->xe, !dma_fence_is_container(fence));
> +
> +       xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
> +       q->tlb_inval[type].last_fence = dma_fence_get(fence);
> +}
> +
>  /**
>   * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
>   * within all LRCs of a queue.
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h
> b/drivers/gpu/drm/xe/xe_exec_queue.h
> index a4dfbe858bda..c4b95fad93f1 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> @@ -14,6 +14,10 @@ struct drm_file;
>  struct xe_device;
>  struct xe_file;
>  
> +#define for_each_tlb_inval(__i)        \
> +       for (__i = XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT; \
> +            __i <= XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT; ++__i)
> +
>  struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe,
> struct xe_vm *vm,
>                                            u32 logical_mask, u16
> width,
>                                            struct xe_hw_engine
> *hw_engine, u32 flags,
> @@ -86,6 +90,20 @@ void xe_exec_queue_last_fence_set(struct
> xe_exec_queue *e, struct xe_vm *vm,
>                                   struct dma_fence *fence);
>  int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
>                                       struct xe_vm *vm);
> +
> +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
> +                                           struct xe_vm *vm,
> +                                           unsigned int type);
> +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> xe_exec_queue *q,
> +                                                    unsigned int
> type);
> +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> xe_exec_queue *q,
> +                                                        struct xe_vm
> *vm,
> +                                                        unsigned int
> type);
> +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
> +                                           struct xe_vm *vm,
> +                                           struct dma_fence *fence,
> +                                           unsigned int type);
> +
>  void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
>  
>  int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void
> *scratch);
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> index 282505fa1377..b4185fee54e1 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> @@ -145,6 +145,11 @@ struct xe_exec_queue {
>                  * dependency scheduler
>                  */
>                 struct xe_dep_scheduler *dep_scheduler;
> +               /**
> +                * @last_fence: last fence for tlb invalidation,
> protected by
> +                * vm->lock in write mode
> +                */
> +               struct dma_fence *last_fence;
>         } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT];
>  
>         /** @pxp: PXP info tracking */
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> b/drivers/gpu/drm/xe/xe_migrate.c
> index 921c9c1ea41f..4567bc88a8ec 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -2333,6 +2333,20 @@ void xe_migrate_job_unlock(struct xe_migrate
> *m, struct xe_exec_queue *q)
>                 xe_vm_assert_held(q->vm);       /* User queues VM's
> should be locked */
>  }
>  
> +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> +/**
> + * xe_migrate_job_lock_assert() - Assert migrate job lock held of
> queue
> + * @q: Migrate queue
> + */
> +void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
> +{
> +       struct xe_migrate *m = gt_to_tile(q->gt)->migrate;
> +
> +       xe_gt_assert(q->gt, q == m->q);
> +       lockdep_assert_held(&m->job_mutex);
> +}
> +#endif
> +
>  #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
>  #include "tests/xe_migrate.c"
>  #endif
> diff --git a/drivers/gpu/drm/xe/xe_migrate.h
> b/drivers/gpu/drm/xe/xe_migrate.h
> index 4fad324b6253..9b5791617f5e 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.h
> +++ b/drivers/gpu/drm/xe/xe_migrate.h
> @@ -152,6 +152,14 @@ xe_migrate_update_pgtables(struct xe_migrate *m,
>  
>  void xe_migrate_wait(struct xe_migrate *m);
>  
> +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> +void xe_migrate_job_lock_assert(struct xe_exec_queue *q);
> +#else
> +static inline void xe_migrate_job_lock_assert(struct xe_exec_queue
> *q)
> +{
> +}
> +#endif
> +
>  void xe_migrate_job_lock(struct xe_migrate *m, struct xe_exec_queue
> *q);
>  void xe_migrate_job_unlock(struct xe_migrate *m, struct
> xe_exec_queue *q);
>  
> diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> index 10d77666a425..d2a2f823f1b3 100644
> --- a/drivers/gpu/drm/xe/xe_vm.c
> +++ b/drivers/gpu/drm/xe/xe_vm.c
> @@ -1731,8 +1731,13 @@ void xe_vm_close_and_put(struct xe_vm *vm)
>  
>         down_write(&vm->lock);
>         for_each_tile(tile, xe, id) {
> -               if (vm->q[id])
> +               if (vm->q[id]) {
> +                       int i;
> +
>                         xe_exec_queue_last_fence_put(vm->q[id], vm);
> +                       for_each_tlb_inval(i)
> +                               xe_exec_queue_tlb_inval_last_fence_pu
> t(vm->q[id], vm, i);
> +               }
>         }
>         up_write(&vm->lock);
>  

Re: [PATCH v4 1/5] drm/xe: Add last fence attachment to TLB invalidation job queues

[Matthew Brost]

On Wed, Oct 29, 2025 at 11:48:29AM -0600, Summers, Stuart wrote:
> On Mon, 2025-10-27 at 11:27 -0700, Matthew Brost wrote:
> > To address serialization issues with bursts of unbind jobs, this
> > patch
> > adds support for attaching the last fence to TLB invalidation job
> > queues. The idea is that user fence signaling for a bind job reflects
> > both the bind job itself and the last fences of all related TLB
> > invalidations. The submission order of bind jobs and TLB
> > invalidations
> > depends solely on the state of their respective queues.
> > 
> > This patch only introduces support functions for last fence
> > attachment
> > to TLB invalidation queues.
> > 
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > 
> > ---
> > v3:
> >  - Fix assert in xe_exec_queue_tlb_inval_last_fence_set (CI)
> >  - Ensure migrate lock held for migrate queues (Testing)
> > ---
> >  drivers/gpu/drm/xe/xe_exec_queue.c       | 105
> > ++++++++++++++++++++++-
> >  drivers/gpu/drm/xe/xe_exec_queue.h       |  18 ++++
> >  drivers/gpu/drm/xe/xe_exec_queue_types.h |   5 ++
> >  drivers/gpu/drm/xe/xe_migrate.c          |  14 +++
> >  drivers/gpu/drm/xe/xe_migrate.h          |   8 ++
> >  drivers/gpu/drm/xe/xe_vm.c               |   7 +-
> >  6 files changed, 155 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c
> > b/drivers/gpu/drm/xe/xe_exec_queue.c
> > index 90cbc95f8e2e..d7d00d4de93c 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > @@ -376,11 +376,15 @@ void xe_exec_queue_destroy(struct kref *ref)
> >  {
> >         struct xe_exec_queue *q = container_of(ref, struct
> > xe_exec_queue, refcount);
> >         struct xe_exec_queue *eq, *next;
> > +       int i;
> >  
> >         if (xe_exec_queue_uses_pxp(q))
> >                 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
> >  
> >         xe_exec_queue_last_fence_put_unlocked(q);
> > +       for_each_tlb_inval(i)
> > +               xe_exec_queue_tlb_inval_last_fence_put_unlocked(q,
> > i);
> > +
> >         if (!(q->flags & EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD)) {
> >                 list_for_each_entry_safe(eq, next, &q->multi_gt_list,
> >                                          multi_gt_link)
> > @@ -998,7 +1002,9 @@ int xe_exec_queue_destroy_ioctl(struct
> > drm_device *dev, void *data,
> >  static void xe_exec_queue_last_fence_lockdep_assert(struct
> > xe_exec_queue *q,
> >                                                     struct xe_vm *vm)
> >  {
> > -       if (q->flags & EXEC_QUEUE_FLAG_VM) {
> > +       if (q->flags & EXEC_QUEUE_FLAG_MIGRATE) {
> > +               xe_migrate_job_lock_assert(q);
> > +       } else if (q->flags & EXEC_QUEUE_FLAG_VM) {
> >                 lockdep_assert_held(&vm->lock);
> >         } else {
> >                 xe_vm_assert_held(vm);
> > @@ -1097,6 +1103,7 @@ void xe_exec_queue_last_fence_set(struct
> > xe_exec_queue *q, struct xe_vm *vm,
> >                                   struct dma_fence *fence)
> >  {
> >         xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > +       xe_assert(vm->xe, !dma_fence_is_container(fence));
> >  
> >         xe_exec_queue_last_fence_put(q, vm);
> >         q->last_fence = dma_fence_get(fence);
> > @@ -1125,6 +1132,102 @@ int xe_exec_queue_last_fence_test_dep(struct
> > xe_exec_queue *q, struct xe_vm *vm)
> >         return err;
> >  }
> >  
> > +/**
> > + * xe_exec_queue_tlb_inval_last_fence_put() - Drop ref to last TLB
> > invalidation fence
> > + * @q: The exec queue
> > + * @vm: The VM the engine does a bind for
> > + * @type: Either primary or media GT
> > + */
> > +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
> > +                                           struct xe_vm *vm,
> > +                                           unsigned int type)
> > +{
> > +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > +       xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> 
> Do we really need these GT asserts through here?
> 

I tend to be overzelous with asserts to catch any possible bugs, also
asserts by nature are self documenting. So yes, I'd like to have these
included.

Matt 

> Thanks,
> Stuart
> 
> > +
> > +       xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, type);
> > +}
> > +
> > +/**
> > + * xe_exec_queue_tlb_inval_last_fence_put_unlocked() - Drop ref to
> > last TLB
> > + * invalidation fence unlocked
> > + * @q: The exec queue
> > + * @type: Either primary or media GT
> > + *
> > + * Only safe to be called from xe_exec_queue_destroy().
> > + */
> > +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> > xe_exec_queue *q,
> > +                                                    unsigned int
> > type)
> > +{
> > +       xe_assert(q->vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT
> > ||
> > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > +
> > +       if (q->tlb_inval[type].last_fence) {
> > +               dma_fence_put(q->tlb_inval[type].last_fence);
> > +               q->tlb_inval[type].last_fence = NULL;
> > +       }
> > +}
> > +
> > +/**
> > + * xe_exec_queue_tlb_inval_last_fence_get() - Get last fence for TLB
> > invalidation
> > + * @q: The exec queue
> > + * @vm: The VM the engine does a bind for
> > + * @type: Either primary or media GT
> > + *
> > + * Get last fence, takes a ref
> > + *
> > + * Returns: last fence if not signaled, dma fence stub if signaled
> > + */
> > +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> > xe_exec_queue *q,
> > +                                                        struct xe_vm
> > *vm,
> > +                                                        unsigned int
> > type)
> > +{
> > +       struct dma_fence *fence;
> > +
> > +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > +       xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > +       xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> > +                                     EXEC_QUEUE_FLAG_MIGRATE));
> > +
> > +       if (q->tlb_inval[type].last_fence &&
> > +           test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
> > +                    &q->tlb_inval[type].last_fence->flags))
> > +               xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
> > +
> > +       fence = q->tlb_inval[type].last_fence ?:
> > dma_fence_get_stub();
> > +       dma_fence_get(fence);
> > +       return fence;
> > +}
> > +
> > +/**
> > + * xe_exec_queue_tlb_inval_last_fence_set() - Set last fence for TLB
> > invalidation
> > + * @q: The exec queue
> > + * @vm: The VM the engine does a bind for
> > + * @fence: The fence
> > + * @type: Either primary or media GT
> > + *
> > + * Set the last fence for the tlb invalidation type on the queue.
> > Increases
> > + * reference count for fence, when closing queue
> > + * xe_exec_queue_tlb_inval_last_fence_put should be called.
> > + */
> > +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
> > +                                           struct xe_vm *vm,
> > +                                           struct dma_fence *fence,
> > +                                           unsigned int type)
> > +{
> > +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > +       xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > +       xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> > +                                     EXEC_QUEUE_FLAG_MIGRATE));
> > +       xe_assert(vm->xe, !dma_fence_is_container(fence));
> > +
> > +       xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
> > +       q->tlb_inval[type].last_fence = dma_fence_get(fence);
> > +}
> > +
> >  /**
> >   * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
> >   * within all LRCs of a queue.
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h
> > b/drivers/gpu/drm/xe/xe_exec_queue.h
> > index a4dfbe858bda..c4b95fad93f1 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> > @@ -14,6 +14,10 @@ struct drm_file;
> >  struct xe_device;
> >  struct xe_file;
> >  
> > +#define for_each_tlb_inval(__i)        \
> > +       for (__i = XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT; \
> > +            __i <= XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT; ++__i)
> > +
> >  struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe,
> > struct xe_vm *vm,
> >                                            u32 logical_mask, u16
> > width,
> >                                            struct xe_hw_engine
> > *hw_engine, u32 flags,
> > @@ -86,6 +90,20 @@ void xe_exec_queue_last_fence_set(struct
> > xe_exec_queue *e, struct xe_vm *vm,
> >                                   struct dma_fence *fence);
> >  int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
> >                                       struct xe_vm *vm);
> > +
> > +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
> > +                                           struct xe_vm *vm,
> > +                                           unsigned int type);
> > +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> > xe_exec_queue *q,
> > +                                                    unsigned int
> > type);
> > +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> > xe_exec_queue *q,
> > +                                                        struct xe_vm
> > *vm,
> > +                                                        unsigned int
> > type);
> > +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
> > +                                           struct xe_vm *vm,
> > +                                           struct dma_fence *fence,
> > +                                           unsigned int type);
> > +
> >  void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
> >  
> >  int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void
> > *scratch);
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > index 282505fa1377..b4185fee54e1 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > @@ -145,6 +145,11 @@ struct xe_exec_queue {
> >                  * dependency scheduler
> >                  */
> >                 struct xe_dep_scheduler *dep_scheduler;
> > +               /**
> > +                * @last_fence: last fence for tlb invalidation,
> > protected by
> > +                * vm->lock in write mode
> > +                */
> > +               struct dma_fence *last_fence;
> >         } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT];
> >  
> >         /** @pxp: PXP info tracking */
> > diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> > b/drivers/gpu/drm/xe/xe_migrate.c
> > index 921c9c1ea41f..4567bc88a8ec 100644
> > --- a/drivers/gpu/drm/xe/xe_migrate.c
> > +++ b/drivers/gpu/drm/xe/xe_migrate.c
> > @@ -2333,6 +2333,20 @@ void xe_migrate_job_unlock(struct xe_migrate
> > *m, struct xe_exec_queue *q)
> >                 xe_vm_assert_held(q->vm);       /* User queues VM's
> > should be locked */
> >  }
> >  
> > +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> > +/**
> > + * xe_migrate_job_lock_assert() - Assert migrate job lock held of
> > queue
> > + * @q: Migrate queue
> > + */
> > +void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
> > +{
> > +       struct xe_migrate *m = gt_to_tile(q->gt)->migrate;
> > +
> > +       xe_gt_assert(q->gt, q == m->q);
> > +       lockdep_assert_held(&m->job_mutex);
> > +}
> > +#endif
> > +
> >  #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
> >  #include "tests/xe_migrate.c"
> >  #endif
> > diff --git a/drivers/gpu/drm/xe/xe_migrate.h
> > b/drivers/gpu/drm/xe/xe_migrate.h
> > index 4fad324b6253..9b5791617f5e 100644
> > --- a/drivers/gpu/drm/xe/xe_migrate.h
> > +++ b/drivers/gpu/drm/xe/xe_migrate.h
> > @@ -152,6 +152,14 @@ xe_migrate_update_pgtables(struct xe_migrate *m,
> >  
> >  void xe_migrate_wait(struct xe_migrate *m);
> >  
> > +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> > +void xe_migrate_job_lock_assert(struct xe_exec_queue *q);
> > +#else
> > +static inline void xe_migrate_job_lock_assert(struct xe_exec_queue
> > *q)
> > +{
> > +}
> > +#endif
> > +
> >  void xe_migrate_job_lock(struct xe_migrate *m, struct xe_exec_queue
> > *q);
> >  void xe_migrate_job_unlock(struct xe_migrate *m, struct
> > xe_exec_queue *q);
> >  
> > diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
> > index 10d77666a425..d2a2f823f1b3 100644
> > --- a/drivers/gpu/drm/xe/xe_vm.c
> > +++ b/drivers/gpu/drm/xe/xe_vm.c
> > @@ -1731,8 +1731,13 @@ void xe_vm_close_and_put(struct xe_vm *vm)
> >  
> >         down_write(&vm->lock);
> >         for_each_tile(tile, xe, id) {
> > -               if (vm->q[id])
> > +               if (vm->q[id]) {
> > +                       int i;
> > +
> >                         xe_exec_queue_last_fence_put(vm->q[id], vm);
> > +                       for_each_tlb_inval(i)
> > +                               xe_exec_queue_tlb_inval_last_fence_pu
> > t(vm->q[id], vm, i);
> > +               }
> >         }
> >         up_write(&vm->lock);
> >  
> 

Re: [PATCH v4 1/5] drm/xe: Add last fence attachment to TLB invalidation job queues

[Summers, Stuart]

On Wed, 2025-10-29 at 13:29 -0700, Matthew Brost wrote:
> On Wed, Oct 29, 2025 at 11:48:29AM -0600, Summers, Stuart wrote:
> > On Mon, 2025-10-27 at 11:27 -0700, Matthew Brost wrote:
> > > To address serialization issues with bursts of unbind jobs, this
> > > patch
> > > adds support for attaching the last fence to TLB invalidation job
> > > queues. The idea is that user fence signaling for a bind job
> > > reflects
> > > both the bind job itself and the last fences of all related TLB
> > > invalidations. The submission order of bind jobs and TLB
> > > invalidations
> > > depends solely on the state of their respective queues.
> > > 
> > > This patch only introduces support functions for last fence
> > > attachment
> > > to TLB invalidation queues.
> > > 
> > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > 
> > > ---
> > > v3:
> > >  - Fix assert in xe_exec_queue_tlb_inval_last_fence_set (CI)
> > >  - Ensure migrate lock held for migrate queues (Testing)
> > > ---
> > >  drivers/gpu/drm/xe/xe_exec_queue.c       | 105
> > > ++++++++++++++++++++++-
> > >  drivers/gpu/drm/xe/xe_exec_queue.h       |  18 ++++
> > >  drivers/gpu/drm/xe/xe_exec_queue_types.h |   5 ++
> > >  drivers/gpu/drm/xe/xe_migrate.c          |  14 +++
> > >  drivers/gpu/drm/xe/xe_migrate.h          |   8 ++
> > >  drivers/gpu/drm/xe/xe_vm.c               |   7 +-
> > >  6 files changed, 155 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c
> > > b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > index 90cbc95f8e2e..d7d00d4de93c 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > > @@ -376,11 +376,15 @@ void xe_exec_queue_destroy(struct kref
> > > *ref)
> > >  {
> > >         struct xe_exec_queue *q = container_of(ref, struct
> > > xe_exec_queue, refcount);
> > >         struct xe_exec_queue *eq, *next;
> > > +       int i;
> > >  
> > >         if (xe_exec_queue_uses_pxp(q))
> > >                 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp,
> > > q);
> > >  
> > >         xe_exec_queue_last_fence_put_unlocked(q);
> > > +       for_each_tlb_inval(i)
> > > +               xe_exec_queue_tlb_inval_last_fence_put_unlocked(q
> > > ,
> > > i);
> > > +
> > >         if (!(q->flags & EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD)) {
> > >                 list_for_each_entry_safe(eq, next, &q-
> > > >multi_gt_list,
> > >                                          multi_gt_link)
> > > @@ -998,7 +1002,9 @@ int xe_exec_queue_destroy_ioctl(struct
> > > drm_device *dev, void *data,
> > >  static void xe_exec_queue_last_fence_lockdep_assert(struct
> > > xe_exec_queue *q,
> > >                                                     struct xe_vm
> > > *vm)
> > >  {
> > > -       if (q->flags & EXEC_QUEUE_FLAG_VM) {
> > > +       if (q->flags & EXEC_QUEUE_FLAG_MIGRATE) {
> > > +               xe_migrate_job_lock_assert(q);
> > > +       } else if (q->flags & EXEC_QUEUE_FLAG_VM) {
> > >                 lockdep_assert_held(&vm->lock);
> > >         } else {
> > >                 xe_vm_assert_held(vm);
> > > @@ -1097,6 +1103,7 @@ void xe_exec_queue_last_fence_set(struct
> > > xe_exec_queue *q, struct xe_vm *vm,
> > >                                   struct dma_fence *fence)
> > >  {
> > >         xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > > +       xe_assert(vm->xe, !dma_fence_is_container(fence));
> > >  
> > >         xe_exec_queue_last_fence_put(q, vm);
> > >         q->last_fence = dma_fence_get(fence);
> > > @@ -1125,6 +1132,102 @@ int
> > > xe_exec_queue_last_fence_test_dep(struct
> > > xe_exec_queue *q, struct xe_vm *vm)
> > >         return err;
> > >  }
> > >  
> > > +/**
> > > + * xe_exec_queue_tlb_inval_last_fence_put() - Drop ref to last
> > > TLB
> > > invalidation fence
> > > + * @q: The exec queue
> > > + * @vm: The VM the engine does a bind for
> > > + * @type: Either primary or media GT
> > > + */
> > > +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue
> > > *q,
> > > +                                           struct xe_vm *vm,
> > > +                                           unsigned int type)
> > > +{
> > > +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > > +       xe_assert(vm->xe, type ==
> > > XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> > > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > 
> > Do we really need these GT asserts through here?
> > 
> 
> I tend to be overzelous with asserts to catch any possible bugs, also
> asserts by nature are self documenting. So yes, I'd like to have
> these
> included.

Yeah makes sense. I was thinking of asking to move the check up a level
into the for_each_tlb_inval() loop itself, but maybe right having this
at the lower levels for clear stack traces. No issue from my side.

Thanks,
Stuart

> 
> Matt 
> 
> > Thanks,
> > Stuart
> > 
> > > +
> > > +       xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, type);
> > > +}
> > > +
> > > +/**
> > > + * xe_exec_queue_tlb_inval_last_fence_put_unlocked() - Drop ref
> > > to
> > > last TLB
> > > + * invalidation fence unlocked
> > > + * @q: The exec queue
> > > + * @type: Either primary or media GT
> > > + *
> > > + * Only safe to be called from xe_exec_queue_destroy().
> > > + */
> > > +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> > > xe_exec_queue *q,
> > > +                                                    unsigned int
> > > type)
> > > +{
> > > +       xe_assert(q->vm->xe, type ==
> > > XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT
> > > > > 
> > > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > > +
> > > +       if (q->tlb_inval[type].last_fence) {
> > > +               dma_fence_put(q->tlb_inval[type].last_fence);
> > > +               q->tlb_inval[type].last_fence = NULL;
> > > +       }
> > > +}
> > > +
> > > +/**
> > > + * xe_exec_queue_tlb_inval_last_fence_get() - Get last fence for
> > > TLB
> > > invalidation
> > > + * @q: The exec queue
> > > + * @vm: The VM the engine does a bind for
> > > + * @type: Either primary or media GT
> > > + *
> > > + * Get last fence, takes a ref
> > > + *
> > > + * Returns: last fence if not signaled, dma fence stub if
> > > signaled
> > > + */
> > > +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> > > xe_exec_queue *q,
> > > +                                                        struct
> > > xe_vm
> > > *vm,
> > > +                                                        unsigned
> > > int
> > > type)
> > > +{
> > > +       struct dma_fence *fence;
> > > +
> > > +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > > +       xe_assert(vm->xe, type ==
> > > XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> > > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > > +       xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> > > +                                     EXEC_QUEUE_FLAG_MIGRATE));
> > > +
> > > +       if (q->tlb_inval[type].last_fence &&
> > > +           test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
> > > +                    &q->tlb_inval[type].last_fence->flags))
> > > +               xe_exec_queue_tlb_inval_last_fence_put(q, vm,
> > > type);
> > > +
> > > +       fence = q->tlb_inval[type].last_fence ?:
> > > dma_fence_get_stub();
> > > +       dma_fence_get(fence);
> > > +       return fence;
> > > +}
> > > +
> > > +/**
> > > + * xe_exec_queue_tlb_inval_last_fence_set() - Set last fence for
> > > TLB
> > > invalidation
> > > + * @q: The exec queue
> > > + * @vm: The VM the engine does a bind for
> > > + * @fence: The fence
> > > + * @type: Either primary or media GT
> > > + *
> > > + * Set the last fence for the tlb invalidation type on the
> > > queue.
> > > Increases
> > > + * reference count for fence, when closing queue
> > > + * xe_exec_queue_tlb_inval_last_fence_put should be called.
> > > + */
> > > +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue
> > > *q,
> > > +                                           struct xe_vm *vm,
> > > +                                           struct dma_fence
> > > *fence,
> > > +                                           unsigned int type)
> > > +{
> > > +       xe_exec_queue_last_fence_lockdep_assert(q, vm);
> > > +       xe_assert(vm->xe, type ==
> > > XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
> > > +                 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
> > > +       xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
> > > +                                     EXEC_QUEUE_FLAG_MIGRATE));
> > > +       xe_assert(vm->xe, !dma_fence_is_container(fence));
> > > +
> > > +       xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
> > > +       q->tlb_inval[type].last_fence = dma_fence_get(fence);
> > > +}
> > > +
> > >  /**
> > >   * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT
> > > references
> > >   * within all LRCs of a queue.
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h
> > > b/drivers/gpu/drm/xe/xe_exec_queue.h
> > > index a4dfbe858bda..c4b95fad93f1 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> > > @@ -14,6 +14,10 @@ struct drm_file;
> > >  struct xe_device;
> > >  struct xe_file;
> > >  
> > > +#define for_each_tlb_inval(__i)        \
> > > +       for (__i = XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT; \
> > > +            __i <= XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT; ++__i)
> > > +
> > >  struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe,
> > > struct xe_vm *vm,
> > >                                            u32 logical_mask, u16
> > > width,
> > >                                            struct xe_hw_engine
> > > *hw_engine, u32 flags,
> > > @@ -86,6 +90,20 @@ void xe_exec_queue_last_fence_set(struct
> > > xe_exec_queue *e, struct xe_vm *vm,
> > >                                   struct dma_fence *fence);
> > >  int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
> > >                                       struct xe_vm *vm);
> > > +
> > > +void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue
> > > *q,
> > > +                                           struct xe_vm *vm,
> > > +                                           unsigned int type);
> > > +void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct
> > > xe_exec_queue *q,
> > > +                                                    unsigned int
> > > type);
> > > +struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct
> > > xe_exec_queue *q,
> > > +                                                        struct
> > > xe_vm
> > > *vm,
> > > +                                                        unsigned
> > > int
> > > type);
> > > +void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue
> > > *q,
> > > +                                           struct xe_vm *vm,
> > > +                                           struct dma_fence
> > > *fence,
> > > +                                           unsigned int type);
> > > +
> > >  void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q);
> > >  
> > >  int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q,
> > > void
> > > *scratch);
> > > diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > index 282505fa1377..b4185fee54e1 100644
> > > --- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > +++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
> > > @@ -145,6 +145,11 @@ struct xe_exec_queue {
> > >                  * dependency scheduler
> > >                  */
> > >                 struct xe_dep_scheduler *dep_scheduler;
> > > +               /**
> > > +                * @last_fence: last fence for tlb invalidation,
> > > protected by
> > > +                * vm->lock in write mode
> > > +                */
> > > +               struct dma_fence *last_fence;
> > >         } tlb_inval[XE_EXEC_QUEUE_TLB_INVAL_COUNT];
> > >  
> > >         /** @pxp: PXP info tracking */
> > > diff --git a/drivers/gpu/drm/xe/xe_migrate.c
> > > b/drivers/gpu/drm/xe/xe_migrate.c
> > > index 921c9c1ea41f..4567bc88a8ec 100644
> > > --- a/drivers/gpu/drm/xe/xe_migrate.c
> > > +++ b/drivers/gpu/drm/xe/xe_migrate.c
> > > @@ -2333,6 +2333,20 @@ void xe_migrate_job_unlock(struct
> > > xe_migrate
> > > *m, struct xe_exec_queue *q)
> > >                 xe_vm_assert_held(q->vm);       /* User queues
> > > VM's
> > > should be locked */
> > >  }
> > >  
> > > +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> > > +/**
> > > + * xe_migrate_job_lock_assert() - Assert migrate job lock held
> > > of
> > > queue
> > > + * @q: Migrate queue
> > > + */
> > > +void xe_migrate_job_lock_assert(struct xe_exec_queue *q)
> > > +{
> > > +       struct xe_migrate *m = gt_to_tile(q->gt)->migrate;
> > > +
> > > +       xe_gt_assert(q->gt, q == m->q);
> > > +       lockdep_assert_held(&m->job_mutex);
> > > +}
> > > +#endif
> > > +
> > >  #if IS_ENABLED(CONFIG_DRM_XE_KUNIT_TEST)
> > >  #include "tests/xe_migrate.c"
> > >  #endif
> > > diff --git a/drivers/gpu/drm/xe/xe_migrate.h
> > > b/drivers/gpu/drm/xe/xe_migrate.h
> > > index 4fad324b6253..9b5791617f5e 100644
> > > --- a/drivers/gpu/drm/xe/xe_migrate.h
> > > +++ b/drivers/gpu/drm/xe/xe_migrate.h
> > > @@ -152,6 +152,14 @@ xe_migrate_update_pgtables(struct xe_migrate
> > > *m,
> > >  
> > >  void xe_migrate_wait(struct xe_migrate *m);
> > >  
> > > +#if IS_ENABLED(CONFIG_PROVE_LOCKING)
> > > +void xe_migrate_job_lock_assert(struct xe_exec_queue *q);
> > > +#else
> > > +static inline void xe_migrate_job_lock_assert(struct
> > > xe_exec_queue
> > > *q)
> > > +{
> > > +}
> > > +#endif
> > > +
> > >  void xe_migrate_job_lock(struct xe_migrate *m, struct
> > > xe_exec_queue
> > > *q);
> > >  void xe_migrate_job_unlock(struct xe_migrate *m, struct
> > > xe_exec_queue *q);
> > >  
> > > diff --git a/drivers/gpu/drm/xe/xe_vm.c
> > > b/drivers/gpu/drm/xe/xe_vm.c
> > > index 10d77666a425..d2a2f823f1b3 100644
> > > --- a/drivers/gpu/drm/xe/xe_vm.c
> > > +++ b/drivers/gpu/drm/xe/xe_vm.c
> > > @@ -1731,8 +1731,13 @@ void xe_vm_close_and_put(struct xe_vm *vm)
> > >  
> > >         down_write(&vm->lock);
> > >         for_each_tile(tile, xe, id) {
> > > -               if (vm->q[id])
> > > +               if (vm->q[id]) {
> > > +                       int i;
> > > +
> > >                         xe_exec_queue_last_fence_put(vm->q[id],
> > > vm);
> > > +                       for_each_tlb_inval(i)
> > > +                               xe_exec_queue_tlb_inval_last_fenc
> > > e_pu
> > > t(vm->q[id], vm, i);
> > > +               }
> > >         }
> > >         up_write(&vm->lock);
> > >  
> > 

[PATCH v4 2/5] drm/xe: Decouple bind queue last fence from TLB invalidations

[Matthew Brost]

Separate the bind queue's last fence to apply only to the bind job,
rather than combining it with associated TLB invalidation jobs. This
avoids unnecessary serialization of bind jobs on prior TLB
invalidations.

Since user fence signaling depends on the completion of both bind and
TLB invalidation jobs, their fences are merged later in the bind
pipeline to preserve correct signaling order.

Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6047
Signed-off-by: Matthew Brost <matthew.brost@intel.com>

---
v3:
 - Fix lockdep assert for migrate queues (CI)
 - Use individual dma fence contexts for array out fences (Testing)
 - Don't set last fence with arrays (Testing)
 - Move TLB invalid last fence under migrate lock (Testing)
 - Don't set queue last for migrate queues (Testing)
---
 drivers/gpu/drm/xe/xe_pt.c            | 73 ++++++++++---------------
 drivers/gpu/drm/xe/xe_sync.c          | 63 +++++++++++++++++-----
 drivers/gpu/drm/xe/xe_tlb_inval_job.c | 31 ++++++++---
 drivers/gpu/drm/xe/xe_tlb_inval_job.h |  5 +-
 drivers/gpu/drm/xe/xe_vm.c            | 76 ++++++++++++++-------------
 drivers/gpu/drm/xe/xe_vm_types.h      |  5 --
 6 files changed, 143 insertions(+), 110 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index d22fd1ccc0ba..a4b9cdf016d9 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -3,8 +3,6 @@
  * Copyright © 2022 Intel Corporation
  */
 
-#include <linux/dma-fence-array.h>
-
 #include "xe_pt.h"
 
 #include "regs/xe_gtt_defs.h"
@@ -2359,10 +2357,9 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
 	struct xe_vm *vm = vops->vm;
 	struct xe_vm_pgtable_update_ops *pt_update_ops =
 		&vops->pt_update_ops[tile->id];
-	struct dma_fence *fence, *ifence, *mfence;
+	struct xe_exec_queue *q = pt_update_ops->q;
+	struct dma_fence *fence, *ifence = NULL, *mfence = NULL;
 	struct xe_tlb_inval_job *ijob = NULL, *mjob = NULL;
-	struct dma_fence **fences = NULL;
-	struct dma_fence_array *cf = NULL;
 	struct xe_range_fence *rfence;
 	struct xe_vma_op *op;
 	int err = 0, i;
@@ -2390,15 +2387,14 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
 #endif
 
 	if (pt_update_ops->needs_invalidation) {
-		struct xe_exec_queue *q = pt_update_ops->q;
 		struct xe_dep_scheduler *dep_scheduler =
 			to_dep_scheduler(q, tile->primary_gt);
 
 		ijob = xe_tlb_inval_job_create(q, &tile->primary_gt->tlb_inval,
-					       dep_scheduler,
+					       dep_scheduler, vm,
 					       pt_update_ops->start,
 					       pt_update_ops->last,
-					       vm->usm.asid);
+					       XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
 		if (IS_ERR(ijob)) {
 			err = PTR_ERR(ijob);
 			goto kill_vm_tile1;
@@ -2410,26 +2406,15 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
 
 			mjob = xe_tlb_inval_job_create(q,
 						       &tile->media_gt->tlb_inval,
-						       dep_scheduler,
+						       dep_scheduler, vm,
 						       pt_update_ops->start,
 						       pt_update_ops->last,
-						       vm->usm.asid);
+						       XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT);
 			if (IS_ERR(mjob)) {
 				err = PTR_ERR(mjob);
 				goto free_ijob;
 			}
 			update.mjob = mjob;
-
-			fences = kmalloc_array(2, sizeof(*fences), GFP_KERNEL);
-			if (!fences) {
-				err = -ENOMEM;
-				goto free_ijob;
-			}
-			cf = dma_fence_array_alloc(2);
-			if (!cf) {
-				err = -ENOMEM;
-				goto free_ijob;
-			}
 		}
 	}
 
@@ -2460,31 +2445,12 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
 				  pt_update_ops->last, fence))
 		dma_fence_wait(fence, false);
 
-	/* tlb invalidation must be done before signaling unbind/rebind */
-	if (ijob) {
-		struct dma_fence *__fence;
-
+	if (ijob)
 		ifence = xe_tlb_inval_job_push(ijob, tile->migrate, fence);
-		__fence = ifence;
+	if (mjob)
+		mfence = xe_tlb_inval_job_push(mjob, tile->migrate, fence);
 
-		if (mjob) {
-			fences[0] = ifence;
-			mfence = xe_tlb_inval_job_push(mjob, tile->migrate,
-						       fence);
-			fences[1] = mfence;
-
-			dma_fence_array_init(cf, 2, fences,
-					     vm->composite_fence_ctx,
-					     vm->composite_fence_seqno++,
-					     false);
-			__fence = &cf->base;
-		}
-
-		dma_fence_put(fence);
-		fence = __fence;
-	}
-
-	if (!mjob) {
+	if (!mjob && !ijob) {
 		dma_resv_add_fence(xe_vm_resv(vm), fence,
 				   pt_update_ops->wait_vm_bookkeep ?
 				   DMA_RESV_USAGE_KERNEL :
@@ -2492,6 +2458,14 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
 
 		list_for_each_entry(op, &vops->list, link)
 			op_commit(vops->vm, tile, pt_update_ops, op, fence, NULL);
+	} else if (ijob && !mjob) {
+		dma_resv_add_fence(xe_vm_resv(vm), ifence,
+				   pt_update_ops->wait_vm_bookkeep ?
+				   DMA_RESV_USAGE_KERNEL :
+				   DMA_RESV_USAGE_BOOKKEEP);
+
+		list_for_each_entry(op, &vops->list, link)
+			op_commit(vops->vm, tile, pt_update_ops, op, ifence, NULL);
 	} else {
 		dma_resv_add_fence(xe_vm_resv(vm), ifence,
 				   pt_update_ops->wait_vm_bookkeep ?
@@ -2511,16 +2485,23 @@ xe_pt_update_ops_run(struct xe_tile *tile, struct xe_vma_ops *vops)
 	if (pt_update_ops->needs_svm_lock)
 		xe_svm_notifier_unlock(vm);
 
+	/*
+	 * The last fence is only used for zero bind queue idling; migrate
+	 * queues are not exposed to user space.
+	 */
+	if (!(q->flags & EXEC_QUEUE_FLAG_MIGRATE))
+		xe_exec_queue_last_fence_set(q, vm, fence);
+
 	xe_tlb_inval_job_put(mjob);
 	xe_tlb_inval_job_put(ijob);
+	dma_fence_put(ifence);
+	dma_fence_put(mfence);
 
 	return fence;
 
 free_rfence:
 	kfree(rfence);
 free_ijob:
-	kfree(cf);
-	kfree(fences);
 	xe_tlb_inval_job_put(mjob);
 	xe_tlb_inval_job_put(ijob);
 kill_vm_tile1:
diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index 82872a51f098..70706362c11a 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -14,7 +14,7 @@
 #include <drm/drm_syncobj.h>
 #include <uapi/drm/xe_drm.h>
 
-#include "xe_device_types.h"
+#include "xe_device.h"
 #include "xe_exec_queue.h"
 #include "xe_macros.h"
 #include "xe_sched_job_types.h"
@@ -284,26 +284,67 @@ xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
 	struct dma_fence **fences = NULL;
 	struct dma_fence_array *cf = NULL;
 	struct dma_fence *fence;
-	int i, num_in_fence = 0, current_fence = 0;
+	int i, num_fence = 0, current_fence = 0;
 
 	lockdep_assert_held(&vm->lock);
 
 	/* Count in-fences */
 	for (i = 0; i < num_sync; ++i) {
 		if (sync[i].fence) {
-			++num_in_fence;
+			++num_fence;
 			fence = sync[i].fence;
 		}
 	}
 
 	/* Easy case... */
-	if (!num_in_fence) {
+	if (!num_fence) {
+		if (q->flags & EXEC_QUEUE_FLAG_VM) {
+			struct xe_exec_queue *__q;
+			struct xe_tile *tile;
+			u8 id;
+
+			for_each_tile(tile, vm->xe, id)
+				num_fence += (1 + XE_MAX_GT_PER_TILE);
+
+			fences = kmalloc_array(num_fence, sizeof(*fences),
+					       GFP_KERNEL);
+			if (!fences)
+				return ERR_PTR(-ENOMEM);
+
+			fences[current_fence++] =
+				xe_exec_queue_last_fence_get(q, vm);
+			for_each_tlb_inval(i)
+				fences[current_fence++] =
+					xe_exec_queue_tlb_inval_last_fence_get(q, vm, i);
+			list_for_each_entry(__q, &q->multi_gt_list,
+					    multi_gt_link) {
+				fences[current_fence++] =
+					xe_exec_queue_last_fence_get(__q, vm);
+				for_each_tlb_inval(i)
+					fences[current_fence++] =
+						xe_exec_queue_tlb_inval_last_fence_get(__q, vm, i);
+			}
+
+			xe_assert(vm->xe, current_fence == num_fence);
+			cf = dma_fence_array_create(num_fence, fences,
+						    dma_fence_context_alloc(1),
+						    1, false);
+			if (!cf)
+				goto err_out;
+
+			return &cf->base;
+		}
+
 		fence = xe_exec_queue_last_fence_get(q, vm);
 		return fence;
 	}
 
-	/* Create composite fence */
-	fences = kmalloc_array(num_in_fence + 1, sizeof(*fences), GFP_KERNEL);
+	/*
+	 * Create composite fence - FIXME - the below code doesn't work. This is
+	 * unused in Mesa so we are ok for the moment. Perhaps we just disable
+	 * this entire code path if number of in fences != 0.
+	 */
+	fences = kmalloc_array(num_fence + 1, sizeof(*fences), GFP_KERNEL);
 	if (!fences)
 		return ERR_PTR(-ENOMEM);
 	for (i = 0; i < num_sync; ++i) {
@@ -313,14 +354,10 @@ xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
 		}
 	}
 	fences[current_fence++] = xe_exec_queue_last_fence_get(q, vm);
-	cf = dma_fence_array_create(num_in_fence, fences,
-				    vm->composite_fence_ctx,
-				    vm->composite_fence_seqno++,
-				    false);
-	if (!cf) {
-		--vm->composite_fence_seqno;
+	cf = dma_fence_array_create(num_fence, fences,
+				    dma_fence_context_alloc(1), 1, false);
+	if (!cf)
 		goto err_out;
-	}
 
 	return &cf->base;
 
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_job.c b/drivers/gpu/drm/xe/xe_tlb_inval_job.c
index 492def04a559..1ae0dec2cf31 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_job.c
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_job.c
@@ -12,6 +12,7 @@
 #include "xe_tlb_inval_job.h"
 #include "xe_migrate.h"
 #include "xe_pm.h"
+#include "xe_vm.h"
 
 /** struct xe_tlb_inval_job - TLB invalidation job */
 struct xe_tlb_inval_job {
@@ -21,6 +22,8 @@ struct xe_tlb_inval_job {
 	struct xe_tlb_inval *tlb_inval;
 	/** @q: exec queue issuing the invalidate */
 	struct xe_exec_queue *q;
+	/** @vm: VM which TLB invalidation is being issued for */
+	struct xe_vm *vm;
 	/** @refcount: ref count of this job */
 	struct kref refcount;
 	/**
@@ -32,8 +35,8 @@ struct xe_tlb_inval_job {
 	u64 start;
 	/** @end: End address to invalidate */
 	u64 end;
-	/** @asid: Address space ID to invalidate */
-	u32 asid;
+	/** @type: GT type */
+	int type;
 	/** @fence_armed: Fence has been armed */
 	bool fence_armed;
 };
@@ -46,7 +49,7 @@ static struct dma_fence *xe_tlb_inval_job_run(struct xe_dep_job *dep_job)
 		container_of(job->fence, typeof(*ifence), base);
 
 	xe_tlb_inval_range(job->tlb_inval, ifence, job->start,
-			   job->end, job->asid);
+			   job->end, job->vm->usm.asid);
 
 	return job->fence;
 }
@@ -70,9 +73,10 @@ static const struct xe_dep_job_ops dep_job_ops = {
  * @q: exec queue issuing the invalidate
  * @tlb_inval: TLB invalidation client
  * @dep_scheduler: Dependency scheduler for job
+ * @vm: VM which TLB invalidation is being issued for
  * @start: Start address to invalidate
  * @end: End address to invalidate
- * @asid: Address space ID to invalidate
+ * @type: GT type
  *
  * Create a TLB invalidation job and initialize internal fields. The caller is
  * responsible for releasing the creation reference.
@@ -81,8 +85,8 @@ static const struct xe_dep_job_ops dep_job_ops = {
  */
 struct xe_tlb_inval_job *
 xe_tlb_inval_job_create(struct xe_exec_queue *q, struct xe_tlb_inval *tlb_inval,
-			struct xe_dep_scheduler *dep_scheduler, u64 start,
-			u64 end, u32 asid)
+			struct xe_dep_scheduler *dep_scheduler,
+			struct xe_vm *vm, u64 start, u64 end, int type)
 {
 	struct xe_tlb_inval_job *job;
 	struct drm_sched_entity *entity =
@@ -90,19 +94,24 @@ xe_tlb_inval_job_create(struct xe_exec_queue *q, struct xe_tlb_inval *tlb_inval,
 	struct xe_tlb_inval_fence *ifence;
 	int err;
 
+	xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
+		  type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
+
 	job = kmalloc(sizeof(*job), GFP_KERNEL);
 	if (!job)
 		return ERR_PTR(-ENOMEM);
 
 	job->q = q;
+	job->vm = vm;
 	job->tlb_inval = tlb_inval;
 	job->start = start;
 	job->end = end;
-	job->asid = asid;
 	job->fence_armed = false;
 	job->dep.ops = &dep_job_ops;
+	job->type = type;
 	kref_init(&job->refcount);
 	xe_exec_queue_get(q);	/* Pairs with put in xe_tlb_inval_job_destroy */
+	xe_vm_get(vm);		/* Pairs with put in xe_tlb_inval_job_destroy */
 
 	ifence = kmalloc(sizeof(*ifence), GFP_KERNEL);
 	if (!ifence) {
@@ -124,6 +133,7 @@ xe_tlb_inval_job_create(struct xe_exec_queue *q, struct xe_tlb_inval *tlb_inval,
 err_fence:
 	kfree(ifence);
 err_job:
+	xe_vm_put(vm);
 	xe_exec_queue_put(q);
 	kfree(job);
 
@@ -138,6 +148,7 @@ static void xe_tlb_inval_job_destroy(struct kref *ref)
 		container_of(job->fence, typeof(*ifence), base);
 	struct xe_exec_queue *q = job->q;
 	struct xe_device *xe = gt_to_xe(q->gt);
+	struct xe_vm *vm = job->vm;
 
 	if (!job->fence_armed)
 		kfree(ifence);
@@ -147,6 +158,7 @@ static void xe_tlb_inval_job_destroy(struct kref *ref)
 
 	drm_sched_job_cleanup(&job->dep.drm);
 	kfree(job);
+	xe_vm_put(vm);		/* Pairs with get from xe_tlb_inval_job_create */
 	xe_exec_queue_put(q);	/* Pairs with get from xe_tlb_inval_job_create */
 	xe_pm_runtime_put(xe);	/* Pairs with get from xe_tlb_inval_job_create */
 }
@@ -231,6 +243,11 @@ struct dma_fence *xe_tlb_inval_job_push(struct xe_tlb_inval_job *job,
 	dma_fence_get(&job->dep.drm.s_fence->finished);
 	drm_sched_entity_push_job(&job->dep.drm);
 
+	/* Let the upper layers fish this out */
+	xe_exec_queue_tlb_inval_last_fence_set(job->q, job->vm,
+					       &job->dep.drm.s_fence->finished,
+					       job->type);
+
 	xe_migrate_job_unlock(m, job->q);
 
 	/*
diff --git a/drivers/gpu/drm/xe/xe_tlb_inval_job.h b/drivers/gpu/drm/xe/xe_tlb_inval_job.h
index e63edcb26b50..4d6df1a6c6ca 100644
--- a/drivers/gpu/drm/xe/xe_tlb_inval_job.h
+++ b/drivers/gpu/drm/xe/xe_tlb_inval_job.h
@@ -11,14 +11,15 @@
 struct dma_fence;
 struct xe_dep_scheduler;
 struct xe_exec_queue;
+struct xe_migrate;
 struct xe_tlb_inval;
 struct xe_tlb_inval_job;
-struct xe_migrate;
+struct xe_vm;
 
 struct xe_tlb_inval_job *
 xe_tlb_inval_job_create(struct xe_exec_queue *q, struct xe_tlb_inval *tlb_inval,
 			struct xe_dep_scheduler *dep_scheduler,
-			u64 start, u64 end, u32 asid);
+			struct xe_vm *vm, u64 start, u64 end, int type);
 
 int xe_tlb_inval_job_alloc_dep(struct xe_tlb_inval_job *job);
 
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index d2a2f823f1b3..2f181c44b8b7 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -1623,9 +1623,6 @@ struct xe_vm *xe_vm_create(struct xe_device *xe, u32 flags, struct xe_file *xef)
 		}
 	}
 
-	if (number_tiles > 1)
-		vm->composite_fence_ctx = dma_fence_context_alloc(1);
-
 	if (xef && xe->info.has_asid) {
 		u32 asid;
 
@@ -3107,20 +3104,26 @@ static struct dma_fence *ops_execute(struct xe_vm *vm,
 	struct dma_fence *fence = NULL;
 	struct dma_fence **fences = NULL;
 	struct dma_fence_array *cf = NULL;
-	int number_tiles = 0, current_fence = 0, err;
+	int number_tiles = 0, current_fence = 0, n_fence = 0, err;
 	u8 id;
 
 	number_tiles = vm_ops_setup_tile_args(vm, vops);
 	if (number_tiles == 0)
 		return ERR_PTR(-ENODATA);
 
-	if (number_tiles > 1) {
-		fences = kmalloc_array(number_tiles, sizeof(*fences),
-				       GFP_KERNEL);
-		if (!fences) {
-			fence = ERR_PTR(-ENOMEM);
-			goto err_trace;
-		}
+	for_each_tile(tile, vm->xe, id)
+		n_fence += (1 + XE_MAX_GT_PER_TILE);
+
+	fences = kmalloc_array(n_fence, sizeof(*fences), GFP_KERNEL);
+	if (!fences) {
+		fence = ERR_PTR(-ENOMEM);
+		goto err_trace;
+	}
+
+	cf = dma_fence_array_alloc(n_fence);
+	if (!cf) {
+		fence = ERR_PTR(-ENOMEM);
+		goto err_out;
 	}
 
 	for_each_tile(tile, vm->xe, id) {
@@ -3137,29 +3140,30 @@ static struct dma_fence *ops_execute(struct xe_vm *vm,
 	trace_xe_vm_ops_execute(vops);
 
 	for_each_tile(tile, vm->xe, id) {
+		struct xe_exec_queue *q = vops->pt_update_ops[tile->id].q;
+		int i;
+
+		fence = NULL;
 		if (!vops->pt_update_ops[id].num_ops)
-			continue;
+			goto collect_fences;
 
 		fence = xe_pt_update_ops_run(tile, vops);
 		if (IS_ERR(fence))
 			goto err_out;
 
-		if (fences)
-			fences[current_fence++] = fence;
+collect_fences:
+		fences[current_fence++] = fence ?: dma_fence_get_stub();
+		xe_migrate_job_lock(tile->migrate, q);
+		for_each_tlb_inval(i)
+			fences[current_fence++] =
+				xe_exec_queue_tlb_inval_last_fence_get(q, vm, i);
+		xe_migrate_job_unlock(tile->migrate, q);
 	}
 
-	if (fences) {
-		cf = dma_fence_array_create(number_tiles, fences,
-					    vm->composite_fence_ctx,
-					    vm->composite_fence_seqno++,
-					    false);
-		if (!cf) {
-			--vm->composite_fence_seqno;
-			fence = ERR_PTR(-ENOMEM);
-			goto err_out;
-		}
-		fence = &cf->base;
-	}
+	xe_assert(vm->xe, current_fence == n_fence);
+	dma_fence_array_init(cf, n_fence, fences, dma_fence_context_alloc(1),
+			     1, false);
+	fence = &cf->base;
 
 	for_each_tile(tile, vm->xe, id) {
 		if (!vops->pt_update_ops[id].num_ops)
@@ -3220,7 +3224,6 @@ static void op_add_ufence(struct xe_vm *vm, struct xe_vma_op *op,
 static void vm_bind_ioctl_ops_fini(struct xe_vm *vm, struct xe_vma_ops *vops,
 				   struct dma_fence *fence)
 {
-	struct xe_exec_queue *wait_exec_queue = to_wait_exec_queue(vm, vops->q);
 	struct xe_user_fence *ufence;
 	struct xe_vma_op *op;
 	int i;
@@ -3241,7 +3244,6 @@ static void vm_bind_ioctl_ops_fini(struct xe_vm *vm, struct xe_vma_ops *vops,
 	if (fence) {
 		for (i = 0; i < vops->num_syncs; i++)
 			xe_sync_entry_signal(vops->syncs + i, fence);
-		xe_exec_queue_last_fence_set(wait_exec_queue, vm, fence);
 	}
 }
 
@@ -3435,19 +3437,19 @@ static int vm_bind_ioctl_signal_fences(struct xe_vm *vm,
 				       struct xe_sync_entry *syncs,
 				       int num_syncs)
 {
-	struct dma_fence *fence;
+	struct dma_fence *fence = NULL;
 	int i, err = 0;
 
-	fence = xe_sync_in_fence_get(syncs, num_syncs,
-				     to_wait_exec_queue(vm, q), vm);
-	if (IS_ERR(fence))
-		return PTR_ERR(fence);
+	if (num_syncs) {
+		fence = xe_sync_in_fence_get(syncs, num_syncs,
+					     to_wait_exec_queue(vm, q), vm);
+		if (IS_ERR(fence))
+			return PTR_ERR(fence);
 
-	for (i = 0; i < num_syncs; i++)
-		xe_sync_entry_signal(&syncs[i], fence);
+		for (i = 0; i < num_syncs; i++)
+			xe_sync_entry_signal(&syncs[i], fence);
+	}
 
-	xe_exec_queue_last_fence_set(to_wait_exec_queue(vm, q), vm,
-				     fence);
 	dma_fence_put(fence);
 
 	return err;
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index d6e2a0fdd4b3..542dbe2f9310 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -221,11 +221,6 @@ struct xe_vm {
 #define XE_VM_FLAG_GSC			BIT(8)
 	unsigned long flags;
 
-	/** @composite_fence_ctx: context composite fence */
-	u64 composite_fence_ctx;
-	/** @composite_fence_seqno: seqno for composite fence */
-	u32 composite_fence_seqno;
-
 	/**
 	 * @lock: outer most lock, protects objects of anything attached to this
 	 * VM
-- 
2.34.1

[PATCH v4 3/5] drm/xe: Do not wait on TLB invalidations in page fault binds

[Matthew Brost]

The migrate queue is shared by all processes using a device, thus is
possible while servicing a page fault another process uses the migrate
queue resulting in a TLB invalidation. In case of page fault binds, this
TLB invalidation has nothing to do with the current bind so there is not
need to wait on it. Teach the bind pipeline to be able to skip waits on
TLB invalidations.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_vm.c       | 14 ++++++++++++--
 drivers/gpu/drm/xe/xe_vm_types.h |  1 +
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 2f181c44b8b7..df0a44d9eb46 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -755,6 +755,7 @@ struct dma_fence *xe_vma_rebind(struct xe_vm *vm, struct xe_vma *vma, u8 tile_ma
 	xe_assert(vm->xe, xe_vm_in_fault_mode(vm));
 
 	xe_vma_ops_init(&vops, vm, NULL, NULL, 0);
+	vops.flags |= XE_VMA_OPS_FLAG_SKIP_TLB_WAIT;
 	for_each_tile(tile, vm->xe, id) {
 		vops.pt_update_ops[id].wait_vm_bookkeep = true;
 		vops.pt_update_ops[tile->id].q =
@@ -845,6 +846,7 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
 	xe_assert(vm->xe, xe_vma_is_cpu_addr_mirror(vma));
 
 	xe_vma_ops_init(&vops, vm, NULL, NULL, 0);
+	vops.flags |= XE_VMA_OPS_FLAG_SKIP_TLB_WAIT;
 	for_each_tile(tile, vm->xe, id) {
 		vops.pt_update_ops[id].wait_vm_bookkeep = true;
 		vops.pt_update_ops[tile->id].q =
@@ -3111,8 +3113,13 @@ static struct dma_fence *ops_execute(struct xe_vm *vm,
 	if (number_tiles == 0)
 		return ERR_PTR(-ENODATA);
 
-	for_each_tile(tile, vm->xe, id)
-		n_fence += (1 + XE_MAX_GT_PER_TILE);
+	if (vops->flags & XE_VMA_OPS_FLAG_SKIP_TLB_WAIT) {
+		for_each_tile(tile, vm->xe, id)
+			++n_fence;
+	} else {
+		for_each_tile(tile, vm->xe, id)
+			n_fence += (1 + XE_MAX_GT_PER_TILE);
+	}
 
 	fences = kmalloc_array(n_fence, sizeof(*fences), GFP_KERNEL);
 	if (!fences) {
@@ -3153,6 +3160,9 @@ static struct dma_fence *ops_execute(struct xe_vm *vm,
 
 collect_fences:
 		fences[current_fence++] = fence ?: dma_fence_get_stub();
+		if (vops->flags & XE_VMA_OPS_FLAG_SKIP_TLB_WAIT)
+			continue;
+
 		xe_migrate_job_lock(tile->migrate, q);
 		for_each_tlb_inval(i)
 			fences[current_fence++] =
diff --git a/drivers/gpu/drm/xe/xe_vm_types.h b/drivers/gpu/drm/xe/xe_vm_types.h
index 542dbe2f9310..3766dc37b3ad 100644
--- a/drivers/gpu/drm/xe/xe_vm_types.h
+++ b/drivers/gpu/drm/xe/xe_vm_types.h
@@ -466,6 +466,7 @@ struct xe_vma_ops {
 #define XE_VMA_OPS_FLAG_HAS_SVM_PREFETCH BIT(0)
 #define XE_VMA_OPS_FLAG_MADVISE          BIT(1)
 #define XE_VMA_OPS_ARRAY_OF_BINDS	 BIT(2)
+#define XE_VMA_OPS_FLAG_SKIP_TLB_WAIT	 BIT(3)
 	u32 flags;
 #ifdef TEST_VM_OPS_ERROR
 	/** @inject_error: inject error to test error handling */
-- 
2.34.1

[PATCH v4 4/5] drm/xe: Don't allow in fences on zero batch exec or zero binds

[Matthew Brost]

The zero batch or zero binds mechanism was added to implement queue
idling in Mesa. In this case, output fences are attached, which can be
waited upon to indicate that the queue is idle once they signal.

As part of this, we added the ability to install input fences on zero
batch execs or zero binds for interface congruence. However, upon
inspection, this implementation doesn't work correctly, as multiple
composite fences could be chained together, which is disallowed.

While this could be fixed, it would be rather complicated. Since the use
case for input fences on zero batch execs or zero binds isn't actually
used, it's better to remove support and disallow it.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_sync.c | 101 +++++++++++++----------------------
 1 file changed, 36 insertions(+), 65 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_sync.c b/drivers/gpu/drm/xe/xe_sync.c
index 70706362c11a..f50134bedf8a 100644
--- a/drivers/gpu/drm/xe/xe_sync.c
+++ b/drivers/gpu/drm/xe/xe_sync.c
@@ -288,84 +288,55 @@ xe_sync_in_fence_get(struct xe_sync_entry *sync, int num_sync,
 
 	lockdep_assert_held(&vm->lock);
 
-	/* Count in-fences */
-	for (i = 0; i < num_sync; ++i) {
-		if (sync[i].fence) {
-			++num_fence;
-			fence = sync[i].fence;
-		}
-	}
-
-	/* Easy case... */
-	if (!num_fence) {
-		if (q->flags & EXEC_QUEUE_FLAG_VM) {
-			struct xe_exec_queue *__q;
-			struct xe_tile *tile;
-			u8 id;
-
-			for_each_tile(tile, vm->xe, id)
-				num_fence += (1 + XE_MAX_GT_PER_TILE);
-
-			fences = kmalloc_array(num_fence, sizeof(*fences),
-					       GFP_KERNEL);
-			if (!fences)
-				return ERR_PTR(-ENOMEM);
-
+	/* Reject in fences */
+	for (i = 0; i < num_sync; ++i)
+		if (sync[i].fence)
+			return ERR_PTR(-EOPNOTSUPP);
+
+	if (q->flags & EXEC_QUEUE_FLAG_VM) {
+		struct xe_exec_queue *__q;
+		struct xe_tile *tile;
+		u8 id;
+
+		for_each_tile(tile, vm->xe, id)
+			num_fence += (1 + XE_MAX_GT_PER_TILE);
+
+		fences = kmalloc_array(num_fence, sizeof(*fences),
+				       GFP_KERNEL);
+		if (!fences)
+			return ERR_PTR(-ENOMEM);
+
+		fences[current_fence++] =
+			xe_exec_queue_last_fence_get(q, vm);
+		for_each_tlb_inval(i)
+			fences[current_fence++] =
+				xe_exec_queue_tlb_inval_last_fence_get(q, vm, i);
+		list_for_each_entry(__q, &q->multi_gt_list,
+				    multi_gt_link) {
 			fences[current_fence++] =
-				xe_exec_queue_last_fence_get(q, vm);
+				xe_exec_queue_last_fence_get(__q, vm);
 			for_each_tlb_inval(i)
 				fences[current_fence++] =
-					xe_exec_queue_tlb_inval_last_fence_get(q, vm, i);
-			list_for_each_entry(__q, &q->multi_gt_list,
-					    multi_gt_link) {
-				fences[current_fence++] =
-					xe_exec_queue_last_fence_get(__q, vm);
-				for_each_tlb_inval(i)
-					fences[current_fence++] =
-						xe_exec_queue_tlb_inval_last_fence_get(__q, vm, i);
-			}
-
-			xe_assert(vm->xe, current_fence == num_fence);
-			cf = dma_fence_array_create(num_fence, fences,
-						    dma_fence_context_alloc(1),
-						    1, false);
-			if (!cf)
-				goto err_out;
-
-			return &cf->base;
+					xe_exec_queue_tlb_inval_last_fence_get(__q, vm, i);
 		}
 
-		fence = xe_exec_queue_last_fence_get(q, vm);
-		return fence;
-	}
+		xe_assert(vm->xe, current_fence == num_fence);
+		cf = dma_fence_array_create(num_fence, fences,
+					    dma_fence_context_alloc(1),
+					    1, false);
+		if (!cf)
+			goto err_out;
 
-	/*
-	 * Create composite fence - FIXME - the below code doesn't work. This is
-	 * unused in Mesa so we are ok for the moment. Perhaps we just disable
-	 * this entire code path if number of in fences != 0.
-	 */
-	fences = kmalloc_array(num_fence + 1, sizeof(*fences), GFP_KERNEL);
-	if (!fences)
-		return ERR_PTR(-ENOMEM);
-	for (i = 0; i < num_sync; ++i) {
-		if (sync[i].fence) {
-			dma_fence_get(sync[i].fence);
-			fences[current_fence++] = sync[i].fence;
-		}
+		return &cf->base;
 	}
-	fences[current_fence++] = xe_exec_queue_last_fence_get(q, vm);
-	cf = dma_fence_array_create(num_fence, fences,
-				    dma_fence_context_alloc(1), 1, false);
-	if (!cf)
-		goto err_out;
 
-	return &cf->base;
+	fence = xe_exec_queue_last_fence_get(q, vm);
+	return fence;
 
 err_out:
 	while (current_fence)
 		dma_fence_put(fences[--current_fence]);
 	kfree(fences);
-	kfree(cf);
 
 	return ERR_PTR(-ENOMEM);
 }
-- 
2.34.1

[PATCH v4 5/5] drm/xe: Remove last fence dependecy check from binds

[Matthew Brost]

The last fence dependency check for binds is now equivalent to
xe_exec_queue_is_idle and is redundant, so remove this dead code.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_exec_queue.c | 23 -----------------------
 drivers/gpu/drm/xe/xe_exec_queue.h |  2 --
 drivers/gpu/drm/xe/xe_pt.c         |  7 -------
 3 files changed, 32 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index d7d00d4de93c..efcdfdb0cc3f 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -1109,29 +1109,6 @@ void xe_exec_queue_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm,
 	q->last_fence = dma_fence_get(fence);
 }
 
-/**
- * xe_exec_queue_last_fence_test_dep - Test last fence dependency of queue
- * @q: The exec queue
- * @vm: The VM the engine does a bind or exec for
- *
- * Returns:
- * -ETIME if there exists an unsignalled last fence dependency, zero otherwise.
- */
-int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q, struct xe_vm *vm)
-{
-	struct dma_fence *fence;
-	int err = 0;
-
-	fence = xe_exec_queue_last_fence_get(q, vm);
-	if (fence) {
-		err = test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) ?
-			0 : -ETIME;
-		dma_fence_put(fence);
-	}
-
-	return err;
-}
-
 /**
  * xe_exec_queue_tlb_inval_last_fence_put() - Drop ref to last TLB invalidation fence
  * @q: The exec queue
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index c4b95fad93f1..839e9880a598 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -88,8 +88,6 @@ struct dma_fence *xe_exec_queue_last_fence_get_for_resume(struct xe_exec_queue *
 							  struct xe_vm *vm);
 void xe_exec_queue_last_fence_set(struct xe_exec_queue *e, struct xe_vm *vm,
 				  struct dma_fence *fence);
-int xe_exec_queue_last_fence_test_dep(struct xe_exec_queue *q,
-				      struct xe_vm *vm);
 
 void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
 					    struct xe_vm *vm,
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index a4b9cdf016d9..01056b51ac9f 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -1338,13 +1338,6 @@ static int xe_pt_vm_dependencies(struct xe_sched_job *job,
 			return err;
 	}
 
-	if (!(pt_update_ops->q->flags & EXEC_QUEUE_FLAG_KERNEL)) {
-		if (job)
-			err = xe_sched_job_last_fence_add_dep(job, vm);
-		else
-			err = xe_exec_queue_last_fence_test_dep(pt_update_ops->q, vm);
-	}
-
 	for (i = 0; job && !err && i < vops->num_syncs; i++)
 		err = xe_sync_entry_add_deps(&vops->syncs[i], job);
 
-- 
2.34.1

✗ CI.checkpatch: warning for Fix serialization on burst of unbinds - v2

[Patchwork]

== Series Details ==

Series: Fix serialization on burst of unbinds - v2
URL   : https://patchwork.freedesktop.org/series/156606/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
f867e605613af1770f90c4b0afd4a8f06424d1f0
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9da96369df122f71cc08cd1d093551b842f676af
Author: Matthew Brost <matthew.brost@intel.com>
Date:   Mon Oct 27 11:27:37 2025 -0700

    drm/xe: Remove last fence dependecy check from binds
    
    The last fence dependency check for binds is now equivalent to
    xe_exec_queue_is_idle and is redundant, so remove this dead code.
    
    Signed-off-by: Matthew Brost <matthew.brost@intel.com>
+ /mt/dim checkpatch a8f3783a2ccf78b04e48cf235f03629b80ffa3e0 drm-intel
95fe6436443c drm/xe: Add last fence attachment to TLB invalidation job queues
-:169: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#169: FILE: drivers/gpu/drm/xe/xe_exec_queue.h:17:
+#define for_each_tlb_inval(__i)	\
+	for (__i = XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT; \
+	     __i <= XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT; ++__i)

total: 0 errors, 0 warnings, 1 checks, 223 lines checked
26a4087ca598 drm/xe: Decouple bind queue last fence from TLB invalidations
59e5ded2429a drm/xe: Do not wait on TLB invalidations in page fault binds
7f8d734b767f drm/xe: Don't allow in fences on zero batch exec or zero binds
9da96369df12 drm/xe: Remove last fence dependecy check from binds

✓ CI.KUnit: success for Fix serialization on burst of unbinds - v2

[Patchwork]

== Series Details ==

Series: Fix serialization on burst of unbinds - v2
URL   : https://patchwork.freedesktop.org/series/156606/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:33:15] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:33:19] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:33:50] Starting KUnit Kernel (1/1)...
[18:33:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:33:50] ================== guc_buf (11 subtests) ===================
[18:33:50] [PASSED] test_smallest
[18:33:50] [PASSED] test_largest
[18:33:50] [PASSED] test_granular
[18:33:50] [PASSED] test_unique
[18:33:50] [PASSED] test_overlap
[18:33:50] [PASSED] test_reusable
[18:33:50] [PASSED] test_too_big
[18:33:50] [PASSED] test_flush
[18:33:50] [PASSED] test_lookup
[18:33:50] [PASSED] test_data
[18:33:50] [PASSED] test_class
[18:33:50] ===================== [PASSED] guc_buf =====================
[18:33:50] =================== guc_dbm (7 subtests) ===================
[18:33:50] [PASSED] test_empty
[18:33:50] [PASSED] test_default
[18:33:50] ======================== test_size  ========================
[18:33:50] [PASSED] 4
[18:33:50] [PASSED] 8
[18:33:50] [PASSED] 32
[18:33:50] [PASSED] 256
[18:33:50] ==================== [PASSED] test_size ====================
[18:33:50] ======================= test_reuse  ========================
[18:33:50] [PASSED] 4
[18:33:50] [PASSED] 8
[18:33:50] [PASSED] 32
[18:33:50] [PASSED] 256
[18:33:50] =================== [PASSED] test_reuse ====================
[18:33:50] =================== test_range_overlap  ====================
[18:33:50] [PASSED] 4
[18:33:50] [PASSED] 8
[18:33:50] [PASSED] 32
[18:33:50] [PASSED] 256
[18:33:50] =============== [PASSED] test_range_overlap ================
[18:33:50] =================== test_range_compact  ====================
[18:33:50] [PASSED] 4
[18:33:50] [PASSED] 8
[18:33:50] [PASSED] 32
[18:33:50] [PASSED] 256
[18:33:50] =============== [PASSED] test_range_compact ================
[18:33:50] ==================== test_range_spare  =====================
[18:33:50] [PASSED] 4
[18:33:50] [PASSED] 8
[18:33:50] [PASSED] 32
[18:33:50] [PASSED] 256
[18:33:50] ================ [PASSED] test_range_spare =================
[18:33:50] ===================== [PASSED] guc_dbm =====================
[18:33:50] =================== guc_idm (6 subtests) ===================
[18:33:50] [PASSED] bad_init
[18:33:50] [PASSED] no_init
[18:33:50] [PASSED] init_fini
[18:33:50] [PASSED] check_used
[18:33:50] [PASSED] check_quota
[18:33:50] [PASSED] check_all
[18:33:50] ===================== [PASSED] guc_idm =====================
[18:33:50] ================== no_relay (3 subtests) ===================
[18:33:50] [PASSED] xe_drops_guc2pf_if_not_ready
[18:33:50] [PASSED] xe_drops_guc2vf_if_not_ready
[18:33:50] [PASSED] xe_rejects_send_if_not_ready
[18:33:50] ==================== [PASSED] no_relay =====================
[18:33:50] ================== pf_relay (14 subtests) ==================
[18:33:50] [PASSED] pf_rejects_guc2pf_too_short
[18:33:50] [PASSED] pf_rejects_guc2pf_too_long
[18:33:50] [PASSED] pf_rejects_guc2pf_no_payload
[18:33:50] [PASSED] pf_fails_no_payload
[18:33:50] [PASSED] pf_fails_bad_origin
[18:33:50] [PASSED] pf_fails_bad_type
[18:33:50] [PASSED] pf_txn_reports_error
[18:33:50] [PASSED] pf_txn_sends_pf2guc
[18:33:50] [PASSED] pf_sends_pf2guc
[18:33:50] [SKIPPED] pf_loopback_nop
[18:33:50] [SKIPPED] pf_loopback_echo
[18:33:50] [SKIPPED] pf_loopback_fail
[18:33:50] [SKIPPED] pf_loopback_busy
[18:33:50] [SKIPPED] pf_loopback_retry
[18:33:50] ==================== [PASSED] pf_relay =====================
[18:33:50] ================== vf_relay (3 subtests) ===================
[18:33:50] [PASSED] vf_rejects_guc2vf_too_short
[18:33:50] [PASSED] vf_rejects_guc2vf_too_long
[18:33:50] [PASSED] vf_rejects_guc2vf_no_payload
[18:33:50] ==================== [PASSED] vf_relay =====================
[18:33:50] ===================== lmtt (1 subtest) =====================
[18:33:50] ======================== test_ops  =========================
[18:33:50] [PASSED] 2-level
[18:33:50] [PASSED] multi-level
[18:33:50] ==================== [PASSED] test_ops =====================
[18:33:50] ====================== [PASSED] lmtt =======================
[18:33:50] ================= pf_service (11 subtests) =================
[18:33:50] [PASSED] pf_negotiate_any
[18:33:50] [PASSED] pf_negotiate_base_match
[18:33:50] [PASSED] pf_negotiate_base_newer
[18:33:50] [PASSED] pf_negotiate_base_next
[18:33:50] [SKIPPED] pf_negotiate_base_older
[18:33:50] [PASSED] pf_negotiate_base_prev
[18:33:50] [PASSED] pf_negotiate_latest_match
[18:33:50] [PASSED] pf_negotiate_latest_newer
[18:33:50] [PASSED] pf_negotiate_latest_next
[18:33:50] [SKIPPED] pf_negotiate_latest_older
[18:33:50] [SKIPPED] pf_negotiate_latest_prev
[18:33:50] =================== [PASSED] pf_service ====================
[18:33:50] ================= xe_guc_g2g (2 subtests) ==================
[18:33:50] ============== xe_live_guc_g2g_kunit_default  ==============
[18:33:50] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[18:33:50] ============== xe_live_guc_g2g_kunit_allmem  ===============
[18:33:50] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[18:33:50] =================== [SKIPPED] xe_guc_g2g ===================
[18:33:50] =================== xe_mocs (2 subtests) ===================
[18:33:50] ================ xe_live_mocs_kernel_kunit  ================
[18:33:50] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:33:50] ================ xe_live_mocs_reset_kunit  =================
[18:33:50] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:33:50] ==================== [SKIPPED] xe_mocs =====================
[18:33:50] ================= xe_migrate (2 subtests) ==================
[18:33:50] ================= xe_migrate_sanity_kunit  =================
[18:33:50] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:33:50] ================== xe_validate_ccs_kunit  ==================
[18:33:50] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:33:50] =================== [SKIPPED] xe_migrate ===================
[18:33:50] ================== xe_dma_buf (1 subtest) ==================
[18:33:50] ==================== xe_dma_buf_kunit  =====================
[18:33:50] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:33:50] =================== [SKIPPED] xe_dma_buf ===================
[18:33:50] ================= xe_bo_shrink (1 subtest) =================
[18:33:50] =================== xe_bo_shrink_kunit  ====================
[18:33:50] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:33:50] ================== [SKIPPED] xe_bo_shrink ==================
[18:33:50] ==================== xe_bo (2 subtests) ====================
[18:33:50] ================== xe_ccs_migrate_kunit  ===================
[18:33:50] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:33:50] ==================== xe_bo_evict_kunit  ====================
[18:33:50] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:33:50] ===================== [SKIPPED] xe_bo ======================
[18:33:50] ==================== args (11 subtests) ====================
[18:33:50] [PASSED] count_args_test
[18:33:50] [PASSED] call_args_example
[18:33:50] [PASSED] call_args_test
[18:33:50] [PASSED] drop_first_arg_example
[18:33:50] [PASSED] drop_first_arg_test
[18:33:50] [PASSED] first_arg_example
[18:33:50] [PASSED] first_arg_test
[18:33:50] [PASSED] last_arg_example
[18:33:50] [PASSED] last_arg_test
[18:33:50] [PASSED] pick_arg_example
[18:33:50] [PASSED] sep_comma_example
[18:33:50] ====================== [PASSED] args =======================
[18:33:50] =================== xe_pci (3 subtests) ====================
[18:33:50] ==================== check_graphics_ip  ====================
[18:33:50] [PASSED] 12.00 Xe_LP
[18:33:50] [PASSED] 12.10 Xe_LP+
[18:33:50] [PASSED] 12.55 Xe_HPG
[18:33:50] [PASSED] 12.60 Xe_HPC
[18:33:50] [PASSED] 12.70 Xe_LPG
[18:33:50] [PASSED] 12.71 Xe_LPG
[18:33:50] [PASSED] 12.74 Xe_LPG+
[18:33:50] [PASSED] 20.01 Xe2_HPG
[18:33:50] [PASSED] 20.02 Xe2_HPG
[18:33:50] [PASSED] 20.04 Xe2_LPG
[18:33:50] [PASSED] 30.00 Xe3_LPG
[18:33:50] [PASSED] 30.01 Xe3_LPG
[18:33:50] [PASSED] 30.03 Xe3_LPG
[18:33:50] [PASSED] 30.04 Xe3_LPG
[18:33:50] [PASSED] 30.05 Xe3_LPG
[18:33:50] [PASSED] 35.11 Xe3p_XPC
[18:33:50] ================ [PASSED] check_graphics_ip ================
[18:33:50] ===================== check_media_ip  ======================
[18:33:50] [PASSED] 12.00 Xe_M
[18:33:50] [PASSED] 12.55 Xe_HPM
[18:33:50] [PASSED] 13.00 Xe_LPM+
[18:33:50] [PASSED] 13.01 Xe2_HPM
[18:33:50] [PASSED] 20.00 Xe2_LPM
[18:33:50] [PASSED] 30.00 Xe3_LPM
[18:33:50] [PASSED] 30.02 Xe3_LPM
[18:33:50] [PASSED] 35.00 Xe3p_LPM
[18:33:50] [PASSED] 35.03 Xe3p_HPM
[18:33:50] ================= [PASSED] check_media_ip ==================
[18:33:50] =================== check_platform_desc  ===================
[18:33:50] [PASSED] 0x9A60 (TIGERLAKE)
[18:33:50] [PASSED] 0x9A68 (TIGERLAKE)
[18:33:50] [PASSED] 0x9A70 (TIGERLAKE)
[18:33:50] [PASSED] 0x9A40 (TIGERLAKE)
[18:33:50] [PASSED] 0x9A49 (TIGERLAKE)
[18:33:50] [PASSED] 0x9A59 (TIGERLAKE)
[18:33:50] [PASSED] 0x9A78 (TIGERLAKE)
[18:33:50] [PASSED] 0x9AC0 (TIGERLAKE)
[18:33:50] [PASSED] 0x9AC9 (TIGERLAKE)
[18:33:50] [PASSED] 0x9AD9 (TIGERLAKE)
[18:33:50] [PASSED] 0x9AF8 (TIGERLAKE)
[18:33:50] [PASSED] 0x4C80 (ROCKETLAKE)
[18:33:50] [PASSED] 0x4C8A (ROCKETLAKE)
[18:33:50] [PASSED] 0x4C8B (ROCKETLAKE)
[18:33:50] [PASSED] 0x4C8C (ROCKETLAKE)
[18:33:50] [PASSED] 0x4C90 (ROCKETLAKE)
[18:33:50] [PASSED] 0x4C9A (ROCKETLAKE)
[18:33:50] [PASSED] 0x4680 (ALDERLAKE_S)
[18:33:50] [PASSED] 0x4682 (ALDERLAKE_S)
[18:33:50] [PASSED] 0x4688 (ALDERLAKE_S)
[18:33:50] [PASSED] 0x468A (ALDERLAKE_S)
[18:33:50] [PASSED] 0x468B (ALDERLAKE_S)
[18:33:50] [PASSED] 0x4690 (ALDERLAKE_S)
[18:33:50] [PASSED] 0x4692 (ALDERLAKE_S)
[18:33:50] [PASSED] 0x4693 (ALDERLAKE_S)
[18:33:50] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46AA (ALDERLAKE_P)
[18:33:50] [PASSED] 0x462A (ALDERLAKE_P)
[18:33:50] [PASSED] 0x4626 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x4628 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:33:50] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:33:50] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:33:50] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:33:50] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:33:50] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:33:50] [PASSED] 0xA721 (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA720 (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:33:50] [PASSED] 0xA780 (ALDERLAKE_S)
[18:33:50] [PASSED] 0xA781 (ALDERLAKE_S)
[18:33:50] [PASSED] 0xA782 (ALDERLAKE_S)
[18:33:50] [PASSED] 0xA783 (ALDERLAKE_S)
[18:33:50] [PASSED] 0xA788 (ALDERLAKE_S)
[18:33:50] [PASSED] 0xA789 (ALDERLAKE_S)
[18:33:50] [PASSED] 0xA78A (ALDERLAKE_S)
[18:33:50] [PASSED] 0xA78B (ALDERLAKE_S)
[18:33:50] [PASSED] 0x4905 (DG1)
[18:33:50] [PASSED] 0x4906 (DG1)
[18:33:50] [PASSED] 0x4907 (DG1)
[18:33:50] [PASSED] 0x4908 (DG1)
[18:33:50] [PASSED] 0x4909 (DG1)
[18:33:50] [PASSED] 0x56C0 (DG2)
[18:33:50] [PASSED] 0x56C2 (DG2)
[18:33:50] [PASSED] 0x56C1 (DG2)
[18:33:50] [PASSED] 0x7D51 (METEORLAKE)
[18:33:50] [PASSED] 0x7DD1 (METEORLAKE)
[18:33:50] [PASSED] 0x7D41 (METEORLAKE)
[18:33:50] [PASSED] 0x7D67 (METEORLAKE)
[18:33:50] [PASSED] 0xB640 (METEORLAKE)
[18:33:50] [PASSED] 0x56A0 (DG2)
[18:33:50] [PASSED] 0x56A1 (DG2)
[18:33:50] [PASSED] 0x56A2 (DG2)
[18:33:50] [PASSED] 0x56BE (DG2)
[18:33:50] [PASSED] 0x56BF (DG2)
[18:33:50] [PASSED] 0x5690 (DG2)
[18:33:50] [PASSED] 0x5691 (DG2)
[18:33:50] [PASSED] 0x5692 (DG2)
[18:33:50] [PASSED] 0x56A5 (DG2)
[18:33:50] [PASSED] 0x56A6 (DG2)
[18:33:50] [PASSED] 0x56B0 (DG2)
[18:33:50] [PASSED] 0x56B1 (DG2)
[18:33:50] [PASSED] 0x56BA (DG2)
[18:33:50] [PASSED] 0x56BB (DG2)
[18:33:50] [PASSED] 0x56BC (DG2)
[18:33:50] [PASSED] 0x56BD (DG2)
[18:33:50] [PASSED] 0x5693 (DG2)
[18:33:50] [PASSED] 0x5694 (DG2)
[18:33:50] [PASSED] 0x5695 (DG2)
[18:33:50] [PASSED] 0x56A3 (DG2)
[18:33:50] [PASSED] 0x56A4 (DG2)
[18:33:50] [PASSED] 0x56B2 (DG2)
[18:33:50] [PASSED] 0x56B3 (DG2)
[18:33:50] [PASSED] 0x5696 (DG2)
[18:33:50] [PASSED] 0x5697 (DG2)
[18:33:50] [PASSED] 0xB69 (PVC)
[18:33:50] [PASSED] 0xB6E (PVC)
[18:33:50] [PASSED] 0xBD4 (PVC)
[18:33:50] [PASSED] 0xBD5 (PVC)
[18:33:50] [PASSED] 0xBD6 (PVC)
[18:33:50] [PASSED] 0xBD7 (PVC)
[18:33:50] [PASSED] 0xBD8 (PVC)
[18:33:50] [PASSED] 0xBD9 (PVC)
[18:33:50] [PASSED] 0xBDA (PVC)
[18:33:50] [PASSED] 0xBDB (PVC)
[18:33:50] [PASSED] 0xBE0 (PVC)
[18:33:50] [PASSED] 0xBE1 (PVC)
[18:33:50] [PASSED] 0xBE5 (PVC)
[18:33:50] [PASSED] 0x7D40 (METEORLAKE)
[18:33:50] [PASSED] 0x7D45 (METEORLAKE)
[18:33:50] [PASSED] 0x7D55 (METEORLAKE)
[18:33:50] [PASSED] 0x7D60 (METEORLAKE)
[18:33:50] [PASSED] 0x7DD5 (METEORLAKE)
[18:33:50] [PASSED] 0x6420 (LUNARLAKE)
[18:33:50] [PASSED] 0x64A0 (LUNARLAKE)
[18:33:50] [PASSED] 0x64B0 (LUNARLAKE)
[18:33:50] [PASSED] 0xE202 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE209 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE20B (BATTLEMAGE)
[18:33:50] [PASSED] 0xE20C (BATTLEMAGE)
[18:33:50] [PASSED] 0xE20D (BATTLEMAGE)
[18:33:50] [PASSED] 0xE210 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE211 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE212 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE216 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE220 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE221 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE222 (BATTLEMAGE)
[18:33:50] [PASSED] 0xE223 (BATTLEMAGE)
[18:33:50] [PASSED] 0xB080 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB081 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB082 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB083 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB084 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB085 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB086 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB087 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB08F (PANTHERLAKE)
[18:33:50] [PASSED] 0xB090 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:33:50] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:33:50] [PASSED] 0xFD80 (PANTHERLAKE)
[18:33:50] [PASSED] 0xFD81 (PANTHERLAKE)
[18:33:50] [PASSED] 0xD740 (NOVALAKE_S)
[18:33:50] [PASSED] 0xD741 (NOVALAKE_S)
[18:33:50] [PASSED] 0xD742 (NOVALAKE_S)
[18:33:50] [PASSED] 0xD743 (NOVALAKE_S)
[18:33:50] [PASSED] 0xD744 (NOVALAKE_S)
[18:33:50] [PASSED] 0xD745 (NOVALAKE_S)
[18:33:50] [PASSED] 0x674C (CRESCENTISLAND)
[18:33:50] =============== [PASSED] check_platform_desc ===============
[18:33:50] ===================== [PASSED] xe_pci ======================
[18:33:50] =================== xe_rtp (2 subtests) ====================
[18:33:50] =============== xe_rtp_process_to_sr_tests  ================
[18:33:50] [PASSED] coalesce-same-reg
[18:33:50] [PASSED] no-match-no-add
[18:33:50] [PASSED] match-or
[18:33:50] [PASSED] match-or-xfail
[18:33:50] [PASSED] no-match-no-add-multiple-rules
[18:33:50] [PASSED] two-regs-two-entries
[18:33:50] [PASSED] clr-one-set-other
[18:33:50] [PASSED] set-field
[18:33:50] [PASSED] conflict-duplicate
[18:33:50] [PASSED] conflict-not-disjoint
[18:33:50] [PASSED] conflict-reg-type
[18:33:50] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:33:50] ================== xe_rtp_process_tests  ===================
[18:33:50] [PASSED] active1
[18:33:50] [PASSED] active2
[18:33:50] [PASSED] active-inactive
[18:33:50] [PASSED] inactive-active
[18:33:50] [PASSED] inactive-1st_or_active-inactive
[18:33:50] [PASSED] inactive-2nd_or_active-inactive
[18:33:50] [PASSED] inactive-last_or_active-inactive
stty: 'standard input': Inappropriate ioctl for device
[18:33:50] [PASSED] inactive-no_or_active-inactive
[18:33:50] ============== [PASSED] xe_rtp_process_tests ===============
[18:33:50] ===================== [PASSED] xe_rtp ======================
[18:33:50] ==================== xe_wa (1 subtest) =====================
[18:33:50] ======================== xe_wa_gt  =========================
[18:33:50] [PASSED] TIGERLAKE B0
[18:33:50] [PASSED] DG1 A0
[18:33:50] [PASSED] DG1 B0
[18:33:50] [PASSED] ALDERLAKE_S A0
[18:33:50] [PASSED] ALDERLAKE_S B0
[18:33:50] [PASSED] ALDERLAKE_S C0
[18:33:50] [PASSED] ALDERLAKE_S D0
[18:33:50] [PASSED] ALDERLAKE_P A0
[18:33:50] [PASSED] ALDERLAKE_P B0
[18:33:50] [PASSED] ALDERLAKE_P C0
[18:33:50] [PASSED] ALDERLAKE_S RPLS D0
[18:33:50] [PASSED] ALDERLAKE_P RPLU E0
[18:33:50] [PASSED] DG2 G10 C0
[18:33:50] [PASSED] DG2 G11 B1
[18:33:50] [PASSED] DG2 G12 A1
[18:33:50] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:33:50] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[18:33:50] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[18:33:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[18:33:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[18:33:51] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[18:33:51] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[18:33:51] ==================== [PASSED] xe_wa_gt =====================
[18:33:51] ====================== [PASSED] xe_wa ======================
[18:33:51] ============================================================
[18:33:51] Testing complete. Ran 318 tests: passed: 300, skipped: 18
[18:33:51] Elapsed time: 35.499s total, 4.195s configuring, 30.937s building, 0.333s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:33:51] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:33:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:34:18] Starting KUnit Kernel (1/1)...
[18:34:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:34:18] ============ drm_test_pick_cmdline (2 subtests) ============
[18:34:18] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[18:34:18] =============== drm_test_pick_cmdline_named  ===============
[18:34:18] [PASSED] NTSC
[18:34:18] [PASSED] NTSC-J
[18:34:18] [PASSED] PAL
[18:34:18] [PASSED] PAL-M
[18:34:18] =========== [PASSED] drm_test_pick_cmdline_named ===========
[18:34:18] ============== [PASSED] drm_test_pick_cmdline ==============
[18:34:18] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:34:18] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:34:18] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:34:18] =========== drm_validate_clone_mode (2 subtests) ===========
[18:34:18] ============== drm_test_check_in_clone_mode  ===============
[18:34:18] [PASSED] in_clone_mode
[18:34:18] [PASSED] not_in_clone_mode
[18:34:18] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:34:18] =============== drm_test_check_valid_clones  ===============
[18:34:18] [PASSED] not_in_clone_mode
[18:34:18] [PASSED] valid_clone
[18:34:18] [PASSED] invalid_clone
[18:34:18] =========== [PASSED] drm_test_check_valid_clones ===========
[18:34:18] ============= [PASSED] drm_validate_clone_mode =============
[18:34:18] ============= drm_validate_modeset (1 subtest) =============
[18:34:18] [PASSED] drm_test_check_connector_changed_modeset
[18:34:18] ============== [PASSED] drm_validate_modeset ===============
[18:34:18] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:34:18] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:34:18] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:34:18] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:34:18] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:34:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:34:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:34:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:34:18] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:34:18] ============== drm_bridge_alloc (2 subtests) ===============
[18:34:18] [PASSED] drm_test_drm_bridge_alloc_basic
[18:34:18] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:34:18] ================ [PASSED] drm_bridge_alloc =================
[18:34:18] ================== drm_buddy (8 subtests) ==================
[18:34:18] [PASSED] drm_test_buddy_alloc_limit
[18:34:18] [PASSED] drm_test_buddy_alloc_optimistic
[18:34:18] [PASSED] drm_test_buddy_alloc_pessimistic
[18:34:18] [PASSED] drm_test_buddy_alloc_pathological
[18:34:18] [PASSED] drm_test_buddy_alloc_contiguous
[18:34:18] [PASSED] drm_test_buddy_alloc_clear
[18:34:18] [PASSED] drm_test_buddy_alloc_range_bias
[18:34:18] [PASSED] drm_test_buddy_fragmentation_performance
[18:34:18] ==================== [PASSED] drm_buddy ====================
[18:34:18] ============= drm_cmdline_parser (40 subtests) =============
[18:34:18] [PASSED] drm_test_cmdline_force_d_only
[18:34:18] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:34:18] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:34:18] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:34:18] [PASSED] drm_test_cmdline_force_e_only
[18:34:18] [PASSED] drm_test_cmdline_res
[18:34:18] [PASSED] drm_test_cmdline_res_vesa
[18:34:18] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:34:18] [PASSED] drm_test_cmdline_res_rblank
[18:34:18] [PASSED] drm_test_cmdline_res_bpp
[18:34:18] [PASSED] drm_test_cmdline_res_refresh
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:34:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:34:18] [PASSED] drm_test_cmdline_res_margins_force_on
[18:34:18] [PASSED] drm_test_cmdline_res_vesa_margins
[18:34:18] [PASSED] drm_test_cmdline_name
[18:34:18] [PASSED] drm_test_cmdline_name_bpp
[18:34:18] [PASSED] drm_test_cmdline_name_option
[18:34:18] [PASSED] drm_test_cmdline_name_bpp_option
[18:34:18] [PASSED] drm_test_cmdline_rotate_0
[18:34:18] [PASSED] drm_test_cmdline_rotate_90
[18:34:18] [PASSED] drm_test_cmdline_rotate_180
[18:34:18] [PASSED] drm_test_cmdline_rotate_270
[18:34:18] [PASSED] drm_test_cmdline_hmirror
[18:34:18] [PASSED] drm_test_cmdline_vmirror
[18:34:18] [PASSED] drm_test_cmdline_margin_options
[18:34:18] [PASSED] drm_test_cmdline_multiple_options
[18:34:18] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:34:18] [PASSED] drm_test_cmdline_extra_and_option
[18:34:18] [PASSED] drm_test_cmdline_freestanding_options
[18:34:18] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:34:18] [PASSED] drm_test_cmdline_panel_orientation
[18:34:18] ================ drm_test_cmdline_invalid  =================
[18:34:18] [PASSED] margin_only
[18:34:18] [PASSED] interlace_only
[18:34:18] [PASSED] res_missing_x
[18:34:18] [PASSED] res_missing_y
[18:34:18] [PASSED] res_bad_y
[18:34:18] [PASSED] res_missing_y_bpp
[18:34:18] [PASSED] res_bad_bpp
[18:34:18] [PASSED] res_bad_refresh
[18:34:18] [PASSED] res_bpp_refresh_force_on_off
[18:34:18] [PASSED] res_invalid_mode
[18:34:18] [PASSED] res_bpp_wrong_place_mode
[18:34:18] [PASSED] name_bpp_refresh
[18:34:18] [PASSED] name_refresh
[18:34:18] [PASSED] name_refresh_wrong_mode
[18:34:18] [PASSED] name_refresh_invalid_mode
[18:34:18] [PASSED] rotate_multiple
[18:34:18] [PASSED] rotate_invalid_val
[18:34:18] [PASSED] rotate_truncated
[18:34:18] [PASSED] invalid_option
[18:34:18] [PASSED] invalid_tv_option
[18:34:18] [PASSED] truncated_tv_option
[18:34:18] ============ [PASSED] drm_test_cmdline_invalid =============
[18:34:18] =============== drm_test_cmdline_tv_options  ===============
[18:34:18] [PASSED] NTSC
[18:34:18] [PASSED] NTSC_443
[18:34:18] [PASSED] NTSC_J
[18:34:18] [PASSED] PAL
[18:34:18] [PASSED] PAL_M
[18:34:18] [PASSED] PAL_N
[18:34:18] [PASSED] SECAM
[18:34:18] [PASSED] MONO_525
[18:34:18] [PASSED] MONO_625
[18:34:18] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:34:18] =============== [PASSED] drm_cmdline_parser ================
[18:34:18] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:34:18] [PASSED] drm_test_connector_hdmi_init_valid
[18:34:18] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:34:18] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:34:18] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:34:18] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:34:18] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:34:18] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:34:18] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:34:18] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[18:34:18] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:34:18] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:34:18] [PASSED] supported_formats=0x3 yuv420_allowed=1
[18:34:18] [PASSED] supported_formats=0x3 yuv420_allowed=0
[18:34:18] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:34:18] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:34:18] [PASSED] drm_test_connector_hdmi_init_null_product
[18:34:18] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:34:18] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:34:18] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:34:18] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:34:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:34:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:34:18] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:34:18] ========= drm_test_connector_hdmi_init_type_valid  =========
[18:34:18] [PASSED] HDMI-A
[18:34:18] [PASSED] HDMI-B
[18:34:18] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:34:18] ======== drm_test_connector_hdmi_init_type_invalid  ========
[18:34:18] [PASSED] Unknown
[18:34:18] [PASSED] VGA
[18:34:18] [PASSED] DVI-I
[18:34:18] [PASSED] DVI-D
[18:34:18] [PASSED] DVI-A
[18:34:18] [PASSED] Composite
[18:34:18] [PASSED] SVIDEO
[18:34:18] [PASSED] LVDS
[18:34:18] [PASSED] Component
[18:34:18] [PASSED] DIN
[18:34:18] [PASSED] DP
[18:34:18] [PASSED] TV
[18:34:18] [PASSED] eDP
[18:34:18] [PASSED] Virtual
[18:34:18] [PASSED] DSI
[18:34:18] [PASSED] DPI
[18:34:18] [PASSED] Writeback
[18:34:18] [PASSED] SPI
[18:34:18] [PASSED] USB
[18:34:18] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:34:18] ============ [PASSED] drmm_connector_hdmi_init =============
[18:34:18] ============= drmm_connector_init (3 subtests) =============
[18:34:18] [PASSED] drm_test_drmm_connector_init
[18:34:18] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:34:18] ========= drm_test_drmm_connector_init_type_valid  =========
[18:34:18] [PASSED] Unknown
[18:34:18] [PASSED] VGA
[18:34:18] [PASSED] DVI-I
[18:34:18] [PASSED] DVI-D
[18:34:18] [PASSED] DVI-A
[18:34:18] [PASSED] Composite
[18:34:18] [PASSED] SVIDEO
[18:34:18] [PASSED] LVDS
[18:34:18] [PASSED] Component
[18:34:18] [PASSED] DIN
[18:34:18] [PASSED] DP
[18:34:18] [PASSED] HDMI-A
[18:34:18] [PASSED] HDMI-B
[18:34:18] [PASSED] TV
[18:34:18] [PASSED] eDP
[18:34:18] [PASSED] Virtual
[18:34:18] [PASSED] DSI
[18:34:18] [PASSED] DPI
[18:34:18] [PASSED] Writeback
[18:34:18] [PASSED] SPI
[18:34:18] [PASSED] USB
[18:34:18] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:34:18] =============== [PASSED] drmm_connector_init ===============
[18:34:18] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_init
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:34:18] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[18:34:18] [PASSED] Unknown
[18:34:18] [PASSED] VGA
[18:34:18] [PASSED] DVI-I
[18:34:18] [PASSED] DVI-D
[18:34:18] [PASSED] DVI-A
[18:34:18] [PASSED] Composite
[18:34:18] [PASSED] SVIDEO
[18:34:18] [PASSED] LVDS
[18:34:18] [PASSED] Component
[18:34:18] [PASSED] DIN
[18:34:18] [PASSED] DP
[18:34:18] [PASSED] HDMI-A
[18:34:18] [PASSED] HDMI-B
[18:34:18] [PASSED] TV
[18:34:18] [PASSED] eDP
[18:34:18] [PASSED] Virtual
[18:34:18] [PASSED] DSI
[18:34:18] [PASSED] DPI
[18:34:18] [PASSED] Writeback
[18:34:18] [PASSED] SPI
[18:34:18] [PASSED] USB
[18:34:18] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:34:18] ======== drm_test_drm_connector_dynamic_init_name  =========
[18:34:18] [PASSED] Unknown
[18:34:18] [PASSED] VGA
[18:34:18] [PASSED] DVI-I
[18:34:18] [PASSED] DVI-D
[18:34:18] [PASSED] DVI-A
[18:34:18] [PASSED] Composite
[18:34:18] [PASSED] SVIDEO
[18:34:18] [PASSED] LVDS
[18:34:18] [PASSED] Component
[18:34:18] [PASSED] DIN
[18:34:18] [PASSED] DP
[18:34:18] [PASSED] HDMI-A
[18:34:18] [PASSED] HDMI-B
[18:34:18] [PASSED] TV
[18:34:18] [PASSED] eDP
[18:34:18] [PASSED] Virtual
[18:34:18] [PASSED] DSI
[18:34:18] [PASSED] DPI
[18:34:18] [PASSED] Writeback
[18:34:18] [PASSED] SPI
[18:34:18] [PASSED] USB
[18:34:18] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:34:18] =========== [PASSED] drm_connector_dynamic_init ============
[18:34:18] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:34:18] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:34:18] ======= drm_connector_dynamic_register (7 subtests) ========
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:34:18] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:34:18] ========= [PASSED] drm_connector_dynamic_register ==========
[18:34:18] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:34:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:34:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:34:18] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:34:18] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:34:18] ========== drm_test_get_tv_mode_from_name_valid  ===========
[18:34:18] [PASSED] NTSC
[18:34:18] [PASSED] NTSC-443
[18:34:18] [PASSED] NTSC-J
[18:34:18] [PASSED] PAL
[18:34:18] [PASSED] PAL-M
[18:34:18] [PASSED] PAL-N
[18:34:18] [PASSED] SECAM
[18:34:18] [PASSED] Mono
[18:34:18] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:34:18] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:34:18] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:34:18] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:34:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:34:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:34:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:34:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:34:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:34:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:34:18] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[18:34:18] [PASSED] VIC 96
[18:34:18] [PASSED] VIC 97
[18:34:18] [PASSED] VIC 101
[18:34:18] [PASSED] VIC 102
[18:34:18] [PASSED] VIC 106
[18:34:18] [PASSED] VIC 107
[18:34:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:34:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:34:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:34:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:34:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:34:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:34:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:34:18] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:34:18] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[18:34:18] [PASSED] Automatic
[18:34:18] [PASSED] Full
[18:34:18] [PASSED] Limited 16:235
[18:34:18] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:34:18] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:34:18] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:34:18] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:34:18] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[18:34:18] [PASSED] RGB
[18:34:18] [PASSED] YUV 4:2:0
[18:34:18] [PASSED] YUV 4:2:2
[18:34:18] [PASSED] YUV 4:4:4
[18:34:18] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:34:18] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:34:18] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:34:18] ============= drm_damage_helper (21 subtests) ==============
[18:34:18] [PASSED] drm_test_damage_iter_no_damage
[18:34:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:34:18] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:34:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:34:18] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:34:18] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:34:18] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:34:18] [PASSED] drm_test_damage_iter_simple_damage
[18:34:18] [PASSED] drm_test_damage_iter_single_damage
[18:34:18] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:34:18] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:34:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:34:18] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:34:18] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:34:18] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:34:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:34:18] [PASSED] drm_test_damage_iter_damage
[18:34:18] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:34:18] [PASSED] drm_test_damage_iter_damage_one_outside
[18:34:18] [PASSED] drm_test_damage_iter_damage_src_moved
[18:34:18] [PASSED] drm_test_damage_iter_damage_not_visible
[18:34:18] ================ [PASSED] drm_damage_helper ================
[18:34:18] ============== drm_dp_mst_helper (3 subtests) ==============
[18:34:18] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[18:34:18] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:34:18] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:34:18] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:34:18] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:34:18] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:34:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:34:18] ============== drm_test_dp_mst_calc_pbn_div  ===============
[18:34:18] [PASSED] Link rate 2000000 lane count 4
[18:34:18] [PASSED] Link rate 2000000 lane count 2
[18:34:18] [PASSED] Link rate 2000000 lane count 1
[18:34:18] [PASSED] Link rate 1350000 lane count 4
[18:34:18] [PASSED] Link rate 1350000 lane count 2
[18:34:18] [PASSED] Link rate 1350000 lane count 1
[18:34:18] [PASSED] Link rate 1000000 lane count 4
[18:34:18] [PASSED] Link rate 1000000 lane count 2
[18:34:18] [PASSED] Link rate 1000000 lane count 1
[18:34:18] [PASSED] Link rate 810000 lane count 4
[18:34:18] [PASSED] Link rate 810000 lane count 2
[18:34:18] [PASSED] Link rate 810000 lane count 1
[18:34:18] [PASSED] Link rate 540000 lane count 4
[18:34:18] [PASSED] Link rate 540000 lane count 2
[18:34:18] [PASSED] Link rate 540000 lane count 1
[18:34:18] [PASSED] Link rate 270000 lane count 4
[18:34:18] [PASSED] Link rate 270000 lane count 2
[18:34:18] [PASSED] Link rate 270000 lane count 1
[18:34:18] [PASSED] Link rate 162000 lane count 4
[18:34:18] [PASSED] Link rate 162000 lane count 2
[18:34:18] [PASSED] Link rate 162000 lane count 1
[18:34:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:34:18] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[18:34:18] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:34:18] [PASSED] DP_POWER_UP_PHY with port number
[18:34:18] [PASSED] DP_POWER_DOWN_PHY with port number
[18:34:18] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:34:18] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:34:18] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:34:18] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:34:18] [PASSED] DP_QUERY_PAYLOAD with port number
[18:34:18] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:34:18] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:34:18] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:34:18] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:34:18] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:34:18] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:34:18] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:34:18] [PASSED] DP_REMOTE_I2C_READ with port number
[18:34:18] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:34:18] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:34:18] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:34:18] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:34:18] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:34:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:34:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:34:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:34:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:34:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:34:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:34:18] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:34:18] ================ [PASSED] drm_dp_mst_helper ================
[18:34:18] ================== drm_exec (7 subtests) ===================
[18:34:18] [PASSED] sanitycheck
[18:34:18] [PASSED] test_lock
[18:34:18] [PASSED] test_lock_unlock
[18:34:18] [PASSED] test_duplicates
[18:34:18] [PASSED] test_prepare
[18:34:18] [PASSED] test_prepare_array
[18:34:18] [PASSED] test_multiple_loops
[18:34:18] ==================== [PASSED] drm_exec =====================
[18:34:18] =========== drm_format_helper_test (17 subtests) ===========
[18:34:18] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:34:18] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:34:18] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:34:18] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:34:18] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:34:18] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:34:18] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:34:18] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:34:18] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:34:18] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:34:18] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:34:18] ============== drm_test_fb_xrgb8888_to_mono  ===============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:34:18] ==================== drm_test_fb_swab  =====================
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ================ [PASSED] drm_test_fb_swab =================
[18:34:18] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:34:18] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[18:34:18] [PASSED] single_pixel_source_buffer
[18:34:18] [PASSED] single_pixel_clip_rectangle
[18:34:18] [PASSED] well_known_colors
[18:34:18] [PASSED] destination_pitch
[18:34:18] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:34:18] ================= drm_test_fb_clip_offset  =================
[18:34:18] [PASSED] pass through
[18:34:18] [PASSED] horizontal offset
[18:34:18] [PASSED] vertical offset
[18:34:18] [PASSED] horizontal and vertical offset
[18:34:18] [PASSED] horizontal offset (custom pitch)
[18:34:18] [PASSED] vertical offset (custom pitch)
[18:34:18] [PASSED] horizontal and vertical offset (custom pitch)
[18:34:18] ============= [PASSED] drm_test_fb_clip_offset =============
[18:34:18] =================== drm_test_fb_memcpy  ====================
[18:34:18] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:34:18] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:34:18] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:34:18] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:34:18] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:34:18] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:34:18] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:34:18] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:34:18] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:34:18] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:34:18] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:34:18] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:34:18] =============== [PASSED] drm_test_fb_memcpy ================
[18:34:18] ============= [PASSED] drm_format_helper_test ==============
[18:34:18] ================= drm_format (18 subtests) =================
[18:34:18] [PASSED] drm_test_format_block_width_invalid
[18:34:18] [PASSED] drm_test_format_block_width_one_plane
[18:34:18] [PASSED] drm_test_format_block_width_two_plane
[18:34:18] [PASSED] drm_test_format_block_width_three_plane
[18:34:18] [PASSED] drm_test_format_block_width_tiled
[18:34:18] [PASSED] drm_test_format_block_height_invalid
[18:34:18] [PASSED] drm_test_format_block_height_one_plane
[18:34:18] [PASSED] drm_test_format_block_height_two_plane
[18:34:18] [PASSED] drm_test_format_block_height_three_plane
[18:34:18] [PASSED] drm_test_format_block_height_tiled
[18:34:18] [PASSED] drm_test_format_min_pitch_invalid
[18:34:18] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:34:18] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:34:18] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:34:18] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:34:18] [PASSED] drm_test_format_min_pitch_two_plane
[18:34:18] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:34:18] [PASSED] drm_test_format_min_pitch_tiled
[18:34:18] =================== [PASSED] drm_format ====================
[18:34:18] ============== drm_framebuffer (10 subtests) ===============
[18:34:18] ========== drm_test_framebuffer_check_src_coords  ==========
[18:34:18] [PASSED] Success: source fits into fb
[18:34:18] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:34:18] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:34:18] [PASSED] Fail: overflowing fb with source width
[18:34:18] [PASSED] Fail: overflowing fb with source height
[18:34:18] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:34:18] [PASSED] drm_test_framebuffer_cleanup
[18:34:18] =============== drm_test_framebuffer_create  ===============
[18:34:18] [PASSED] ABGR8888 normal sizes
[18:34:18] [PASSED] ABGR8888 max sizes
[18:34:18] [PASSED] ABGR8888 pitch greater than min required
[18:34:18] [PASSED] ABGR8888 pitch less than min required
[18:34:18] [PASSED] ABGR8888 Invalid width
[18:34:18] [PASSED] ABGR8888 Invalid buffer handle
[18:34:18] [PASSED] No pixel format
[18:34:18] [PASSED] ABGR8888 Width 0
[18:34:18] [PASSED] ABGR8888 Height 0
[18:34:18] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:34:18] [PASSED] ABGR8888 Large buffer offset
[18:34:18] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:34:18] [PASSED] ABGR8888 Invalid flag
[18:34:18] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:34:18] [PASSED] ABGR8888 Valid buffer modifier
[18:34:18] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:34:18] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:34:18] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:34:18] [PASSED] NV12 Normal sizes
[18:34:18] [PASSED] NV12 Max sizes
[18:34:18] [PASSED] NV12 Invalid pitch
[18:34:18] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:34:18] [PASSED] NV12 different  modifier per-plane
[18:34:18] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:34:18] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:34:18] [PASSED] NV12 Modifier for inexistent plane
[18:34:18] [PASSED] NV12 Handle for inexistent plane
[18:34:18] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:34:18] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:34:18] [PASSED] YVU420 Normal sizes
[18:34:18] [PASSED] YVU420 Max sizes
[18:34:18] [PASSED] YVU420 Invalid pitch
[18:34:18] [PASSED] YVU420 Different pitches
[18:34:18] [PASSED] YVU420 Different buffer offsets/pitches
[18:34:18] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:34:18] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:34:18] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:34:18] [PASSED] YVU420 Valid modifier
[18:34:18] [PASSED] YVU420 Different modifiers per plane
[18:34:18] [PASSED] YVU420 Modifier for inexistent plane
[18:34:18] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:34:18] [PASSED] X0L2 Normal sizes
[18:34:18] [PASSED] X0L2 Max sizes
[18:34:18] [PASSED] X0L2 Invalid pitch
[18:34:18] [PASSED] X0L2 Pitch greater than minimum required
[18:34:18] [PASSED] X0L2 Handle for inexistent plane
[18:34:18] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:34:18] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:34:18] [PASSED] X0L2 Valid modifier
[18:34:18] [PASSED] X0L2 Modifier for inexistent plane
[18:34:18] =========== [PASSED] drm_test_framebuffer_create ===========
[18:34:18] [PASSED] drm_test_framebuffer_free
[18:34:18] [PASSED] drm_test_framebuffer_init
[18:34:18] [PASSED] drm_test_framebuffer_init_bad_format
[18:34:18] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:34:18] [PASSED] drm_test_framebuffer_lookup
[18:34:18] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:34:18] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:34:18] ================= [PASSED] drm_framebuffer =================
[18:34:18] ================ drm_gem_shmem (8 subtests) ================
[18:34:18] [PASSED] drm_gem_shmem_test_obj_create
[18:34:18] [PASSED] drm_gem_shmem_test_obj_create_private
[18:34:18] [PASSED] drm_gem_shmem_test_pin_pages
[18:34:18] [PASSED] drm_gem_shmem_test_vmap
[18:34:18] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:34:18] [PASSED] drm_gem_shmem_test_get_sg_table
[18:34:18] [PASSED] drm_gem_shmem_test_madvise
[18:34:18] [PASSED] drm_gem_shmem_test_purge
[18:34:18] ================== [PASSED] drm_gem_shmem ==================
[18:34:18] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:34:18] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[18:34:18] [PASSED] Automatic
[18:34:18] [PASSED] Full
[18:34:18] [PASSED] Limited 16:235
[18:34:18] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:34:18] [PASSED] drm_test_check_disable_connector
[18:34:18] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:34:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:34:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:34:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:34:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:34:18] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:34:18] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:34:18] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:34:18] [PASSED] drm_test_check_output_bpc_dvi
[18:34:18] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:34:18] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:34:18] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:34:18] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:34:18] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:34:18] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:34:18] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:34:18] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:34:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:34:18] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:34:18] [PASSED] drm_test_check_broadcast_rgb_value
[18:34:18] [PASSED] drm_test_check_bpc_8_value
[18:34:18] [PASSED] drm_test_check_bpc_10_value
[18:34:18] [PASSED] drm_test_check_bpc_12_value
[18:34:18] [PASSED] drm_test_check_format_value
[18:34:18] [PASSED] drm_test_check_tmds_char_value
[18:34:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:34:18] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[18:34:18] [PASSED] drm_test_check_mode_valid
[18:34:18] [PASSED] drm_test_check_mode_valid_reject
[18:34:18] [PASSED] drm_test_check_mode_valid_reject_rate
[18:34:18] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:34:18] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:34:18] ================= drm_managed (2 subtests) =================
[18:34:18] [PASSED] drm_test_managed_release_action
[18:34:18] [PASSED] drm_test_managed_run_action
[18:34:18] =================== [PASSED] drm_managed ===================
[18:34:18] =================== drm_mm (6 subtests) ====================
[18:34:18] [PASSED] drm_test_mm_init
[18:34:18] [PASSED] drm_test_mm_debug
[18:34:18] [PASSED] drm_test_mm_align32
[18:34:18] [PASSED] drm_test_mm_align64
[18:34:18] [PASSED] drm_test_mm_lowest
[18:34:18] [PASSED] drm_test_mm_highest
[18:34:18] ===================== [PASSED] drm_mm ======================
[18:34:18] ============= drm_modes_analog_tv (5 subtests) =============
[18:34:18] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:34:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:34:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:34:18] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:34:18] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:34:18] =============== [PASSED] drm_modes_analog_tv ===============
[18:34:18] ============== drm_plane_helper (2 subtests) ===============
[18:34:18] =============== drm_test_check_plane_state  ================
[18:34:18] [PASSED] clipping_simple
[18:34:18] [PASSED] clipping_rotate_reflect
[18:34:18] [PASSED] positioning_simple
[18:34:18] [PASSED] upscaling
[18:34:18] [PASSED] downscaling
[18:34:18] [PASSED] rounding1
[18:34:18] [PASSED] rounding2
[18:34:18] [PASSED] rounding3
[18:34:18] [PASSED] rounding4
[18:34:18] =========== [PASSED] drm_test_check_plane_state ============
[18:34:18] =========== drm_test_check_invalid_plane_state  ============
[18:34:18] [PASSED] positioning_invalid
[18:34:18] [PASSED] upscaling_invalid
[18:34:18] [PASSED] downscaling_invalid
[18:34:18] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:34:18] ================ [PASSED] drm_plane_helper =================
[18:34:18] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:34:18] ====== drm_test_connector_helper_tv_get_modes_check  =======
[18:34:18] [PASSED] None
[18:34:18] [PASSED] PAL
[18:34:18] [PASSED] NTSC
[18:34:18] [PASSED] Both, NTSC Default
[18:34:18] [PASSED] Both, PAL Default
[18:34:18] [PASSED] Both, NTSC Default, with PAL on command-line
[18:34:18] [PASSED] Both, PAL Default, with NTSC on command-line
[18:34:18] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:34:18] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:34:18] ================== drm_rect (9 subtests) ===================
[18:34:18] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:34:18] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:34:18] [PASSED] drm_test_rect_clip_scaled_clipped
[18:34:18] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:34:18] ================= drm_test_rect_intersect  =================
[18:34:18] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:34:18] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:34:18] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:34:18] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:34:18] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:34:18] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:34:18] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:34:18] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:34:18] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:34:18] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:34:18] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:34:18] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:34:18] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:34:18] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:34:18] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:34:18] ============= [PASSED] drm_test_rect_intersect =============
[18:34:18] ================ drm_test_rect_calc_hscale  ================
[18:34:18] [PASSED] normal use
[18:34:18] [PASSED] out of max range
[18:34:18] [PASSED] out of min range
[18:34:18] [PASSED] zero dst
[18:34:18] [PASSED] negative src
[18:34:18] [PASSED] negative dst
[18:34:18] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:34:18] ================ drm_test_rect_calc_vscale  ================
[18:34:18] [PASSED] normal use
stty: 'standard input': Inappropriate ioctl for device
[18:34:18] [PASSED] out of max range
[18:34:18] [PASSED] out of min range
[18:34:18] [PASSED] zero dst
[18:34:18] [PASSED] negative src
[18:34:18] [PASSED] negative dst
[18:34:18] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:34:18] ================== drm_test_rect_rotate  ===================
[18:34:18] [PASSED] reflect-x
[18:34:18] [PASSED] reflect-y
[18:34:18] [PASSED] rotate-0
[18:34:18] [PASSED] rotate-90
[18:34:18] [PASSED] rotate-180
[18:34:18] [PASSED] rotate-270
[18:34:18] ============== [PASSED] drm_test_rect_rotate ===============
[18:34:18] ================ drm_test_rect_rotate_inv  =================
[18:34:18] [PASSED] reflect-x
[18:34:18] [PASSED] reflect-y
[18:34:18] [PASSED] rotate-0
[18:34:18] [PASSED] rotate-90
[18:34:18] [PASSED] rotate-180
[18:34:18] [PASSED] rotate-270
[18:34:18] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:34:18] ==================== [PASSED] drm_rect =====================
[18:34:18] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:34:18] ============ drm_test_sysfb_build_fourcc_list  =============
[18:34:18] [PASSED] no native formats
[18:34:18] [PASSED] XRGB8888 as native format
[18:34:18] [PASSED] remove duplicates
[18:34:18] [PASSED] convert alpha formats
[18:34:18] [PASSED] random formats
[18:34:18] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:34:18] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:34:18] ============================================================
[18:34:18] Testing complete. Ran 622 tests: passed: 622
[18:34:18] Elapsed time: 27.379s total, 1.671s configuring, 25.289s building, 0.380s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:34:18] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:34:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[18:34:29] Starting KUnit Kernel (1/1)...
[18:34:29] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:34:29] ================= ttm_device (5 subtests) ==================
[18:34:29] [PASSED] ttm_device_init_basic
[18:34:29] [PASSED] ttm_device_init_multiple
[18:34:29] [PASSED] ttm_device_fini_basic
[18:34:29] [PASSED] ttm_device_init_no_vma_man
[18:34:29] ================== ttm_device_init_pools  ==================
[18:34:29] [PASSED] No DMA allocations, no DMA32 required
[18:34:29] [PASSED] DMA allocations, DMA32 required
[18:34:29] [PASSED] No DMA allocations, DMA32 required
[18:34:29] [PASSED] DMA allocations, no DMA32 required
[18:34:29] ============== [PASSED] ttm_device_init_pools ==============
[18:34:29] =================== [PASSED] ttm_device ====================
[18:34:29] ================== ttm_pool (8 subtests) ===================
[18:34:29] ================== ttm_pool_alloc_basic  ===================
[18:34:29] [PASSED] One page
[18:34:29] [PASSED] More than one page
[18:34:29] [PASSED] Above the allocation limit
[18:34:29] [PASSED] One page, with coherent DMA mappings enabled
[18:34:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:34:29] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:34:29] ============== ttm_pool_alloc_basic_dma_addr  ==============
[18:34:29] [PASSED] One page
[18:34:29] [PASSED] More than one page
[18:34:29] [PASSED] Above the allocation limit
[18:34:29] [PASSED] One page, with coherent DMA mappings enabled
[18:34:29] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:34:29] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:34:29] [PASSED] ttm_pool_alloc_order_caching_match
[18:34:29] [PASSED] ttm_pool_alloc_caching_mismatch
[18:34:29] [PASSED] ttm_pool_alloc_order_mismatch
[18:34:29] [PASSED] ttm_pool_free_dma_alloc
[18:34:29] [PASSED] ttm_pool_free_no_dma_alloc
[18:34:29] [PASSED] ttm_pool_fini_basic
[18:34:29] ==================== [PASSED] ttm_pool =====================
[18:34:29] ================ ttm_resource (8 subtests) =================
[18:34:29] ================= ttm_resource_init_basic  =================
[18:34:29] [PASSED] Init resource in TTM_PL_SYSTEM
[18:34:29] [PASSED] Init resource in TTM_PL_VRAM
[18:34:29] [PASSED] Init resource in a private placement
[18:34:29] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:34:29] ============= [PASSED] ttm_resource_init_basic =============
[18:34:29] [PASSED] ttm_resource_init_pinned
[18:34:29] [PASSED] ttm_resource_fini_basic
[18:34:29] [PASSED] ttm_resource_manager_init_basic
[18:34:29] [PASSED] ttm_resource_manager_usage_basic
[18:34:29] [PASSED] ttm_resource_manager_set_used_basic
[18:34:29] [PASSED] ttm_sys_man_alloc_basic
[18:34:29] [PASSED] ttm_sys_man_free_basic
[18:34:29] ================== [PASSED] ttm_resource ===================
[18:34:29] =================== ttm_tt (15 subtests) ===================
[18:34:29] ==================== ttm_tt_init_basic  ====================
[18:34:29] [PASSED] Page-aligned size
[18:34:29] [PASSED] Extra pages requested
[18:34:29] ================ [PASSED] ttm_tt_init_basic ================
[18:34:29] [PASSED] ttm_tt_init_misaligned
[18:34:29] [PASSED] ttm_tt_fini_basic
[18:34:29] [PASSED] ttm_tt_fini_sg
[18:34:29] [PASSED] ttm_tt_fini_shmem
[18:34:29] [PASSED] ttm_tt_create_basic
[18:34:29] [PASSED] ttm_tt_create_invalid_bo_type
[18:34:29] [PASSED] ttm_tt_create_ttm_exists
[18:34:29] [PASSED] ttm_tt_create_failed
[18:34:29] [PASSED] ttm_tt_destroy_basic
[18:34:29] [PASSED] ttm_tt_populate_null_ttm
[18:34:29] [PASSED] ttm_tt_populate_populated_ttm
[18:34:29] [PASSED] ttm_tt_unpopulate_basic
[18:34:29] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:34:29] [PASSED] ttm_tt_swapin_basic
[18:34:29] ===================== [PASSED] ttm_tt ======================
[18:34:29] =================== ttm_bo (14 subtests) ===================
[18:34:29] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[18:34:29] [PASSED] Cannot be interrupted and sleeps
[18:34:29] [PASSED] Cannot be interrupted, locks straight away
[18:34:29] [PASSED] Can be interrupted, sleeps
[18:34:29] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:34:29] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:34:29] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:34:29] [PASSED] ttm_bo_reserve_double_resv
[18:34:29] [PASSED] ttm_bo_reserve_interrupted
[18:34:29] [PASSED] ttm_bo_reserve_deadlock
[18:34:29] [PASSED] ttm_bo_unreserve_basic
[18:34:29] [PASSED] ttm_bo_unreserve_pinned
[18:34:29] [PASSED] ttm_bo_unreserve_bulk
[18:34:29] [PASSED] ttm_bo_fini_basic
[18:34:29] [PASSED] ttm_bo_fini_shared_resv
[18:34:29] [PASSED] ttm_bo_pin_basic
[18:34:29] [PASSED] ttm_bo_pin_unpin_resource
[18:34:29] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:34:29] ===================== [PASSED] ttm_bo ======================
[18:34:29] ============== ttm_bo_validate (21 subtests) ===============
[18:34:29] ============== ttm_bo_init_reserved_sys_man  ===============
[18:34:29] [PASSED] Buffer object for userspace
[18:34:29] [PASSED] Kernel buffer object
[18:34:29] [PASSED] Shared buffer object
[18:34:29] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:34:29] ============== ttm_bo_init_reserved_mock_man  ==============
[18:34:29] [PASSED] Buffer object for userspace
[18:34:29] [PASSED] Kernel buffer object
[18:34:29] [PASSED] Shared buffer object
[18:34:29] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:34:29] [PASSED] ttm_bo_init_reserved_resv
[18:34:29] ================== ttm_bo_validate_basic  ==================
[18:34:29] [PASSED] Buffer object for userspace
[18:34:29] [PASSED] Kernel buffer object
[18:34:29] [PASSED] Shared buffer object
[18:34:29] ============== [PASSED] ttm_bo_validate_basic ==============
[18:34:29] [PASSED] ttm_bo_validate_invalid_placement
[18:34:29] ============= ttm_bo_validate_same_placement  ==============
[18:34:29] [PASSED] System manager
[18:34:29] [PASSED] VRAM manager
[18:34:29] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:34:29] [PASSED] ttm_bo_validate_failed_alloc
[18:34:29] [PASSED] ttm_bo_validate_pinned
[18:34:29] [PASSED] ttm_bo_validate_busy_placement
[18:34:29] ================ ttm_bo_validate_multihop  =================
[18:34:29] [PASSED] Buffer object for userspace
[18:34:29] [PASSED] Kernel buffer object
[18:34:29] [PASSED] Shared buffer object
[18:34:29] ============ [PASSED] ttm_bo_validate_multihop =============
[18:34:29] ========== ttm_bo_validate_no_placement_signaled  ==========
[18:34:29] [PASSED] Buffer object in system domain, no page vector
[18:34:29] [PASSED] Buffer object in system domain with an existing page vector
[18:34:29] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:34:29] ======== ttm_bo_validate_no_placement_not_signaled  ========
[18:34:29] [PASSED] Buffer object for userspace
[18:34:29] [PASSED] Kernel buffer object
[18:34:29] [PASSED] Shared buffer object
[18:34:29] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:34:29] [PASSED] ttm_bo_validate_move_fence_signaled
[18:34:29] ========= ttm_bo_validate_move_fence_not_signaled  =========
[18:34:29] [PASSED] Waits for GPU
[18:34:29] [PASSED] Tries to lock straight away
[18:34:29] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:34:29] [PASSED] ttm_bo_validate_happy_evict
[18:34:29] [PASSED] ttm_bo_validate_all_pinned_evict
[18:34:29] [PASSED] ttm_bo_validate_allowed_only_evict
[18:34:29] [PASSED] ttm_bo_validate_deleted_evict
[18:34:29] [PASSED] ttm_bo_validate_busy_domain_evict
[18:34:29] [PASSED] ttm_bo_validate_evict_gutting
[18:34:29] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[18:34:29] ================= [PASSED] ttm_bo_validate =================
[18:34:29] ============================================================
[18:34:29] Testing complete. Ran 101 tests: passed: 101
[18:34:29] Elapsed time: 11.224s total, 1.621s configuring, 9.337s building, 0.230s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ Xe.CI.BAT: failure for Fix serialization on burst of unbinds - v2

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 2978 bytes --]

== Series Details ==

Series: Fix serialization on burst of unbinds - v2
URL   : https://patchwork.freedesktop.org/series/156606/
State : failure

== Summary ==

CI Bug Log - changes from xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2_BAT -> xe-pw-156606v1_BAT
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-156606v1_BAT absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-156606v1_BAT, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-156606v1_BAT:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_waitfence@abstime:
    - bat-atsm-2:         [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/bat-atsm-2/igt@xe_waitfence@abstime.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/bat-atsm-2/igt@xe_waitfence@abstime.html

  * igt@xe_waitfence@engine:
    - bat-dg2-oem2:       [PASS][3] -> [FAIL][4] +1 other test fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/bat-dg2-oem2/igt@xe_waitfence@engine.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/bat-dg2-oem2/igt@xe_waitfence@engine.html
    - bat-atsm-2:         [PASS][5] -> [FAIL][6] +1 other test fail
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/bat-atsm-2/igt@xe_waitfence@engine.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/bat-atsm-2/igt@xe_waitfence@engine.html
    - bat-bmg-2:          [PASS][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/bat-bmg-2/igt@xe_waitfence@engine.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/bat-bmg-2/igt@xe_waitfence@engine.html

  * igt@xe_waitfence@reltime:
    - bat-bmg-1:          [PASS][9] -> [FAIL][10] +1 other test fail
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/bat-bmg-1/igt@xe_waitfence@reltime.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/bat-bmg-1/igt@xe_waitfence@reltime.html

  


Build changes
-------------

  * Linux: xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2 -> xe-pw-156606v1

  IGT_8597: 8597
  xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2: a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2
  xe-pw-156606v1: 156606v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/index.html

[-- Attachment #2: Type: text/html, Size: 3650 bytes --]

✗ Xe.CI.Full: failure for Fix serialization on burst of unbinds - v2

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 28076 bytes --]

== Series Details ==

Series: Fix serialization on burst of unbinds - v2
URL   : https://patchwork.freedesktop.org/series/156606/
State : failure

== Summary ==

CI Bug Log - changes from xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2_FULL -> xe-pw-156606v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-156606v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-156606v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-156606v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_threads@threads-bal-mixed-userptr-invalidate:
    - shard-dg2-set2:     [PASS][1] -> [ABORT][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-435/igt@xe_exec_threads@threads-bal-mixed-userptr-invalidate.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-434/igt@xe_exec_threads@threads-bal-mixed-userptr-invalidate.html

  * igt@xe_waitfence@abstime:
    - shard-dg2-set2:     [PASS][3] -> [TIMEOUT][4]
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-436/igt@xe_waitfence@abstime.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-463/igt@xe_waitfence@abstime.html

  * igt@xe_waitfence@engine:
    - shard-bmg:          [PASS][5] -> [FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-8/igt@xe_waitfence@engine.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-3/igt@xe_waitfence@engine.html
    - shard-dg2-set2:     [PASS][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-464/igt@xe_waitfence@engine.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-436/igt@xe_waitfence@engine.html

  
Known issues
------------

  Here are the changes found in xe-pw-156606v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-0:
    - shard-bmg:          NOTRUN -> [SKIP][9] ([Intel XE#1124])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_big_fb@yf-tiled-8bpp-rotate-0.html

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          [PASS][10] -> [SKIP][11] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-4/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2314] / [Intel XE#2894])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_bw@connected-linear-tiling-3-displays-2160x1440p.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][13] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-5/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2.html

  * igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][14] ([Intel XE#2887]) +2 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-7/igt@kms_ccs@missing-ccs-buffer-4-tiled-mtl-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [PASS][15] -> [INCOMPLETE][16] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4345] / [Intel XE#6168])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-dp-4:
    - shard-dg2-set2:     [PASS][17] -> [DMESG-WARN][18] ([Intel XE#1727] / [Intel XE#3113])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-dp-4.html
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6:
    - shard-dg2-set2:     [PASS][19] -> [INCOMPLETE][20] ([Intel XE#6168])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-d-hdmi-a-6.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [PASS][21] -> [INCOMPLETE][22] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     [PASS][23] -> [INCOMPLETE][24] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522])
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4.html
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - shard-bmg:          NOTRUN -> [SKIP][25] ([Intel XE#2252])
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-7/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-bmg:          NOTRUN -> [SKIP][26] ([Intel XE#2320])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-bmg:          [PASS][27] -> [SKIP][28] ([Intel XE#2291]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-bmg:          [PASS][29] -> [SKIP][30] ([Intel XE#2316]) +4 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-7/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
    - shard-adlp:         [PASS][31] -> [DMESG-WARN][32] ([Intel XE#4543]) +1 other test dmesg-warn
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-adlp-8/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-adlp-2/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [PASS][33] -> [FAIL][34] ([Intel XE#301]) +1 other test fail
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-suspend@b-hdmi-a1:
    - shard-adlp:         [PASS][35] -> [DMESG-WARN][36] ([Intel XE#2953] / [Intel XE#4173]) +6 other tests dmesg-warn
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-adlp-2/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-adlp-8/igt@kms_flip@flip-vs-suspend@b-hdmi-a1.html

  * igt@kms_flip@flip-vs-wf_vblank-interruptible@a-dp4:
    - shard-dg2-set2:     [PASS][37] -> [FAIL][38] ([Intel XE#3098]) +1 other test fail
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-433/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-dp4.html
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-432/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-dp4.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][39] ([Intel XE#2293] / [Intel XE#2380])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][40] ([Intel XE#2293])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][41] ([Intel XE#5390]) +2 other tests skip
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][42] ([Intel XE#2311]) +3 other tests skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-bmg:          NOTRUN -> [SKIP][43] ([Intel XE#2313]) +3 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          [PASS][44] -> [SKIP][45] ([Intel XE#4596])
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-x.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][46] ([Intel XE#1406] / [Intel XE#1489])
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr@fbc-pr-no-drrs:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#1406] / [Intel XE#2234] / [Intel XE#2850]) +1 other test skip
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-2/igt@kms_psr@fbc-pr-no-drrs.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-bmg:          NOTRUN -> [SKIP][48] ([Intel XE#2330])
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-bmg:          [PASS][49] -> [SKIP][50] ([Intel XE#1435])
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-3/igt@kms_setmode@clone-exclusive-crtc.html
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@xe_eudebug_online@breakpoint-many-sessions-tiles:
    - shard-bmg:          NOTRUN -> [SKIP][51] ([Intel XE#4837]) +2 other tests skip
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@xe_eudebug_online@breakpoint-many-sessions-tiles.html

  * igt@xe_evict@evict-beng-mixed-many-threads-small:
    - shard-bmg:          [PASS][52] -> [INCOMPLETE][53] ([Intel XE#6321])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-2/igt@xe_evict@evict-beng-mixed-many-threads-small.html
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-1/igt@xe_evict@evict-beng-mixed-many-threads-small.html

  * igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#2322])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-userptr.html

  * igt@xe_exec_system_allocator@many-stride-malloc-prefetch:
    - shard-bmg:          [PASS][55] -> [WARN][56] ([Intel XE#5786])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-1/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-8/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][57] ([Intel XE#4943]) +3 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-huge-nomemset.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#2284])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-4/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random:
    - shard-adlp:         [PASS][59] -> [ABORT][60] ([Intel XE#4917] / [Intel XE#5545]) +1 other test abort
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-adlp-8/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-adlp-3/igt@xe_sriov_scheduling@nonpreempt-engine-resets@numvfs-random.html

  
#### Possible fixes ####

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-adlp:         [DMESG-FAIL][61] ([Intel XE#4543]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-adlp-6/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          [SKIP][63] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html

  * igt@kms_dp_aux_dev:
    - shard-bmg:          [SKIP][65] ([Intel XE#3009]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-6/igt@kms_dp_aux_dev.html
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-7/igt@kms_dp_aux_dev.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-bmg:          [SKIP][67] ([Intel XE#2316]) -> [PASS][68] +3 other tests pass
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-7/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@flip-vs-dpms-on-nop-interruptible:
    - shard-adlp:         [DMESG-WARN][69] ([Intel XE#4543]) -> [PASS][70] +6 other tests pass
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-adlp-1/igt@kms_flip@flip-vs-dpms-on-nop-interruptible.html
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-adlp-4/igt@kms_flip@flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-bmg:          [INCOMPLETE][71] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][72] +1 other test pass
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-4/igt@kms_flip@flip-vs-suspend-interruptible.html
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-7/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-bmg:          [SKIP][73] ([Intel XE#3012]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_vblank@ts-continuation-dpms-suspend:
    - shard-adlp:         [DMESG-WARN][75] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][76] +3 other tests pass
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-adlp-2/igt@kms_vblank@ts-continuation-dpms-suspend.html
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-adlp-2/igt@kms_vblank@ts-continuation-dpms-suspend.html

  
#### Warnings ####

  * igt@kms_content_protection@atomic:
    - shard-bmg:          [FAIL][77] ([Intel XE#1178]) -> [SKIP][78] ([Intel XE#2341])
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-3/igt@kms_content_protection@atomic.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_content_protection@atomic.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
    - shard-bmg:          [SKIP][79] ([Intel XE#2311]) -> [SKIP][80] ([Intel XE#2312]) +11 other tests skip
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][81] ([Intel XE#2312]) -> [SKIP][82] ([Intel XE#2311]) +7 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][83] ([Intel XE#2312]) -> [SKIP][84] ([Intel XE#5390]) +1 other test skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][85] ([Intel XE#5390]) -> [SKIP][86] ([Intel XE#2312]) +3 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt:
    - shard-bmg:          [SKIP][87] ([Intel XE#2312]) -> [SKIP][88] ([Intel XE#2313]) +8 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][89] ([Intel XE#2313]) -> [SKIP][90] ([Intel XE#2312]) +11 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][91] ([Intel XE#3544]) -> [SKIP][92] ([Intel XE#3374] / [Intel XE#3544])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-bmg:          [SKIP][93] ([Intel XE#5021]) -> [SKIP][94] ([Intel XE#4596])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-y.html
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][95] ([Intel XE#1500]) -> [SKIP][96] ([Intel XE#362])
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
  [Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
  [Intel XE#6168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6168
  [Intel XE#6321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6321
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787


Build changes
-------------

  * Linux: xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2 -> xe-pw-156606v1

  IGT_8597: 8597
  xe-3991-a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2: a0a8d78f9cb5cbaf99b44f07b427cf6245f5b0b2
  xe-pw-156606v1: 156606v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-156606v1/index.html

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