* [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner
@ 2026-09-23 11:59 Mika Kahola
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking Mika Kahola
` (7 more replies)
0 siblings, 8 replies; 18+ messages in thread
From: Mika Kahola @ 2026-09-23 11:59 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jouni.hogander, Mika Kahola
PSR has been refused outright with the joiner so far. Each joined pipe
has its own PSR register block, so Panel Replay and PSR2 selective
update do work as long as the joined pipes are A and B. Plain PSR1
doesn't, and stays rejected.
The first three patches fix what the joiner breaks, before anything is
enabled: frontbuffer tracking only looked at the primary pipe, the
selective fetch area was taken from the adjusted mode which spans all
the joined pipes, and PSR2_MAN_TRK_CTL is a transcoder register that
both joined pipes would program. Patch 4 then allows the feature and
patch 5 lets the joiner be forced on eDP, so this is testable without a
panel that asks for it in VBT.
Tested with kms_joiner and kms_psr2_sf on LunarLake, together with the
IGT changes in https://patchwork.freedesktop.org/series/174623/
Mika Kahola (5):
drm/i915/psr: Track all joined pipes for frontbuffer tracking
drm/i915/psr: Take the selective fetch area from pipe_src
drm/i915/psr: Merge the selective fetch area across joined pipes
drm/i915/psr: Allow Panel Replay and PSR2 with joiner
drm/i915/display: Allow forcing the joiner on eDP
.../drm/i915/display/intel_display_debugfs.c | 5 +-
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 12 +-
drivers/gpu/drm/i915/display/intel_psr.c | 288 ++++++++++++++----
drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +-
drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +-
6 files changed, 241 insertions(+), 69 deletions(-)
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
@ 2026-09-23 11:59 ` Mika Kahola
2026-09-24 13:02 ` Hogander, Jouni
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src Mika Kahola
` (6 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Mika Kahola @ 2026-09-23 11:59 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jouni.hogander, Mika Kahola
psr.pipe is the joiner primary only, so frontbuffer bits coming from a
secondary pipe get masked out and the update goes unnoticed. Add
psr.pipe_mask covering every joined pipe and use that instead.
No functional change, joiner is still rejected in compute_config().
Assisted-by: Copilot:claude-opus-5
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_psr.c | 27 ++++++++++++++-----
2 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 79f30660c2b6..2e6e3661675c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1798,6 +1798,7 @@ struct intel_psr {
bool enabled;
int pause_counter;
enum pipe pipe;
+ u8 pipe_mask;
enum transcoder transcoder;
bool active;
struct work_struct work;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 872e253db178..76260ceb49cb 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -36,6 +36,7 @@
#include "intel_cursor_regs.h"
#include "intel_ddi.h"
#include "intel_de.h"
+#include "intel_display.h"
#include "intel_display_irq.h"
#include "intel_display_regs.h"
#include "intel_display_rpm.h"
@@ -1798,6 +1799,19 @@ static void psr2_dc3co_disable_work(struct work_struct *work)
mutex_unlock(&intel_dp->psr.lock);
}
+/* Frontbuffer bits for every pipe driving this PSR/Panel Replay instance. */
+static unsigned int psr_frontbuffer_mask(struct intel_dp *intel_dp)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+ unsigned int mask = 0;
+ enum pipe pipe;
+
+ for_each_pipe_masked(display, pipe, intel_dp->psr.pipe_mask)
+ mask |= INTEL_FRONTBUFFER_ALL_MASK(pipe);
+
+ return mask;
+}
+
static void
psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits)
{
@@ -1813,8 +1827,7 @@ psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int frontbuffer_bits
* At every frontbuffer flush flip event modified delay of delayed work,
* when delayed work schedules that means display has been idle.
*/
- if (!(frontbuffer_bits &
- INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe)))
+ if (!(frontbuffer_bits & psr_frontbuffer_mask(intel_dp)))
return;
mod_delayed_work(display->wq.unordered, &intel_dp->psr.dc3co_work,
@@ -1845,7 +1858,7 @@ void intel_psr_set_non_psr_pipes(struct intel_dp *intel_dp,
active_pipes = intel_calc_active_pipes(state, active_pipes);
crtc_state->active_non_psr_pipes = active_pipes &
- ~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);
+ ~intel_crtc_joined_pipe_mask(crtc_state);
}
void intel_psr_compute_config(struct intel_dp *intel_dp,
@@ -2175,6 +2188,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
intel_dp->psr.busy_frontbuffer_bits = 0;
intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
+ intel_dp->psr.pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
/* DC5/DC6 requires at least 6 idle frames */
val = usecs_to_jiffies(intel_get_frame_time_us(crtc_state) * 6);
@@ -2394,6 +2408,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
intel_dp->psr.active_non_psr_pipes = 0;
intel_dp->psr.pkg_c_latency_used = 0;
+ intel_dp->psr.pipe_mask = 0;
cancel_delayed_work(&intel_dp->psr.dc3co_work);
intel_dp->psr.dc3co_allowed = false;
}
@@ -3627,8 +3642,7 @@ void intel_psr_invalidate(struct intel_display *display,
continue;
}
- pipe_frontbuffer_bits &=
- INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);
+ pipe_frontbuffer_bits &= psr_frontbuffer_mask(intel_dp);
intel_dp->psr.busy_frontbuffer_bits |= pipe_frontbuffer_bits;
if (pipe_frontbuffer_bits)
@@ -3708,8 +3722,7 @@ void intel_psr_flush(struct intel_display *display,
continue;
}
- pipe_frontbuffer_bits &=
- INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe);
+ pipe_frontbuffer_bits &= psr_frontbuffer_mask(intel_dp);
intel_dp->psr.busy_frontbuffer_bits &= ~pipe_frontbuffer_bits;
/*
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking Mika Kahola
@ 2026-09-23 11:59 ` Mika Kahola
2026-09-24 9:45 ` Hogander, Jouni
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes Mika Kahola
` (5 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Mika Kahola @ 2026-09-23 11:59 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jouni.hogander, Mika Kahola
The adjusted mode spans all the joined pipes, so it is the wrong
reference for a per-pipe area. pipe_src is this pipe's own share.
No functional change, the two are the same without a joiner.
Assisted-by: Copilot:claude-opus-5
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 76260ceb49cb..c1994da38567 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2912,8 +2912,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
struct drm_rect display_area = {
.x1 = 0,
.y1 = 0,
- .x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
- .y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay,
+ .x2 = drm_rect_width(&crtc_state->pipe_src),
+ .y2 = drm_rect_height(&crtc_state->pipe_src),
};
bool full_update = false, su_area_changed;
int i, ret;
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking Mika Kahola
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src Mika Kahola
@ 2026-09-23 11:59 ` Mika Kahola
2026-10-07 10:25 ` Hogander, Jouni
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner Mika Kahola
` (4 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Mika Kahola @ 2026-09-23 11:59 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jouni.hogander, Mika Kahola
PSR2_MAN_TRK_CTL is per transcoder and a joined config has only one
transcoder, so both joined pipes would program it and the primary
would win. Merge the per-pipe areas, hand the result back to every
joined pipe before the plane areas are set and write the transcoder
register from the primary only. The joiner splits the image
horizontally, so the pipes share the Y coordinate space and all of
them have to fetch the merged range.
The plane support check has to run before the merge, so it now covers
every visible plane instead of only the ones intersecting the area.
Assisted-by: Copilot:claude-opus-5
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 184 +++++++++++++++++-----
drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +-
drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +-
3 files changed, 145 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index c1994da38567..4743b5b91743 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2657,9 +2657,11 @@ void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
break;
}
- intel_de_write_dsb(display, dsb,
- PSR2_MAN_TRK_CTL(display, cpu_transcoder),
- crtc_state->psr2_man_track_ctl);
+ /* The joined pipes drive one transcoder, so program it once. */
+ if (!intel_crtc_is_joiner_secondary(crtc_state))
+ intel_de_write_dsb(display, dsb,
+ PSR2_MAN_TRK_CTL(display, cpu_transcoder),
+ crtc_state->psr2_man_track_ctl);
if (!crtc_state->enable_psr2_su_region_et)
return;
@@ -2670,7 +2672,7 @@ void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
if (!crtc_state->dsc.compression_enable)
return;
- intel_dsc_su_et_parameters_configure(dsb, encoder, crtc_state,
+ intel_dsc_su_et_parameters_configure(dsb, crtc_state,
drm_rect_height(&crtc_state->psr2_su_area));
}
@@ -2900,12 +2902,11 @@ intel_psr_apply_su_area_workarounds(struct intel_crtc_state *crtc_state)
intel_psr_apply_pr_link_on_su_wa(crtc_state);
}
-int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static int psr2_sel_fetch_compute_su_area(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ bool *full_update)
{
struct intel_display *display = to_intel_display(state);
- const struct intel_crtc_state *old_crtc_state =
- intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
struct intel_plane_state *new_plane_state, *old_plane_state;
struct intel_plane *plane;
@@ -2915,28 +2916,14 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
.x2 = drm_rect_width(&crtc_state->pipe_src),
.y2 = drm_rect_height(&crtc_state->pipe_src),
};
- bool full_update = false, su_area_changed;
+ bool su_area_changed;
int i, ret;
- /*
- * Selective fetch is not always usable, for instance it is dropped
- * while pipe CRC is active. The planes keep their selective fetch
- * enable bit set in hardware over that, and a plane disabled while
- * selective fetch is off never gets the bit cleared. Once selective
- * fetch comes back the hardware would resume fetching for a plane that
- * is no longer enabled and keep its DDB range reserved, so have the
- * plane update drop the bit for every plane of the pipe as selective
- * fetch is turned off.
- */
- crtc_state->clear_psr2_sel_fetch = old_crtc_state->enable_psr2_sel_fetch &&
- !crtc_state->enable_psr2_sel_fetch;
-
- if (!crtc_state->enable_psr2_sel_fetch)
- return 0;
+ *full_update = false;
if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
- full_update = true;
- goto skip_sel_fetch_set_loop;
+ *full_update = true;
+ return 0;
}
crtc_state->psr2_su_area.x1 = 0;
@@ -2963,7 +2950,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
continue;
if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
- full_update = true;
+ *full_update = true;
break;
}
@@ -3023,11 +3010,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
drm_info_once(display->drm,
"Selective fetch area calculation failed in pipe %c\n",
pipe_name(crtc->pipe));
- full_update = true;
+ *full_update = true;
}
- if (full_update)
- goto skip_sel_fetch_set_loop;
+ if (*full_update)
+ return 0;
intel_psr_apply_su_area_workarounds(crtc_state);
@@ -3035,6 +3022,21 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
if (ret)
return ret;
+ /*
+ * The loop above never saw the planes pulled in just now, and the area
+ * has to be final before the joined pipes merge it.
+ */
+ for_each_new_intel_plane_in_state(state, plane, new_plane_state, i) {
+ if (new_plane_state->hw.crtc != crtc_state->uapi.crtc ||
+ !new_plane_state->uapi.visible)
+ continue;
+
+ if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
+ *full_update = true;
+ return 0;
+ }
+ }
+
do {
bool cursor_in_su_area = false;
@@ -3063,6 +3065,58 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
break;
} while (su_area_changed);
+ return 0;
+}
+
+/*
+ * The joined pipes share one transcoder, and thus one SU region describing the
+ * whole joined frame. Joining splits the image horizontally, so the pipes share
+ * the Y coordinate space and each of them has to fetch the merged range.
+ */
+static void psr2_sel_fetch_merge_su_area(struct intel_atomic_state *state,
+ u8 joined_pipes)
+{
+ struct intel_display *display = to_intel_display(state);
+ struct intel_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
+ int y1 = INT_MAX, y2 = INT_MIN;
+
+ for_each_intel_crtc_in_pipe_mask(display, crtc, joined_pipes) {
+ crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+
+ y1 = min(y1, crtc_state->psr2_su_area.y1);
+ y2 = max(y2, crtc_state->psr2_su_area.y2);
+ }
+
+ for_each_intel_crtc_in_pipe_mask(display, crtc, joined_pipes) {
+ crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+
+ crtc_state->psr2_su_area.y1 = y1;
+ crtc_state->psr2_su_area.y2 = y2;
+ }
+}
+
+static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ bool full_update)
+{
+ struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+ struct intel_plane_state *new_plane_state, *old_plane_state;
+ struct intel_plane *plane;
+ struct drm_rect display_area = {
+ .x1 = 0,
+ .y1 = 0,
+ .x2 = drm_rect_width(&crtc_state->pipe_src),
+ .y2 = drm_rect_height(&crtc_state->pipe_src),
+ };
+ int i;
+
+ if (full_update) {
+ clip_area_update(&crtc_state->psr2_su_area, &display_area,
+ &display_area);
+ goto out;
+ }
+
/*
* Now that we have the pipe damaged area check if it intersect with
* every plane, if it does set the plane selective fetch area.
@@ -3091,12 +3145,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
continue;
}
- if (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
- full_update = true;
- break;
- }
-
- sel_fetch_area = &new_plane_state->psr2_sel_fetch_area;
sel_fetch_area->y1 = inter.y1 - new_plane_state->uapi.dst.y1;
sel_fetch_area->y2 = inter.y2 - new_plane_state->uapi.dst.y1;
crtc_state->update_planes |= BIT(plane->id);
@@ -3120,14 +3168,68 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
}
}
-skip_sel_fetch_set_loop:
- if (full_update)
- clip_area_update(&crtc_state->psr2_su_area, &display_area,
- &display_area);
-
+out:
psr2_man_trk_ctl_calc(crtc_state, full_update);
crtc_state->pipe_srcsz_early_tpt =
psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);
+
+ return 0;
+}
+
+int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
+{
+ struct intel_display *display = to_intel_display(state);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+ struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+ struct intel_crtc *joined_crtc;
+ bool full_update = false;
+ u8 joined_pipes;
+ int ret;
+
+ /*
+ * Selective fetch is not always usable, for instance it is dropped
+ * while pipe CRC is active. The planes keep their selective fetch
+ * enable bit set in hardware over that, and a plane disabled while
+ * selective fetch is off never gets the bit cleared. Once selective
+ * fetch comes back the hardware would resume fetching for a plane that
+ * is no longer enabled and keep its DDB range reserved, so have the
+ * plane update drop the bit for every plane of the pipe as selective
+ * fetch is turned off.
+ */
+ crtc_state->clear_psr2_sel_fetch = old_crtc_state->enable_psr2_sel_fetch &&
+ !crtc_state->enable_psr2_sel_fetch;
+
+ if (!crtc_state->enable_psr2_sel_fetch)
+ return 0;
+
+ /* The joined pipes are handled in one go from the primary. */
+ if (intel_crtc_is_joiner_secondary(crtc_state))
+ return 0;
+
+ joined_pipes = intel_crtc_joined_pipe_mask(crtc_state);
+
+ for_each_intel_crtc_in_pipe_mask(display, joined_crtc, joined_pipes) {
+ bool pipe_full_update;
+
+ ret = psr2_sel_fetch_compute_su_area(state, joined_crtc,
+ &pipe_full_update);
+ if (ret)
+ return ret;
+
+ full_update |= pipe_full_update;
+ }
+
+ if (!full_update)
+ psr2_sel_fetch_merge_su_area(state, joined_pipes);
+
+ for_each_intel_crtc_in_pipe_mask(display, joined_crtc, joined_pipes) {
+ ret = psr2_sel_fetch_apply_su_area(state, joined_crtc, full_update);
+ if (ret)
+ return ret;
+ }
+
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 8f06c3a4d56d..29eec44ca3b0 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -820,7 +820,7 @@ void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
sizeof(dp_dsc_pps_sdp));
}
-void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb, struct intel_encoder *encoder,
+void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state, int su_lines)
{
struct intel_display *display = to_intel_display(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h b/drivers/gpu/drm/i915/display/intel_vdsc.h
index 3372f8694054..08a3ffedb8ec 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.h
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
@@ -38,7 +38,7 @@ void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
-void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb, struct intel_encoder *encoder,
+void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
const struct intel_crtc_state *crtc_state, int su_lines);
void intel_vdsc_state_dump(struct drm_printer *p, int indent,
const struct intel_crtc_state *crtc_state);
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
` (2 preceding siblings ...)
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes Mika Kahola
@ 2026-09-23 11:59 ` Mika Kahola
2026-09-25 11:06 ` Hogander, Jouni
2026-09-23 11:59 ` [PATCH] drm/i915/display: Allow forcing the joiner on eDP Mika Kahola
` (3 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Mika Kahola @ 2026-09-23 11:59 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jouni.hogander, Mika Kahola
Each joined pipe has its own PSR register block, so Panel Replay and
PSR2 selective update work with the pipe A/B joiner. Plain PSR1 does
not, keep rejecting that.
Assisted-by: Copilot:claude-opus-5
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 73 ++++++++++++++++++++----
1 file changed, 62 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4743b5b91743..c830332b33f2 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1587,6 +1587,50 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
return true;
}
+/*
+ * Joiner needs a per-pipe PSR/Panel Replay register block, only
+ * supported on pipe A/B.
+ */
+static bool psr_joiner_config_valid(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state,
+ const char *what)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+
+ if (!crtc_state->joiner_pipes)
+ return true;
+
+ if (crtc_state->joiner_pipes & ~(BIT(PIPE_A) | BIT(PIPE_B))) {
+ drm_dbg_kms(display->drm,
+ "%s not enabled, joiner only supported on pipe A/B\n", what);
+ return false;
+ }
+
+ return true;
+}
+
+/*
+ * PSR2 selective fetch and Panel Replay Selective Update share the same
+ * joiner limits, plus no uncompressed joiner configuration in YUV 4:2:0.
+ */
+static bool psr2_joiner_config_valid(struct intel_dp *intel_dp,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(intel_dp);
+
+ if (!psr_joiner_config_valid(intel_dp, crtc_state, "Selective update"))
+ return false;
+
+ if (crtc_state->joiner_pipes && !crtc_state->dsc.compression_enable &&
+ crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ drm_dbg_kms(display->drm,
+ "Selective update not enabled, uncompressed joiner does not support YUV 4:2:0\n");
+ return false;
+ }
+
+ return true;
+}
+
static bool intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state)
{
@@ -1594,6 +1638,9 @@ static bool intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
struct intel_dp *intel_dp = intel_attached_dp(connector);
struct intel_display *display = to_intel_display(intel_dp);
+ if (!psr2_joiner_config_valid(intel_dp, crtc_state))
+ goto unsupported;
+
if (HAS_PSR2_SEL_FETCH(display) &&
!intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state) &&
!HAS_PSR_HW_TRACKING(display)) {
@@ -1733,6 +1780,9 @@ static bool _panel_replay_compute_config(struct intel_crtc_state *crtc_state,
return false;
}
+ if (!psr_joiner_config_valid(intel_dp, crtc_state, "Panel Replay"))
+ return false;
+
crtc_state->link_off_after_as_sdp_when_pr_active = compute_link_off_after_as_sdp_when_pr_active(connector);
crtc_state->disable_as_sdp_when_pr_active = compute_disable_as_sdp_when_pr_active(connector);
@@ -1886,17 +1936,6 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
- /*
- * FIXME figure out what is wrong with PSR+joiner and
- * fix it. Presumably something related to the fact that
- * PSR is a transcoder level feature.
- */
- if (crtc_state->joiner_pipes) {
- drm_dbg_kms(display->drm,
- "PSR disabled due to joiner\n");
- return;
- }
-
/* Only used for state verification. */
crtc_state->panel_replay_dsc_support = connector->dp.panel_replay_caps.dsc_support;
crtc_state->has_panel_replay = _panel_replay_compute_config(crtc_state, conn_state);
@@ -1908,6 +1947,14 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
crtc_state->has_sel_update = intel_sel_update_config_valid(crtc_state, conn_state);
+
+ /* Plain PSR1 is not supported with joiner. */
+ if (crtc_state->joiner_pipes && !crtc_state->has_panel_replay &&
+ !crtc_state->has_sel_update) {
+ drm_dbg_kms(display->drm,
+ "PSR disabled, PSR1 not supported with joiner\n");
+ crtc_state->has_psr = false;
+ }
}
void intel_psr_get_config(struct intel_encoder *encoder,
@@ -4728,6 +4775,10 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp,
crtc_state->has_sel_update = false;
crtc_state->enable_psr2_su_region_et = false;
crtc_state->enable_psr2_sel_fetch = false;
+
+ /* Plain PSR1 is not supported with joiner. */
+ if (crtc_state->joiner_pipes)
+ crtc_state->has_psr = false;
}
/* Wa_18037818876 */
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH] drm/i915/display: Allow forcing the joiner on eDP
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
` (3 preceding siblings ...)
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner Mika Kahola
@ 2026-09-23 11:59 ` Mika Kahola
2026-09-25 11:08 ` Hogander, Jouni
2026-09-23 12:08 ` ✓ CI.KUnit: success for " Patchwork
` (2 subsequent siblings)
7 siblings, 1 reply; 18+ messages in thread
From: Mika Kahola @ 2026-09-23 11:59 UTC (permalink / raw)
To: intel-gfx, intel-xe; +Cc: jouni.hogander, Mika Kahola
intel_dp_has_joiner() rejects eDP unless the VBT enables the pipe
joiner, and the debugfs file is only created when that returns true, so
i915_joiner_force_enable can never turn it on.
Always create the file for DP and eDP, and let a forced pipe count
above one override the VBT.
Assisted-by: Copilot:claude-opus-5
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 5 ++---
drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++++---
2 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 3e302f23f247..e55fa01addb5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1352,9 +1352,8 @@ void intel_connector_debugfs_add(struct intel_connector *connector)
connector, &i915_dsc_fractional_bpp_fops);
}
- if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
- connector_type == DRM_MODE_CONNECTOR_eDP) &&
- intel_dp_has_joiner(intel_attached_dp(connector))) {
+ if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
+ connector_type == DRM_MODE_CONNECTOR_eDP) {
debugfs_create_file("i915_joiner_force_enable", 0644, root,
connector, &i915_joiner_fops);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 2480b8ce3bec..80ce71ce4c20 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -473,9 +473,15 @@ bool intel_dp_has_joiner(struct intel_dp *intel_dp)
if (intel_dp->mso_link_count)
return false;
- if (intel_dp_is_edp(intel_dp) &&
- !connector->panel.vbt.edp.pipe_joiner_enable)
- return false;
+ if (intel_dp_is_edp(intel_dp)) {
+ bool pipe_joiner_enable = connector->panel.vbt.edp.pipe_joiner_enable;
+
+ if (connector->force_joined_pipes > 1)
+ pipe_joiner_enable = true;
+
+ if (!pipe_joiner_enable)
+ return false;
+ }
return DISPLAY_VER(display) >= 12 ||
(DISPLAY_VER(display) == 11 &&
^ permalink raw reply related [flat|nested] 18+ messages in thread
* ✓ CI.KUnit: success for drm/i915/display: Allow forcing the joiner on eDP
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
` (4 preceding siblings ...)
2026-09-23 11:59 ` [PATCH] drm/i915/display: Allow forcing the joiner on eDP Mika Kahola
@ 2026-09-23 12:08 ` Patchwork
2026-09-23 12:59 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-24 2:10 ` ✗ Xe.CI.FULL: failure " Patchwork
7 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-09-23 12:08 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-xe
== Series Details ==
Series: drm/i915/display: Allow forcing the joiner on eDP
URL : https://patchwork.freedesktop.org/series/174792/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[12:06:49] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:06:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:07:14] Starting KUnit Kernel (1/1)...
[12:07:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:07:14] ============= refcount_interrupt (4 subtests) ==============
[12:07:14] [PASSED] test_single_irq_change
[12:07:14] [PASSED] test_nested_irq_change
[12:07:14] [PASSED] test_multiple_irq_change
[12:07:14] [PASSED] test_irq_save
[12:07:14] =============== [PASSED] refcount_interrupt ================
[12:07:14] ================= gpu_buddy (14 subtests) ==================
[12:07:14] [PASSED] gpu_test_buddy_alloc_limit
[12:07:14] [PASSED] gpu_test_buddy_alloc_optimistic
[12:07:14] [PASSED] gpu_test_buddy_alloc_pessimistic
[12:07:14] [PASSED] gpu_test_buddy_alloc_pathological
[12:07:14] [PASSED] gpu_test_buddy_alloc_contiguous
[12:07:14] [PASSED] gpu_test_buddy_alloc_clear
[12:07:14] [PASSED] gpu_test_buddy_alloc_range
[12:07:14] [PASSED] gpu_test_buddy_alloc_range_bias
[12:07:15] [PASSED] gpu_test_buddy_fragmentation_performance
[12:07:15] [PASSED] gpu_test_buddy_dirty_tracker_performance
[12:07:15] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[12:07:15] [PASSED] gpu_test_buddy_offset_aligned_allocation
[12:07:15] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[12:07:15] [PASSED] gpu_test_buddy_addr_to_block
[12:07:15] ==================== [PASSED] gpu_buddy ====================
[12:07:15] ============================================================
[12:07:15] Testing complete. Ran 18 tests: passed: 18
[12:07:15] Elapsed time: 26.502s total, 4.411s configuring, 20.223s building, 1.819s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:07:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:07:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:07:51] Starting KUnit Kernel (1/1)...
[12:07:51] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:07:51] ============= refcount_interrupt (4 subtests) ==============
[12:07:51] [PASSED] test_single_irq_change
[12:07:51] [PASSED] test_nested_irq_change
[12:07:51] [PASSED] test_multiple_irq_change
[12:07:51] [PASSED] test_irq_save
[12:07:51] =============== [PASSED] refcount_interrupt ================
[12:07:51] ================== guc_buf (11 subtests) ===================
[12:07:51] [PASSED] test_smallest
[12:07:51] [PASSED] test_largest
[12:07:51] [PASSED] test_granular
[12:07:51] [PASSED] test_unique
[12:07:51] [PASSED] test_overlap
[12:07:51] [PASSED] test_reusable
[12:07:51] [PASSED] test_too_big
[12:07:51] [PASSED] test_flush
[12:07:51] [PASSED] test_lookup
[12:07:51] [PASSED] test_data
[12:07:51] [PASSED] test_class
[12:07:51] ===================== [PASSED] guc_buf =====================
[12:07:51] =================== guc_dbm (7 subtests) ===================
[12:07:51] [PASSED] test_empty
[12:07:51] [PASSED] test_default
[12:07:51] ======================== test_size ========================
[12:07:51] [PASSED] 4
[12:07:51] [PASSED] 8
[12:07:51] [PASSED] 32
[12:07:51] [PASSED] 256
[12:07:51] ==================== [PASSED] test_size ====================
[12:07:51] ======================= test_reuse ========================
[12:07:51] [PASSED] 4
[12:07:51] [PASSED] 8
[12:07:51] [PASSED] 32
[12:07:51] [PASSED] 256
[12:07:51] =================== [PASSED] test_reuse ====================
[12:07:51] =================== test_range_overlap ====================
[12:07:51] [PASSED] 4
[12:07:51] [PASSED] 8
[12:07:51] [PASSED] 32
[12:07:51] [PASSED] 256
[12:07:51] =============== [PASSED] test_range_overlap ================
[12:07:51] =================== test_range_compact ====================
[12:07:51] [PASSED] 4
[12:07:51] [PASSED] 8
[12:07:51] [PASSED] 32
[12:07:51] [PASSED] 256
[12:07:51] =============== [PASSED] test_range_compact ================
[12:07:51] ==================== test_range_spare =====================
[12:07:51] [PASSED] 4
[12:07:51] [PASSED] 8
[12:07:51] [PASSED] 32
[12:07:51] [PASSED] 256
[12:07:51] ================ [PASSED] test_range_spare =================
[12:07:51] ===================== [PASSED] guc_dbm =====================
[12:07:51] =================== guc_idm (6 subtests) ===================
[12:07:51] [PASSED] bad_init
[12:07:51] [PASSED] no_init
[12:07:51] [PASSED] init_fini
[12:07:51] [PASSED] check_used
[12:07:51] [PASSED] check_quota
[12:07:51] [PASSED] check_all
[12:07:51] ===================== [PASSED] guc_idm =====================
[12:07:51] ============== guc_klv_helpers (13 subtests) ===============
[12:07:51] [PASSED] test_count
[12:07:51] [PASSED] test_encode_u32
[12:07:51] [PASSED] test_encode_u64
[12:07:51] [PASSED] test_encode_string
[12:07:51] [PASSED] test_encode_object_raw
[12:07:51] [PASSED] test_encode_object_klv
[12:07:51] [PASSED] test_encode_object_nested
[12:07:51] [PASSED] test_encode_object_basic
[12:07:51] ===================== test_decode_u16 =====================
[12:07:51] [PASSED] empty
[12:07:51] [PASSED] valid
[12:07:51] [PASSED] max
[12:07:51] [PASSED] big
[12:07:51] [PASSED] long
[12:07:51] ================= [PASSED] test_decode_u16 =================
[12:07:51] ===================== test_decode_u32 =====================
[12:07:51] [PASSED] empty
[12:07:51] [PASSED] valid
[12:07:51] [PASSED] max
[12:07:51] [PASSED] long
[12:07:51] ================= [PASSED] test_decode_u32 =================
[12:07:51] ===================== test_decode_u64 =====================
[12:07:51] [PASSED] empty
[12:07:51] [PASSED] short
[12:07:51] [PASSED] valid
[12:07:51] [PASSED] max
[12:07:51] [PASSED] long
[12:07:51] ================= [PASSED] test_decode_u64 =================
[12:07:51] ===================== test_decode_str =====================
[12:07:51] [PASSED] empty
[12:07:51] [PASSED] one
[12:07:51] [PASSED] one_trash
[12:07:51] [PASSED] two
[12:07:51] [PASSED] two_trash
[12:07:51] [PASSED] three
[12:07:51] [PASSED] dword
[12:07:51] [PASSED] four
[12:07:51] [PASSED] five
[12:07:51] [PASSED] six
[12:07:51] [PASSED] seven
[12:07:51] [PASSED] qword
[12:07:51] ================= [PASSED] test_decode_str =================
[12:07:51] [PASSED] test_print
[12:07:51] ================= [PASSED] guc_klv_helpers =================
[12:07:51] =================== xe_log (4 subtests) ====================
[12:07:51] [PASSED] demo_cper
[12:07:51] [PASSED] demo_dmesg
[12:07:51] ======================= test_dmesg ========================
[12:07:51] [PASSED] test_fatal
[12:07:51] [PASSED] test_fatal_tile
[12:07:51] [PASSED] test_fatal_gt
[12:07:51] [PASSED] test_fatal_comp
[12:07:51] [PASSED] test_fatal_comp_tile
[12:07:51] [PASSED] test_fatal_comp_gt
[12:07:51] [PASSED] test_fatal_all
[12:07:51] [PASSED] test_recoverable
[12:07:51] [PASSED] test_recoverable_tile
[12:07:51] [PASSED] test_recoverable_gt
[12:07:51] [PASSED] test_recoverable_comp
[12:07:51] [PASSED] test_recoverable_comp_tile
[12:07:51] [PASSED] test_recoverable_comp_gt
[12:07:51] [PASSED] test_recoverable_all
[12:07:51] [PASSED] test_info
[12:07:51] [PASSED] test_info_tile
[12:07:51] [PASSED] test_info_gt
[12:07:51] [PASSED] test_info_err
[12:07:51] [PASSED] test_info_comp
[12:07:51] [PASSED] test_info_comp_tile
[12:07:51] [PASSED] test_info_comp_gt
[12:07:51] [PASSED] test_info_all
[12:07:51] [PASSED] test_hw_fatal
[12:07:51] [PASSED] test_hw_recoverable
[12:07:51] [PASSED] test_hw_corrected
[12:07:51] [PASSED] test_hw_informational
[12:07:51] =================== [PASSED] test_dmesg ====================
[12:07:51] ====================== test_invalid =======================
[12:07:51] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[12:07:51] ================== [SKIPPED] test_invalid ==================
[12:07:51] ===================== [PASSED] xe_log ======================
[12:07:51] ================== no_relay (3 subtests) ===================
[12:07:51] [PASSED] xe_drops_guc2pf_if_not_ready
[12:07:51] [PASSED] xe_drops_guc2vf_if_not_ready
[12:07:51] [PASSED] xe_rejects_send_if_not_ready
[12:07:51] ==================== [PASSED] no_relay =====================
[12:07:51] ================== pf_relay (14 subtests) ==================
[12:07:51] [PASSED] pf_rejects_guc2pf_too_short
[12:07:51] [PASSED] pf_rejects_guc2pf_too_long
[12:07:51] [PASSED] pf_rejects_guc2pf_no_payload
[12:07:51] [PASSED] pf_fails_no_payload
[12:07:51] [PASSED] pf_fails_bad_origin
[12:07:51] [PASSED] pf_fails_bad_type
[12:07:51] [PASSED] pf_txn_reports_error
[12:07:51] [PASSED] pf_txn_sends_pf2guc
[12:07:51] [PASSED] pf_sends_pf2guc
[12:07:51] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:07:51] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:07:51] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:07:51] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:07:51] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[12:07:51] ==================== [PASSED] pf_relay =====================
[12:07:51] ================== vf_relay (3 subtests) ===================
[12:07:51] [PASSED] vf_rejects_guc2vf_too_short
[12:07:51] [PASSED] vf_rejects_guc2vf_too_long
[12:07:51] [PASSED] vf_rejects_guc2vf_no_payload
[12:07:51] ==================== [PASSED] vf_relay =====================
[12:07:51] ================ pf_gt_config (9 subtests) =================
[12:07:51] [PASSED] fair_contexts_1vf
[12:07:51] [PASSED] fair_doorbells_1vf
[12:07:51] [PASSED] fair_ggtt_1vf
[12:07:51] ====================== fair_vram_1vf ======================
[12:07:51] [PASSED] 3.50 GiB
[12:07:51] [PASSED] 11.5 GiB
[12:07:51] [PASSED] 15.5 GiB
[12:07:51] [PASSED] 31.5 GiB
[12:07:51] [PASSED] 63.5 GiB
[12:07:51] [PASSED] 1.91 GiB
[12:07:51] ================== [PASSED] fair_vram_1vf ==================
[12:07:51] ================ fair_vram_1vf_admin_only =================
[12:07:51] [PASSED] 3.50 GiB
[12:07:51] [PASSED] 11.5 GiB
[12:07:51] [PASSED] 15.5 GiB
[12:07:51] [PASSED] 31.5 GiB
[12:07:51] [PASSED] 63.5 GiB
[12:07:51] [PASSED] 1.91 GiB
[12:07:51] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:07:51] ====================== fair_contexts ======================
[12:07:51] [PASSED] 1 VF
[12:07:51] [PASSED] 2 VFs
[12:07:51] [PASSED] 3 VFs
[12:07:51] [PASSED] 4 VFs
[12:07:51] [PASSED] 5 VFs
[12:07:51] [PASSED] 6 VFs
[12:07:51] [PASSED] 7 VFs
[12:07:51] [PASSED] 8 VFs
[12:07:51] [PASSED] 9 VFs
[12:07:51] [PASSED] 10 VFs
[12:07:51] [PASSED] 11 VFs
[12:07:51] [PASSED] 12 VFs
[12:07:51] [PASSED] 13 VFs
[12:07:51] [PASSED] 14 VFs
[12:07:51] [PASSED] 15 VFs
[12:07:51] [PASSED] 16 VFs
[12:07:51] [PASSED] 17 VFs
[12:07:51] [PASSED] 18 VFs
[12:07:51] [PASSED] 19 VFs
[12:07:51] [PASSED] 20 VFs
[12:07:51] [PASSED] 21 VFs
[12:07:51] [PASSED] 22 VFs
[12:07:51] [PASSED] 23 VFs
[12:07:51] [PASSED] 24 VFs
[12:07:51] [PASSED] 25 VFs
[12:07:51] [PASSED] 26 VFs
[12:07:51] [PASSED] 27 VFs
[12:07:51] [PASSED] 28 VFs
[12:07:51] [PASSED] 29 VFs
[12:07:51] [PASSED] 30 VFs
[12:07:51] [PASSED] 31 VFs
[12:07:51] [PASSED] 32 VFs
[12:07:51] [PASSED] 33 VFs
[12:07:51] [PASSED] 34 VFs
[12:07:51] [PASSED] 35 VFs
[12:07:51] [PASSED] 36 VFs
[12:07:51] [PASSED] 37 VFs
[12:07:51] [PASSED] 38 VFs
[12:07:51] [PASSED] 39 VFs
[12:07:51] [PASSED] 40 VFs
[12:07:51] [PASSED] 41 VFs
[12:07:51] [PASSED] 42 VFs
[12:07:51] [PASSED] 43 VFs
[12:07:51] [PASSED] 44 VFs
[12:07:51] [PASSED] 45 VFs
[12:07:51] [PASSED] 46 VFs
[12:07:51] [PASSED] 47 VFs
[12:07:51] [PASSED] 48 VFs
[12:07:51] [PASSED] 49 VFs
[12:07:51] [PASSED] 50 VFs
[12:07:51] [PASSED] 51 VFs
[12:07:51] [PASSED] 52 VFs
[12:07:51] [PASSED] 53 VFs
[12:07:51] [PASSED] 54 VFs
[12:07:51] [PASSED] 55 VFs
[12:07:51] [PASSED] 56 VFs
[12:07:51] [PASSED] 57 VFs
[12:07:51] [PASSED] 58 VFs
[12:07:51] [PASSED] 59 VFs
[12:07:51] [PASSED] 60 VFs
[12:07:51] [PASSED] 61 VFs
[12:07:51] [PASSED] 62 VFs
[12:07:51] [PASSED] 63 VFs
[12:07:51] ================== [PASSED] fair_contexts ==================
[12:07:51] ===================== fair_doorbells ======================
[12:07:51] [PASSED] 1 VF
[12:07:51] [PASSED] 2 VFs
[12:07:51] [PASSED] 3 VFs
[12:07:51] [PASSED] 4 VFs
[12:07:51] [PASSED] 5 VFs
[12:07:51] [PASSED] 6 VFs
[12:07:51] [PASSED] 7 VFs
[12:07:51] [PASSED] 8 VFs
[12:07:51] [PASSED] 9 VFs
[12:07:51] [PASSED] 10 VFs
[12:07:51] [PASSED] 11 VFs
[12:07:51] [PASSED] 12 VFs
[12:07:51] [PASSED] 13 VFs
[12:07:51] [PASSED] 14 VFs
[12:07:51] [PASSED] 15 VFs
[12:07:51] [PASSED] 16 VFs
[12:07:51] [PASSED] 17 VFs
[12:07:51] [PASSED] 18 VFs
[12:07:51] [PASSED] 19 VFs
[12:07:51] [PASSED] 20 VFs
[12:07:51] [PASSED] 21 VFs
[12:07:51] [PASSED] 22 VFs
[12:07:51] [PASSED] 23 VFs
[12:07:51] [PASSED] 24 VFs
[12:07:51] [PASSED] 25 VFs
[12:07:51] [PASSED] 26 VFs
[12:07:51] [PASSED] 27 VFs
[12:07:51] [PASSED] 28 VFs
[12:07:51] [PASSED] 29 VFs
[12:07:51] [PASSED] 30 VFs
[12:07:51] [PASSED] 31 VFs
[12:07:51] [PASSED] 32 VFs
[12:07:51] [PASSED] 33 VFs
[12:07:51] [PASSED] 34 VFs
[12:07:51] [PASSED] 35 VFs
[12:07:51] [PASSED] 36 VFs
[12:07:51] [PASSED] 37 VFs
[12:07:51] [PASSED] 38 VFs
[12:07:51] [PASSED] 39 VFs
[12:07:51] [PASSED] 40 VFs
[12:07:51] [PASSED] 41 VFs
[12:07:51] [PASSED] 42 VFs
[12:07:51] [PASSED] 43 VFs
[12:07:51] [PASSED] 44 VFs
[12:07:51] [PASSED] 45 VFs
[12:07:51] [PASSED] 46 VFs
[12:07:51] [PASSED] 47 VFs
[12:07:51] [PASSED] 48 VFs
[12:07:51] [PASSED] 49 VFs
[12:07:51] [PASSED] 50 VFs
[12:07:51] [PASSED] 51 VFs
[12:07:51] [PASSED] 52 VFs
[12:07:51] [PASSED] 53 VFs
[12:07:51] [PASSED] 54 VFs
[12:07:51] [PASSED] 55 VFs
[12:07:51] [PASSED] 56 VFs
[12:07:51] [PASSED] 57 VFs
[12:07:51] [PASSED] 58 VFs
[12:07:51] [PASSED] 59 VFs
[12:07:51] [PASSED] 60 VFs
[12:07:51] [PASSED] 61 VFs
[12:07:51] [PASSED] 62 VFs
[12:07:51] [PASSED] 63 VFs
[12:07:51] ================= [PASSED] fair_doorbells ==================
[12:07:51] ======================== fair_ggtt ========================
[12:07:51] [PASSED] 1 VF
[12:07:51] [PASSED] 2 VFs
[12:07:51] [PASSED] 3 VFs
[12:07:51] [PASSED] 4 VFs
[12:07:51] [PASSED] 5 VFs
[12:07:51] [PASSED] 6 VFs
[12:07:51] [PASSED] 7 VFs
[12:07:51] [PASSED] 8 VFs
[12:07:51] [PASSED] 9 VFs
[12:07:51] [PASSED] 10 VFs
[12:07:51] [PASSED] 11 VFs
[12:07:51] [PASSED] 12 VFs
[12:07:51] [PASSED] 13 VFs
[12:07:51] [PASSED] 14 VFs
[12:07:51] [PASSED] 15 VFs
[12:07:51] [PASSED] 16 VFs
[12:07:51] [PASSED] 17 VFs
[12:07:51] [PASSED] 18 VFs
[12:07:51] [PASSED] 19 VFs
[12:07:51] [PASSED] 20 VFs
[12:07:51] [PASSED] 21 VFs
[12:07:51] [PASSED] 22 VFs
[12:07:51] [PASSED] 23 VFs
[12:07:51] [PASSED] 24 VFs
[12:07:51] [PASSED] 25 VFs
[12:07:51] [PASSED] 26 VFs
[12:07:51] [PASSED] 27 VFs
[12:07:51] [PASSED] 28 VFs
[12:07:51] [PASSED] 29 VFs
[12:07:51] [PASSED] 30 VFs
[12:07:51] [PASSED] 31 VFs
[12:07:51] [PASSED] 32 VFs
[12:07:51] [PASSED] 33 VFs
[12:07:51] [PASSED] 34 VFs
[12:07:51] [PASSED] 35 VFs
[12:07:51] [PASSED] 36 VFs
[12:07:51] [PASSED] 37 VFs
[12:07:51] [PASSED] 38 VFs
[12:07:51] [PASSED] 39 VFs
[12:07:51] [PASSED] 40 VFs
[12:07:51] [PASSED] 41 VFs
[12:07:51] [PASSED] 42 VFs
[12:07:51] [PASSED] 43 VFs
[12:07:51] [PASSED] 44 VFs
[12:07:51] [PASSED] 45 VFs
[12:07:51] [PASSED] 46 VFs
[12:07:51] [PASSED] 47 VFs
[12:07:51] [PASSED] 48 VFs
[12:07:51] [PASSED] 49 VFs
[12:07:51] [PASSED] 50 VFs
[12:07:51] [PASSED] 51 VFs
[12:07:51] [PASSED] 52 VFs
[12:07:51] [PASSED] 53 VFs
[12:07:51] [PASSED] 54 VFs
[12:07:51] [PASSED] 55 VFs
[12:07:51] [PASSED] 56 VFs
[12:07:51] [PASSED] 57 VFs
[12:07:51] [PASSED] 58 VFs
[12:07:51] [PASSED] 59 VFs
[12:07:51] [PASSED] 60 VFs
[12:07:51] [PASSED] 61 VFs
[12:07:51] [PASSED] 62 VFs
[12:07:51] [PASSED] 63 VFs
[12:07:51] ==================== [PASSED] fair_ggtt ====================
[12:07:51] ======================== fair_vram ========================
[12:07:51] [PASSED] 1 VF
[12:07:51] [PASSED] 2 VFs
[12:07:51] [PASSED] 3 VFs
[12:07:51] [PASSED] 4 VFs
[12:07:51] [PASSED] 5 VFs
[12:07:51] [PASSED] 6 VFs
[12:07:51] [PASSED] 7 VFs
[12:07:51] [PASSED] 8 VFs
[12:07:51] [PASSED] 9 VFs
[12:07:51] [PASSED] 10 VFs
[12:07:51] [PASSED] 11 VFs
[12:07:51] [PASSED] 12 VFs
[12:07:51] [PASSED] 13 VFs
[12:07:51] [PASSED] 14 VFs
[12:07:51] [PASSED] 15 VFs
[12:07:51] [PASSED] 16 VFs
[12:07:51] [PASSED] 17 VFs
[12:07:51] [PASSED] 18 VFs
[12:07:51] [PASSED] 19 VFs
[12:07:51] [PASSED] 20 VFs
[12:07:51] [PASSED] 21 VFs
[12:07:51] [PASSED] 22 VFs
[12:07:51] [PASSED] 23 VFs
[12:07:51] [PASSED] 24 VFs
[12:07:51] [PASSED] 25 VFs
[12:07:51] [PASSED] 26 VFs
[12:07:51] [PASSED] 27 VFs
[12:07:51] [PASSED] 28 VFs
[12:07:51] [PASSED] 29 VFs
[12:07:51] [PASSED] 30 VFs
[12:07:51] [PASSED] 31 VFs
[12:07:51] [PASSED] 32 VFs
[12:07:51] [PASSED] 33 VFs
[12:07:51] [PASSED] 34 VFs
[12:07:51] [PASSED] 35 VFs
[12:07:51] [PASSED] 36 VFs
[12:07:51] [PASSED] 37 VFs
[12:07:51] [PASSED] 38 VFs
[12:07:51] [PASSED] 39 VFs
[12:07:51] [PASSED] 40 VFs
[12:07:51] [PASSED] 41 VFs
[12:07:51] [PASSED] 42 VFs
[12:07:51] [PASSED] 43 VFs
[12:07:51] [PASSED] 44 VFs
[12:07:51] [PASSED] 45 VFs
[12:07:51] [PASSED] 46 VFs
[12:07:51] [PASSED] 47 VFs
[12:07:51] [PASSED] 48 VFs
[12:07:51] [PASSED] 49 VFs
[12:07:51] [PASSED] 50 VFs
[12:07:51] [PASSED] 51 VFs
[12:07:51] [PASSED] 52 VFs
[12:07:51] [PASSED] 53 VFs
[12:07:51] [PASSED] 54 VFs
[12:07:51] [PASSED] 55 VFs
[12:07:51] [PASSED] 56 VFs
[12:07:51] [PASSED] 57 VFs
[12:07:51] [PASSED] 58 VFs
[12:07:51] [PASSED] 59 VFs
[12:07:51] [PASSED] 60 VFs
[12:07:51] [PASSED] 61 VFs
[12:07:51] [PASSED] 62 VFs
[12:07:51] [PASSED] 63 VFs
[12:07:51] ==================== [PASSED] fair_vram ====================
[12:07:51] ================== [PASSED] pf_gt_config ===================
[12:07:51] ===================== lmtt (1 subtest) =====================
[12:07:51] ======================== test_ops =========================
[12:07:51] [PASSED] 2-level
[12:07:51] [PASSED] multi-level
[12:07:51] ==================== [PASSED] test_ops =====================
[12:07:51] ====================== [PASSED] lmtt =======================
[12:07:51] ================= sriov_packet (1 subtest) =================
[12:07:51] [PASSED] test_descriptor_init
[12:07:51] ================== [PASSED] sriov_packet ===================
[12:07:51] ================= pf_service (11 subtests) =================
[12:07:51] [PASSED] pf_negotiate_any
[12:07:51] [PASSED] pf_negotiate_base_match
[12:07:51] [PASSED] pf_negotiate_base_newer
[12:07:51] [PASSED] pf_negotiate_base_next
[12:07:51] [SKIPPED] pf_negotiate_base_older (no older minor)
[12:07:51] [PASSED] pf_negotiate_base_prev
[12:07:51] [PASSED] pf_negotiate_latest_match
[12:07:51] [PASSED] pf_negotiate_latest_newer
[12:07:51] [PASSED] pf_negotiate_latest_next
[12:07:51] [SKIPPED] pf_negotiate_latest_older (no older minor)
[12:07:51] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[12:07:51] =================== [PASSED] pf_service ====================
[12:07:51] ================= xe_guc_g2g (2 subtests) ==================
[12:07:51] ============== xe_live_guc_g2g_kunit_default ==============
[12:07:51] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:07:51] ============== xe_live_guc_g2g_kunit_allmem ===============
[12:07:51] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:07:51] =================== [SKIPPED] xe_guc_g2g ===================
[12:07:51] =================== xe_mocs (2 subtests) ===================
[12:07:51] ================ xe_live_mocs_kernel_kunit ================
[12:07:51] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:07:51] ================ xe_live_mocs_reset_kunit =================
[12:07:51] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:07:51] ==================== [SKIPPED] xe_mocs =====================
[12:07:51] ================= xe_migrate (2 subtests) ==================
[12:07:51] ================= xe_migrate_sanity_kunit =================
[12:07:51] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:07:51] ================== xe_validate_ccs_kunit ==================
[12:07:51] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:07:51] =================== [SKIPPED] xe_migrate ===================
[12:07:51] ================== xe_dma_buf (1 subtest) ==================
[12:07:51] ==================== xe_dma_buf_kunit =====================
[12:07:51] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:07:51] =================== [SKIPPED] xe_dma_buf ===================
[12:07:51] ================= xe_bo_shrink (1 subtest) =================
[12:07:51] =================== xe_bo_shrink_kunit ====================
[12:07:51] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:07:51] ================== [SKIPPED] xe_bo_shrink ==================
[12:07:51] ==================== xe_bo (2 subtests) ====================
[12:07:51] ================== xe_ccs_migrate_kunit ===================
[12:07:51] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:07:51] ==================== xe_bo_evict_kunit ====================
[12:07:51] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:07:51] ===================== [SKIPPED] xe_bo ======================
[12:07:51] =================== xe_any (9 subtests) ====================
[12:07:51] [PASSED] test_to_xe
[12:07:51] [PASSED] test_to_dev
[12:07:51] [PASSED] test_to_pdev
[12:07:51] [PASSED] test_to_drm
[12:07:51] [PASSED] test_if_pdev
[12:07:51] [PASSED] test_if_xe
[12:07:51] [PASSED] test_if_tile
[12:07:51] [PASSED] test_if_gt
[12:07:51] [PASSED] test_to_id
[12:07:51] ===================== [PASSED] xe_any ======================
[12:07:51] ==================== args (13 subtests) ====================
[12:07:51] [PASSED] count_args_test
[12:07:51] [PASSED] call_args_example
[12:07:51] [PASSED] call_args_test
[12:07:51] [PASSED] drop_first_arg_example
[12:07:51] [PASSED] drop_first_arg_test
[12:07:51] [PASSED] first_arg_example
[12:07:51] [PASSED] first_arg_test
[12:07:51] [PASSED] last_arg_example
[12:07:51] [PASSED] last_arg_test
[12:07:51] [PASSED] pick_arg_example
[12:07:51] [PASSED] if_args_example
[12:07:51] [PASSED] if_args_test
[12:07:51] [PASSED] sep_comma_example
[12:07:51] ====================== [PASSED] args =======================
[12:07:51] =================== xe_pci (3 subtests) ====================
[12:07:51] ==================== check_graphics_ip ====================
[12:07:51] [PASSED] 12.00 Xe_LP
[12:07:51] [PASSED] 12.10 Xe_LP+
[12:07:51] [PASSED] 12.55 Xe_HPG
[12:07:51] [PASSED] 12.60 Xe_HPC
[12:07:51] [PASSED] 12.70 Xe_LPG
[12:07:51] [PASSED] 12.71 Xe_LPG
[12:07:51] [PASSED] 12.74 Xe_LPG+
[12:07:51] [PASSED] 20.01 Xe2_HPG
[12:07:51] [PASSED] 20.02 Xe2_HPG
[12:07:51] [PASSED] 20.04 Xe2_LPG
[12:07:51] [PASSED] 30.00 Xe3_LPG
[12:07:51] [PASSED] 30.01 Xe3_LPG
[12:07:51] [PASSED] 30.03 Xe3_LPG
[12:07:51] [PASSED] 30.04 Xe3_LPG
[12:07:51] [PASSED] 30.05 Xe3_LPG
[12:07:51] [PASSED] 35.10 Xe3p_LPG
[12:07:51] [PASSED] 35.11 Xe3p_XPC
[12:07:51] ================ [PASSED] check_graphics_ip ================
[12:07:51] ===================== check_media_ip ======================
[12:07:51] [PASSED] 12.00 Xe_M
[12:07:51] [PASSED] 12.55 Xe_HPM
[12:07:51] [PASSED] 13.00 Xe_LPM+
[12:07:51] [PASSED] 13.01 Xe2_HPM
[12:07:51] [PASSED] 20.00 Xe2_LPM
[12:07:51] [PASSED] 30.00 Xe3_LPM
[12:07:51] [PASSED] 30.02 Xe3_LPM
[12:07:51] [PASSED] 35.00 Xe3p_LPM
[12:07:51] [PASSED] 35.03 Xe3p_HPM
[12:07:51] ================= [PASSED] check_media_ip ==================
[12:07:51] =================== check_platform_desc ===================
[12:07:51] [PASSED] 0x9A60 (TIGERLAKE)
[12:07:51] [PASSED] 0x9A68 (TIGERLAKE)
[12:07:51] [PASSED] 0x9A70 (TIGERLAKE)
[12:07:51] [PASSED] 0x9A40 (TIGERLAKE)
[12:07:51] [PASSED] 0x9A49 (TIGERLAKE)
[12:07:51] [PASSED] 0x9A59 (TIGERLAKE)
[12:07:51] [PASSED] 0x9A78 (TIGERLAKE)
[12:07:51] [PASSED] 0x9AC0 (TIGERLAKE)
[12:07:51] [PASSED] 0x9AC9 (TIGERLAKE)
[12:07:51] [PASSED] 0x9AD9 (TIGERLAKE)
[12:07:51] [PASSED] 0x9AF8 (TIGERLAKE)
[12:07:51] [PASSED] 0x4C80 (ROCKETLAKE)
[12:07:51] [PASSED] 0x4C8A (ROCKETLAKE)
[12:07:51] [PASSED] 0x4C8B (ROCKETLAKE)
[12:07:51] [PASSED] 0x4C8C (ROCKETLAKE)
[12:07:51] [PASSED] 0x4C90 (ROCKETLAKE)
[12:07:51] [PASSED] 0x4C9A (ROCKETLAKE)
[12:07:51] [PASSED] 0x4680 (ALDERLAKE_S)
[12:07:51] [PASSED] 0x4682 (ALDERLAKE_S)
[12:07:51] [PASSED] 0x4688 (ALDERLAKE_S)
[12:07:51] [PASSED] 0x468A (ALDERLAKE_S)
[12:07:51] [PASSED] 0x468B (ALDERLAKE_S)
[12:07:51] [PASSED] 0x4690 (ALDERLAKE_S)
[12:07:51] [PASSED] 0x4692 (ALDERLAKE_S)
[12:07:51] [PASSED] 0x4693 (ALDERLAKE_S)
[12:07:51] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46AA (ALDERLAKE_P)
[12:07:51] [PASSED] 0x462A (ALDERLAKE_P)
[12:07:51] [PASSED] 0x4626 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x4628 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:07:51] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:07:51] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:07:51] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:07:51] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:07:51] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:07:51] [PASSED] 0xA721 (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA720 (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:07:51] [PASSED] 0xA780 (ALDERLAKE_S)
[12:07:51] [PASSED] 0xA781 (ALDERLAKE_S)
[12:07:51] [PASSED] 0xA782 (ALDERLAKE_S)
[12:07:51] [PASSED] 0xA783 (ALDERLAKE_S)
[12:07:51] [PASSED] 0xA788 (ALDERLAKE_S)
[12:07:51] [PASSED] 0xA789 (ALDERLAKE_S)
[12:07:51] [PASSED] 0xA78A (ALDERLAKE_S)
[12:07:51] [PASSED] 0xA78B (ALDERLAKE_S)
[12:07:51] [PASSED] 0x4905 (DG1)
[12:07:51] [PASSED] 0x4906 (DG1)
[12:07:51] [PASSED] 0x4907 (DG1)
[12:07:51] [PASSED] 0x4908 (DG1)
[12:07:51] [PASSED] 0x4909 (DG1)
[12:07:51] [PASSED] 0x56C0 (DG2)
[12:07:51] [PASSED] 0x56C2 (DG2)
[12:07:51] [PASSED] 0x56C1 (DG2)
[12:07:51] [PASSED] 0x7D51 (METEORLAKE)
[12:07:51] [PASSED] 0x7DD1 (METEORLAKE)
[12:07:51] [PASSED] 0x7D41 (METEORLAKE)
[12:07:51] [PASSED] 0x7D67 (METEORLAKE)
[12:07:51] [PASSED] 0xB640 (METEORLAKE)
[12:07:51] [PASSED] 0x56A0 (DG2)
[12:07:51] [PASSED] 0x56A1 (DG2)
[12:07:51] [PASSED] 0x56A2 (DG2)
[12:07:51] [PASSED] 0x56BE (DG2)
[12:07:51] [PASSED] 0x56BF (DG2)
[12:07:51] [PASSED] 0x5690 (DG2)
[12:07:51] [PASSED] 0x5691 (DG2)
[12:07:51] [PASSED] 0x5692 (DG2)
[12:07:51] [PASSED] 0x56A5 (DG2)
[12:07:51] [PASSED] 0x56A6 (DG2)
[12:07:51] [PASSED] 0x56B0 (DG2)
[12:07:51] [PASSED] 0x56B1 (DG2)
[12:07:51] [PASSED] 0x56BA (DG2)
[12:07:51] [PASSED] 0x56BB (DG2)
[12:07:51] [PASSED] 0x56BC (DG2)
[12:07:51] [PASSED] 0x56BD (DG2)
[12:07:51] [PASSED] 0x5693 (DG2)
[12:07:51] [PASSED] 0x5694 (DG2)
[12:07:51] [PASSED] 0x5695 (DG2)
[12:07:51] [PASSED] 0x56A3 (DG2)
[12:07:51] [PASSED] 0x56A4 (DG2)
[12:07:51] [PASSED] 0x56B2 (DG2)
[12:07:51] [PASSED] 0x56B3 (DG2)
[12:07:51] [PASSED] 0x5696 (DG2)
[12:07:51] [PASSED] 0x5697 (DG2)
[12:07:51] [PASSED] 0xB69 (PVC)
[12:07:51] [PASSED] 0xB6E (PVC)
[12:07:51] [PASSED] 0xBD4 (PVC)
[12:07:51] [PASSED] 0xBD5 (PVC)
[12:07:51] [PASSED] 0xBD6 (PVC)
[12:07:51] [PASSED] 0xBD7 (PVC)
[12:07:51] [PASSED] 0xBD8 (PVC)
[12:07:51] [PASSED] 0xBD9 (PVC)
[12:07:51] [PASSED] 0xBDA (PVC)
[12:07:51] [PASSED] 0xBDB (PVC)
[12:07:51] [PASSED] 0xBE0 (PVC)
[12:07:51] [PASSED] 0xBE1 (PVC)
[12:07:51] [PASSED] 0xBE5 (PVC)
[12:07:51] [PASSED] 0x7D40 (METEORLAKE)
[12:07:51] [PASSED] 0x7D45 (METEORLAKE)
[12:07:51] [PASSED] 0x7D55 (METEORLAKE)
[12:07:51] [PASSED] 0x7D60 (METEORLAKE)
[12:07:51] [PASSED] 0x7DD5 (METEORLAKE)
[12:07:51] [PASSED] 0x6420 (LUNARLAKE)
[12:07:51] [PASSED] 0x64A0 (LUNARLAKE)
[12:07:51] [PASSED] 0x64B0 (LUNARLAKE)
[12:07:51] [PASSED] 0xE202 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE209 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE20B (BATTLEMAGE)
[12:07:51] [PASSED] 0xE20C (BATTLEMAGE)
[12:07:51] [PASSED] 0xE20D (BATTLEMAGE)
[12:07:51] [PASSED] 0xE210 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE211 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE212 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE216 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE220 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE221 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE222 (BATTLEMAGE)
[12:07:51] [PASSED] 0xE223 (BATTLEMAGE)
[12:07:51] [PASSED] 0xB080 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB081 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB082 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB083 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB084 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB085 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB086 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB087 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB08F (PANTHERLAKE)
[12:07:51] [PASSED] 0xB090 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:07:51] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:07:51] [PASSED] 0xFD80 (PANTHERLAKE)
[12:07:51] [PASSED] 0xFD81 (PANTHERLAKE)
[12:07:51] [PASSED] 0xD740 (NOVALAKE_S)
[12:07:51] [PASSED] 0xD741 (NOVALAKE_S)
[12:07:51] [PASSED] 0xD742 (NOVALAKE_S)
[12:07:51] [PASSED] 0xD743 (NOVALAKE_S)
[12:07:51] [PASSED] 0xD745 (NOVALAKE_S)
[12:07:51] [PASSED] 0xD74A (NOVALAKE_S)
[12:07:51] [PASSED] 0xD74B (NOVALAKE_S)
[12:07:51] [PASSED] 0x674C (CRESCENTISLAND)
[12:07:51] [PASSED] 0x674D (CRESCENTISLAND)
[12:07:51] [PASSED] 0x674E (CRESCENTISLAND)
[12:07:51] [PASSED] 0x674F (CRESCENTISLAND)
[12:07:51] [PASSED] 0x6750 (CRESCENTISLAND)
[12:07:51] [PASSED] 0xD750 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD751 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD752 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD753 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD754 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD755 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD756 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD757 (NOVALAKE_P)
[12:07:51] [PASSED] 0xD75F (NOVALAKE_P)
[12:07:51] =============== [PASSED] check_platform_desc ===============
[12:07:51] ===================== [PASSED] xe_pci ======================
[12:07:51] ============= xe_rtp_tables_test (5 subtests) ==============
[12:07:51] ================== xe_rtp_table_gt_test ===================
[12:07:51] [PASSED] gt_was/14011060649
[12:07:51] [PASSED] gt_was/14011059788
[12:07:51] [PASSED] gt_was/14015795083
[12:07:51] [PASSED] gt_was/16021867713
[12:07:51] [PASSED] gt_was/14019449301
[12:07:51] [PASSED] gt_was/16028005424
[12:07:51] [PASSED] gt_was/14026578760
[12:07:51] [PASSED] gt_was/1409420604
[12:07:51] [PASSED] gt_was/1408615072
[12:07:51] [PASSED] gt_was/22010523718
[12:07:51] [PASSED] gt_was/14011006942
[12:07:51] [PASSED] gt_was/14014830051
[12:07:51] [PASSED] gt_was/18018781329
[12:07:51] [PASSED] gt_was/1509235366
[12:07:51] [PASSED] gt_was/18018781329
[12:07:51] [PASSED] gt_was/16016694945
[12:07:51] [PASSED] gt_was/14018575942
[12:07:51] [PASSED] gt_was/22016670082
[12:07:51] [PASSED] gt_was/22016670082
[12:07:51] [PASSED] gt_was/14017421178
[12:07:51] [PASSED] gt_was/16025250150
[12:07:51] [PASSED] gt_was/14021871409
[12:07:51] [PASSED] gt_was/16021865536
[12:07:51] [PASSED] gt_was/14021486841
[12:07:51] [PASSED] gt_was/14025160223
[12:07:51] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[12:07:51] [PASSED] gt_was/14025635424
[12:07:51] [PASSED] gt_was/16028005424
[12:07:51] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:07:51] ================== xe_rtp_table_gt_test ===================
[12:07:51] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:07:51] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:07:51] [PASSED] gt_tunings/Tuning: L3 cache
[12:07:51] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:07:51] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:07:51] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:07:51] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:07:51] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:07:51] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:07:51] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:07:51] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:07:51] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:07:51] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:07:51] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:07:51] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:07:51] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:07:51] ================== xe_rtp_table_oob_test ==================
[12:07:51] [PASSED] oob_was/1607983814
[12:07:51] [PASSED] oob_was/16010904313
[12:07:51] [PASSED] oob_was/18022495364
[12:07:51] [PASSED] oob_was/22012773006
[12:07:51] [PASSED] oob_was/14014475959
[12:07:51] [PASSED] oob_was/22011391025
[12:07:51] [PASSED] oob_was/22012727170
[12:07:51] [PASSED] oob_was/22012727685
[12:07:51] [PASSED] oob_was/22016596838
[12:07:51] [PASSED] oob_was/18020744125
[12:07:51] [PASSED] oob_was/1409600907
[12:07:51] [PASSED] oob_was/22014953428
[12:07:51] [PASSED] oob_was/16017236439
[12:07:51] [PASSED] oob_was/14019821291
[12:07:51] [PASSED] oob_was/14015076503
[12:07:51] [PASSED] oob_was/14018913170
[12:07:51] [PASSED] oob_was/14018094691
[12:07:51] [PASSED] oob_was/18024947630
[12:07:51] [PASSED] oob_was/16022287689
[12:07:51] [PASSED] oob_was/13011645652
[12:07:51] [PASSED] oob_was/14022293748
[12:07:51] [PASSED] oob_was/22019794406
[12:07:51] [PASSED] oob_was/22019338487
[12:07:51] [PASSED] oob_was/16023588340
[12:07:51] [PASSED] oob_was/14019789679
[12:07:51] [PASSED] oob_was/14022866841
[12:07:51] [PASSED] oob_was/16021333562
[12:07:51] [PASSED] oob_was/14016712196
[12:07:51] [PASSED] oob_was/14015568240
[12:07:51] [PASSED] oob_was/18013179988
[12:07:51] [PASSED] oob_was/1508761755
[12:07:51] [PASSED] oob_was/16023105232
[12:07:51] [PASSED] oob_was/16026508708
[12:07:51] [PASSED] oob_was/14020001231
[12:07:51] [PASSED] oob_was/16023683509
[12:07:51] [PASSED] oob_was/14025515070
[12:07:51] [PASSED] oob_was/15015404425_disable
[12:07:51] [PASSED] oob_was/16026007364
[12:07:51] [PASSED] oob_was/14020316580
[12:07:51] [PASSED] oob_was/14025883347
[12:07:51] [PASSED] oob_was/16029380221
[12:07:51] [PASSED] oob_was/22022079272
[12:07:51] [PASSED] oob_was/16029897822
[12:07:51] [PASSED] oob_was/14027054324
[12:07:51] [PASSED] oob_was/14025941587
[12:07:51] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:07:51] ================ xe_rtp_table_dev_oob_test ================
[12:07:51] [PASSED] device_oob_was/22010954014
[12:07:51] [PASSED] device_oob_was/15015404425
[12:07:51] [PASSED] device_oob_was/22019338487_display
[12:07:51] [PASSED] device_oob_was/14022085890
[12:07:51] [PASSED] device_oob_was/14026539277
[12:07:51] [PASSED] device_oob_was/14026633728
[12:07:51] [PASSED] device_oob_was/14026746987
[12:07:51] [PASSED] device_oob_was/14026779378
[12:07:51] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:07:51] ========== xe_rtp_table_missing_upper_bound_test ==========
[12:07:51] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[12:07:51] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[12:07:51] [PASSED] register_whitelist/1806527549
[12:07:51] [PASSED] register_whitelist/allow_read_ctx_timestamp
[12:07:51] [PASSED] register_whitelist/allow_read_queue_timestamp
[12:07:51] [PASSED] register_whitelist/16014440446
[12:07:51] [PASSED] register_whitelist/16017236439
[12:07:51] [PASSED] register_whitelist/16020183090
[12:07:51] [PASSED] register_whitelist/14024997852
[12:07:51] [PASSED] register_whitelist/14024997852
[12:07:51] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[12:07:51] =============== [PASSED] xe_rtp_tables_test ================
[12:07:51] =================== xe_rtp (3 subtests) ====================
[12:07:51] =================== xe_rtp_rules_tests ====================
[12:07:51] [PASSED] no
[12:07:51] [PASSED] yes
[12:07:51] [PASSED] no-and-no
[12:07:51] [PASSED] no-and-yes
[12:07:51] [PASSED] yes-and-no
[12:07:51] [PASSED] yes-and-yes
[12:07:51] [PASSED] no-or-no
[12:07:51] [PASSED] no-or-yes
[12:07:51] [PASSED] yes-or-no
[12:07:51] [PASSED] yes-or-yes
[12:07:51] [PASSED] no-yes-or-yes-no
[12:07:51] [PASSED] no-yes-or-yes-yes
[12:07:51] [PASSED] yes-yes-or-no-yes
[12:07:51] [PASSED] yes-yes-or-yes-yes
[12:07:51] [PASSED] no-no-or-yes-or-no
[12:07:51] [PASSED] or
[12:07:51] [PASSED] or-yes
[12:07:51] [PASSED] or-no
[12:07:51] [PASSED] yes-or
[12:07:51] [PASSED] no-or
[12:07:51] [PASSED] no-or-or-yes
[12:07:51] [PASSED] yes-or-or-no
[12:07:51] [PASSED] no-or-or-no
[12:07:51] [PASSED] missing-context-engine-class
[12:07:51] [PASSED] missing-context-engine-class-or-yes
[12:07:51] [PASSED] missing-context-engine-class-or-or-yes
[12:07:51] =============== [PASSED] xe_rtp_rules_tests ================
[12:07:51] =============== xe_rtp_process_to_sr_tests ================
[12:07:51] [PASSED] coalesce-same-reg
[12:07:51] [PASSED] coalesce-same-reg-literal-and-func
[12:07:51] [PASSED] no-match-no-add
[12:07:51] [PASSED] two-regs-two-entries
[12:07:51] [PASSED] clr-one-set-other
[12:07:51] [PASSED] set-field
[12:07:51] [PASSED] conflict-duplicate
[12:07:51] [PASSED] conflict-not-disjoint
[12:07:51] [PASSED] conflict-not-disjoint-literal-and-func
[12:07:51] [PASSED] conflict-reg-type
[12:07:51] [PASSED] bad-mcr-reg-forced-to-regular
[12:07:51] [PASSED] bad-regular-reg-forced-to-mcr
[12:07:51] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:07:51] ================== xe_rtp_process_tests ===================
[12:07:51] [PASSED] active1
[12:07:51] [PASSED] active2
[12:07:51] [PASSED] active-inactive
[12:07:51] [PASSED] inactive-active
[12:07:51] [PASSED] inactive-active-inactive
[12:07:51] [PASSED] inactive-inactive-inactive
[12:07:51] ============== [PASSED] xe_rtp_process_tests ===============
[12:07:51] ===================== [PASSED] xe_rtp ======================
[12:07:51] ==================== xe_wa (1 subtest) =====================
[12:07:51] ======================== xe_wa_gt =========================
[12:07:51] [PASSED] TIGERLAKE B0
[12:07:51] [PASSED] DG1 A0
[12:07:51] [PASSED] DG1 B0
[12:07:51] [PASSED] ALDERLAKE_S A0
[12:07:51] [PASSED] ALDERLAKE_S B0
[12:07:51] [PASSED] ALDERLAKE_S C0
[12:07:51] [PASSED] ALDERLAKE_S D0
[12:07:51] [PASSED] ALDERLAKE_P A0
[12:07:51] [PASSED] ALDERLAKE_P B0
[12:07:51] [PASSED] ALDERLAKE_P C0
[12:07:51] [PASSED] ALDERLAKE_S RPLS D0
[12:07:51] [PASSED] ALDERLAKE_P RPLU E0
[12:07:51] [PASSED] DG2 G10 C0
[12:07:51] [PASSED] DG2 G11 B1
[12:07:51] [PASSED] DG2 G12 A1
[12:07:51] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:07:51] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:07:51] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:07:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:07:51] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:07:51] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:07:51] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:07:51] ==================== [PASSED] xe_wa_gt =====================
[12:07:51] ====================== [PASSED] xe_wa ======================
[12:07:51] ============================================================
[12:07:51] Testing complete. Ran 820 tests: passed: 792, skipped: 28
[12:07:52] Elapsed time: 35.969s total, 1.765s configuring, 33.438s building, 0.727s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:07:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:07:53] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:08:18] Starting KUnit Kernel (1/1)...
[12:08:18] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:08:18] ============= refcount_interrupt (4 subtests) ==============
[12:08:18] [PASSED] test_single_irq_change
[12:08:18] [PASSED] test_nested_irq_change
[12:08:18] [PASSED] test_multiple_irq_change
[12:08:18] [PASSED] test_irq_save
[12:08:18] =============== [PASSED] refcount_interrupt ================
[12:08:18] ============ drm_test_pick_cmdline (2 subtests) ============
[12:08:18] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:08:18] =============== drm_test_pick_cmdline_named ===============
[12:08:18] [PASSED] NTSC
[12:08:18] [PASSED] NTSC-J
[12:08:18] [PASSED] PAL
[12:08:18] [PASSED] PAL-M
[12:08:18] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:08:18] ============== [PASSED] drm_test_pick_cmdline ==============
[12:08:18] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:08:18] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:08:18] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:08:18] =========== drm_validate_clone_mode (2 subtests) ===========
[12:08:18] ============== drm_test_check_in_clone_mode ===============
[12:08:18] [PASSED] in_clone_mode
[12:08:18] [PASSED] not_in_clone_mode
[12:08:18] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:08:18] =============== drm_test_check_valid_clones ===============
[12:08:18] [PASSED] not_in_clone_mode
[12:08:18] [PASSED] valid_clone
[12:08:18] [PASSED] invalid_clone
[12:08:18] =========== [PASSED] drm_test_check_valid_clones ===========
[12:08:18] ============= [PASSED] drm_validate_clone_mode =============
[12:08:18] ============= drm_validate_modeset (1 subtest) =============
[12:08:18] [PASSED] drm_test_check_connector_changed_modeset
[12:08:18] ============== [PASSED] drm_validate_modeset ===============
[12:08:18] ====== drm_test_bridge_get_current_state (1 subtest) =======
[12:08:18] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:08:18] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:08:18] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:08:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:08:18] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:08:18] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[12:08:18] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:08:18] ============== drm_bridge_alloc (2 subtests) ===============
[12:08:18] [PASSED] drm_test_drm_bridge_alloc_basic
[12:08:18] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:08:18] ================ [PASSED] drm_bridge_alloc =================
[12:08:18] ============= drm_bridge_bus_fmt (5 subtests) ==============
[12:08:18] [PASSED] drm_test_bridge_rgb_yuv_rgb
[12:08:18] [PASSED] drm_test_bridge_must_convert_to_yuv444
[12:08:18] [PASSED] drm_test_bridge_hdmi_auto_rgb
[12:08:18] [PASSED] drm_test_bridge_auto_first
[12:08:18] [PASSED] drm_test_bridge_rgb_yuv_no_path
[12:08:18] =============== [PASSED] drm_bridge_bus_fmt ================
[12:08:18] ============= drm_cmdline_parser (40 subtests) =============
[12:08:18] [PASSED] drm_test_cmdline_force_d_only
[12:08:18] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:08:18] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:08:18] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:08:18] [PASSED] drm_test_cmdline_force_e_only
[12:08:18] [PASSED] drm_test_cmdline_res
[12:08:18] [PASSED] drm_test_cmdline_res_vesa
[12:08:18] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:08:18] [PASSED] drm_test_cmdline_res_rblank
[12:08:18] [PASSED] drm_test_cmdline_res_bpp
[12:08:18] [PASSED] drm_test_cmdline_res_refresh
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:08:18] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:08:18] [PASSED] drm_test_cmdline_res_margins_force_on
[12:08:18] [PASSED] drm_test_cmdline_res_vesa_margins
[12:08:18] [PASSED] drm_test_cmdline_name
[12:08:18] [PASSED] drm_test_cmdline_name_bpp
[12:08:18] [PASSED] drm_test_cmdline_name_option
[12:08:18] [PASSED] drm_test_cmdline_name_bpp_option
[12:08:18] [PASSED] drm_test_cmdline_rotate_0
[12:08:18] [PASSED] drm_test_cmdline_rotate_90
[12:08:18] [PASSED] drm_test_cmdline_rotate_180
[12:08:18] [PASSED] drm_test_cmdline_rotate_270
[12:08:18] [PASSED] drm_test_cmdline_hmirror
[12:08:18] [PASSED] drm_test_cmdline_vmirror
[12:08:18] [PASSED] drm_test_cmdline_margin_options
[12:08:18] [PASSED] drm_test_cmdline_multiple_options
[12:08:18] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:08:18] [PASSED] drm_test_cmdline_extra_and_option
[12:08:18] [PASSED] drm_test_cmdline_freestanding_options
[12:08:18] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:08:18] [PASSED] drm_test_cmdline_panel_orientation
[12:08:18] ================ drm_test_cmdline_invalid =================
[12:08:18] [PASSED] margin_only
[12:08:18] [PASSED] interlace_only
[12:08:18] [PASSED] res_missing_x
[12:08:18] [PASSED] res_missing_y
[12:08:18] [PASSED] res_bad_y
[12:08:18] [PASSED] res_missing_y_bpp
[12:08:18] [PASSED] res_bad_bpp
[12:08:18] [PASSED] res_bad_refresh
[12:08:18] [PASSED] res_bpp_refresh_force_on_off
[12:08:18] [PASSED] res_invalid_mode
[12:08:18] [PASSED] res_bpp_wrong_place_mode
[12:08:18] [PASSED] name_bpp_refresh
[12:08:18] [PASSED] name_refresh
[12:08:18] [PASSED] name_refresh_wrong_mode
[12:08:18] [PASSED] name_refresh_invalid_mode
[12:08:18] [PASSED] rotate_multiple
[12:08:18] [PASSED] rotate_invalid_val
[12:08:18] [PASSED] rotate_truncated
[12:08:18] [PASSED] invalid_option
[12:08:18] [PASSED] invalid_tv_option
[12:08:18] [PASSED] truncated_tv_option
[12:08:18] ============ [PASSED] drm_test_cmdline_invalid =============
[12:08:18] =============== drm_test_cmdline_tv_options ===============
[12:08:18] [PASSED] NTSC
[12:08:18] [PASSED] NTSC_443
[12:08:18] [PASSED] NTSC_J
[12:08:18] [PASSED] PAL
[12:08:18] [PASSED] PAL_M
[12:08:18] [PASSED] PAL_N
[12:08:18] [PASSED] SECAM
[12:08:18] [PASSED] MONO_525
[12:08:18] [PASSED] MONO_625
[12:08:18] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:08:18] =============== [PASSED] drm_cmdline_parser ================
[12:08:18] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:08:18] [PASSED] drm_test_connector_hdmi_init_valid
[12:08:18] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:08:18] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:08:18] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:08:18] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:08:18] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:08:18] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:08:18] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:08:18] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:08:18] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:08:18] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:08:18] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:08:18] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:08:18] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:08:18] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:08:18] [PASSED] drm_test_connector_hdmi_init_null_product
[12:08:18] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:08:18] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:08:18] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:08:18] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:08:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:08:18] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:08:18] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:08:18] ========= drm_test_connector_hdmi_init_type_valid =========
[12:08:18] [PASSED] HDMI-A
[12:08:18] [PASSED] HDMI-B
[12:08:18] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:08:18] ======== drm_test_connector_hdmi_init_type_invalid ========
[12:08:18] [PASSED] Unknown
[12:08:18] [PASSED] VGA
[12:08:18] [PASSED] DVI-I
[12:08:18] [PASSED] DVI-D
[12:08:18] [PASSED] DVI-A
[12:08:18] [PASSED] Composite
[12:08:18] [PASSED] SVIDEO
[12:08:18] [PASSED] LVDS
[12:08:18] [PASSED] Component
[12:08:18] [PASSED] DIN
[12:08:18] [PASSED] DP
[12:08:18] [PASSED] TV
[12:08:18] [PASSED] eDP
[12:08:18] [PASSED] Virtual
[12:08:18] [PASSED] DSI
[12:08:18] [PASSED] DPI
[12:08:18] [PASSED] Writeback
[12:08:18] [PASSED] SPI
[12:08:18] [PASSED] USB
[12:08:18] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:08:18] ============ [PASSED] drmm_connector_hdmi_init =============
[12:08:18] ============= drmm_connector_init (3 subtests) =============
[12:08:18] [PASSED] drm_test_drmm_connector_init
[12:08:18] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:08:18] ========= drm_test_drmm_connector_init_type_valid =========
[12:08:18] [PASSED] Unknown
[12:08:18] [PASSED] VGA
[12:08:18] [PASSED] DVI-I
[12:08:18] [PASSED] DVI-D
[12:08:18] [PASSED] DVI-A
[12:08:18] [PASSED] Composite
[12:08:18] [PASSED] SVIDEO
[12:08:18] [PASSED] LVDS
[12:08:18] [PASSED] Component
[12:08:18] [PASSED] DIN
[12:08:18] [PASSED] DP
[12:08:18] [PASSED] HDMI-A
[12:08:18] [PASSED] HDMI-B
[12:08:18] [PASSED] TV
[12:08:18] [PASSED] eDP
[12:08:18] [PASSED] Virtual
[12:08:18] [PASSED] DSI
[12:08:18] [PASSED] DPI
[12:08:18] [PASSED] Writeback
[12:08:18] [PASSED] SPI
[12:08:18] [PASSED] USB
[12:08:18] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:08:18] =============== [PASSED] drmm_connector_init ===============
[12:08:18] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_init
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:08:18] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[12:08:18] [PASSED] Unknown
[12:08:18] [PASSED] VGA
[12:08:18] [PASSED] DVI-I
[12:08:18] [PASSED] DVI-D
[12:08:18] [PASSED] DVI-A
[12:08:18] [PASSED] Composite
[12:08:18] [PASSED] SVIDEO
[12:08:18] [PASSED] LVDS
[12:08:18] [PASSED] Component
[12:08:18] [PASSED] DIN
[12:08:18] [PASSED] DP
[12:08:18] [PASSED] HDMI-A
[12:08:18] [PASSED] HDMI-B
[12:08:18] [PASSED] TV
[12:08:18] [PASSED] eDP
[12:08:18] [PASSED] Virtual
[12:08:18] [PASSED] DSI
[12:08:18] [PASSED] DPI
[12:08:18] [PASSED] Writeback
[12:08:18] [PASSED] SPI
[12:08:18] [PASSED] USB
[12:08:18] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:08:18] ======== drm_test_drm_connector_dynamic_init_name =========
[12:08:18] [PASSED] Unknown
[12:08:18] [PASSED] VGA
[12:08:18] [PASSED] DVI-I
[12:08:18] [PASSED] DVI-D
[12:08:18] [PASSED] DVI-A
[12:08:18] [PASSED] Composite
[12:08:18] [PASSED] SVIDEO
[12:08:18] [PASSED] LVDS
[12:08:18] [PASSED] Component
[12:08:18] [PASSED] DIN
[12:08:18] [PASSED] DP
[12:08:18] [PASSED] HDMI-A
[12:08:18] [PASSED] HDMI-B
[12:08:18] [PASSED] TV
[12:08:18] [PASSED] eDP
[12:08:18] [PASSED] Virtual
[12:08:18] [PASSED] DSI
[12:08:18] [PASSED] DPI
[12:08:18] [PASSED] Writeback
[12:08:18] [PASSED] SPI
[12:08:18] [PASSED] USB
[12:08:18] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:08:18] =========== [PASSED] drm_connector_dynamic_init ============
[12:08:18] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:08:18] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:08:18] ======= drm_connector_dynamic_register (7 subtests) ========
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:08:18] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:08:18] ========= [PASSED] drm_connector_dynamic_register ==========
[12:08:18] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:08:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:08:18] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:08:18] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:08:18] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:08:18] ========== drm_test_get_tv_mode_from_name_valid ===========
[12:08:18] [PASSED] NTSC
[12:08:18] [PASSED] NTSC-443
[12:08:18] [PASSED] NTSC-J
[12:08:18] [PASSED] PAL
[12:08:18] [PASSED] PAL-M
[12:08:18] [PASSED] PAL-N
[12:08:18] [PASSED] SECAM
[12:08:18] [PASSED] Mono
[12:08:18] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:08:18] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:08:18] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:08:18] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:08:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:08:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:08:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:08:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:08:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:08:18] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:08:18] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[12:08:18] [PASSED] VIC 96
[12:08:18] [PASSED] VIC 97
[12:08:18] [PASSED] VIC 101
[12:08:18] [PASSED] VIC 102
[12:08:18] [PASSED] VIC 106
[12:08:18] [PASSED] VIC 107
[12:08:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:08:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:08:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:08:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:08:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:08:18] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:08:18] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:08:18] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:08:18] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[12:08:18] [PASSED] Automatic
[12:08:18] [PASSED] Full
[12:08:18] [PASSED] Limited 16:235
[12:08:18] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:08:18] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:08:18] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:08:18] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:08:18] === drm_test_drm_hdmi_connector_get_output_format_name ====
[12:08:18] [PASSED] RGB
[12:08:18] [PASSED] YUV 4:2:0
[12:08:18] [PASSED] YUV 4:2:2
[12:08:18] [PASSED] YUV 4:4:4
[12:08:18] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:08:18] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:08:18] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:08:18] ============= drm_damage_helper (21 subtests) ==============
[12:08:18] [PASSED] drm_test_damage_iter_no_damage
[12:08:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:08:18] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:08:18] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:08:18] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:08:18] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:08:18] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:08:18] [PASSED] drm_test_damage_iter_simple_damage
[12:08:18] [PASSED] drm_test_damage_iter_single_damage
[12:08:18] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:08:18] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:08:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:08:18] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:08:18] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:08:18] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:08:18] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:08:18] [PASSED] drm_test_damage_iter_damage
[12:08:18] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:08:18] [PASSED] drm_test_damage_iter_damage_one_outside
[12:08:18] [PASSED] drm_test_damage_iter_damage_src_moved
[12:08:18] [PASSED] drm_test_damage_iter_damage_not_visible
[12:08:18] ================ [PASSED] drm_damage_helper ================
[12:08:18] ============== drm_dp_mst_helper (3 subtests) ==============
[12:08:18] ============== drm_test_dp_mst_calc_pbn_mode ==============
[12:08:18] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:08:18] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:08:18] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:08:18] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:08:18] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:08:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:08:18] ============== drm_test_dp_mst_calc_pbn_div ===============
[12:08:18] [PASSED] Link rate 2000000 lane count 4
[12:08:18] [PASSED] Link rate 2000000 lane count 2
[12:08:18] [PASSED] Link rate 2000000 lane count 1
[12:08:18] [PASSED] Link rate 1350000 lane count 4
[12:08:18] [PASSED] Link rate 1350000 lane count 2
[12:08:18] [PASSED] Link rate 1350000 lane count 1
[12:08:18] [PASSED] Link rate 1000000 lane count 4
[12:08:18] [PASSED] Link rate 1000000 lane count 2
[12:08:18] [PASSED] Link rate 1000000 lane count 1
[12:08:18] [PASSED] Link rate 810000 lane count 4
[12:08:18] [PASSED] Link rate 810000 lane count 2
[12:08:18] [PASSED] Link rate 810000 lane count 1
[12:08:18] [PASSED] Link rate 540000 lane count 4
[12:08:18] [PASSED] Link rate 540000 lane count 2
[12:08:18] [PASSED] Link rate 540000 lane count 1
[12:08:18] [PASSED] Link rate 270000 lane count 4
[12:08:18] [PASSED] Link rate 270000 lane count 2
[12:08:18] [PASSED] Link rate 270000 lane count 1
[12:08:18] [PASSED] Link rate 162000 lane count 4
[12:08:18] [PASSED] Link rate 162000 lane count 2
[12:08:18] [PASSED] Link rate 162000 lane count 1
[12:08:18] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:08:18] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[12:08:18] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:08:18] [PASSED] DP_POWER_UP_PHY with port number
[12:08:18] [PASSED] DP_POWER_DOWN_PHY with port number
[12:08:18] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:08:18] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:08:18] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:08:18] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:08:18] [PASSED] DP_QUERY_PAYLOAD with port number
[12:08:18] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:08:18] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:08:18] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:08:18] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:08:18] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:08:18] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:08:18] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:08:18] [PASSED] DP_REMOTE_I2C_READ with port number
[12:08:18] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:08:18] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:08:18] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:08:18] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:08:18] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:08:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:08:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:08:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:08:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:08:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:08:18] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:08:18] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:08:18] ================ [PASSED] drm_dp_mst_helper ================
[12:08:18] ================== drm_exec (7 subtests) ===================
[12:08:18] [PASSED] sanitycheck
[12:08:18] [PASSED] test_lock
[12:08:18] [PASSED] test_lock_unlock
[12:08:18] [PASSED] test_duplicates
[12:08:18] [PASSED] test_prepare
[12:08:18] [PASSED] test_prepare_array
[12:08:18] [PASSED] test_multiple_loops
[12:08:18] ==================== [PASSED] drm_exec =====================
[12:08:18] =========== drm_format_helper_test (17 subtests) ===========
[12:08:18] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:08:18] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:08:18] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:08:18] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:08:18] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:08:18] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:08:18] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:08:18] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:08:18] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:08:18] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:08:18] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:08:18] ============== drm_test_fb_xrgb8888_to_mono ===============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:08:18] ==================== drm_test_fb_swab =====================
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ================ [PASSED] drm_test_fb_swab =================
[12:08:18] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:08:18] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[12:08:18] [PASSED] single_pixel_source_buffer
[12:08:18] [PASSED] single_pixel_clip_rectangle
[12:08:18] [PASSED] well_known_colors
[12:08:18] [PASSED] destination_pitch
[12:08:18] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:08:18] ================= drm_test_fb_clip_offset =================
[12:08:18] [PASSED] pass through
[12:08:18] [PASSED] horizontal offset
[12:08:18] [PASSED] vertical offset
[12:08:18] [PASSED] horizontal and vertical offset
[12:08:18] [PASSED] horizontal offset (custom pitch)
[12:08:18] [PASSED] vertical offset (custom pitch)
[12:08:18] [PASSED] horizontal and vertical offset (custom pitch)
[12:08:18] ============= [PASSED] drm_test_fb_clip_offset =============
[12:08:18] =================== drm_test_fb_memcpy ====================
[12:08:18] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:08:18] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:08:18] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:08:18] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:08:18] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:08:18] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:08:18] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:08:18] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:08:18] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:08:18] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:08:18] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:08:18] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:08:18] =============== [PASSED] drm_test_fb_memcpy ================
[12:08:18] ============= [PASSED] drm_format_helper_test ==============
[12:08:18] ================= drm_format (18 subtests) =================
[12:08:18] [PASSED] drm_test_format_block_width_invalid
[12:08:18] [PASSED] drm_test_format_block_width_one_plane
[12:08:18] [PASSED] drm_test_format_block_width_two_plane
[12:08:18] [PASSED] drm_test_format_block_width_three_plane
[12:08:18] [PASSED] drm_test_format_block_width_tiled
[12:08:18] [PASSED] drm_test_format_block_height_invalid
[12:08:18] [PASSED] drm_test_format_block_height_one_plane
[12:08:18] [PASSED] drm_test_format_block_height_two_plane
[12:08:18] [PASSED] drm_test_format_block_height_three_plane
[12:08:18] [PASSED] drm_test_format_block_height_tiled
[12:08:18] [PASSED] drm_test_format_min_pitch_invalid
[12:08:18] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:08:18] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:08:18] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:08:18] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:08:18] [PASSED] drm_test_format_min_pitch_two_plane
[12:08:18] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:08:18] [PASSED] drm_test_format_min_pitch_tiled
[12:08:18] =================== [PASSED] drm_format ====================
[12:08:18] ============== drm_framebuffer (10 subtests) ===============
[12:08:18] ========== drm_test_framebuffer_check_src_coords ==========
[12:08:18] [PASSED] Success: source fits into fb
[12:08:18] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:08:18] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:08:18] [PASSED] Fail: overflowing fb with source width
[12:08:18] [PASSED] Fail: overflowing fb with source height
[12:08:18] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:08:18] [PASSED] drm_test_framebuffer_cleanup
[12:08:18] =============== drm_test_framebuffer_create ===============
[12:08:18] [PASSED] ABGR8888 normal sizes
[12:08:18] [PASSED] ABGR8888 max sizes
[12:08:18] [PASSED] ABGR8888 pitch greater than min required
[12:08:18] [PASSED] ABGR8888 pitch less than min required
[12:08:18] [PASSED] ABGR8888 Invalid width
[12:08:18] [PASSED] ABGR8888 Invalid buffer handle
[12:08:18] [PASSED] No pixel format
[12:08:18] [PASSED] ABGR8888 Width 0
[12:08:18] [PASSED] ABGR8888 Height 0
[12:08:18] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:08:18] [PASSED] ABGR8888 Large buffer offset
[12:08:18] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:08:18] [PASSED] ABGR8888 Invalid flag
[12:08:18] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:08:18] [PASSED] ABGR8888 Valid buffer modifier
[12:08:18] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:08:18] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:08:18] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:08:18] [PASSED] NV12 Normal sizes
[12:08:18] [PASSED] NV12 Max sizes
[12:08:18] [PASSED] NV12 Invalid pitch
[12:08:18] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:08:18] [PASSED] NV12 different modifier per-plane
[12:08:18] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:08:18] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:08:18] [PASSED] NV12 Modifier for inexistent plane
[12:08:18] [PASSED] NV12 Handle for inexistent plane
[12:08:18] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:08:18] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:08:18] [PASSED] YVU420 Normal sizes
[12:08:18] [PASSED] YVU420 Max sizes
[12:08:18] [PASSED] YVU420 Invalid pitch
[12:08:18] [PASSED] YVU420 Different pitches
[12:08:18] [PASSED] YVU420 Different buffer offsets/pitches
[12:08:18] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:08:18] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:08:18] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:08:18] [PASSED] YVU420 Valid modifier
[12:08:18] [PASSED] YVU420 Different modifiers per plane
[12:08:18] [PASSED] YVU420 Modifier for inexistent plane
[12:08:18] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:08:18] [PASSED] X0L2 Normal sizes
[12:08:18] [PASSED] X0L2 Max sizes
[12:08:18] [PASSED] X0L2 Invalid pitch
[12:08:18] [PASSED] X0L2 Pitch greater than minimum required
[12:08:18] [PASSED] X0L2 Handle for inexistent plane
[12:08:18] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:08:18] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:08:18] [PASSED] X0L2 Valid modifier
[12:08:18] [PASSED] X0L2 Modifier for inexistent plane
[12:08:18] =========== [PASSED] drm_test_framebuffer_create ===========
[12:08:18] [PASSED] drm_test_framebuffer_free
[12:08:18] [PASSED] drm_test_framebuffer_init
[12:08:18] [PASSED] drm_test_framebuffer_init_bad_format
[12:08:18] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:08:18] [PASSED] drm_test_framebuffer_lookup
[12:08:18] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:08:18] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:08:18] ================= [PASSED] drm_framebuffer =================
[12:08:18] ================ drm_gem_shmem (8 subtests) ================
[12:08:18] [PASSED] drm_gem_shmem_test_obj_create
[12:08:18] [PASSED] drm_gem_shmem_test_obj_create_private
[12:08:18] [PASSED] drm_gem_shmem_test_pin_pages
[12:08:18] [PASSED] drm_gem_shmem_test_vmap
[12:08:18] [PASSED] drm_gem_shmem_test_get_sg_table
[12:08:18] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:08:18] [PASSED] drm_gem_shmem_test_madvise
[12:08:18] [PASSED] drm_gem_shmem_test_purge
[12:08:18] ================== [PASSED] drm_gem_shmem ==================
[12:08:18] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:08:18] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[12:08:18] [PASSED] Automatic
[12:08:18] [PASSED] Full
[12:08:18] [PASSED] Limited 16:235
[12:08:18] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:08:18] [PASSED] drm_test_check_disable_connector
[12:08:18] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:08:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:08:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:08:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:08:18] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:08:18] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:08:18] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:08:18] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:08:18] [PASSED] drm_test_check_output_bpc_dvi
[12:08:18] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:08:18] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:08:18] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:08:18] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:08:18] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:08:18] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:08:18] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:08:18] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:08:18] ============ drm_test_check_hdmi_color_format =============
[12:08:18] [PASSED] AUTO -> RGB
[12:08:18] [PASSED] YCBCR422 -> YUV422
[12:08:18] [PASSED] YCBCR420 -> YUV420
[12:08:18] [PASSED] YCBCR444 -> YUV444
[12:08:18] [PASSED] RGB -> RGB
[12:08:18] ======== [PASSED] drm_test_check_hdmi_color_format =========
[12:08:18] ======== drm_test_check_hdmi_color_format_420_only ========
[12:08:18] [PASSED] RGB should fail
[12:08:18] [PASSED] YUV444 should fail
[12:08:18] [PASSED] YUV422 should fail
[12:08:18] [PASSED] YUV420 should work
[12:08:18] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[12:08:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:08:18] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:08:18] [PASSED] drm_test_check_broadcast_rgb_value
[12:08:18] [PASSED] drm_test_check_bpc_8_value
[12:08:18] [PASSED] drm_test_check_bpc_10_value
[12:08:18] [PASSED] drm_test_check_bpc_12_value
[12:08:18] [PASSED] drm_test_check_format_value
[12:08:18] [PASSED] drm_test_check_tmds_char_value
[12:08:18] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:08:18] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[12:08:18] [PASSED] drm_test_check_mode_valid
[12:08:18] [PASSED] drm_test_check_mode_valid_reject
[12:08:18] [PASSED] drm_test_check_mode_valid_reject_rate
[12:08:18] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:08:18] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[12:08:18] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[12:08:18] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[12:08:18] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:08:18] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:08:18] [PASSED] drm_test_check_infoframes
[12:08:18] [PASSED] drm_test_check_reject_avi_infoframe
[12:08:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:08:18] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:08:18] [PASSED] drm_test_check_reject_audio_infoframe
[12:08:18] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:08:18] ================= drm_managed (2 subtests) =================
[12:08:18] [PASSED] drm_test_managed_release_action
[12:08:18] [PASSED] drm_test_managed_run_action
[12:08:18] =================== [PASSED] drm_managed ===================
[12:08:18] =================== drm_mm (6 subtests) ====================
[12:08:18] [PASSED] drm_test_mm_init
[12:08:18] [PASSED] drm_test_mm_debug
[12:08:18] [PASSED] drm_test_mm_align32
[12:08:18] [PASSED] drm_test_mm_align64
[12:08:18] [PASSED] drm_test_mm_lowest
[12:08:18] [PASSED] drm_test_mm_highest
[12:08:18] ===================== [PASSED] drm_mm ======================
[12:08:18] ============= drm_modes_analog_tv (5 subtests) =============
[12:08:18] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:08:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:08:18] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:08:18] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:08:18] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:08:18] =============== [PASSED] drm_modes_analog_tv ===============
[12:08:18] ============== drm_panic_helper (3 subtests) ===============
[12:08:18] ============= drm_test_panic_screen_user_map ==============
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:08:18] ========= [PASSED] drm_test_panic_screen_user_map ==========
[12:08:18] ============= drm_test_panic_screen_user_page =============
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:08:18] ========= [PASSED] drm_test_panic_screen_user_page =========
[12:08:18] ========== drm_test_panic_screen_user_set_pixel ===========
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:08:18] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[12:08:18] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[12:08:19] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[12:08:19] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[12:08:19] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[12:08:19] ================ [PASSED] drm_panic_helper =================
[12:08:19] ============== drm_plane_helper (2 subtests) ===============
[12:08:19] =============== drm_test_check_plane_state ================
[12:08:19] [PASSED] clipping_simple
[12:08:19] [PASSED] clipping_rotate_reflect
[12:08:19] [PASSED] positioning_simple
[12:08:19] [PASSED] upscaling
[12:08:19] [PASSED] downscaling
[12:08:19] [PASSED] rounding1
[12:08:19] [PASSED] rounding2
[12:08:19] [PASSED] rounding3
[12:08:19] [PASSED] rounding4
[12:08:19] =========== [PASSED] drm_test_check_plane_state ============
[12:08:19] =========== drm_test_check_invalid_plane_state ============
[12:08:19] [PASSED] positioning_invalid
[12:08:19] [PASSED] upscaling_invalid
[12:08:19] [PASSED] downscaling_invalid
[12:08:19] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:08:19] ================ [PASSED] drm_plane_helper =================
[12:08:19] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:08:19] ====== drm_test_connector_helper_tv_get_modes_check =======
[12:08:19] [PASSED] None
[12:08:19] [PASSED] PAL
[12:08:19] [PASSED] NTSC
[12:08:19] [PASSED] Both, NTSC Default
[12:08:19] [PASSED] Both, PAL Default
[12:08:19] [PASSED] Both, NTSC Default, with PAL on command-line
[12:08:19] [PASSED] Both, PAL Default, with NTSC on command-line
[12:08:19] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:08:19] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:08:19] ================== drm_rect (9 subtests) ===================
[12:08:19] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:08:19] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:08:19] [PASSED] drm_test_rect_clip_scaled_clipped
[12:08:19] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:08:19] ================= drm_test_rect_intersect =================
[12:08:19] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:08:19] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:08:19] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:08:19] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:08:19] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:08:19] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:08:19] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:08:19] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:08:19] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:08:19] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:08:19] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:08:19] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:08:19] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:08:19] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:08:19] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:08:19] ============= [PASSED] drm_test_rect_intersect =============
[12:08:19] ================ drm_test_rect_calc_hscale ================
[12:08:19] [PASSED] normal use
[12:08:19] [PASSED] out of max range
[12:08:19] [PASSED] out of min range
[12:08:19] [PASSED] zero dst
[12:08:19] [PASSED] negative src
[12:08:19] [PASSED] negative dst
[12:08:19] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:08:19] ================ drm_test_rect_calc_vscale ================
[12:08:19] [PASSED] normal use
[12:08:19] [PASSED] out of max range
[12:08:19] [PASSED] out of min range
[12:08:19] [PASSED] zero dst
[12:08:19] [PASSED] negative src
[12:08:19] [PASSED] negative dst
[12:08:19] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:08:19] ================== drm_test_rect_rotate ===================
[12:08:19] [PASSED] reflect-x
[12:08:19] [PASSED] reflect-y
[12:08:19] [PASSED] rotate-0
[12:08:19] [PASSED] rotate-90
[12:08:19] [PASSED] rotate-180
[12:08:19] [PASSED] rotate-270
[12:08:19] ============== [PASSED] drm_test_rect_rotate ===============
[12:08:19] ================ drm_test_rect_rotate_inv =================
[12:08:19] [PASSED] reflect-x
[12:08:19] [PASSED] reflect-y
[12:08:19] [PASSED] rotate-0
[12:08:19] [PASSED] rotate-90
[12:08:19] [PASSED] rotate-180
[12:08:19] [PASSED] rotate-270
[12:08:19] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:08:19] ==================== [PASSED] drm_rect =====================
[12:08:19] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:08:19] ============ drm_test_sysfb_build_fourcc_list =============
[12:08:19] [PASSED] no native formats
[12:08:19] [PASSED] XRGB8888 as native format
[12:08:19] [PASSED] remove duplicates
[12:08:19] [PASSED] convert alpha formats
[12:08:19] [PASSED] random formats
[12:08:19] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:08:19] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:08:19] ================== drm_fixp (2 subtests) ===================
[12:08:19] [PASSED] drm_test_int2fixp
[12:08:19] [PASSED] drm_test_sm2fixp
[12:08:19] ==================== [PASSED] drm_fixp =====================
[12:08:19] ============================================================
[12:08:19] Testing complete. Ran 671 tests: passed: 671
[12:08:19] Elapsed time: 26.869s total, 1.830s configuring, 24.620s building, 0.414s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:08:19] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:08:20] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:08:31] Starting KUnit Kernel (1/1)...
[12:08:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:08:31] ============= refcount_interrupt (4 subtests) ==============
[12:08:31] [PASSED] test_single_irq_change
[12:08:31] [PASSED] test_nested_irq_change
[12:08:31] [PASSED] test_multiple_irq_change
[12:08:31] [PASSED] test_irq_save
[12:08:31] =============== [PASSED] refcount_interrupt ================
[12:08:31] ================= ttm_device (5 subtests) ==================
[12:08:31] [PASSED] ttm_device_init_basic
[12:08:31] [PASSED] ttm_device_init_multiple
[12:08:31] [PASSED] ttm_device_fini_basic
[12:08:31] [PASSED] ttm_device_init_no_vma_man
[12:08:31] ================== ttm_device_init_pools ==================
[12:08:31] [PASSED] No DMA allocations, no DMA32 required
[12:08:31] [PASSED] DMA allocations, DMA32 required
[12:08:31] [PASSED] No DMA allocations, DMA32 required
[12:08:31] [PASSED] DMA allocations, no DMA32 required
[12:08:31] ============== [PASSED] ttm_device_init_pools ==============
[12:08:31] =================== [PASSED] ttm_device ====================
[12:08:31] ================== ttm_pool (8 subtests) ===================
[12:08:31] ================== ttm_pool_alloc_basic ===================
[12:08:31] [PASSED] One page
[12:08:31] [PASSED] More than one page
[12:08:31] [PASSED] Above the allocation limit
[12:08:31] [PASSED] One page, with coherent DMA mappings enabled
[12:08:31] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:08:31] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:08:31] ============== ttm_pool_alloc_basic_dma_addr ==============
[12:08:31] [PASSED] One page
[12:08:31] [PASSED] More than one page
[12:08:31] [PASSED] Above the allocation limit
[12:08:31] [PASSED] One page, with coherent DMA mappings enabled
[12:08:31] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:08:31] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:08:31] [PASSED] ttm_pool_alloc_order_caching_match
[12:08:31] [PASSED] ttm_pool_alloc_caching_mismatch
[12:08:31] [PASSED] ttm_pool_alloc_order_mismatch
[12:08:31] [PASSED] ttm_pool_free_dma_alloc
[12:08:31] [PASSED] ttm_pool_free_no_dma_alloc
[12:08:31] [PASSED] ttm_pool_fini_basic
[12:08:31] ==================== [PASSED] ttm_pool =====================
[12:08:31] ================ ttm_resource (8 subtests) =================
[12:08:31] ================= ttm_resource_init_basic =================
[12:08:31] [PASSED] Init resource in TTM_PL_SYSTEM
[12:08:31] [PASSED] Init resource in TTM_PL_VRAM
[12:08:31] [PASSED] Init resource in a private placement
[12:08:31] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:08:31] ============= [PASSED] ttm_resource_init_basic =============
[12:08:31] [PASSED] ttm_resource_init_pinned
[12:08:31] [PASSED] ttm_resource_fini_basic
[12:08:31] [PASSED] ttm_resource_manager_init_basic
[12:08:31] [PASSED] ttm_resource_manager_usage_basic
[12:08:31] [PASSED] ttm_resource_manager_set_used_basic
[12:08:31] [PASSED] ttm_sys_man_alloc_basic
[12:08:31] [PASSED] ttm_sys_man_free_basic
[12:08:31] ================== [PASSED] ttm_resource ===================
[12:08:31] =================== ttm_tt (15 subtests) ===================
[12:08:31] ==================== ttm_tt_init_basic ====================
[12:08:31] [PASSED] Page-aligned size
[12:08:31] [PASSED] Extra pages requested
[12:08:31] ================ [PASSED] ttm_tt_init_basic ================
[12:08:31] [PASSED] ttm_tt_init_misaligned
[12:08:31] [PASSED] ttm_tt_fini_basic
[12:08:31] [PASSED] ttm_tt_fini_sg
[12:08:31] [PASSED] ttm_tt_fini_shmem
[12:08:31] [PASSED] ttm_tt_create_basic
[12:08:31] [PASSED] ttm_tt_create_invalid_bo_type
[12:08:31] [PASSED] ttm_tt_create_ttm_exists
[12:08:31] [PASSED] ttm_tt_create_failed
[12:08:31] [PASSED] ttm_tt_destroy_basic
[12:08:31] [PASSED] ttm_tt_populate_null_ttm
[12:08:31] [PASSED] ttm_tt_populate_populated_ttm
[12:08:31] [PASSED] ttm_tt_unpopulate_basic
[12:08:31] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:08:31] [PASSED] ttm_tt_swapin_basic
[12:08:31] ===================== [PASSED] ttm_tt ======================
[12:08:31] =================== ttm_bo (14 subtests) ===================
[12:08:31] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[12:08:31] [PASSED] Cannot be interrupted and sleeps
[12:08:31] [PASSED] Cannot be interrupted, locks straight away
[12:08:31] [PASSED] Can be interrupted, sleeps
[12:08:31] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:08:31] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:08:31] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:08:31] [PASSED] ttm_bo_reserve_double_resv
[12:08:31] [PASSED] ttm_bo_reserve_interrupted
[12:08:31] [PASSED] ttm_bo_reserve_deadlock
[12:08:31] [PASSED] ttm_bo_unreserve_basic
[12:08:31] [PASSED] ttm_bo_unreserve_pinned
[12:08:31] [PASSED] ttm_bo_unreserve_bulk
[12:08:31] [PASSED] ttm_bo_fini_basic
[12:08:31] [PASSED] ttm_bo_fini_shared_resv
[12:08:31] [PASSED] ttm_bo_pin_basic
[12:08:31] [PASSED] ttm_bo_pin_unpin_resource
[12:08:31] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:08:31] ===================== [PASSED] ttm_bo ======================
[12:08:31] ============== ttm_bo_validate (22 subtests) ===============
[12:08:31] ============== ttm_bo_init_reserved_sys_man ===============
[12:08:31] [PASSED] Buffer object for userspace
[12:08:31] [PASSED] Kernel buffer object
[12:08:31] [PASSED] Shared buffer object
[12:08:31] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:08:31] ============== ttm_bo_init_reserved_mock_man ==============
[12:08:31] [PASSED] Buffer object for userspace
[12:08:31] [PASSED] Kernel buffer object
[12:08:31] [PASSED] Shared buffer object
[12:08:31] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:08:31] [PASSED] ttm_bo_init_reserved_resv
[12:08:31] ================== ttm_bo_validate_basic ==================
[12:08:31] [PASSED] Buffer object for userspace
[12:08:31] [PASSED] Kernel buffer object
[12:08:31] [PASSED] Shared buffer object
[12:08:31] ============== [PASSED] ttm_bo_validate_basic ==============
[12:08:31] [PASSED] ttm_bo_validate_invalid_placement
[12:08:31] ============= ttm_bo_validate_same_placement ==============
[12:08:31] [PASSED] System manager
[12:08:31] [PASSED] VRAM manager
[12:08:31] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:08:31] [PASSED] ttm_bo_validate_failed_alloc
[12:08:31] [PASSED] ttm_bo_validate_pinned
[12:08:31] [PASSED] ttm_bo_validate_busy_placement
[12:08:31] ================ ttm_bo_validate_multihop =================
[12:08:31] [PASSED] Buffer object for userspace
[12:08:31] [PASSED] Kernel buffer object
[12:08:31] [PASSED] Shared buffer object
[12:08:31] ============ [PASSED] ttm_bo_validate_multihop =============
[12:08:31] ========== ttm_bo_validate_no_placement_signaled ==========
[12:08:31] [PASSED] Buffer object in system domain, no page vector
[12:08:31] [PASSED] Buffer object in system domain with an existing page vector
[12:08:31] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:08:31] ======== ttm_bo_validate_no_placement_not_signaled ========
[12:08:31] [PASSED] Buffer object for userspace
[12:08:31] [PASSED] Kernel buffer object
[12:08:31] [PASSED] Shared buffer object
[12:08:31] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:08:31] [PASSED] ttm_bo_validate_move_fence_signaled
[12:08:31] ========= ttm_bo_validate_move_fence_not_signaled =========
[12:08:31] [PASSED] Waits for GPU
[12:08:31] [PASSED] Tries to lock straight away
[12:08:31] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:08:31] [PASSED] ttm_bo_validate_swapout
[12:08:31] [PASSED] ttm_bo_validate_happy_evict
[12:08:31] [PASSED] ttm_bo_validate_all_pinned_evict
[12:08:31] [PASSED] ttm_bo_validate_allowed_only_evict
[12:08:31] [PASSED] ttm_bo_validate_deleted_evict
[12:08:31] [PASSED] ttm_bo_validate_busy_domain_evict
[12:08:31] [PASSED] ttm_bo_validate_evict_gutting
[12:08:31] [PASSED] ttm_bo_validate_recrusive_evict
[12:08:31] ================= [PASSED] ttm_bo_validate =================
[12:08:31] ============================================================
[12:08:31] Testing complete. Ran 106 tests: passed: 106
[12:08:31] Elapsed time: 12.092s total, 1.797s configuring, 10.081s building, 0.175s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[12:08:31] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:08:33] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:08:41] Starting KUnit Kernel (1/1)...
[12:08:41] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:08:41] ============= refcount_interrupt (4 subtests) ==============
[12:08:41] [PASSED] test_single_irq_change
[12:08:41] [PASSED] test_nested_irq_change
[12:08:41] [PASSED] test_multiple_irq_change
[12:08:41] [PASSED] test_irq_save
[12:08:41] =============== [PASSED] refcount_interrupt ================
[12:08:41] =============== dma-buf-fence (12 subtests) ================
[12:08:41] [PASSED] test_sanitycheck
[12:08:41] [PASSED] test_signaling
[12:08:41] [PASSED] test_add_callback
[12:08:41] [PASSED] test_late_add_callback
[12:08:41] [PASSED] test_rm_callback
[12:08:41] [PASSED] test_late_rm_callback
[12:08:41] [PASSED] test_status
[12:08:41] [PASSED] test_error
[12:08:41] [PASSED] test_wait
[12:08:41] [PASSED] test_wait_timeout
[12:08:41] [PASSED] test_stub
[12:08:41] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[12:08:41] ================== [PASSED] dma-buf-fence ==================
[12:08:41] ============ dma-buf-fence-chain (11 subtests) =============
[12:08:41] [PASSED] test_sanitycheck
[12:08:41] [PASSED] test_find_seqno
[12:08:41] [PASSED] test_find_signaled
[12:08:41] [PASSED] test_find_out_of_order
[12:08:47] [PASSED] test_find_gap
[12:08:47] [PASSED] test_find_race
[12:08:47] [PASSED] test_signal_forward
[12:08:47] [PASSED] test_signal_backward
[12:08:47] [PASSED] test_wait_forward
[12:08:47] [PASSED] test_wait_backward
[12:08:47] [PASSED] test_wait_random
[12:08:47] =============== [PASSED] dma-buf-fence-chain ===============
[12:08:47] ============ dma-buf-fence-unwrap (10 subtests) ============
[12:08:47] [PASSED] test_sanitycheck
[12:08:47] [PASSED] test_unwrap_array
[12:08:47] [PASSED] test_unwrap_chain
[12:08:47] [PASSED] test_unwrap_chain_array
[12:08:47] [PASSED] test_unwrap_merge
[12:08:47] [PASSED] test_unwrap_merge_duplicate
[12:08:47] [PASSED] test_unwrap_merge_seqno
[12:08:47] [PASSED] test_unwrap_merge_order
[12:08:47] [PASSED] test_unwrap_merge_complex
[12:08:47] [PASSED] test_unwrap_merge_complex_seqno
[12:08:47] ============== [PASSED] dma-buf-fence-unwrap ===============
[12:08:47] ================ dma-buf-resv (5 subtests) =================
[12:08:47] [PASSED] test_sanitycheck
[12:08:47] ===================== test_signaling ======================
[12:08:47] [PASSED] kernel
[12:08:47] [PASSED] write
[12:08:47] [PASSED] read
[12:08:47] [PASSED] bookkeep
[12:08:47] ================= [PASSED] test_signaling ==================
[12:08:47] ====================== test_for_each ======================
[12:08:47] [PASSED] kernel
[12:08:47] [PASSED] write
[12:08:47] [PASSED] read
[12:08:47] [PASSED] bookkeep
[12:08:47] ================== [PASSED] test_for_each ==================
[12:08:47] ================= test_for_each_unlocked ==================
[12:08:47] [PASSED] kernel
[12:08:47] [PASSED] write
[12:08:47] [PASSED] read
[12:08:47] [PASSED] bookkeep
[12:08:47] ============= [PASSED] test_for_each_unlocked ==============
[12:08:47] ===================== test_get_fences =====================
[12:08:47] [PASSED] kernel
[12:08:47] [PASSED] write
[12:08:47] [PASSED] read
[12:08:47] [PASSED] bookkeep
[12:08:47] ================= [PASSED] test_get_fences =================
[12:08:47] ================== [PASSED] dma-buf-resv ===================
[12:08:47] ============================================================
[12:08:47] Testing complete. Ran 54 tests: passed: 53, skipped: 1
[12:08:47] Elapsed time: 15.813s total, 1.782s configuring, 8.707s building, 5.273s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✓ Xe.CI.BAT: success for drm/i915/display: Allow forcing the joiner on eDP
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
` (5 preceding siblings ...)
2026-09-23 12:08 ` ✓ CI.KUnit: success for " Patchwork
@ 2026-09-23 12:59 ` Patchwork
2026-09-24 2:10 ` ✗ Xe.CI.FULL: failure " Patchwork
7 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-09-23 12:59 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4153 bytes --]
== Series Details ==
Series: drm/i915/display: Allow forcing the joiner on eDP
URL : https://patchwork.freedesktop.org/series/174792/
State : success
== Summary ==
CI Bug Log - changes from xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4_BAT -> xe-pw-174792v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (15 -> 14)
------------------------------
Missing (1): bat-nvls-1
Known issues
------------
Here are the changes found in xe-pw-174792v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_exec_fault_mode@twice-invalid-userptr-fault:
- bat-bmg-2: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#9331])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/bat-bmg-2/igt@xe_exec_fault_mode@twice-invalid-userptr-fault.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/bat-bmg-2/igt@xe_exec_fault_mode@twice-invalid-userptr-fault.html
* igt@xe_exec_system_allocator@many-execqueues-malloc:
- bat-bmg-vm: [PASS][3] -> [DMESG-WARN][4] ([Intel XE#9331]) +1 other test dmesg-warn
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-malloc.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-malloc.html
* igt@xe_exec_system_allocator@twice-free:
- bat-bmg-1: [PASS][5] -> [DMESG-WARN][6] ([Intel XE#9331]) +1 other test dmesg-warn
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/bat-bmg-1/igt@xe_exec_system_allocator@twice-free.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/bat-bmg-1/igt@xe_exec_system_allocator@twice-free.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- bat-bmg-2: [ABORT][7] ([Intel XE#8007]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/bat-bmg-2/igt@core_hotunplug@unbind-rebind.html
* igt@xe_exec_system_allocator@many-execqueues-free:
- bat-bmg-vm: [DMESG-WARN][9] ([Intel XE#9331]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-free.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/bat-bmg-vm/igt@xe_exec_system_allocator@many-execqueues-free.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-malloc:
- bat-bmg-1: [DMESG-WARN][11] ([Intel XE#9331]) -> [PASS][12] +1 other test pass
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/bat-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-malloc.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/bat-bmg-1/igt@xe_exec_system_allocator@threads-shared-vm-many-malloc.html
* igt@xe_waitfence@reltime:
- bat-ptl-2: [FAIL][13] ([Intel XE#9115]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/bat-ptl-2/igt@xe_waitfence@reltime.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/bat-ptl-2/igt@xe_waitfence@reltime.html
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#9115]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9115
[Intel XE#9331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9331
Build changes
-------------
* Linux: xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4 -> xe-pw-174792v1
IGT_9110: 9110
xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4: 890d1157247d8ad65d9a2d44c065accd550b61f4
xe-pw-174792v1: 174792v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/index.html
[-- Attachment #2: Type: text/html, Size: 5177 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* ✗ Xe.CI.FULL: failure for drm/i915/display: Allow forcing the joiner on eDP
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
` (6 preceding siblings ...)
2026-09-23 12:59 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-09-24 2:10 ` Patchwork
7 siblings, 0 replies; 18+ messages in thread
From: Patchwork @ 2026-09-24 2:10 UTC (permalink / raw)
To: Mika Kahola; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 87635 bytes --]
== Series Details ==
Series: drm/i915/display: Allow forcing the joiner on eDP
URL : https://patchwork.freedesktop.org/series/174792/
State : failure
== Summary ==
CI Bug Log - changes from xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4_FULL -> xe-pw-174792v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-174792v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-174792v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-174792v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@kms_frontbuffer_tracking@fbchdr-suspend:
- shard-bmg: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-7/igt@kms_frontbuffer_tracking@fbchdr-suspend.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbchdr-suspend.html
* igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01:
- shard-bmg: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-3/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01.html
* igt@xe_pm_residency@gt-c6-freeze:
- shard-ptl: [PASS][5] -> [DMESG-WARN][6] +1 other test dmesg-warn
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-8/igt@xe_pm_residency@gt-c6-freeze.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@xe_pm_residency@gt-c6-freeze.html
Known issues
------------
Here are the changes found in xe-pw-174792v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_big_fb@4-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][7] ([Intel XE#2327]) +2 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#1407]) +4 other tests skip
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0:
- shard-bmg: [PASS][9] -> [INCOMPLETE][10] ([Intel XE#6819] / [Intel XE#9351])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-10/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-3/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip:
- shard-ptl: NOTRUN -> [SKIP][11] ([Intel XE#7085])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_big_fb@linear-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-lnl: [PASS][12] -> [FAIL][13] ([Intel XE#1231])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-lnl-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0:
- shard-lnl: NOTRUN -> [SKIP][14] ([Intel XE#1124]) +5 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-ptl: NOTRUN -> [SKIP][15] ([Intel XE#5808]) +5 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-bmg: NOTRUN -> [SKIP][16] ([Intel XE#1124]) +7 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p:
- shard-lnl: NOTRUN -> [SKIP][17] ([Intel XE#7679])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_bw@connected-linear-tiling-2-displays-target-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p:
- shard-lnl: NOTRUN -> [SKIP][18] ([Intel XE#8365])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_bw@connected-linear-tiling-4-displays-target-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-3840x2160p:
- shard-bmg: NOTRUN -> [SKIP][19] ([Intel XE#7679])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_bw@connected-linear-tiling-4-displays-target-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-target-2560x1440p:
- shard-bmg: NOTRUN -> [SKIP][20] ([Intel XE#367])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_bw@linear-tiling-3-displays-target-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][21] ([Intel XE#2669] / [Intel XE#7389]) +7 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][22] ([Intel XE#2669] / [Intel XE#3433] / [Intel XE#7389]) +3 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-1/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs@pipe-a-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
- shard-ptl: NOTRUN -> [SKIP][23] ([Intel XE#5822]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-edp-1:
- shard-ptl: [PASS][24] -> [ABORT][25] ([Intel XE#9367] / [Intel XE#9375])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-edp-1.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-edp-1.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][26] ([Intel XE#3432])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][27] ([Intel XE#2652]) +8 other tests skip
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc:
- shard-bmg: NOTRUN -> [SKIP][28] ([Intel XE#2887]) +8 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_ccs@crc-sprite-planes-basic-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#2887]) +8 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_cdclk@mode-transition:
- shard-ptl: NOTRUN -> [SKIP][30] ([Intel XE#9205]) +4 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_cdclk@mode-transition.html
* igt@kms_chamelium_audio@hdmi-audio-after-suspend:
- shard-lnl: NOTRUN -> [SKIP][31] ([Intel XE#2252])
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_chamelium_audio@hdmi-audio-after-suspend.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-ptl: NOTRUN -> [SKIP][32] ([Intel XE#5824])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-bmg: NOTRUN -> [SKIP][33] ([Intel XE#2325] / [Intel XE#7358])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#306] / [Intel XE#7358]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020:
- shard-ptl: NOTRUN -> [SKIP][35] ([Intel XE#8391])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020.html
* igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lut1d:
- shard-bmg: NOTRUN -> [SKIP][36] ([Intel XE#7358]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_chamelium_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lut1d.html
* igt@kms_chamelium_color_pipeline@plane-lut3d-green-only:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#7358])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_chamelium_color_pipeline@plane-lut3d-green-only.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-ptl: NOTRUN -> [SKIP][38] ([Intel XE#2252]) +2 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_chamelium_hpd@dp-hpd-after-suspend:
- shard-bmg: NOTRUN -> [SKIP][39] ([Intel XE#2252]) +2 other tests skip
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
* igt@kms_chamelium_hpd@hdmi-hpd-storm-disable:
- shard-lnl: NOTRUN -> [SKIP][40] ([Intel XE#373]) +3 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_chamelium_hpd@hdmi-hpd-storm-disable.html
* igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-3:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#6969]) +5 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_color_pipeline@plane-ctm3x4-lut1d@pipe-a-plane-3.html
* igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020-lim@pipe-a-plane-1:
- shard-lnl: NOTRUN -> [FAIL][42] ([Intel XE#9333]) +19 other tests fail
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt2020-lim@pipe-a-plane-1.html
* igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim@pipe-c-plane-1:
- shard-ptl: NOTRUN -> [FAIL][43] ([Intel XE#9333]) +25 other tests fail
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601-lim@pipe-c-plane-1.html
* igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601@pipe-d-plane-1:
- shard-bmg: NOTRUN -> [FAIL][44] ([Intel XE#9333]) +12 other tests fail
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_color_pipeline@plane-fixed-matrix-yuv-rgb-bt601@pipe-d-plane-1.html
* igt@kms_content_protection@atomic-hdcp14:
- shard-ptl: NOTRUN -> [SKIP][45] ([Intel XE#7642])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_content_protection@atomic-hdcp14.html
* igt@kms_content_protection@content-type-change:
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#7642]) +1 other test skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_content_protection@content-type-change.html
* igt@kms_content_protection@dp-mst-type-0-hdcp14:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#6974])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_content_protection@dp-mst-type-0-hdcp14.html
* igt@kms_content_protection@legacy-hdcp14@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][48] ([Intel XE#1178] / [Intel XE#3304] / [Intel XE#7374]) +3 other tests fail
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_content_protection@legacy-hdcp14@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-ptl: NOTRUN -> [SKIP][49] ([Intel XE#5900]) +1 other test skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_cursor_crc@cursor-onscreen-128x42.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-lnl: NOTRUN -> [SKIP][50] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-1/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-lnl: NOTRUN -> [SKIP][51] ([Intel XE#1424]) +3 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-bmg: NOTRUN -> [SKIP][52] ([Intel XE#2320])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#2321] / [Intel XE#7355]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1:
- shard-ptl: NOTRUN -> [ABORT][54] ([Intel XE#9362]) +2 other tests abort
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-2/igt@kms_cursor_crc@cursor-suspend@pipe-a-edp-1.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-ptl: NOTRUN -> [SKIP][55] ([Intel XE#5962])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#309] / [Intel XE#7343]) +2 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-ptl: NOTRUN -> [SKIP][57] ([Intel XE#6035])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_display_modes@extended-mode-basic:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#4302])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-bmg: NOTRUN -> [SKIP][59] ([Intel XE#4354] / [Intel XE#5882])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-ptl: NOTRUN -> [SKIP][60] ([Intel XE#7386])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-ptl: NOTRUN -> [SKIP][61] ([Intel XE#5870])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-bmg: NOTRUN -> [SKIP][62] ([Intel XE#4331] / [Intel XE#7227])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-lnl: NOTRUN -> [SKIP][63] ([Intel XE#8265]) +1 other test skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-bpc-formats-bigjoiner:
- shard-bmg: NOTRUN -> [SKIP][64] ([Intel XE#8265]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_dsc@dsc-with-bpc-formats-bigjoiner.html
* igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner:
- shard-ptl: NOTRUN -> [SKIP][65] ([Intel XE#5907]) +2 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_dsc@dsc-with-output-formats-with-bpc-ultrajoiner.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#4156] / [Intel XE#7425])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_feature_discovery@display-2x:
- shard-lnl: NOTRUN -> [SKIP][67] ([Intel XE#702] / [Intel XE#7344])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@psr2:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2374] / [Intel XE#6128])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-absolute-wf_vblank-interruptible:
- shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#1421]) +5 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_flip@2x-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset:
- shard-ptl: NOTRUN -> [SKIP][70] ([Intel XE#2316]) +3 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [PASS][71] -> [FAIL][72] ([Intel XE#301]) +1 other test fail
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-suspend:
- shard-bmg: [PASS][73] -> [ABORT][74] ([Intel XE#9362]) +1 other test abort
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-2/igt@kms_flip@flip-vs-suspend.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x:
- shard-ptl: NOTRUN -> [SKIP][75] ([Intel XE#7179])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_flip_scaled_crc@flip-32bpp-yuv-linear-to-32bpp-yuv-linear-reflect-x.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
- shard-ptl: NOTRUN -> [SKIP][76] ([Intel XE#7178]) +2 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][77] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144]) +1 other test skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#1397] / [Intel XE#7385] / [Intel XE#9144]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][79] ([Intel XE#7178] / [Intel XE#7351]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
- shard-lnl: NOTRUN -> [SKIP][80] ([Intel XE#7178] / [Intel XE#7351])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x:
- shard-bmg: NOTRUN -> [SKIP][81] ([Intel XE#7179])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_flip_scaled_crc@flip-nv12-linear-to-nv12-linear-reflect-x.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#2311]) +28 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][83] ([Intel XE#7061] / [Intel XE#7356]) +4 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_frontbuffer_tracking@drrs-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#6312] / [Intel XE#651]) +10 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][85] ([Intel XE#4141]) +10 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbc-1p-offscreen-pri-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-ptl: NOTRUN -> [SKIP][86] ([Intel XE#6312]) +8 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-2/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-indfb-draw-blt:
- shard-ptl: NOTRUN -> [SKIP][87] ([Intel XE#5800] / [Intel XE#6312]) +3 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][88] ([Intel XE#656] / [Intel XE#7905]) +17 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt:
- shard-ptl: NOTRUN -> [SKIP][89] ([Intel XE#5812]) +27 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-lnl: NOTRUN -> [SKIP][90] ([Intel XE#1469] / [Intel XE#7399])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc:
- shard-ptl: NOTRUN -> [SKIP][91] ([Intel XE#7061]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_frontbuffer_tracking@fbcdrrshdr-abgr161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-modesetfrombusy:
- shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#6312]) +7 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrshdr-modesetfrombusy.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][93] ([Intel XE#7905]) +29 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbchdr-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][94] ([Intel XE#7061]) +3 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_frontbuffer_tracking@fbchdr-argb161616f-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][95] ([Intel XE#7865]) +14 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcpsrhdr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-slowdraw:
- shard-ptl: NOTRUN -> [SKIP][96] ([Intel XE#7865]) +8 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-2/igt@kms_frontbuffer_tracking@fbcpsrhdr-slowdraw.html
* igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#7061]) +2 other tests skip
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_frontbuffer_tracking@hdr-argb161616f-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#7061] / [Intel XE#7356]) +5 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_frontbuffer_tracking@psr-argb161616f-draw-blt.html
* igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#2313]) +36 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_frontbuffer_tracking@psrhdr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_hdmi_audio_bw@suspend-mem-audio-recovery:
- shard-ptl: NOTRUN -> [SKIP][100] ([Intel XE#9312])
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_hdmi_audio_bw@suspend-mem-audio-recovery.html
* igt@kms_hdr@static-swap:
- shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#1503])
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_hdr@static-swap.html
* igt@kms_joiner@basic-big-joiner:
- shard-ptl: NOTRUN -> [SKIP][102] ([Intel XE#6901])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-bmg: NOTRUN -> [SKIP][103] ([Intel XE#6911] / [Intel XE#7378])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-bmg: NOTRUN -> [SKIP][104] ([Intel XE#4090] / [Intel XE#7443])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-lnl: NOTRUN -> [SKIP][105] ([Intel XE#7173] / [Intel XE#7294])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#8348])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_panel_fitting@atomic-fastset:
- shard-bmg: NOTRUN -> [SKIP][107] ([Intel XE#2486])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_panel_fitting@atomic-fastset.html
* igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping:
- shard-ptl: [PASS][108] -> [FAIL][109] ([Intel XE#9340]) +1 other test fail
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-3/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-1/igt@kms_plane@pixel-format-4-tiled-lnl-ccs-modifier-source-clamping.html
* igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier:
- shard-ptl: NOTRUN -> [SKIP][110] ([Intel XE#7283]) +1 other test skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_plane@pixel-format-4-tiled-mtl-rc-ccs-cc-modifier.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-lnl: NOTRUN -> [SKIP][111] ([Intel XE#7283]) +1 other test skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping:
- shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#7283]) +2 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_plane@pixel-format-y-tiled-gen12-mc-ccs-modifier-source-clamping.html
* igt@kms_plane_lowres@tiling-x@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][113] ([Intel XE#599] / [Intel XE#7382]) +3 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-1/igt@kms_plane_lowres@tiling-x@pipe-b-edp-1.html
* igt@kms_plane_lowres@tiling-y:
- shard-ptl: NOTRUN -> [SKIP][114] ([Intel XE#5946])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_plane_lowres@tiling-y.html
* igt@kms_plane_lowres@tiling-yf:
- shard-lnl: NOTRUN -> [SKIP][115] ([Intel XE#599])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-lnl: NOTRUN -> [SKIP][116] ([Intel XE#4596] / [Intel XE#5854])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#2763] / [Intel XE#6886]) +4 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a:
- shard-lnl: NOTRUN -> [SKIP][118] ([Intel XE#2763] / [Intel XE#6886]) +3 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-bmg: NOTRUN -> [SKIP][119] ([Intel XE#7376] / [Intel XE#7760] / [Intel XE#870]) +2 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_pm_dc@dc3co-framedrop-check:
- shard-ptl: NOTRUN -> [SKIP][120] ([Intel XE#8395] / [Intel XE#8396]) +1 other test skip
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_pm_dc@dc3co-framedrop-check.html
* igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888:
- shard-ptl: NOTRUN -> [SKIP][121] ([Intel XE#8396]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_pm_dc@dc3co-framedrop-check@psr2-xrgb8888.html
* igt@kms_pm_dc@dc5-psr:
- shard-bmg: NOTRUN -> [SKIP][122] ([Intel XE#7794])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-lnl: NOTRUN -> [SKIP][123] ([Intel XE#3309] / [Intel XE#7368])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-bmg: NOTRUN -> [SKIP][124] ([Intel XE#2499])
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: NOTRUN -> [SKIP][125] ([Intel XE#1439] / [Intel XE#3141] / [Intel XE#7383] / [Intel XE#836]) +1 other test skip
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
- shard-ptl: NOTRUN -> [SKIP][126] ([Intel XE#7304])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-2/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1:
- shard-ptl: NOTRUN -> [SKIP][127] ([Intel XE#5858])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1:
- shard-ptl: NOTRUN -> [SKIP][128] ([Intel XE#5858] / [Intel XE#7304]) +1 other test skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf:
- shard-lnl: NOTRUN -> [SKIP][129] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][130] ([Intel XE#4608])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][131] ([Intel XE#4608] / [Intel XE#7304])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf:
- shard-lnl: NOTRUN -> [SKIP][132] ([Intel XE#2893] / [Intel XE#7304]) +2 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-bmg: NOTRUN -> [SKIP][133] ([Intel XE#1489]) +5 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr2-sprite-plane-move:
- shard-ptl: NOTRUN -> [SKIP][134] ([Intel XE#1406] / [Intel XE#5835]) +5 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@kms_psr@fbc-psr2-sprite-plane-move.html
* igt@kms_psr@pr-primary-blt:
- shard-lnl: NOTRUN -> [SKIP][135] ([Intel XE#1406]) +3 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-1/igt@kms_psr@pr-primary-blt.html
* igt@kms_psr@psr-basic:
- shard-bmg: NOTRUN -> [SKIP][136] ([Intel XE#2234] / [Intel XE#2850]) +6 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_psr@psr-basic.html
* igt@kms_rotation_crc@primary-x-tiled-reflect-x-180:
- shard-ptl: NOTRUN -> [SKIP][137] ([Intel XE#5813])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_rotation_crc@primary-x-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#2330] / [Intel XE#5813])
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: NOTRUN -> [SKIP][139] ([Intel XE#3904] / [Intel XE#7342])
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-ptl: NOTRUN -> [SKIP][140] ([Intel XE#5821])
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- shard-bmg: NOTRUN -> [SKIP][141] ([Intel XE#2413])
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-bmg: NOTRUN -> [SKIP][142] ([Intel XE#1435] / [Intel XE#8695])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_sharpness_filter@invalid-plane-with-filter:
- shard-bmg: NOTRUN -> [SKIP][143] ([Intel XE#6503])
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@kms_sharpness_filter@invalid-plane-with-filter.html
* igt@kms_tv_load_detect@load-detect:
- shard-lnl: NOTRUN -> [SKIP][144] ([Intel XE#330] / [Intel XE#5857])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@cmrr-video-mode@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][145] ([Intel XE#9271]) +1 other test skip
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@kms_vrr@cmrr-video-mode@pipe-a-edp-1.html
* igt@kms_vrr@flip-basic-fastset:
- shard-bmg: NOTRUN -> [SKIP][146] ([Intel XE#1499] / [Intel XE#9271])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@lobf:
- shard-bmg: NOTRUN -> [SKIP][147] ([Intel XE#2168] / [Intel XE#7444])
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_vrr@lobf.html
* igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all:
- shard-bmg: NOTRUN -> [ABORT][148] ([Intel XE#8868])
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html
- shard-lnl: NOTRUN -> [SKIP][149] ([Intel XE#8866])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@sriov_basic@pf-unbind-with-vfs-enabled-numvfs-all.html
* igt@xe_ccs@suspend-resume:
- shard-bmg: [PASS][150] -> [INCOMPLETE][151] ([Intel XE#8602])
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-3/igt@xe_ccs@suspend-resume.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_ccs@suspend-resume.html
* igt@xe_ccs@vm-bind-fault-mode-decompress:
- shard-ptl: NOTRUN -> [SKIP][152] ([Intel XE#7644])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_ccs@vm-bind-fault-mode-decompress.html
* igt@xe_create@create-big-vram:
- shard-lnl: NOTRUN -> [SKIP][153] ([Intel XE#1062] / [Intel XE#7318] / [Intel XE#7457])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_create@create-big-vram.html
* igt@xe_evict@evict-beng-mixed-many-threads-large:
- shard-lnl: NOTRUN -> [SKIP][154] ([Intel XE#6540] / [Intel XE#688]) +4 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_evict@evict-beng-mixed-many-threads-large.html
* igt@xe_evict@evict-mixed-threads-small-multi-vm:
- shard-ptl: NOTRUN -> [SKIP][155] ([Intel XE#5764]) +1 other test skip
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_evict@evict-mixed-threads-small-multi-vm.html
* igt@xe_evict@evict-small-external-multi-queue-cm:
- shard-bmg: NOTRUN -> [SKIP][156] ([Intel XE#8370]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@xe_evict@evict-small-external-multi-queue-cm.html
* igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr-invalidate-race:
- shard-ptl: NOTRUN -> [SKIP][157] ([Intel XE#7482]) +2 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr-invalidate-race.html
* igt@xe_exec_balancer@many-parallel-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][158] ([Intel XE#7482]) +11 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_exec_balancer@many-parallel-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind:
- shard-bmg: NOTRUN -> [SKIP][159] ([Intel XE#2322] / [Intel XE#7372]) +4 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-rebind.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue:
- shard-ptl: NOTRUN -> [SKIP][160] ([Intel XE#5575] / [Intel XE#7484]) +3 other tests skip
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@xe_exec_basic@multigpu-once-bindexecqueue.html
* igt@xe_exec_basic@multigpu-once-rebind:
- shard-lnl: NOTRUN -> [SKIP][161] ([Intel XE#1392]) +4 other tests skip
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_exec_basic@multigpu-once-rebind.html
* igt@xe_exec_fault_mode@many-bindexecqueue-userptr-imm:
- shard-bmg: NOTRUN -> [DMESG-WARN][162] ([Intel XE#9331]) +33 other tests dmesg-warn
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-imm.html
* igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch:
- shard-lnl: NOTRUN -> [SKIP][163] ([Intel XE#8374]) +8 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_exec_fault_mode@many-execqueues-multi-queue-prefetch.html
* igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch:
- shard-bmg: NOTRUN -> [SKIP][164] ([Intel XE#8374]) +6 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_exec_fault_mode@many-multi-queue-rebind-prefetch.html
* igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind:
- shard-ptl: NOTRUN -> [SKIP][165] ([Intel XE#8374]) +2 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind.html
* igt@xe_exec_multi_queue@few-execs-close-fd-smem:
- shard-ptl: NOTRUN -> [SKIP][166] ([Intel XE#8364]) +13 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@xe_exec_multi_queue@few-execs-close-fd-smem.html
* igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-basic:
- shard-bmg: NOTRUN -> [SKIP][167] ([Intel XE#8364]) +19 other tests skip
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_exec_multi_queue@few-execs-preempt-mode-fault-basic.html
* igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd:
- shard-lnl: NOTRUN -> [SKIP][168] ([Intel XE#8364]) +14 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_exec_multi_queue@one-queue-preempt-mode-fault-close-fd.html
* igt@xe_exec_reset@cm-multi-queue-close-execqueues:
- shard-ptl: NOTRUN -> [SKIP][169] ([Intel XE#8369])
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_exec_reset@cm-multi-queue-close-execqueues.html
* igt@xe_exec_reset@cm-multi-queue-close-fd:
- shard-bmg: NOTRUN -> [SKIP][170] ([Intel XE#8369])
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_exec_reset@cm-multi-queue-close-fd.html
* igt@xe_exec_reset@multi-queue-close-fd:
- shard-lnl: NOTRUN -> [SKIP][171] ([Intel XE#8369])
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_exec_reset@multi-queue-close-fd.html
* igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-single-vma:
- shard-ptl: NOTRUN -> [SKIP][172] ([Intel XE#6196])
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_exec_system_allocator@pat-index-madvise-pat-idx-wt-single-vma.html
* igt@xe_exec_system_allocator@prefetch-benchmark:
- shard-bmg: NOTRUN -> [DMESG-WARN][173] ([Intel XE#9309] / [Intel XE#9331])
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_exec_system_allocator@prefetch-benchmark.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-stride-free-nomemset:
- shard-bmg: [PASS][174] -> [DMESG-WARN][175] ([Intel XE#9331]) +56 other tests dmesg-warn
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-9/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-free-nomemset.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-7/igt@xe_exec_system_allocator@threads-shared-vm-many-stride-free-nomemset.html
* igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race:
- shard-lnl: NOTRUN -> [SKIP][176] ([Intel XE#8378]) +8 other tests skip
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_exec_threads@threads-multi-queue-cm-userptr-invalidate-race.html
* igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind:
- shard-bmg: NOTRUN -> [SKIP][177] ([Intel XE#8378]) +5 other tests skip
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@xe_exec_threads@threads-multi-queue-mixed-shared-vm-userptr-rebind.html
* igt@xe_exec_threads@threads-multi-queue-rebind-err:
- shard-ptl: NOTRUN -> [SKIP][178] ([Intel XE#8378]) +1 other test skip
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@xe_exec_threads@threads-multi-queue-rebind-err.html
* igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add:
- shard-bmg: NOTRUN -> [SKIP][179] ([Intel XE#6281] / [Intel XE#7426])
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_fault_injection@exec-queue-create-fail-xe_pxp_exec_queue_add.html
* igt@xe_madvise@atomic-global:
- shard-lnl: NOTRUN -> [SKIP][180] ([Intel XE#7980])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-1/igt@xe_madvise@atomic-global.html
* igt@xe_mempage_offline@inject-duplicate-page:
- shard-lnl: NOTRUN -> [SKIP][181] ([Intel XE#9203])
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_mempage_offline@inject-duplicate-page.html
* igt@xe_mmap@vram:
- shard-lnl: NOTRUN -> [SKIP][182] ([Intel XE#1416])
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_mmap@vram.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191], [PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207]) -> ([PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216], [PASS][217], [PASS][218], [PASS][219], [SKIP][220], [PASS][221], [PASS][222], [PASS][223], [PASS][224], [PASS][225], [PASS][226], [PASS][227], [PASS][228], [PASS][229], [PASS][230], [PASS][231], [PASS][232], [PASS][233]) ([Intel XE#2457] / [Intel XE#7405])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-6/igt@xe_module_load@load.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-3/igt@xe_module_load@load.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-3/igt@xe_module_load@load.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-4/igt@xe_module_load@load.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-4/igt@xe_module_load@load.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-9/igt@xe_module_load@load.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-7/igt@xe_module_load@load.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-9/igt@xe_module_load@load.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-7/igt@xe_module_load@load.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-7/igt@xe_module_load@load.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-8/igt@xe_module_load@load.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-8/igt@xe_module_load@load.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-8/igt@xe_module_load@load.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-1/igt@xe_module_load@load.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-1/igt@xe_module_load@load.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-10/igt@xe_module_load@load.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-10/igt@xe_module_load@load.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-10/igt@xe_module_load@load.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-5/igt@xe_module_load@load.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-9/igt@xe_module_load@load.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-2/igt@xe_module_load@load.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-6/igt@xe_module_load@load.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-2/igt@xe_module_load@load.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-5/igt@xe_module_load@load.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-5/igt@xe_module_load@load.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-4/igt@xe_module_load@load.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-5/igt@xe_module_load@load.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-5/igt@xe_module_load@load.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-6/igt@xe_module_load@load.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_module_load@load.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-6/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-1/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-3/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@xe_module_load@load.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@xe_module_load@load.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@xe_module_load@load.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@xe_module_load@load.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_module_load@load.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_module_load@load.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-7/igt@xe_module_load@load.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_module_load@load.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@xe_module_load@load.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-7/igt@xe_module_load@load.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-7/igt@xe_module_load@load.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_module_load@load.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-1/igt@xe_module_load@load.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-1/igt@xe_module_load@load.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-4/igt@xe_module_load@load.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_module_load@load.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@xe_module_load@load.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-4/igt@xe_module_load@load.html
* igt@xe_multigpu_svm@mgpu-atomic-op-prefetch:
- shard-lnl: NOTRUN -> [SKIP][234] ([Intel XE#6964])
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_multigpu_svm@mgpu-atomic-op-prefetch.html
* igt@xe_multigpu_svm@mgpu-coherency-prefetch:
- shard-bmg: NOTRUN -> [SKIP][235] ([Intel XE#6964]) +1 other test skip
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_multigpu_svm@mgpu-coherency-prefetch.html
* igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch:
- shard-ptl: NOTRUN -> [SKIP][236] ([Intel XE#6964])
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@xe_multigpu_svm@mgpu-xgpu-access-prefetch.html
* igt@xe_page_reclaim@many-vma-same-bo:
- shard-ptl: NOTRUN -> [SKIP][237] ([Intel XE#7793])
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-2/igt@xe_page_reclaim@many-vma-same-bo.html
* igt@xe_pat@pat-index-xehpc:
- shard-bmg: NOTRUN -> [SKIP][238] ([Intel XE#1420] / [Intel XE#7590])
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-sw-hw-suspend:
- shard-bmg: NOTRUN -> [FAIL][239] ([Intel XE#7695])
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@xe_pat@pat-sw-hw-suspend.html
* igt@xe_peer2peer@write:
- shard-lnl: NOTRUN -> [SKIP][240] ([Intel XE#1061] / [Intel XE#7326] / [Intel XE#7353])
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_peer2peer@write.html
* igt@xe_pm@d3cold-basic-exec:
- shard-bmg: NOTRUN -> [SKIP][241] ([Intel XE#2284] / [Intel XE#7370])
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_pm@d3cold-basic-exec.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-ptl: NOTRUN -> [SKIP][242] ([Intel XE#5741]) +1 other test skip
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@d3hot-i2c:
- shard-ptl: NOTRUN -> [SKIP][243] ([Intel XE#5742] / [Intel XE#7400])
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@s3-basic:
- shard-bmg: [PASS][244] -> [INCOMPLETE][245] ([Intel XE#8175])
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-7/igt@xe_pm@s3-basic.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-6/igt@xe_pm@s3-basic.html
* igt@xe_pm@s3-multiple-execs:
- shard-lnl: NOTRUN -> [SKIP][246] ([Intel XE#584] / [Intel XE#7369])
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_pm@s3-multiple-execs.html
* igt@xe_pm@s4-vm-bind-unbind-all:
- shard-ptl: [PASS][247] -> [ABORT][248] ([Intel XE#9362]) +3 other tests abort
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-1/igt@xe_pm@s4-vm-bind-unbind-all.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-6/igt@xe_pm@s4-vm-bind-unbind-all.html
- shard-lnl: [PASS][249] -> [ABORT][250] ([Intel XE#9362]) +1 other test abort
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-lnl-8/igt@xe_pm@s4-vm-bind-unbind-all.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-8/igt@xe_pm@s4-vm-bind-unbind-all.html
* igt@xe_pxp@display-pxp-fb:
- shard-bmg: NOTRUN -> [SKIP][251] ([Intel XE#4733] / [Intel XE#7417]) +2 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_pxp@display-pxp-fb.html
* igt@xe_query@multigpu-query-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][252] ([Intel XE#944]) +1 other test skip
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@xe_query@multigpu-query-cs-cycles.html
* igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
- shard-ptl: NOTRUN -> [SKIP][253] ([Intel XE#6019])
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html
* igt@xe_query@multigpu-query-oa-units:
- shard-lnl: NOTRUN -> [SKIP][254] ([Intel XE#944])
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_query@multigpu-query-oa-units.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-lnl: NOTRUN -> [SKIP][255] ([Intel XE#3342])
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_sriov_flr@flr-each-isolation.html
* igt@xe_sriov_scheduling@equal-throughput-low-priority:
- shard-lnl: NOTRUN -> [SKIP][256] ([Intel XE#8339])
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_sriov_scheduling@equal-throughput-low-priority.html
* igt@xe_sriov_vfio@region-info:
- shard-lnl: NOTRUN -> [SKIP][257] ([Intel XE#7724])
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_sriov_vfio@region-info.html
* igt@xe_vm@overcommit-nonfault-vram-lr-defer:
- shard-ptl: NOTRUN -> [SKIP][258] ([Intel XE#7892])
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@xe_vm@overcommit-nonfault-vram-lr-defer.html
* igt@xe_vm@overcommit-nonfault-vram-no-lr:
- shard-lnl: NOTRUN -> [SKIP][259] ([Intel XE#7892])
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_vm@overcommit-nonfault-vram-no-lr.html
* igt@xe_wedged@basic-wedged:
- shard-lnl: NOTRUN -> [DMESG-WARN][260] ([Intel XE#8963])
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-7/igt@xe_wedged@basic-wedged.html
#### Possible fixes ####
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-ptl: [ABORT][261] -> [PASS][262] +1 other test pass
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-5/igt@kms_async_flips@async-flip-suspend-resume.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-5/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1:
- shard-ptl: [ABORT][263] ([Intel XE#9362]) -> [PASS][264] +2 other tests pass
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1:
- shard-ptl: [DMESG-WARN][265] -> [PASS][266]
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-b-edp-1.html
* igt@kms_flip@flip-vs-dpms-on-nop:
- shard-bmg: [FAIL][267] ([Intel XE#3098]) -> [PASS][268] +4 other tests pass
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-3/igt@kms_flip@flip-vs-dpms-on-nop.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-9/igt@kms_flip@flip-vs-dpms-on-nop.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-lnl: [FAIL][269] ([Intel XE#301]) -> [PASS][270]
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-lnl-8/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_flip@plain-flip-fb-recreate@a-edp1:
- shard-ptl: [FAIL][271] ([Intel XE#3098]) -> [PASS][272] +1 other test pass
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-3/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-1/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
* igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-indfb-draw-blt:
- shard-bmg: [INCOMPLETE][273] ([Intel XE#2594] / [Intel XE#9259]) -> [PASS][274]
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-5/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-indfb-draw-blt.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbchdr-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-bmg: [ABORT][275] ([Intel XE#9362]) -> [PASS][276] +1 other test pass
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-7/igt@kms_hdr@bpc-switch-suspend.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-2/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][277] ([Intel XE#1503]) -> [PASS][278]
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-10/igt@kms_hdr@invalid-hdr.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-7/igt@kms_hdr@invalid-hdr.html
* igt@kms_vblank@ts-continuation-suspend:
- shard-bmg: [DMESG-WARN][279] -> [PASS][280] +3 other tests pass
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-7/igt@kms_vblank@ts-continuation-suspend.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-1/igt@kms_vblank@ts-continuation-suspend.html
* igt@xe_exec_system_allocator@process-many-new-nomemset:
- shard-bmg: [DMESG-WARN][281] ([Intel XE#9331]) -> [PASS][282] +60 other tests pass
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-10/igt@xe_exec_system_allocator@process-many-new-nomemset.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-7/igt@xe_exec_system_allocator@process-many-new-nomemset.html
* igt@xe_module_load@force-load:
- shard-bmg: [ABORT][283] ([Intel XE#8007]) -> [PASS][284] +1 other test pass
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-4/igt@xe_module_load@force-load.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-8/igt@xe_module_load@force-load.html
* igt@xe_pm@s3-multiple-execs:
- shard-bmg: [INCOMPLETE][285] ([Intel XE#8175]) -> [PASS][286]
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-6/igt@xe_pm@s3-multiple-execs.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-10/igt@xe_pm@s3-multiple-execs.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-lnl: [ABORT][287] ([Intel XE#9362]) -> [PASS][288] +1 other test pass
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-lnl-2/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-4/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
#### Warnings ####
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-ptl: [ABORT][289] ([Intel XE#9362] / [Intel XE#9378]) -> [ABORT][290] ([Intel XE#9367] / [Intel XE#9375])
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-ptl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-ptl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-lnl: [SKIP][291] ([Intel XE#309] / [Intel XE#7343] / [Intel XE#7935]) -> [SKIP][292] ([Intel XE#309] / [Intel XE#7343])
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-lnl-8/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-lnl-1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][293] ([Intel XE#3374] / [Intel XE#3544]) -> [SKIP][294] ([Intel XE#3544])
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-8/igt@kms_hdr@brightness-with-hdr.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-bmg: [SKIP][295] ([Intel XE#2426] / [Intel XE#5848]) -> [SKIP][296] ([Intel XE#2509] / [Intel XE#7437])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4/shard-bmg-8/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1231
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1416
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1469]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1469
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2374
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2486
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3433]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3433
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3904]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3904
[Intel XE#4090]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4090
[Intel XE#4141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4141
[Intel XE#4156]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4156
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5741]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5741
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
[Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5813]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5813
[Intel XE#5821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5821
[Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
[Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
[Intel XE#5835]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5835
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5854]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5854
[Intel XE#5857]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5857
[Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
[Intel XE#5870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5870
[Intel XE#5882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5882
[Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
[Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
[Intel XE#5946]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5946
[Intel XE#5962]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5962
[Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
[Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
[Intel XE#6035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6035
[Intel XE#6128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6128
[Intel XE#6196]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6196
[Intel XE#6281]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6281
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6503
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#6819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6819
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#6886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6886
[Intel XE#6901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6901
[Intel XE#6911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6911
[Intel XE#6964]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6964
[Intel XE#6969]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6969
[Intel XE#6974]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6974
[Intel XE#702]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/702
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7085]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7085
[Intel XE#7173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7173
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7179]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7179
[Intel XE#7227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7227
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7294
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7318]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7318
[Intel XE#7326]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7326
[Intel XE#7342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7342
[Intel XE#7343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7343
[Intel XE#7344]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7344
[Intel XE#7351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7351
[Intel XE#7353]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7353
[Intel XE#7355]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7355
[Intel XE#7356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7356
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7368]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7368
[Intel XE#7369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7369
[Intel XE#7370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7370
[Intel XE#7372]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7372
[Intel XE#7374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7374
[Intel XE#7376]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7376
[Intel XE#7378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7378
[Intel XE#7382]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7382
[Intel XE#7383]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7383
[Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
[Intel XE#7386]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7386
[Intel XE#7389]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7389
[Intel XE#7399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7399
[Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
[Intel XE#7405]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7405
[Intel XE#7417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7417
[Intel XE#7425]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7425
[Intel XE#7426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7426
[Intel XE#7437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7437
[Intel XE#7443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7443
[Intel XE#7444]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7444
[Intel XE#7457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7457
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#7642]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7642
[Intel XE#7644]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7644
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7695
[Intel XE#7724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7724
[Intel XE#7760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7760
[Intel XE#7793]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7793
[Intel XE#7794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7794
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7892]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7892
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#7935]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7935
[Intel XE#7980]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7980
[Intel XE#8007]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8007
[Intel XE#8175]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8175
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8339
[Intel XE#8348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8348
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8365
[Intel XE#8369]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8369
[Intel XE#8370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8370
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8391
[Intel XE#8395]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8395
[Intel XE#8396]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8396
[Intel XE#8602]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8602
[Intel XE#8695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8695
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#8866]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8866
[Intel XE#8868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8868
[Intel XE#8963]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8963
[Intel XE#9144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9144
[Intel XE#9203]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9203
[Intel XE#9205]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9205
[Intel XE#9259]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9259
[Intel XE#9271]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9271
[Intel XE#9309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9309
[Intel XE#9312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9312
[Intel XE#9331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9331
[Intel XE#9333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9333
[Intel XE#9340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9340
[Intel XE#9351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9351
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
[Intel XE#9367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9367
[Intel XE#9375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9375
[Intel XE#9378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9378
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
Build changes
-------------
* Linux: xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4 -> xe-pw-174792v1
IGT_9110: 9110
xe-5812-890d1157247d8ad65d9a2d44c065accd550b61f4: 890d1157247d8ad65d9a2d44c065accd550b61f4
xe-pw-174792v1: 174792v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-174792v1/index.html
[-- Attachment #2: Type: text/html, Size: 99576 bytes --]
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src Mika Kahola
@ 2026-09-24 9:45 ` Hogander, Jouni
2026-09-25 7:00 ` Kahola, Mika
0 siblings, 1 reply; 18+ messages in thread
From: Hogander, Jouni @ 2026-09-24 9:45 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Kahola, Mika,
intel-gfx@lists.freedesktop.org
On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> The adjusted mode spans all the joined pipes, so it is the wrong
> reference for a per-pipe area. pipe_src is this pipe's own share.
>
> No functional change, the two are the same without a joiner.
>
> Assisted-by: Copilot:claude-opus-5
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 76260ceb49cb..c1994da38567 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2912,8 +2912,8 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> struct drm_rect display_area = {
> .x1 = 0,
> .y1 = 0,
> - .x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
> - .y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay,
> + .x2 = drm_rect_width(&crtc_state->pipe_src),
> + .y2 = drm_rect_height(&crtc_state->pipe_src),
I think you should rather use crtc_state->hw.pipe_mode? Altought
selective update is not supported with pipe scaling.
BR,
Jouni Högander
> };
> bool full_update = false, su_area_changed;
> int i, ret;
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking Mika Kahola
@ 2026-09-24 13:02 ` Hogander, Jouni
2026-09-25 7:17 ` Kahola, Mika
0 siblings, 1 reply; 18+ messages in thread
From: Hogander, Jouni @ 2026-09-24 13:02 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Kahola, Mika,
intel-gfx@lists.freedesktop.org
On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> psr.pipe is the joiner primary only, so frontbuffer bits coming from
> a
> secondary pipe get masked out and the update goes unnoticed. Add
> psr.pipe_mask covering every joined pipe and use that instead.
>
> No functional change, joiner is still rejected in compute_config().
>
> Assisted-by: Copilot:claude-opus-5
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_psr.c | 27 ++++++++++++++---
> --
> 2 files changed, 21 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 79f30660c2b6..2e6e3661675c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1798,6 +1798,7 @@ struct intel_psr {
> bool enabled;
> int pause_counter;
> enum pipe pipe;
> + u8 pipe_mask;
> enum transcoder transcoder;
> bool active;
> struct work_struct work;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 872e253db178..76260ceb49cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -36,6 +36,7 @@
> #include "intel_cursor_regs.h"
> #include "intel_ddi.h"
> #include "intel_de.h"
> +#include "intel_display.h"
> #include "intel_display_irq.h"
> #include "intel_display_regs.h"
> #include "intel_display_rpm.h"
> @@ -1798,6 +1799,19 @@ static void psr2_dc3co_disable_work(struct
> work_struct *work)
> mutex_unlock(&intel_dp->psr.lock);
> }
>
> +/* Frontbuffer bits for every pipe driving this PSR/Panel Replay
> instance. */
> +static unsigned int psr_frontbuffer_mask(struct intel_dp *intel_dp)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> + unsigned int mask = 0;
> + enum pipe pipe;
> +
> + for_each_pipe_masked(display, pipe, intel_dp->psr.pipe_mask)
> + mask |= INTEL_FRONTBUFFER_ALL_MASK(pipe);
> +
> + return mask;
> +}
> +
> static void
> psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int
> frontbuffer_bits)
> {
> @@ -1813,8 +1827,7 @@ psr2_dc3co_flush_locked(struct intel_dp
> *intel_dp, unsigned int frontbuffer_bits
> * At every frontbuffer flush flip event modified delay of
> delayed work,
> * when delayed work schedules that means display has been
> idle.
> */
> - if (!(frontbuffer_bits &
> - INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe)))
> + if (!(frontbuffer_bits & psr_frontbuffer_mask(intel_dp)))
> return;
>
> mod_delayed_work(display->wq.unordered, &intel_dp-
> >psr.dc3co_work,
> @@ -1845,7 +1858,7 @@ void intel_psr_set_non_psr_pipes(struct
> intel_dp *intel_dp,
> active_pipes = intel_calc_active_pipes(state, active_pipes);
>
> crtc_state->active_non_psr_pipes = active_pipes &
> - ~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);
> + ~intel_crtc_joined_pipe_mask(crtc_state);
This change is not related to frontbuffer tracking.
BR,
Jouni Högander
> }
>
> void intel_psr_compute_config(struct intel_dp *intel_dp,
> @@ -2175,6 +2188,7 @@ static void intel_psr_enable_locked(struct
> intel_dp *intel_dp,
> intel_dp->psr.panel_replay_enabled = crtc_state-
> >has_panel_replay;
> intel_dp->psr.busy_frontbuffer_bits = 0;
> intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)-
> >pipe;
> + intel_dp->psr.pipe_mask =
> intel_crtc_joined_pipe_mask(crtc_state);
> intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
> /* DC5/DC6 requires at least 6 idle frames */
> val = usecs_to_jiffies(intel_get_frame_time_us(crtc_state) *
> 6);
> @@ -2394,6 +2408,7 @@ static void intel_psr_disable_locked(struct
> intel_dp *intel_dp)
> intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
> intel_dp->psr.active_non_psr_pipes = 0;
> intel_dp->psr.pkg_c_latency_used = 0;
> + intel_dp->psr.pipe_mask = 0;
> cancel_delayed_work(&intel_dp->psr.dc3co_work);
> intel_dp->psr.dc3co_allowed = false;
> }
> @@ -3627,8 +3642,7 @@ void intel_psr_invalidate(struct intel_display
> *display,
> continue;
> }
>
> - pipe_frontbuffer_bits &=
> - INTEL_FRONTBUFFER_ALL_MASK(intel_dp-
> >psr.pipe);
> + pipe_frontbuffer_bits &=
> psr_frontbuffer_mask(intel_dp);
> intel_dp->psr.busy_frontbuffer_bits |=
> pipe_frontbuffer_bits;
>
> if (pipe_frontbuffer_bits)
> @@ -3708,8 +3722,7 @@ void intel_psr_flush(struct intel_display
> *display,
> continue;
> }
>
> - pipe_frontbuffer_bits &=
> - INTEL_FRONTBUFFER_ALL_MASK(intel_dp-
> >psr.pipe);
> + pipe_frontbuffer_bits &=
> psr_frontbuffer_mask(intel_dp);
> intel_dp->psr.busy_frontbuffer_bits &=
> ~pipe_frontbuffer_bits;
>
> /*
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src
2026-09-24 9:45 ` Hogander, Jouni
@ 2026-09-25 7:00 ` Kahola, Mika
0 siblings, 0 replies; 18+ messages in thread
From: Kahola, Mika @ 2026-09-25 7:00 UTC (permalink / raw)
To: Hogander, Jouni, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, 24 September 2026 12.46
> To: intel-xe@lists.freedesktop.org; Kahola, Mika <mika.kahola@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src
>
> On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> > The adjusted mode spans all the joined pipes, so it is the wrong
> > reference for a per-pipe area. pipe_src is this pipe's own share.
> >
> > No functional change, the two are the same without a joiner.
> >
> > Assisted-by: Copilot:claude-opus-5
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 76260ceb49cb..c1994da38567 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2912,8 +2912,8 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > struct drm_rect display_area = {
> > .x1 = 0,
> > .y1 = 0,
> > - .x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
> > - .y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay,
> > + .x2 = drm_rect_width(&crtc_state->pipe_src),
> > + .y2 = drm_rect_height(&crtc_state->pipe_src),
>
> I think you should rather use crtc_state->hw.pipe_mode? Altought
> selective update is not supported with pipe scaling.
Yes, both will end up the same outcome but I guesss hw.pipe_mode is closer to transcoder level so I can switch to use that instead.
Thanks!
-Mika-
>
> BR,
> Jouni Högander
>
> > };
> > bool full_update = false, su_area_changed;
> > int i, ret;
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking
2026-09-24 13:02 ` Hogander, Jouni
@ 2026-09-25 7:17 ` Kahola, Mika
0 siblings, 0 replies; 18+ messages in thread
From: Kahola, Mika @ 2026-09-25 7:17 UTC (permalink / raw)
To: Hogander, Jouni, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, 24 September 2026 16.02
> To: intel-xe@lists.freedesktop.org; Kahola, Mika <mika.kahola@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking
>
> On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> > psr.pipe is the joiner primary only, so frontbuffer bits coming from
> > a
> > secondary pipe get masked out and the update goes unnoticed. Add
> > psr.pipe_mask covering every joined pipe and use that instead.
> >
> > No functional change, joiner is still rejected in compute_config().
> >
> > Assisted-by: Copilot:claude-opus-5
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> > .../drm/i915/display/intel_display_types.h | 1 +
> > drivers/gpu/drm/i915/display/intel_psr.c | 27 ++++++++++++++---
> > --
> > 2 files changed, 21 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 79f30660c2b6..2e6e3661675c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1798,6 +1798,7 @@ struct intel_psr {
> > bool enabled;
> > int pause_counter;
> > enum pipe pipe;
> > + u8 pipe_mask;
> > enum transcoder transcoder;
> > bool active;
> > struct work_struct work;
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 872e253db178..76260ceb49cb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -36,6 +36,7 @@
> > #include "intel_cursor_regs.h"
> > #include "intel_ddi.h"
> > #include "intel_de.h"
> > +#include "intel_display.h"
> > #include "intel_display_irq.h"
> > #include "intel_display_regs.h"
> > #include "intel_display_rpm.h"
> > @@ -1798,6 +1799,19 @@ static void psr2_dc3co_disable_work(struct
> > work_struct *work)
> > mutex_unlock(&intel_dp->psr.lock);
> > }
> >
> > +/* Frontbuffer bits for every pipe driving this PSR/Panel Replay
> > instance. */
> > +static unsigned int psr_frontbuffer_mask(struct intel_dp *intel_dp)
> > +{
> > + struct intel_display *display = to_intel_display(intel_dp);
> > + unsigned int mask = 0;
> > + enum pipe pipe;
> > +
> > + for_each_pipe_masked(display, pipe, intel_dp->psr.pipe_mask)
> > + mask |= INTEL_FRONTBUFFER_ALL_MASK(pipe);
> > +
> > + return mask;
> > +}
> > +
> > static void
> > psr2_dc3co_flush_locked(struct intel_dp *intel_dp, unsigned int
> > frontbuffer_bits)
> > {
> > @@ -1813,8 +1827,7 @@ psr2_dc3co_flush_locked(struct intel_dp
> > *intel_dp, unsigned int frontbuffer_bits
> > * At every frontbuffer flush flip event modified delay of
> > delayed work,
> > * when delayed work schedules that means display has been
> > idle.
> > */
> > - if (!(frontbuffer_bits &
> > - INTEL_FRONTBUFFER_ALL_MASK(intel_dp->psr.pipe)))
> > + if (!(frontbuffer_bits & psr_frontbuffer_mask(intel_dp)))
> > return;
> >
> > mod_delayed_work(display->wq.unordered, &intel_dp-
> > >psr.dc3co_work,
> > @@ -1845,7 +1858,7 @@ void intel_psr_set_non_psr_pipes(struct
> > intel_dp *intel_dp,
> > active_pipes = intel_calc_active_pipes(state, active_pipes);
> >
> > crtc_state->active_non_psr_pipes = active_pipes &
> > - ~BIT(to_intel_crtc(crtc_state->uapi.crtc)->pipe);
> > + ~intel_crtc_joined_pipe_mask(crtc_state);
>
> This change is not related to frontbuffer tracking.
Good catch! This shouldn't belong to frontbuffer tracking patch. I will split this hunk as a separate patch.
Thanks!
-Mika-
>
> BR,
>
> Jouni Högander
>
> > }
> >
> > void intel_psr_compute_config(struct intel_dp *intel_dp,
> > @@ -2175,6 +2188,7 @@ static void intel_psr_enable_locked(struct
> > intel_dp *intel_dp,
> > intel_dp->psr.panel_replay_enabled = crtc_state-
> > >has_panel_replay;
> > intel_dp->psr.busy_frontbuffer_bits = 0;
> > intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)-
> > >pipe;
> > + intel_dp->psr.pipe_mask =
> > intel_crtc_joined_pipe_mask(crtc_state);
> > intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
> > /* DC5/DC6 requires at least 6 idle frames */
> > val = usecs_to_jiffies(intel_get_frame_time_us(crtc_state) *
> > 6);
> > @@ -2394,6 +2408,7 @@ static void intel_psr_disable_locked(struct
> > intel_dp *intel_dp)
> > intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
> > intel_dp->psr.active_non_psr_pipes = 0;
> > intel_dp->psr.pkg_c_latency_used = 0;
> > + intel_dp->psr.pipe_mask = 0;
> > cancel_delayed_work(&intel_dp->psr.dc3co_work);
> > intel_dp->psr.dc3co_allowed = false;
> > }
> > @@ -3627,8 +3642,7 @@ void intel_psr_invalidate(struct intel_display
> > *display,
> > continue;
> > }
> >
> > - pipe_frontbuffer_bits &=
> > - INTEL_FRONTBUFFER_ALL_MASK(intel_dp-
> > >psr.pipe);
> > + pipe_frontbuffer_bits &=
> > psr_frontbuffer_mask(intel_dp);
> > intel_dp->psr.busy_frontbuffer_bits |=
> > pipe_frontbuffer_bits;
> >
> > if (pipe_frontbuffer_bits)
> > @@ -3708,8 +3722,7 @@ void intel_psr_flush(struct intel_display
> > *display,
> > continue;
> > }
> >
> > - pipe_frontbuffer_bits &=
> > - INTEL_FRONTBUFFER_ALL_MASK(intel_dp-
> > >psr.pipe);
> > + pipe_frontbuffer_bits &=
> > psr_frontbuffer_mask(intel_dp);
> > intel_dp->psr.busy_frontbuffer_bits &=
> > ~pipe_frontbuffer_bits;
> >
> > /*
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner Mika Kahola
@ 2026-09-25 11:06 ` Hogander, Jouni
2026-09-25 12:32 ` Kahola, Mika
0 siblings, 1 reply; 18+ messages in thread
From: Hogander, Jouni @ 2026-09-25 11:06 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Kahola, Mika,
intel-gfx@lists.freedesktop.org
On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> Each joined pipe has its own PSR register block, so Panel Replay and
> PSR2 selective update work with the pipe A/B joiner. Plain PSR1 does
> not, keep rejecting that.
>
> Assisted-by: Copilot:claude-opus-5
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 73 ++++++++++++++++++++--
> --
> 1 file changed, 62 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4743b5b91743..c830332b33f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1587,6 +1587,50 @@ static bool intel_psr2_config_valid(struct
> intel_dp *intel_dp,
> return true;
> }
>
> +/*
> + * Joiner needs a per-pipe PSR/Panel Replay register block, only
> + * supported on pipe A/B.
> + */
> +static bool psr_joiner_config_valid(struct intel_dp *intel_dp,
> + const struct intel_crtc_state
> *crtc_state,
> + const char *what)
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> +
> + if (!crtc_state->joiner_pipes)
> + return true;
> +
> + if (crtc_state->joiner_pipes & ~(BIT(PIPE_A) | BIT(PIPE_B)))
> {
> + drm_dbg_kms(display->drm,
> + "%s not enabled, joiner only supported
> on pipe A/B\n", what);
> + return false;
PSR and eDP Panel Replay are restricted to pipe A and pipe B generally
not specific to joiner. See table in Bspec 68920. DP Panel Replay do
not have this restriction. Panel Replay restriction is handled in
_panel_replay_compute_config. PSR doesn't seem to have this check at
all. I don't know if it's even possible to have eDP on pipe C? Just
questioning if this check makes sense being joiner specific? Are you
targeting to handle scenario where primary pipe has psr/panel replay,
but secondary doesn't?
> + }
> +
> + return true;
> +}
> +
> +/*
> + * PSR2 selective fetch and Panel Replay Selective Update share the
> same
> + * joiner limits, plus no uncompressed joiner configuration in YUV
> 4:2:0.
> + */
> +static bool psr2_joiner_config_valid(struct intel_dp *intel_dp,
> + const struct intel_crtc_state
> *crtc_state)
Rename this as sel_update_joiner_config_valid. psr2 is psr2 but
sel_update may be panel replay or psr2. There is still some old code
not following this, but let's not add more.
BR,
Jouni Högander
> +{
> + struct intel_display *display = to_intel_display(intel_dp);
> +
> + if (!psr_joiner_config_valid(intel_dp, crtc_state,
> "Selective update"))
> + return false;
> +
> + if (crtc_state->joiner_pipes && !crtc_state-
> >dsc.compression_enable &&
> + crtc_state->output_format ==
> INTEL_OUTPUT_FORMAT_YCBCR420) {
> + drm_dbg_kms(display->drm,
> + "Selective update not enabled,
> uncompressed joiner does not support YUV 4:2:0\n");
> + return false;
> + }
> +
> + return true;
> +}
> +
> static bool intel_sel_update_config_valid(struct intel_crtc_state
> *crtc_state,
> struct drm_connector_state
> *conn_state)
> {
> @@ -1594,6 +1638,9 @@ static bool
> intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
> struct intel_dp *intel_dp = intel_attached_dp(connector);
> struct intel_display *display = to_intel_display(intel_dp);
>
> + if (!psr2_joiner_config_valid(intel_dp, crtc_state))
> + goto unsupported;
> +
> if (HAS_PSR2_SEL_FETCH(display) &&
> !intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state)
> &&
> !HAS_PSR_HW_TRACKING(display)) {
> @@ -1733,6 +1780,9 @@ static bool _panel_replay_compute_config(struct
> intel_crtc_state *crtc_state,
> return false;
> }
>
> + if (!psr_joiner_config_valid(intel_dp, crtc_state, "Panel
> Replay"))
> + return false;
> +
> crtc_state->link_off_after_as_sdp_when_pr_active =
> compute_link_off_after_as_sdp_when_pr_active(connector);
> crtc_state->disable_as_sdp_when_pr_active =
> compute_disable_as_sdp_when_pr_active(connector);
>
> @@ -1886,17 +1936,6 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
> return;
> }
>
> - /*
> - * FIXME figure out what is wrong with PSR+joiner and
> - * fix it. Presumably something related to the fact that
> - * PSR is a transcoder level feature.
> - */
> - if (crtc_state->joiner_pipes) {
> - drm_dbg_kms(display->drm,
> - "PSR disabled due to joiner\n");
> - return;
> - }
> -
> /* Only used for state verification. */
> crtc_state->panel_replay_dsc_support = connector-
> >dp.panel_replay_caps.dsc_support;
> crtc_state->has_panel_replay =
> _panel_replay_compute_config(crtc_state, conn_state);
> @@ -1908,6 +1947,14 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
> return;
>
> crtc_state->has_sel_update =
> intel_sel_update_config_valid(crtc_state, conn_state);
> +
> + /* Plain PSR1 is not supported with joiner. */
> + if (crtc_state->joiner_pipes && !crtc_state-
> >has_panel_replay &&
> + !crtc_state->has_sel_update) {
> + drm_dbg_kms(display->drm,
> + "PSR disabled, PSR1 not supported with
> joiner\n");
> + crtc_state->has_psr = false;
> + }
> }
>
> void intel_psr_get_config(struct intel_encoder *encoder,
> @@ -4728,6 +4775,10 @@ void intel_psr_compute_config_late(struct
> intel_dp *intel_dp,
> crtc_state->has_sel_update = false;
> crtc_state->enable_psr2_su_region_et = false;
> crtc_state->enable_psr2_sel_fetch = false;
> +
> + /* Plain PSR1 is not supported with joiner. */
> + if (crtc_state->joiner_pipes)
> + crtc_state->has_psr = false;
> }
>
> /* Wa_18037818876 */
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/display: Allow forcing the joiner on eDP
2026-09-23 11:59 ` [PATCH] drm/i915/display: Allow forcing the joiner on eDP Mika Kahola
@ 2026-09-25 11:08 ` Hogander, Jouni
0 siblings, 0 replies; 18+ messages in thread
From: Hogander, Jouni @ 2026-09-25 11:08 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Kahola, Mika,
intel-gfx@lists.freedesktop.org
On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> intel_dp_has_joiner() rejects eDP unless the VBT enables the pipe
> joiner, and the debugfs file is only created when that returns true,
> so
> i915_joiner_force_enable can never turn it on.
>
> Always create the file for DP and eDP, and let a forced pipe count
> above one override the VBT.
>
> Assisted-by: Copilot:claude-opus-5
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_debugfs.c | 5 ++---
> drivers/gpu/drm/i915/display/intel_dp.c | 12 +++++++++-
> --
> 2 files changed, 11 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 3e302f23f247..e55fa01addb5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1352,9 +1352,8 @@ void intel_connector_debugfs_add(struct
> intel_connector *connector)
> connector,
> &i915_dsc_fractional_bpp_fops);
> }
>
> - if ((connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> - connector_type == DRM_MODE_CONNECTOR_eDP) &&
> - intel_dp_has_joiner(intel_attached_dp(connector))) {
> + if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> + connector_type == DRM_MODE_CONNECTOR_eDP) {
> debugfs_create_file("i915_joiner_force_enable",
> 0644, root,
> connector, &i915_joiner_fops);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2480b8ce3bec..80ce71ce4c20 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -473,9 +473,15 @@ bool intel_dp_has_joiner(struct intel_dp
> *intel_dp)
> if (intel_dp->mso_link_count)
> return false;
>
> - if (intel_dp_is_edp(intel_dp) &&
> - !connector->panel.vbt.edp.pipe_joiner_enable)
> - return false;
> + if (intel_dp_is_edp(intel_dp)) {
> + bool pipe_joiner_enable = connector-
> >panel.vbt.edp.pipe_joiner_enable;
> +
> + if (connector->force_joined_pipes > 1)
> + pipe_joiner_enable = true;
> +
> + if (!pipe_joiner_enable)
> + return false;
> + }
>
> return DISPLAY_VER(display) >= 12 ||
> (DISPLAY_VER(display) == 11 &&
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner
2026-09-25 11:06 ` Hogander, Jouni
@ 2026-09-25 12:32 ` Kahola, Mika
0 siblings, 0 replies; 18+ messages in thread
From: Kahola, Mika @ 2026-09-25 12:32 UTC (permalink / raw)
To: Hogander, Jouni, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Friday, 25 September 2026 14.07
> To: intel-xe@lists.freedesktop.org; Kahola, Mika <mika.kahola@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner
>
> On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> > Each joined pipe has its own PSR register block, so Panel Replay and
> > PSR2 selective update work with the pipe A/B joiner. Plain PSR1 does
> > not, keep rejecting that.
> >
> > Assisted-by: Copilot:claude-opus-5
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 73 ++++++++++++++++++++--
> > --
> > 1 file changed, 62 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 4743b5b91743..c830332b33f2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1587,6 +1587,50 @@ static bool intel_psr2_config_valid(struct
> > intel_dp *intel_dp,
> > return true;
> > }
> >
> > +/*
> > + * Joiner needs a per-pipe PSR/Panel Replay register block, only
> > + * supported on pipe A/B.
> > + */
> > +static bool psr_joiner_config_valid(struct intel_dp *intel_dp,
> > + const struct intel_crtc_state
> > *crtc_state,
> > + const char *what)
> > +{
> > + struct intel_display *display = to_intel_display(intel_dp);
> > +
> > + if (!crtc_state->joiner_pipes)
> > + return true;
> > +
> > + if (crtc_state->joiner_pipes & ~(BIT(PIPE_A) | BIT(PIPE_B)))
> > {
> > + drm_dbg_kms(display->drm,
> > + "%s not enabled, joiner only supported
> > on pipe A/B\n", what);
> > + return false;
>
> PSR and eDP Panel Replay are restricted to pipe A and pipe B generally
> not specific to joiner. See table in Bspec 68920. DP Panel Replay do
> not have this restriction. Panel Replay restriction is handled in
> _panel_replay_compute_config. PSR doesn't seem to have this check at
> all. I don't know if it's even possible to have eDP on pipe C? Just
> questioning if this check makes sense being joiner specific? Are you
> targeting to handle scenario where primary pipe has psr/panel replay,
> but secondary doesn't?
eDP is limited to pipe A and B only. You're right that Panel Replay doesn't have this limitation. So we are talking about about PIPE C etc. In case of Panel Replay. Like you said, this pipe check is already in place in _panel_replay_compute_config(). I don't see a scenario possible that primary pipe would have PSR/PR and secondary doesn't or vice versa. So all in all, I will drop this from the future series.
Thanks for a review!
-Mika-
>
> > + }
> > +
> > + return true;
> > +}
> > +
> > +/*
> > + * PSR2 selective fetch and Panel Replay Selective Update share the
> > same
> > + * joiner limits, plus no uncompressed joiner configuration in YUV
> > 4:2:0.
> > + */
> > +static bool psr2_joiner_config_valid(struct intel_dp *intel_dp,
> > + const struct intel_crtc_state
> > *crtc_state)
>
> Rename this as sel_update_joiner_config_valid. psr2 is psr2 but
> sel_update may be panel replay or psr2. There is still some old code
> not following this, but let's not add more.
>
> BR,
> Jouni Högander
>
> > +{
> > + struct intel_display *display = to_intel_display(intel_dp);
> > +
> > + if (!psr_joiner_config_valid(intel_dp, crtc_state,
> > "Selective update"))
> > + return false;
> > +
> > + if (crtc_state->joiner_pipes && !crtc_state-
> > >dsc.compression_enable &&
> > + crtc_state->output_format ==
> > INTEL_OUTPUT_FORMAT_YCBCR420) {
> > + drm_dbg_kms(display->drm,
> > + "Selective update not enabled,
> > uncompressed joiner does not support YUV 4:2:0\n");
> > + return false;
> > + }
> > +
> > + return true;
> > +}
> > +
> > static bool intel_sel_update_config_valid(struct intel_crtc_state
> > *crtc_state,
> > struct drm_connector_state
> > *conn_state)
> > {
> > @@ -1594,6 +1638,9 @@ static bool
> > intel_sel_update_config_valid(struct intel_crtc_state *crtc_state,
> > struct intel_dp *intel_dp = intel_attached_dp(connector);
> > struct intel_display *display = to_intel_display(intel_dp);
> >
> > + if (!psr2_joiner_config_valid(intel_dp, crtc_state))
> > + goto unsupported;
> > +
> > if (HAS_PSR2_SEL_FETCH(display) &&
> > !intel_psr2_sel_fetch_config_valid(intel_dp, crtc_state)
> > &&
> > !HAS_PSR_HW_TRACKING(display)) {
> > @@ -1733,6 +1780,9 @@ static bool _panel_replay_compute_config(struct
> > intel_crtc_state *crtc_state,
> > return false;
> > }
> >
> > + if (!psr_joiner_config_valid(intel_dp, crtc_state, "Panel
> > Replay"))
> > + return false;
> > +
> > crtc_state->link_off_after_as_sdp_when_pr_active =
> > compute_link_off_after_as_sdp_when_pr_active(connector);
> > crtc_state->disable_as_sdp_when_pr_active =
> > compute_disable_as_sdp_when_pr_active(connector);
> >
> > @@ -1886,17 +1936,6 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > return;
> > }
> >
> > - /*
> > - * FIXME figure out what is wrong with PSR+joiner and
> > - * fix it. Presumably something related to the fact that
> > - * PSR is a transcoder level feature.
> > - */
> > - if (crtc_state->joiner_pipes) {
> > - drm_dbg_kms(display->drm,
> > - "PSR disabled due to joiner\n");
> > - return;
> > - }
> > -
> > /* Only used for state verification. */
> > crtc_state->panel_replay_dsc_support = connector-
> > >dp.panel_replay_caps.dsc_support;
> > crtc_state->has_panel_replay =
> > _panel_replay_compute_config(crtc_state, conn_state);
> > @@ -1908,6 +1947,14 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > return;
> >
> > crtc_state->has_sel_update =
> > intel_sel_update_config_valid(crtc_state, conn_state);
> > +
> > + /* Plain PSR1 is not supported with joiner. */
> > + if (crtc_state->joiner_pipes && !crtc_state-
> > >has_panel_replay &&
> > + !crtc_state->has_sel_update) {
> > + drm_dbg_kms(display->drm,
> > + "PSR disabled, PSR1 not supported with
> > joiner\n");
> > + crtc_state->has_psr = false;
> > + }
> > }
> >
> > void intel_psr_get_config(struct intel_encoder *encoder,
> > @@ -4728,6 +4775,10 @@ void intel_psr_compute_config_late(struct
> > intel_dp *intel_dp,
> > crtc_state->has_sel_update = false;
> > crtc_state->enable_psr2_su_region_et = false;
> > crtc_state->enable_psr2_sel_fetch = false;
> > +
> > + /* Plain PSR1 is not supported with joiner. */
> > + if (crtc_state->joiner_pipes)
> > + crtc_state->has_psr = false;
> > }
> >
> > /* Wa_18037818876 */
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes Mika Kahola
@ 2026-10-07 10:25 ` Hogander, Jouni
2026-10-09 6:50 ` Kahola, Mika
0 siblings, 1 reply; 18+ messages in thread
From: Hogander, Jouni @ 2026-10-07 10:25 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, Kahola, Mika,
intel-gfx@lists.freedesktop.org
On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> PSR2_MAN_TRK_CTL is per transcoder and a joined config has only one
> transcoder, so both joined pipes would program it and the primary
> would win. Merge the per-pipe areas, hand the result back to every
> joined pipe before the plane areas are set and write the transcoder
> register from the primary only. The joiner splits the image
> horizontally, so the pipes share the Y coordinate space and all of
> them have to fetch the merged range.
>
> The plane support check has to run before the merge, so it now covers
> every visible plane instead of only the ones intersecting the area.
there is this step in current intel_psr2_sel_fetch_update:
if (crtc_state->psr2_su_area.y1 == -1) {
drm_info_once(display->drm,
"Selective fetch area calculation failed
in pipe %c\n",
pipe_name(crtc->pipe));
full_update = true;
}
Consider case where there is no update in pipeA, but some damage are in
pipeB. That will improperly trigger full update.
> Assisted-by: Copilot:claude-opus-5
> Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 184 +++++++++++++++++---
> --
> drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +-
> drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +-
> 3 files changed, 145 insertions(+), 43 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index c1994da38567..4743b5b91743 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2657,9 +2657,11 @@ void
> intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
> break;
> }
>
> - intel_de_write_dsb(display, dsb,
> - PSR2_MAN_TRK_CTL(display,
> cpu_transcoder),
> - crtc_state->psr2_man_track_ctl);
> + /* The joined pipes drive one transcoder, so program it
> once. */
> + if (!intel_crtc_is_joiner_secondary(crtc_state))
> + intel_de_write_dsb(display, dsb,
> + PSR2_MAN_TRK_CTL(display,
> cpu_transcoder),
> + crtc_state->psr2_man_track_ctl);
>
> if (!crtc_state->enable_psr2_su_region_et)
> return;
> @@ -2670,7 +2672,7 @@ void
> intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
> if (!crtc_state->dsc.compression_enable)
> return;
>
> - intel_dsc_su_et_parameters_configure(dsb, encoder,
> crtc_state,
> + intel_dsc_su_et_parameters_configure(dsb, crtc_state,
>
> drm_rect_height(&crtc_state->psr2_su_area));
> }
>
> @@ -2900,12 +2902,11 @@ intel_psr_apply_su_area_workarounds(struct
> intel_crtc_state *crtc_state)
> intel_psr_apply_pr_link_on_su_wa(crtc_state);
> }
>
> -int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> - struct intel_crtc *crtc)
> +static int psr2_sel_fetch_compute_su_area(struct intel_atomic_state
> *state,
> + struct intel_crtc *crtc,
> + bool *full_update)
> {
> struct intel_display *display = to_intel_display(state);
> - const struct intel_crtc_state *old_crtc_state =
> - intel_atomic_get_old_crtc_state(state, crtc);
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> struct intel_plane_state *new_plane_state, *old_plane_state;
> struct intel_plane *plane;
> @@ -2915,28 +2916,14 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> .x2 = drm_rect_width(&crtc_state->pipe_src),
> .y2 = drm_rect_height(&crtc_state->pipe_src),
> };
> - bool full_update = false, su_area_changed;
> + bool su_area_changed;
> int i, ret;
>
> - /*
> - * Selective fetch is not always usable, for instance it is
> dropped
> - * while pipe CRC is active. The planes keep their selective
> fetch
> - * enable bit set in hardware over that, and a plane
> disabled while
> - * selective fetch is off never gets the bit cleared. Once
> selective
> - * fetch comes back the hardware would resume fetching for a
> plane that
> - * is no longer enabled and keep its DDB range reserved, so
> have the
> - * plane update drop the bit for every plane of the pipe as
> selective
> - * fetch is turned off.
> - */
> - crtc_state->clear_psr2_sel_fetch = old_crtc_state-
> >enable_psr2_sel_fetch &&
> - !crtc_state->enable_psr2_sel_fetch;
> -
> - if (!crtc_state->enable_psr2_sel_fetch)
> - return 0;
> + *full_update = false;
>
> if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
> - full_update = true;
> - goto skip_sel_fetch_set_loop;
> + *full_update = true;
> + return 0;
> }
>
> crtc_state->psr2_su_area.x1 = 0;
> @@ -2963,7 +2950,7 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> continue;
>
> if
> (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
> - full_update = true;
> + *full_update = true;
> break;
> }
>
> @@ -3023,11 +3010,11 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> drm_info_once(display->drm,
> "Selective fetch area calculation
> failed in pipe %c\n",
> pipe_name(crtc->pipe));
> - full_update = true;
> + *full_update = true;
> }
>
> - if (full_update)
> - goto skip_sel_fetch_set_loop;
> + if (*full_update)
> + return 0;
>
> intel_psr_apply_su_area_workarounds(crtc_state);
>
> @@ -3035,6 +3022,21 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> if (ret)
> return ret;
>
> + /*
> + * The loop above never saw the planes pulled in just now,
> and the area
> + * has to be final before the joined pipes merge it.
> + */
> + for_each_new_intel_plane_in_state(state, plane,
> new_plane_state, i) {
> + if (new_plane_state->hw.crtc != crtc_state-
> >uapi.crtc ||
> + !new_plane_state->uapi.visible)
> + continue;
> +
> + if
> (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
> + *full_update = true;
> + return 0;
> + }
> + }
> +
> do {
> bool cursor_in_su_area = false;
>
> @@ -3063,6 +3065,58 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> break;
> } while (su_area_changed);
>
> + return 0;
> +}
> +
> +/*
> + * The joined pipes share one transcoder, and thus one SU region
> describing the
> + * whole joined frame. Joining splits the image horizontally, so the
> pipes share
> + * the Y coordinate space and each of them has to fetch the merged
> range.
> + */
> +static void psr2_sel_fetch_merge_su_area(struct intel_atomic_state
> *state,
> + u8 joined_pipes)
> +{
> + struct intel_display *display = to_intel_display(state);
> + struct intel_crtc_state *crtc_state;
> + struct intel_crtc *crtc;
> + int y1 = INT_MAX, y2 = INT_MIN;
> +
> + for_each_intel_crtc_in_pipe_mask(display, crtc,
> joined_pipes) {
> + crtc_state = intel_atomic_get_new_crtc_state(state,
> crtc);
> +
> + y1 = min(y1, crtc_state->psr2_su_area.y1);
> + y2 = max(y2, crtc_state->psr2_su_area.y2);
> + }
> +
> + for_each_intel_crtc_in_pipe_mask(display, crtc,
> joined_pipes) {
> + crtc_state = intel_atomic_get_new_crtc_state(state,
> crtc);
> +
> + crtc_state->psr2_su_area.y1 = y1;
> + crtc_state->psr2_su_area.y2 = y2;
You should also handle case where cursor is partially covered by the su
area after this step.
> + }
> +}
> +
> +static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state
> *state,
> + struct intel_crtc *crtc,
> + bool full_update)
> +{
> + struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> + struct intel_plane_state *new_plane_state, *old_plane_state;
> + struct intel_plane *plane;
> + struct drm_rect display_area = {
> + .x1 = 0,
> + .y1 = 0,
> + .x2 = drm_rect_width(&crtc_state->pipe_src),
> + .y2 = drm_rect_height(&crtc_state->pipe_src),
> + };
> + int i;
> +
> + if (full_update) {
> + clip_area_update(&crtc_state->psr2_su_area,
> &display_area,
> + &display_area);
> + goto out;
> + }
> +
> /*
> * Now that we have the pipe damaged area check if it
> intersect with
> * every plane, if it does set the plane selective fetch
> area.
> @@ -3091,12 +3145,6 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> continue;
> }
>
> - if
> (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
> - full_update = true;
> - break;
> - }
> -
> - sel_fetch_area = &new_plane_state-
> >psr2_sel_fetch_area;
> sel_fetch_area->y1 = inter.y1 - new_plane_state-
> >uapi.dst.y1;
> sel_fetch_area->y2 = inter.y2 - new_plane_state-
> >uapi.dst.y1;
> crtc_state->update_planes |= BIT(plane->id);
> @@ -3120,14 +3168,68 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> }
> }
>
> -skip_sel_fetch_set_loop:
> - if (full_update)
> - clip_area_update(&crtc_state->psr2_su_area,
> &display_area,
> - &display_area);
> -
> +out:
> psr2_man_trk_ctl_calc(crtc_state, full_update);
> crtc_state->pipe_srcsz_early_tpt =
> psr2_pipe_srcsz_early_tpt_calc(crtc_state,
> full_update);
> +
> + return 0;
> +}
> +
> +int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> +{
> + struct intel_display *display = to_intel_display(state);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> + struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> + struct intel_crtc *joined_crtc;
> + bool full_update = false;
> + u8 joined_pipes;
> + int ret;
> +
> + /*
> + * Selective fetch is not always usable, for instance it is
> dropped
> + * while pipe CRC is active. The planes keep their selective
> fetch
> + * enable bit set in hardware over that, and a plane
> disabled while
> + * selective fetch is off never gets the bit cleared. Once
> selective
> + * fetch comes back the hardware would resume fetching for a
> plane that
> + * is no longer enabled and keep its DDB range reserved, so
> have the
> + * plane update drop the bit for every plane of the pipe as
> selective
> + * fetch is turned off.
> + */
> + crtc_state->clear_psr2_sel_fetch = old_crtc_state-
> >enable_psr2_sel_fetch &&
> + !crtc_state->enable_psr2_sel_fetch;
> +
> + if (!crtc_state->enable_psr2_sel_fetch)
> + return 0;
> +
> + /* The joined pipes are handled in one go from the primary.
> */
> + if (intel_crtc_is_joiner_secondary(crtc_state))
> + return 0;
> +
> + joined_pipes = intel_crtc_joined_pipe_mask(crtc_state);
> +
> + for_each_intel_crtc_in_pipe_mask(display, joined_crtc,
> joined_pipes) {
> + bool pipe_full_update;
> +
> + ret = psr2_sel_fetch_compute_su_area(state,
> joined_crtc,
> +
> &pipe_full_update);
> + if (ret)
> + return ret;
> +
> + full_update |= pipe_full_update;
I think you could break immediately.
BR,
Jouni Högander
> + }
> +
> + if (!full_update)
> + psr2_sel_fetch_merge_su_area(state, joined_pipes);
> +
> + for_each_intel_crtc_in_pipe_mask(display, joined_crtc,
> joined_pipes) {
> + ret = psr2_sel_fetch_apply_su_area(state,
> joined_crtc, full_update);
> + if (ret)
> + return ret;
> + }
> +
> return 0;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> b/drivers/gpu/drm/i915/display/intel_vdsc.c
> index 8f06c3a4d56d..29eec44ca3b0 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> @@ -820,7 +820,7 @@ void intel_dsc_dp_pps_write(struct intel_encoder
> *encoder,
> sizeof(dp_dsc_pps_sdp));
> }
>
> -void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> struct intel_encoder *encoder,
> +void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> const struct
> intel_crtc_state *crtc_state, int su_lines)
> {
> struct intel_display *display =
> to_intel_display(crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h
> b/drivers/gpu/drm/i915/display/intel_vdsc.h
> index 3372f8694054..08a3ffedb8ec 100644
> --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> @@ -38,7 +38,7 @@ void intel_dsc_dsi_pps_write(struct intel_encoder
> *encoder,
> const struct intel_crtc_state
> *crtc_state);
> void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state);
> -void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> struct intel_encoder *encoder,
> +void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> const struct
> intel_crtc_state *crtc_state, int su_lines);
> void intel_vdsc_state_dump(struct drm_printer *p, int indent,
> const struct intel_crtc_state
> *crtc_state);
^ permalink raw reply [flat|nested] 18+ messages in thread
* RE: [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes
2026-10-07 10:25 ` Hogander, Jouni
@ 2026-10-09 6:50 ` Kahola, Mika
0 siblings, 0 replies; 18+ messages in thread
From: Kahola, Mika @ 2026-10-09 6:50 UTC (permalink / raw)
To: Hogander, Jouni, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Wednesday, 7 October 2026 13.26
> To: intel-xe@lists.freedesktop.org; Kahola, Mika <mika.kahola@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes
>
> On Wed, 2026-09-23 at 11:59 +0000, Mika Kahola wrote:
> > PSR2_MAN_TRK_CTL is per transcoder and a joined config has only one
> > transcoder, so both joined pipes would program it and the primary
> > would win. Merge the per-pipe areas, hand the result back to every
> > joined pipe before the plane areas are set and write the transcoder
> > register from the primary only. The joiner splits the image
> > horizontally, so the pipes share the Y coordinate space and all of
> > them have to fetch the merged range.
> >
> > The plane support check has to run before the merge, so it now covers
> > every visible plane instead of only the ones intersecting the area.
>
> there is this step in current intel_psr2_sel_fetch_update:
>
> if (crtc_state->psr2_su_area.y1 == -1) {
> drm_info_once(display->drm,
> "Selective fetch area calculation failed
> in pipe %c\n",
> pipe_name(crtc->pipe));
> full_update = true;
> }
>
> Consider case where there is no update in pipeA, but some damage are in
> pipeB. That will improperly trigger full update.
Right, there's absolutely no need to do full update in case only either of the pipes has damage area.
>
>
> > Assisted-by: Copilot:claude-opus-5
> > Signed-off-by: Mika Kahola <mika.kahola@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_psr.c | 184 +++++++++++++++++---
> > --
> > drivers/gpu/drm/i915/display/intel_vdsc.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_vdsc.h | 2 +-
> > 3 files changed, 145 insertions(+), 43 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index c1994da38567..4743b5b91743 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2657,9 +2657,11 @@ void
> > intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
> > break;
> > }
> >
> > - intel_de_write_dsb(display, dsb,
> > - PSR2_MAN_TRK_CTL(display,
> > cpu_transcoder),
> > - crtc_state->psr2_man_track_ctl);
> > + /* The joined pipes drive one transcoder, so program it
> > once. */
> > + if (!intel_crtc_is_joiner_secondary(crtc_state))
> > + intel_de_write_dsb(display, dsb,
> > + PSR2_MAN_TRK_CTL(display,
> > cpu_transcoder),
> > + crtc_state->psr2_man_track_ctl);
> >
> > if (!crtc_state->enable_psr2_su_region_et)
> > return;
> > @@ -2670,7 +2672,7 @@ void
> > intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb,
> > if (!crtc_state->dsc.compression_enable)
> > return;
> >
> > - intel_dsc_su_et_parameters_configure(dsb, encoder,
> > crtc_state,
> > + intel_dsc_su_et_parameters_configure(dsb, crtc_state,
> >
> > drm_rect_height(&crtc_state->psr2_su_area));
> > }
> >
> > @@ -2900,12 +2902,11 @@ intel_psr_apply_su_area_workarounds(struct
> > intel_crtc_state *crtc_state)
> > intel_psr_apply_pr_link_on_su_wa(crtc_state);
> > }
> >
> > -int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> > - struct intel_crtc *crtc)
> > +static int psr2_sel_fetch_compute_su_area(struct intel_atomic_state
> > *state,
> > + struct intel_crtc *crtc,
> > + bool *full_update)
> > {
> > struct intel_display *display = to_intel_display(state);
> > - const struct intel_crtc_state *old_crtc_state =
> > - intel_atomic_get_old_crtc_state(state, crtc);
> > struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > struct intel_plane_state *new_plane_state, *old_plane_state;
> > struct intel_plane *plane;
> > @@ -2915,28 +2916,14 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > .x2 = drm_rect_width(&crtc_state->pipe_src),
> > .y2 = drm_rect_height(&crtc_state->pipe_src),
> > };
> > - bool full_update = false, su_area_changed;
> > + bool su_area_changed;
> > int i, ret;
> >
> > - /*
> > - * Selective fetch is not always usable, for instance it is
> > dropped
> > - * while pipe CRC is active. The planes keep their selective
> > fetch
> > - * enable bit set in hardware over that, and a plane
> > disabled while
> > - * selective fetch is off never gets the bit cleared. Once
> > selective
> > - * fetch comes back the hardware would resume fetching for a
> > plane that
> > - * is no longer enabled and keep its DDB range reserved, so
> > have the
> > - * plane update drop the bit for every plane of the pipe as
> > selective
> > - * fetch is turned off.
> > - */
> > - crtc_state->clear_psr2_sel_fetch = old_crtc_state-
> > >enable_psr2_sel_fetch &&
> > - !crtc_state->enable_psr2_sel_fetch;
> > -
> > - if (!crtc_state->enable_psr2_sel_fetch)
> > - return 0;
> > + *full_update = false;
> >
> > if (!psr2_sel_fetch_pipe_state_supported(crtc_state)) {
> > - full_update = true;
> > - goto skip_sel_fetch_set_loop;
> > + *full_update = true;
> > + return 0;
> > }
> >
> > crtc_state->psr2_su_area.x1 = 0;
> > @@ -2963,7 +2950,7 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > continue;
> >
> > if
> > (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
> > - full_update = true;
> > + *full_update = true;
> > break;
> > }
> >
> > @@ -3023,11 +3010,11 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > drm_info_once(display->drm,
> > "Selective fetch area calculation
> > failed in pipe %c\n",
> > pipe_name(crtc->pipe));
> > - full_update = true;
> > + *full_update = true;
> > }
> >
> > - if (full_update)
> > - goto skip_sel_fetch_set_loop;
> > + if (*full_update)
> > + return 0;
> >
> > intel_psr_apply_su_area_workarounds(crtc_state);
> >
> > @@ -3035,6 +3022,21 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > if (ret)
> > return ret;
> >
> > + /*
> > + * The loop above never saw the planes pulled in just now,
> > and the area
> > + * has to be final before the joined pipes merge it.
> > + */
> > + for_each_new_intel_plane_in_state(state, plane,
> > new_plane_state, i) {
> > + if (new_plane_state->hw.crtc != crtc_state-
> > >uapi.crtc ||
> > + !new_plane_state->uapi.visible)
> > + continue;
> > +
> > + if
> > (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
> > + *full_update = true;
> > + return 0;
> > + }
> > + }
> > +
> > do {
> > bool cursor_in_su_area = false;
> >
> > @@ -3063,6 +3065,58 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > break;
> > } while (su_area_changed);
> >
> > + return 0;
> > +}
> > +
> > +/*
> > + * The joined pipes share one transcoder, and thus one SU region
> > describing the
> > + * whole joined frame. Joining splits the image horizontally, so the
> > pipes share
> > + * the Y coordinate space and each of them has to fetch the merged
> > range.
> > + */
> > +static void psr2_sel_fetch_merge_su_area(struct intel_atomic_state
> > *state,
> > + u8 joined_pipes)
> > +{
> > + struct intel_display *display = to_intel_display(state);
> > + struct intel_crtc_state *crtc_state;
> > + struct intel_crtc *crtc;
> > + int y1 = INT_MAX, y2 = INT_MIN;
> > +
> > + for_each_intel_crtc_in_pipe_mask(display, crtc,
> > joined_pipes) {
> > + crtc_state = intel_atomic_get_new_crtc_state(state,
> > crtc);
> > +
> > + y1 = min(y1, crtc_state->psr2_su_area.y1);
> > + y2 = max(y2, crtc_state->psr2_su_area.y2);
> > + }
> > +
> > + for_each_intel_crtc_in_pipe_mask(display, crtc,
> > joined_pipes) {
> > + crtc_state = intel_atomic_get_new_crtc_state(state,
> > crtc);
> > +
> > + crtc_state->psr2_su_area.y1 = y1;
> > + crtc_state->psr2_su_area.y2 = y2;
>
> You should also handle case where cursor is partially covered by the su
> area after this step.
Right, the cursor now can intersect the merged area. Good catch!
>
> > + }
> > +}
> > +
> > +static int psr2_sel_fetch_apply_su_area(struct intel_atomic_state
> > *state,
> > + struct intel_crtc *crtc,
> > + bool full_update)
> > +{
> > + struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > + struct intel_plane_state *new_plane_state, *old_plane_state;
> > + struct intel_plane *plane;
> > + struct drm_rect display_area = {
> > + .x1 = 0,
> > + .y1 = 0,
> > + .x2 = drm_rect_width(&crtc_state->pipe_src),
> > + .y2 = drm_rect_height(&crtc_state->pipe_src),
> > + };
> > + int i;
> > +
> > + if (full_update) {
> > + clip_area_update(&crtc_state->psr2_su_area,
> > &display_area,
> > + &display_area);
> > + goto out;
> > + }
> > +
> > /*
> > * Now that we have the pipe damaged area check if it
> > intersect with
> > * every plane, if it does set the plane selective fetch
> > area.
> > @@ -3091,12 +3145,6 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > continue;
> > }
> >
> > - if
> > (!psr2_sel_fetch_plane_state_supported(new_plane_state)) {
> > - full_update = true;
> > - break;
> > - }
> > -
> > - sel_fetch_area = &new_plane_state-
> > >psr2_sel_fetch_area;
> > sel_fetch_area->y1 = inter.y1 - new_plane_state-
> > >uapi.dst.y1;
> > sel_fetch_area->y2 = inter.y2 - new_plane_state-
> > >uapi.dst.y1;
> > crtc_state->update_planes |= BIT(plane->id);
> > @@ -3120,14 +3168,68 @@ int intel_psr2_sel_fetch_update(struct
> > intel_atomic_state *state,
> > }
> > }
> >
> > -skip_sel_fetch_set_loop:
> > - if (full_update)
> > - clip_area_update(&crtc_state->psr2_su_area,
> > &display_area,
> > - &display_area);
> > -
> > +out:
> > psr2_man_trk_ctl_calc(crtc_state, full_update);
> > crtc_state->pipe_srcsz_early_tpt =
> > psr2_pipe_srcsz_early_tpt_calc(crtc_state,
> > full_update);
> > +
> > + return 0;
> > +}
> > +
> > +int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> > + struct intel_crtc *crtc)
> > +{
> > + struct intel_display *display = to_intel_display(state);
> > + const struct intel_crtc_state *old_crtc_state =
> > + intel_atomic_get_old_crtc_state(state, crtc);
> > + struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > + struct intel_crtc *joined_crtc;
> > + bool full_update = false;
> > + u8 joined_pipes;
> > + int ret;
> > +
> > + /*
> > + * Selective fetch is not always usable, for instance it is
> > dropped
> > + * while pipe CRC is active. The planes keep their selective
> > fetch
> > + * enable bit set in hardware over that, and a plane
> > disabled while
> > + * selective fetch is off never gets the bit cleared. Once
> > selective
> > + * fetch comes back the hardware would resume fetching for a
> > plane that
> > + * is no longer enabled and keep its DDB range reserved, so
> > have the
> > + * plane update drop the bit for every plane of the pipe as
> > selective
> > + * fetch is turned off.
> > + */
> > + crtc_state->clear_psr2_sel_fetch = old_crtc_state-
> > >enable_psr2_sel_fetch &&
> > + !crtc_state->enable_psr2_sel_fetch;
> > +
> > + if (!crtc_state->enable_psr2_sel_fetch)
> > + return 0;
> > +
> > + /* The joined pipes are handled in one go from the primary.
> > */
> > + if (intel_crtc_is_joiner_secondary(crtc_state))
> > + return 0;
> > +
> > + joined_pipes = intel_crtc_joined_pipe_mask(crtc_state);
> > +
> > + for_each_intel_crtc_in_pipe_mask(display, joined_crtc,
> > joined_pipes) {
> > + bool pipe_full_update;
> > +
> > + ret = psr2_sel_fetch_compute_su_area(state,
> > joined_crtc,
> > +
> > &pipe_full_update);
> > + if (ret)
> > + return ret;
> > +
> > + full_update |= pipe_full_update;
>
> I think you could break immediately.
Yes, that can be done.
Thanks for the review. I will fix these and spin out v2 shortly.
>
> BR,
> Jouni Högander
>
>
> > + }
> > +
> > + if (!full_update)
> > + psr2_sel_fetch_merge_su_area(state, joined_pipes);
> > +
> > + for_each_intel_crtc_in_pipe_mask(display, joined_crtc,
> > joined_pipes) {
> > + ret = psr2_sel_fetch_apply_su_area(state,
> > joined_crtc, full_update);
> > + if (ret)
> > + return ret;
> > + }
> > +
> > return 0;
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > index 8f06c3a4d56d..29eec44ca3b0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vdsc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
> > @@ -820,7 +820,7 @@ void intel_dsc_dp_pps_write(struct intel_encoder
> > *encoder,
> > sizeof(dp_dsc_pps_sdp));
> > }
> >
> > -void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> > struct intel_encoder *encoder,
> > +void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> > const struct
> > intel_crtc_state *crtc_state, int su_lines)
> > {
> > struct intel_display *display =
> > to_intel_display(crtc_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.h
> > b/drivers/gpu/drm/i915/display/intel_vdsc.h
> > index 3372f8694054..08a3ffedb8ec 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vdsc.h
> > +++ b/drivers/gpu/drm/i915/display/intel_vdsc.h
> > @@ -38,7 +38,7 @@ void intel_dsc_dsi_pps_write(struct intel_encoder
> > *encoder,
> > const struct intel_crtc_state
> > *crtc_state);
> > void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
> > const struct intel_crtc_state
> > *crtc_state);
> > -void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> > struct intel_encoder *encoder,
> > +void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb,
> > const struct
> > intel_crtc_state *crtc_state, int su_lines);
> > void intel_vdsc_state_dump(struct drm_printer *p, int indent,
> > const struct intel_crtc_state
> > *crtc_state);
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2026-10-09 6:54 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-09-23 11:59 [PATCH 0/5] drm/i915/psr: Panel Replay and PSR2 with the joiner Mika Kahola
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Track all joined pipes for frontbuffer tracking Mika Kahola
2026-09-24 13:02 ` Hogander, Jouni
2026-09-25 7:17 ` Kahola, Mika
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Take the selective fetch area from pipe_src Mika Kahola
2026-09-24 9:45 ` Hogander, Jouni
2026-09-25 7:00 ` Kahola, Mika
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Merge the selective fetch area across joined pipes Mika Kahola
2026-10-07 10:25 ` Hogander, Jouni
2026-10-09 6:50 ` Kahola, Mika
2026-09-23 11:59 ` [PATCH] drm/i915/psr: Allow Panel Replay and PSR2 with joiner Mika Kahola
2026-09-25 11:06 ` Hogander, Jouni
2026-09-25 12:32 ` Kahola, Mika
2026-09-23 11:59 ` [PATCH] drm/i915/display: Allow forcing the joiner on eDP Mika Kahola
2026-09-25 11:08 ` Hogander, Jouni
2026-09-23 12:08 ` ✓ CI.KUnit: success for " Patchwork
2026-09-23 12:59 ` ✓ Xe.CI.BAT: " Patchwork
2026-09-24 2:10 ` ✗ Xe.CI.FULL: failure " Patchwork
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