From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: uma.shankar@intel.com, ville.syrjala@linux.intel.com,
Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: Re: [PATCH 6/9] drm/i915/display_wa: Add support for Wa_14021768792
Date: Tue, 29 Jul 2025 14:10:33 +0300 [thread overview]
Message-ID: <fce4d22ba4d2aaa2a79a2826185d28538f469a63@intel.com> (raw)
In-Reply-To: <20250721091529.3864004-7-ankit.k.nautiyal@intel.com>
On Mon, 21 Jul 2025, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Some BMG ultrajoiner configurations require support for Link M/N ratios
> between 10.0 and 15.0. This range is not natively supported and requires
> a workaround.
>
> Wa_14021768792 enables this support by utilizing HDMI_EMP_DATA,
> CHICKEN_BITs, and extended bits in the LINK_N registers.
>
> Add the necessary logic to enable the workaround on applicable platforms.
>
> Bspec: 49266
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_wa.c | 18 ++++++++++++++++++
> .../gpu/drm/i915/display/intel_display_wa.h | 1 +
> 2 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.c b/drivers/gpu/drm/i915/display/intel_display_wa.c
> index 399c08902413..541967168e97 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.c
> @@ -5,11 +5,13 @@
>
> #include <drm/drm_print.h>
>
> +#include "i915_drv.h"
Please do not add new includes of i915_drv.h in display/.
> #include "i915_reg.h"
> #include "intel_de.h"
> #include "intel_display_core.h"
> #include "intel_display_regs.h"
> #include "intel_display_wa.h"
> +#include "intel_step.h"
>
> static void gen11_display_wa_apply(struct intel_display *display)
> {
> @@ -52,6 +54,20 @@ static bool intel_display_needs_wa_16025573575(struct intel_display *display)
> return DISPLAY_VERx100(display) == 3000 || DISPLAY_VERx100(display) == 3002;
> }
>
> +/*
> + * Wa_14021768792:
> + * Fixes: Limitation of Link M/N ratio > 10 for specific Xe2HPD platforms.
> + * Workaround: Use HDMI_EMP_DATA, CHICKEN_BITs and extended bits in LINK_N registers to support
> + * LINK M/N ratios from > 10 but < 15.
> + */
> +static bool intel_display_needs_wa_14021768792(struct intel_display *display)
> +{
> + struct drm_i915_private *i915 = to_i915(display->drm);
Please do not add new uses of struct drm_i915_private under display/.
> +
> + return (DISPLAY_VER(display) == 14 && IS_DGFX(i915) &&
s/IS_DGFX(i915)/display->platform.dgfx/
> + IS_DISPLAY_STEP(display, STEP_C0, STEP_FOREVER));
> +}
> +
> bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name)
> {
> switch (wa) {
> @@ -59,6 +75,8 @@ bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa,
> return intel_display_needs_wa_16023588340(display);
> case INTEL_DISPLAY_WA_16025573575:
> return intel_display_needs_wa_16025573575(display);
> + case INTEL_DISPLAY_WA_14021768792:
> + return intel_display_needs_wa_14021768792(display);
> default:
> drm_WARN(display->drm, 1, "Missing Wa number: %s\n", name);
> break;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_wa.h b/drivers/gpu/drm/i915/display/intel_display_wa.h
> index aedea4cfa3ce..8470f4ceea1a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_wa.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_wa.h
> @@ -24,6 +24,7 @@ bool intel_display_needs_wa_16023588340(struct intel_display *display);
> enum intel_display_wa {
> INTEL_DISPLAY_WA_16023588340,
> INTEL_DISPLAY_WA_16025573575,
> + INTEL_DISPLAY_WA_14021768792,
> };
>
> bool __intel_display_wa(struct intel_display *display, enum intel_display_wa wa, const char *name);
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-07-29 11:10 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-21 9:15 [PATCH 0/4] Implement Wa_14021768792 to bypass m_n ratio limit Ankit Nautiyal
2025-07-21 9:15 ` [PATCH 1/9] drm/i915: Add helper to compute link M/N ratio for reuse Ankit Nautiyal
2025-07-21 9:15 ` [PATCH 2/9] drm/i915/dp: Limit m/n ratio to 10 for DP SST Ankit Nautiyal
2025-07-21 11:41 ` Imre Deak
2025-07-22 5:55 ` Nautiyal, Ankit K
2025-07-22 9:22 ` Imre Deak
2025-07-22 15:15 ` Nautiyal, Ankit K
2025-07-21 9:15 ` [PATCH 3/9] drm/i915/dp_mst: Limit m/n ratio to 10 for MST Ankit Nautiyal
2025-07-21 9:15 ` [PATCH 4/9] drm/i915/dp: Add M/N ratio check with warning for DP link config Ankit Nautiyal
2025-07-21 9:15 ` [PATCH 5/9] drm/i915/display: Add bits for link_n_exended for DISPLAY >= 14 Ankit Nautiyal
2025-07-29 11:08 ` Jani Nikula
2025-07-21 9:15 ` [PATCH 6/9] drm/i915/display_wa: Add support for Wa_14021768792 Ankit Nautiyal
2025-07-29 11:10 ` Jani Nikula [this message]
2025-07-21 9:15 ` [PATCH 7/9] drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10 Ankit Nautiyal
2025-07-21 9:15 ` [PATCH 8/9] drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n " Ankit Nautiyal
2025-07-21 9:15 ` [PATCH 9/9] drm/i915/dp: Extend intel_dp_can_support_m_n() for BMG M/N bypass Ankit Nautiyal
2025-07-21 9:34 ` ✗ CI.checkpatch: warning for Implement Wa_14021768792 to bypass m_n ratio limit (rev5) Patchwork
2025-07-21 9:35 ` ✓ CI.KUnit: success " Patchwork
2025-07-21 9:50 ` ✗ CI.checksparse: warning " Patchwork
2025-07-21 17:27 ` ✓ Xe.CI.BAT: success " Patchwork
2025-07-21 18:17 ` ✗ Xe.CI.Full: failure " Patchwork
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