* [PATCH v12 01/10] drm/xe/uc_fw: Allow re-initializing firmware
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:06 ` [PATCH v12 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
` (12 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing firmware without
reloading the driver, introduce xe_uc_fw_reinit(). The uC firmware bo
already exists but since it's contents are on VRAM, they are lost on PCIe
FLR. Copy the firmware back to it's bo and mark it as loadable as part of
re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v6: Skip uC firmware selection during re-initialization (Daniele)
v8: Set fw state to XE_UC_FIRMWARE_INIT_FAIL on failure (Daniele)
---
drivers/gpu/drm/xe/xe_uc_fw.c | 67 +++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_uc_fw.h | 1 +
2 files changed, 68 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.c b/drivers/gpu/drm/xe/xe_uc_fw.c
index 85472c8fb2b1..79e6d7d6c712 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.c
+++ b/drivers/gpu/drm/xe/xe_uc_fw.c
@@ -841,6 +841,14 @@ static int uc_fw_copy(struct xe_uc_fw *uc_fw, const void *data, size_t size, u32
return err;
}
+static void uc_fw_reinit(struct xe_uc_fw *uc_fw, const void *data)
+{
+ struct xe_device *xe = uc_fw_to_xe(uc_fw);
+
+ xe_map_memcpy_to(xe, &uc_fw->bo->vmap, 0, data, uc_fw->size);
+ xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_LOADABLE);
+}
+
int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
{
const struct firmware *fw = NULL;
@@ -864,6 +872,65 @@ int xe_uc_fw_init(struct xe_uc_fw *uc_fw)
}
ALLOW_ERROR_INJECTION(xe_uc_fw_init, ERRNO); /* See xe_pci_probe() */
+/**
+ * xe_uc_fw_reinit() - Re-initialize uC firmware into its bo
+ * @uc_fw: uC firmware
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw)
+{
+ struct xe_device *xe = uc_fw_to_xe(uc_fw);
+ struct xe_uc_fw_version old_fw, new_fw;
+ const struct firmware *fw = NULL;
+ int err;
+
+ /* Make sure the status was cleared the last time we reset the uc */
+ xe_assert(xe, !xe_uc_fw_is_loaded(uc_fw));
+
+ /* We shouldn't be here for the firmware which wasn't available */
+ if (!xe_uc_fw_is_available(uc_fw))
+ return -ENOEXEC;
+
+ old_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+
+ err = firmware_request_nowarn(&fw, uc_fw->path, xe->drm.dev);
+ if (err)
+ goto init_fail;
+
+ err = parse_headers(uc_fw, fw);
+ if (err)
+ goto restore_old;
+
+ new_fw = uc_fw->versions.found[XE_UC_FW_VER_RELEASE];
+ if (memcmp(&old_fw, &new_fw, sizeof(old_fw)) || uc_fw->size != fw->size) {
+ drm_err(&xe->drm, "%s firmware mismatch on %s",
+ xe_uc_fw_type_repr(uc_fw->type), uc_fw->path);
+
+ err = -ENOEXEC;
+ goto restore_old;
+ }
+
+ uc_fw_reinit(uc_fw, fw->data);
+ uc_fw_release(fw);
+ return 0;
+
+restore_old:
+ /*
+ * parse_headers() updates version details, so restore original version
+ * before bailing.
+ *
+ * TODO: Create a struct of all the fields touched by parse_headers()
+ * and restore them all.
+ */
+ uc_fw->versions.found[XE_UC_FW_VER_RELEASE] = old_fw;
+init_fail:
+ xe_uc_fw_change_status(uc_fw, XE_UC_FIRMWARE_INIT_FAIL);
+ /* OK even if fw is NULL */
+ uc_fw_release(fw);
+ return err;
+}
+
static u32 uc_fw_ggtt_offset(struct xe_uc_fw *uc_fw)
{
return xe_bo_ggtt_addr(uc_fw->bo);
diff --git a/drivers/gpu/drm/xe/xe_uc_fw.h b/drivers/gpu/drm/xe/xe_uc_fw.h
index f2d3a3e7208b..6debdb924310 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw.h
@@ -15,6 +15,7 @@
struct drm_printer;
int xe_uc_fw_init(struct xe_uc_fw *uc_fw);
+int xe_uc_fw_reinit(struct xe_uc_fw *uc_fw);
size_t xe_uc_fw_copy_rsa(struct xe_uc_fw *uc_fw, void *dst, u32 max_len);
int xe_uc_fw_upload(struct xe_uc_fw *uc_fw, u32 offset, u32 dma_flags);
int xe_uc_fw_check_version_requirements(struct xe_uc_fw *uc_fw);
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v12 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-11-03 6:06 ` [PATCH v12 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:06 ` [PATCH v12 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
` (11 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing GuC submission
after PCIe FLR, introduce guc_exec_queue_reinit_kernel() helper. This will
restore kernel queues which might have been killed before PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v5: Re-initialize kernel queues through submission backend (Matthew Brost)
v8: Introduce xe_sched_reinit() (Daniele)
Maintain timeout per scheduler instance (Daniele)
s/reinit/reinit_kernel (Daniele)
v9: Move drm_sched_is_stopped() assert to xe_sched_reinit() (Daniele)
---
drivers/gpu/drm/xe/xe_exec_queue_types.h | 2 ++
drivers/gpu/drm/xe/xe_execlist.c | 6 ++++++
drivers/gpu/drm/xe/xe_gpu_scheduler.c | 17 +++++++++++++++++
drivers/gpu/drm/xe/xe_gpu_scheduler.h | 1 +
drivers/gpu/drm/xe/xe_gpu_scheduler_types.h | 5 +++++
drivers/gpu/drm/xe/xe_guc_submit.c | 9 +++++++++
6 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index 48c05398b016..44a41ddc7a05 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -292,6 +292,8 @@ struct xe_exec_queue {
struct xe_exec_queue_ops {
/** @init: Initialize exec queue for submission backend */
int (*init)(struct xe_exec_queue *q);
+ /** @reinit_kernel: Re-initialize kernel queue for submission backend */
+ void (*reinit_kernel)(struct xe_exec_queue *q);
/** @kill: Kill inflight submissions for backend */
void (*kill)(struct xe_exec_queue *q);
/** @fini: Undoes the init() for submission backend */
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index a6984999962d..47ed4c0e2bfe 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -407,6 +407,11 @@ static void execlist_exec_queue_destroy_async(struct work_struct *w)
drm_dev_put(&xe->drm);
}
+static void execlist_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+ /* NIY */
+}
+
static void execlist_exec_queue_kill(struct xe_exec_queue *q)
{
/* NIY */
@@ -465,6 +470,7 @@ static u64 execlist_exec_queue_reset_status(struct xe_exec_queue *q)
static const struct xe_exec_queue_ops execlist_exec_queue_ops = {
.init = execlist_exec_queue_init,
+ .reinit_kernel = execlist_exec_queue_reinit_kernel,
.kill = execlist_exec_queue_kill,
.fini = execlist_exec_queue_fini,
.destroy = execlist_exec_queue_destroy,
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.c b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
index 9c8004d5dd91..0ef77cdec51d 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.c
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.c
@@ -3,7 +3,10 @@
* Copyright © 2023 Intel Corporation
*/
+#include "xe_assert.h"
+#include "xe_exec_queue_types.h"
#include "xe_gpu_scheduler.h"
+#include "xe_guc_exec_queue_types.h"
static void xe_sched_process_msg_queue(struct xe_gpu_scheduler *sched)
{
@@ -77,6 +80,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
};
sched->ops = xe_ops;
+ sched->timeout = timeout;
spin_lock_init(&sched->msg_lock);
INIT_LIST_HEAD(&sched->msgs);
INIT_WORK(&sched->work_process_msg, xe_sched_process_msg_work);
@@ -84,6 +88,19 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
return drm_sched_init(&sched->base, &args);
}
+void xe_sched_reinit(struct xe_gpu_scheduler *sched)
+{
+ struct xe_guc_exec_queue *ge = container_of(sched, struct xe_guc_exec_queue, sched);
+
+ xe_gt_assert(ge->q->gt, drm_sched_is_stopped(&sched->base));
+
+ /*
+ * TODO: Implement drm_sched_reinit() instead of requiring the
+ * driver to restore individual fields.
+ */
+ sched->base.timeout = sched->timeout;
+}
+
void xe_sched_fini(struct xe_gpu_scheduler *sched)
{
xe_sched_submission_stop(sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler.h b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
index 664c2db56af3..22e24b4b7171 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler.h
@@ -17,6 +17,7 @@ int xe_sched_init(struct xe_gpu_scheduler *sched,
long timeout, struct workqueue_struct *timeout_wq,
atomic_t *score, const char *name,
struct device *dev);
+void xe_sched_reinit(struct xe_gpu_scheduler *sched);
void xe_sched_fini(struct xe_gpu_scheduler *sched);
void xe_sched_submission_start(struct xe_gpu_scheduler *sched);
diff --git a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
index 78ef2e8ded4f..f40764aa78e0 100644
--- a/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
+++ b/drivers/gpu/drm/xe/xe_gpu_scheduler_types.h
@@ -54,6 +54,11 @@ struct xe_gpu_scheduler {
spinlock_t msg_lock;
/** @work_process_msg: processes messages */
struct work_struct work_process_msg;
+ /**
+ * @timeout: timeout for the scheduler instance, to be restored
+ * during exec queue re-initialization
+ */
+ long timeout;
};
#define xe_sched_entity drm_sched_entity
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 9e7c2778029c..de2548358ec5 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -2225,6 +2225,14 @@ static int guc_exec_queue_init(struct xe_exec_queue *q)
return err;
}
+static void guc_exec_queue_reinit_kernel(struct xe_exec_queue *q)
+{
+ xe_gt_assert(q->gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+ atomic_set(&q->guc->state, 0);
+ xe_sched_reinit(&q->guc->sched);
+}
+
static void guc_exec_queue_kill(struct xe_exec_queue *q)
{
trace_xe_exec_queue_kill(q);
@@ -2719,6 +2727,7 @@ static u64 guc_exec_queue_reset_status(struct xe_exec_queue *q)
*/
static const struct xe_exec_queue_ops guc_exec_queue_ops = {
.init = guc_exec_queue_init,
+ .reinit_kernel = guc_exec_queue_reinit_kernel,
.kill = guc_exec_queue_kill,
.fini = guc_exec_queue_fini,
.destroy = guc_exec_queue_destroy,
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v12 03/10] drm/xe/gt: Introduce FLR helpers
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
2026-11-03 6:06 ` [PATCH v12 01/10] drm/xe/uc_fw: Allow re-initializing firmware Raag Jadav
2026-11-03 6:06 ` [PATCH v12 02/10] drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel() Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:39 ` sashiko-bot
2026-11-03 6:06 ` [PATCH v12 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
` (10 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require preparing/re-initializing GT and
all its uCs before/after PCIe FLR, introduce flr_prepare/reinit() helpers.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
v2: Add kernel doc (Matthew Brost)
v4: Teardown exec queues instead of mangling scheduler pending list (Matthew Brost)
v6: Add IS_DGFX() assert (Daniele)
s/flr_done/reinit (Daniele)
---
drivers/gpu/drm/xe/xe_gsc.c | 14 ++++++
drivers/gpu/drm/xe/xe_gsc.h | 1 +
drivers/gpu/drm/xe/xe_gt.c | 23 ++++++++++
drivers/gpu/drm/xe/xe_gt.h | 2 +
drivers/gpu/drm/xe/xe_guc.c | 29 +++++++++++++
drivers/gpu/drm/xe/xe_guc.h | 2 +
drivers/gpu/drm/xe/xe_huc.c | 14 ++++++
drivers/gpu/drm/xe/xe_huc.h | 1 +
drivers/gpu/drm/xe/xe_uc.c | 74 ++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_uc.h | 2 +
drivers/gpu/drm/xe/xe_uc_types.h | 14 ++++++
11 files changed, 176 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gsc.c b/drivers/gpu/drm/xe/xe_gsc.c
index db669a953886..8edb8cee3cbd 100644
--- a/drivers/gpu/drm/xe/xe_gsc.c
+++ b/drivers/gpu/drm/xe/xe_gsc.c
@@ -550,6 +550,20 @@ void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
flush_work(&gsc->work);
}
+/**
+ * xe_gsc_reinit() - Re-initialize GSC after FLR
+ * @gsc: The GSC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gsc_reinit(struct xe_gsc *gsc)
+{
+ if (!xe_uc_fw_is_loadable(&gsc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&gsc->fw);
+}
+
void xe_gsc_stop_prepare(struct xe_gsc *gsc)
{
struct xe_gt *gt = gsc_to_gt(gsc);
diff --git a/drivers/gpu/drm/xe/xe_gsc.h b/drivers/gpu/drm/xe/xe_gsc.h
index b8b8e0810ad9..ce390bffb163 100644
--- a/drivers/gpu/drm/xe/xe_gsc.h
+++ b/drivers/gpu/drm/xe/xe_gsc.h
@@ -15,6 +15,7 @@ struct xe_hw_engine;
int xe_gsc_init(struct xe_gsc *gsc);
int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc);
+int xe_gsc_reinit(struct xe_gsc *gsc);
void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc);
void xe_gsc_stop_prepare(struct xe_gsc *gsc);
void xe_gsc_load_start(struct xe_gsc *gsc);
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index be79a0da2f2f..0e0eb8de3a98 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -906,6 +906,29 @@ static int do_gt_restart(struct xe_gt *gt)
return 0;
}
+/**
+ * xe_gt_flr_prepare() - Prepare GT for FLR
+ * @gt: the GT object
+ *
+ * Prepare all GT uCs for FLR.
+ */
+void xe_gt_flr_prepare(struct xe_gt *gt)
+{
+ xe_gt_sanitize(gt);
+ xe_uc_flr_prepare(>->uc);
+}
+
+/**
+ * xe_gt_reinit() - Re-initialize GT after FLR
+ * @gt: the GT object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_gt_reinit(struct xe_gt *gt)
+{
+ return xe_uc_reinit(>->uc);
+}
+
static void gt_reset_worker(struct work_struct *w)
{
struct xe_gt *gt = container_of(w, typeof(*gt), reset.worker);
diff --git a/drivers/gpu/drm/xe/xe_gt.h b/drivers/gpu/drm/xe/xe_gt.h
index 7d292f9d0be7..1c701dd98edc 100644
--- a/drivers/gpu/drm/xe/xe_gt.h
+++ b/drivers/gpu/drm/xe/xe_gt.h
@@ -37,8 +37,10 @@
})
struct xe_gt *xe_gt_alloc(struct xe_tile *tile);
+void xe_gt_flr_prepare(struct xe_gt *gt);
int xe_gt_init_early(struct xe_gt *gt);
int xe_gt_init(struct xe_gt *gt);
+int xe_gt_reinit(struct xe_gt *gt);
void xe_gt_mmio_init(struct xe_gt *gt);
void xe_gt_wedge_declare(struct xe_gt *gt);
int xe_gt_record_default_lrcs(struct xe_gt *gt);
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 300126e6624f..c4fb34e64cd6 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -1736,6 +1736,35 @@ void xe_guc_sanitize(struct xe_guc *guc)
xe_guc_submit_disable(guc);
}
+/**
+ * xe_guc_flr_prepare() - Prepare GuC for FLR
+ * @guc: The GuC object
+ *
+ * Stop GuC submission and tear down exec queues.
+ */
+void xe_guc_flr_prepare(struct xe_guc *guc)
+{
+ if (!xe_uc_fw_is_loadable(&guc->fw))
+ return;
+
+ xe_guc_submit_stop(guc);
+ xe_guc_submit_pause_abort(guc);
+}
+
+/**
+ * xe_guc_reinit() - Re-initialize GuC after FLR
+ * @guc: The GuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_guc_reinit(struct xe_guc *guc)
+{
+ if (!xe_uc_fw_is_loadable(&guc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&guc->fw);
+}
+
int xe_guc_reset_prepare(struct xe_guc *guc)
{
return xe_guc_submit_reset_prepare(guc);
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index 543ba4e5981e..a73bf08df98d 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -33,10 +33,12 @@ struct drm_printer;
struct xe_gt;
void xe_guc_comm_init_early(struct xe_guc *guc);
+void xe_guc_flr_prepare(struct xe_guc *guc);
int xe_guc_init_noalloc(struct xe_guc *guc);
int xe_guc_init(struct xe_guc *guc);
int xe_guc_init_post_hwconfig(struct xe_guc *guc);
int xe_guc_post_load_init(struct xe_guc *guc);
+int xe_guc_reinit(struct xe_guc *guc);
int xe_guc_reset(struct xe_guc *guc);
void xe_guc_resume_early(struct xe_guc *guc);
int xe_guc_upload(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_huc.c b/drivers/gpu/drm/xe/xe_huc.c
index 57afe21444b1..c73e1acbd091 100644
--- a/drivers/gpu/drm/xe/xe_huc.c
+++ b/drivers/gpu/drm/xe/xe_huc.c
@@ -296,6 +296,20 @@ void xe_huc_sanitize(struct xe_huc *huc)
xe_uc_fw_sanitize(&huc->fw);
}
+/**
+ * xe_huc_reinit() - Re-initialize HuC after FLR
+ * @huc: The HuC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_huc_reinit(struct xe_huc *huc)
+{
+ if (!xe_uc_fw_is_loadable(&huc->fw))
+ return 0;
+
+ return xe_uc_fw_reinit(&huc->fw);
+}
+
void xe_huc_print_info(struct xe_huc *huc, struct drm_printer *p)
{
struct xe_gt *gt = huc_to_gt(huc);
diff --git a/drivers/gpu/drm/xe/xe_huc.h b/drivers/gpu/drm/xe/xe_huc.h
index fa1c45e70443..cb1a770b4a9c 100644
--- a/drivers/gpu/drm/xe/xe_huc.h
+++ b/drivers/gpu/drm/xe/xe_huc.h
@@ -19,6 +19,7 @@ enum xe_huc_auth_types {
int xe_huc_init(struct xe_huc *huc);
int xe_huc_init_post_hwconfig(struct xe_huc *huc);
+int xe_huc_reinit(struct xe_huc *huc);
int xe_huc_upload(struct xe_huc *huc);
int xe_huc_auth(struct xe_huc *huc, enum xe_huc_auth_types type);
bool xe_huc_is_authenticated(struct xe_huc *huc, enum xe_huc_auth_types type);
diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
index 89040d9fa05f..f5433025325c 100644
--- a/drivers/gpu/drm/xe/xe_uc.c
+++ b/drivers/gpu/drm/xe/xe_uc.c
@@ -19,6 +19,8 @@
#include "xe_guc_submit.h"
#include "xe_huc.h"
#include "xe_sriov.h"
+#include "xe_uc_fw.h"
+#include "xe_wedge.h"
#include "xe_wopcm.h"
static struct xe_gt *
@@ -279,6 +281,78 @@ static void uc_reset_wait(struct xe_uc *uc)
goto again;
}
+static void uc_flr_prepare(struct work_struct *w)
+{
+ struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+ struct xe_uc *uc = flr->uc;
+
+ xe_gt_assert(uc_to_gt(uc), xe_wedged(uc_to_xe(uc)));
+
+ xe_uc_reset_prepare(uc);
+ xe_guc_flr_prepare(&uc->guc);
+}
+
+static void uc_flr_sanitize(struct work_struct *w)
+{
+ struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
+ struct xe_uc *uc = flr->uc;
+
+ /* TODO: Sanitize GSC firmware */
+ xe_gt_assert(uc_to_gt(uc), IS_DGFX(uc_to_xe(uc)));
+ xe_gt_assert(uc_to_gt(uc), !xe_uc_fw_is_loadable(&uc->gsc.fw));
+
+ xe_uc_stop(uc);
+ xe_uc_sanitize(uc);
+}
+
+/**
+ * xe_uc_flr_prepare() - Prepare uCs for FLR
+ * @uc: The uC object
+ *
+ * Tear down pending work and stop all uCs.
+ */
+void xe_uc_flr_prepare(struct xe_uc *uc)
+{
+ struct xe_uc_flr flr = { .uc = uc };
+ struct xe_gt *gt = uc_to_gt(uc);
+
+ /*
+ * We'll be tearing down exec queues which signals all fences and frees the
+ * jobs but all of that happens asynchronously, so make sure we don't disrupt
+ * the scheduler while jobs are still in-flight.
+ */
+ INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
+ queue_work(gt->ordered_wq, &flr.work);
+ flush_work(&flr.work);
+ destroy_work_on_stack(&flr.work);
+
+ INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
+ queue_work(gt->ordered_wq, &flr.work);
+ flush_work(&flr.work);
+ destroy_work_on_stack(&flr.work);
+}
+
+/**
+ * xe_uc_reinit() - Re-initialize uCs after FLR
+ * @uc: The uC object
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_uc_reinit(struct xe_uc *uc)
+{
+ int ret;
+
+ ret = xe_guc_reinit(&uc->guc);
+ if (ret)
+ return ret;
+
+ ret = xe_huc_reinit(&uc->huc);
+ if (ret)
+ return ret;
+
+ return xe_gsc_reinit(&uc->gsc);
+}
+
void xe_uc_suspend_prepare(struct xe_uc *uc)
{
xe_gsc_wait_for_worker_completion(&uc->gsc);
diff --git a/drivers/gpu/drm/xe/xe_uc.h b/drivers/gpu/drm/xe/xe_uc.h
index 3c56327fb3f9..2978a4e32894 100644
--- a/drivers/gpu/drm/xe/xe_uc.h
+++ b/drivers/gpu/drm/xe/xe_uc.h
@@ -8,10 +8,12 @@
struct xe_uc;
+void xe_uc_flr_prepare(struct xe_uc *uc);
int xe_uc_init_noalloc(struct xe_uc *uc);
int xe_uc_init(struct xe_uc *uc);
int xe_uc_init_post_hwconfig(struct xe_uc *uc);
int xe_uc_load_hw(struct xe_uc *uc);
+int xe_uc_reinit(struct xe_uc *uc);
int xe_uc_reset_prepare(struct xe_uc *uc);
void xe_uc_resume_early(struct xe_uc *uc);
void xe_uc_runtime_resume(struct xe_uc *uc);
diff --git a/drivers/gpu/drm/xe/xe_uc_types.h b/drivers/gpu/drm/xe/xe_uc_types.h
index 1708379dc834..2b47382f7b3b 100644
--- a/drivers/gpu/drm/xe/xe_uc_types.h
+++ b/drivers/gpu/drm/xe/xe_uc_types.h
@@ -25,4 +25,18 @@ struct xe_uc {
struct xe_wopcm wopcm;
};
+/**
+ * struct xe_uc_flr - uC FLR teardown
+ */
+struct xe_uc_flr {
+ /** @uc: uC to schedule FLR worker on */
+ struct xe_uc *uc;
+
+ /**
+ * @work: worker for FLR teardown to be done async allowing to safely
+ * flush all code paths
+ */
+ struct work_struct work;
+};
+
#endif
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v12 03/10] drm/xe/gt: Introduce FLR helpers
2026-11-03 6:06 ` [PATCH v12 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
@ 2026-11-03 6:39 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-03 6:39 UTC (permalink / raw)
To: Raag Jadav, intel-xe
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] drm/xe: scheduler teardown race and work_tdr livelock in xe_uc_flr_prepare()
- [Medium] drm/xe: missing xe_tlb_inval_reset() in xe_gt_flr_prepare()
--
commit f6d30be6992dd944414ef4237e3194f7481c3b3d
Author: Raag Jadav <raag.jadav@intel.com>
drm/xe/gt: Introduce FLR helpers
This commit introduces flr_prepare() and reinit() helpers for GT and its
uCs (GuC, HuC, and GSC) to prepare and re-initialize state before and
after a PCIe FLR.
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index be79a0da2f2ff..0e0eb8de3a98e 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -906,6 +906,29 @@ static int do_gt_restart(struct xe_gt *gt)
> return 0;
> }
>
> +/**
> + * xe_gt_flr_prepare() - Prepare GT for FLR
> + * @gt: the GT object
> + *
> + * Prepare all GT uCs for FLR.
> + */
> +void xe_gt_flr_prepare(struct xe_gt *gt)
> +{
> + xe_gt_sanitize(gt);
> + xe_uc_flr_prepare(>->uc);
> +}
[Severity: Medium]
Should xe_gt_flr_prepare() also call xe_tlb_inval_reset(>->tlb_inval)
after xe_uc_flr_prepare(>->uc)?
In xe_uc_flr_prepare(), uc_flr_sanitize() calls xe_uc_stop() and
xe_uc_sanitize(), which stop and disable GuC CT communication via
xe_guc_ct_stop() and xe_guc_ct_disable(). Once GuC CT is disabled, no G2H
TLB invalidation completions can arrive.
Both gt_reset_worker() and gt_wedge_worker() call
xe_tlb_inval_reset(>->tlb_inval) after stopping uC communication:
drivers/gpu/drm/xe/xe_gt.c:gt_reset_worker() {
...
xe_uc_stop(>->uc);
xe_tlb_inval_reset(>->tlb_inval);
}
drivers/gpu/drm/xe/xe_gt.c:gt_wedge_worker() {
...
xe_uc_wedge_declare(>->uc);
xe_tlb_inval_reset(>->tlb_inval);
xe_pm_runtime_put(gt_to_xe(gt));
}
Without xe_tlb_inval_reset(>->tlb_inval), if a GGTT or PPGTT TLB
invalidation is in flight when xe_gt_flr_prepare() runs,could its fence
remain unsignaled on gt->tlb_inval.pending_fences (blocking waiters in
xe_tlb_inval_fence_wait()) while gt->tlb_inval.fence_tdr stays armed on
gt->ordered_wq across the FLR?
[ ... ]
> diff --git a/drivers/gpu/drm/xe/xe_uc.c b/drivers/gpu/drm/xe/xe_uc.c
> index 89040d9fa05ff..f5433025325cd 100644
> --- a/drivers/gpu/drm/xe/xe_uc.c
> +++ b/drivers/gpu/drm/xe/xe_uc.c
[ ... ]
> @@ -279,6 +281,78 @@ static void uc_reset_wait(struct xe_uc *uc)
> goto again;
> }
>
> +static void uc_flr_prepare(struct work_struct *w)
> +{
> + struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
> + struct xe_uc *uc = flr->uc;
> +
> + xe_gt_assert(uc_to_gt(uc), xe_wedged(uc_to_xe(uc)));
> +
> + xe_uc_reset_prepare(uc);
> + xe_guc_flr_prepare(&uc->guc);
> +}
> +
> +static void uc_flr_sanitize(struct work_struct *w)
> +{
> + struct xe_uc_flr *flr = container_of(w, struct xe_uc_flr, work);
> + struct xe_uc *uc = flr->uc;
> +
> + /* TODO: Sanitize GSC firmware */
> + xe_gt_assert(uc_to_gt(uc), IS_DGFX(uc_to_xe(uc)));
> + xe_gt_assert(uc_to_gt(uc), !xe_uc_fw_is_loadable(&uc->gsc.fw));
> +
> + xe_uc_stop(uc);
> + xe_uc_sanitize(uc);
> +}
> +
> +/**
> + * xe_uc_flr_prepare() - Prepare uCs for FLR
> + * @uc: The uC object
> + *
> + * Tear down pending work and stop all uCs.
> + */
> +void xe_uc_flr_prepare(struct xe_uc *uc)
> +{
> + struct xe_uc_flr flr = { .uc = uc };
> + struct xe_gt *gt = uc_to_gt(uc);
> +
> + /*
> + * We'll be tearing down exec queues which signals all fences and frees the
> + * jobs but all of that happens asynchronously, so make sure we don't disrupt
> + * the scheduler while jobs are still in-flight.
> + */
> + INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
> + queue_work(gt->ordered_wq, &flr.work);
> + flush_work(&flr.work);
> + destroy_work_on_stack(&flr.work);
> +
> + INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
> + queue_work(gt->ordered_wq, &flr.work);
> + flush_work(&flr.work);
> + destroy_work_on_stack(&flr.work);
> +}
[Severity: High]
Can queuing uc_flr_sanitize() on gt->ordered_wq right after uc_flr_prepare()
race with the per-scheduler submit_wq and irq_work, leading to a work_tdr
livelock on gt->ordered_wq or leaving schedulers unstopped?
Inside uc_flr_prepare(), xe_guc_flr_prepare() calls
xe_guc_submit_pause_abort(), which for each exec queue starts submission on
sched->base.submit_wq (a dedicated workqueue separate from gt->ordered_wq)
and triggers immediate TDR on gt->ordered_wq:
uc_flr_prepare()
xe_guc_flr_prepare()
xe_guc_submit_pause_abort()
xe_sched_submission_start(sched)
guc_exec_queue_kill(q)
xe_guc_exec_queue_trigger_cleanup(q)
drm_sched_tdr_queue_imm(&sched->base)
When sched->base.work_tdr (drm_sched_job_timedout()) executes on
gt->ordered_wq ahead of uc_flr_sanitize(), guc_exec_queue_timedout_job()
marks pending jobs with an error, schedules an asynchronous irq_work via
xe_hw_fence_irq_run() to signal job->fence, and returns
DRM_GPU_SCHED_STAT_NO_HANG.
Then drm_sched_job_timedout() reinserts the job onto sched->pending_list,
queues work_free_job on sched->submit_wq, and immediately restarts the
timeout on gt->ordered_wq:
drivers/gpu/drm/scheduler/sched_main.c:drm_sched_job_timedout() {
...
if (status == DRM_GPU_SCHED_STAT_NO_HANG)
drm_sched_job_reinsert_on_false_timeout(sched, job);
} else {
spin_unlock(&sched->job_list_lock);
}
if (status != DRM_GPU_SCHED_STAT_ENODEV)
drm_sched_start_timeout_unlocked(sched);
}
Because irq_work and work_free_job (on sched->base.submit_wq) have not yet
signaled and freed the job when drm_sched_start_timeout_unlocked() runs,
sched->base.pending_list is still non-empty and sched->base.timeout is 0, so
mod_delayed_work() queues sched->base.work_tdr at the tail of
gt->ordered_wq behind uc_flr_sanitize().
Next on gt->ordered_wq, uc_flr_sanitize() runs xe_uc_stop() ->
xe_guc_stop() -> xe_guc_submit_stop() -> drm_sched_wqueue_stop(), which sets
sched->base.pause_submit = true and cancels work_run_job and work_free_job
on sched->base.submit_wq without canceling sched->base.work_tdr.
If work_free_job was canceled before removing the reinserted job from
sched->base.pending_list (or ran before irq_work signaled job->fence), what
happens when the re-queued work_tdr runs on gt->ordered_wq after
uc_flr_sanitize()?
1. Once job->fence is signaled, guc_exec_queue_timedout_job() returns
DRM_GPU_SCHED_STAT_NO_HANG early, drm_sched_job_reinsert_on_false_timeout()
puts the job back on pending_list, drm_sched_run_free_queue() does nothing
because drm_sched_is_stopped(sched) is true, and
drm_sched_start_timeout_unlocked() re-queues work_tdr with timeout == 0
in a tight loop on gt->ordered_wq.
2. If job->fence is not yet signaled when the re-queued work_tdr runs (or if
an entity job was popped by work_run_job before it was stopped and queued
work_tdr behind uc_flr_sanitize()), guc_exec_queue_timedout_job() calls
xe_sched_submission_start(sched), leaving pause_submit == false after
xe_gt_flr_prepare() finishes.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060649.1015468-1-raag.jadav@intel.com?part=3
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v12 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map()
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (2 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 03/10] drm/xe/gt: Introduce FLR helpers Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:06 ` [PATCH v12 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
` (9 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav, Varun Gupta
PCIe FLR clears all hardware state along with GGTT mappings of all
existing bos. Iterate over early and late kernel bo list and restore
their GGTT mappings in hardware, so that driver can make use of them
during re-initialization after PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Varun Gupta <varun.gupta@intel.com>
---
v2: Add kernel doc (Matthew Brost)
---
drivers/gpu/drm/xe/xe_bo_evict.c | 43 ++++++++++++++++++++++++++------
drivers/gpu/drm/xe/xe_bo_evict.h | 1 +
2 files changed, 37 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.c b/drivers/gpu/drm/xe/xe_bo_evict.c
index 7661fca7f278..16f8cec4934e 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.c
+++ b/drivers/gpu/drm/xe/xe_bo_evict.c
@@ -189,14 +189,8 @@ int xe_bo_evict_all(struct xe_device *xe)
xe_bo_evict_pinned);
}
-static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+static int xe_bo_map_ggtt(struct xe_bo *bo)
{
- int ret;
-
- ret = xe_bo_restore_pinned(bo);
- if (ret)
- return ret;
-
if (bo->flags & XE_BO_FLAG_GGTT) {
struct xe_tile *tile;
u8 id;
@@ -212,6 +206,41 @@ static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
return 0;
}
+/**
+ * xe_bo_restore_map() - Restore GGTT mappings of kernel bos
+ * @xe: xe device
+ *
+ * PCIe FLR clears all hardware state along with GGTT mappings of all
+ * existing bos. Iterate over early and late kernel bo list and restore
+ * their GGTT mappings in hardware, so that driver can make use of them
+ * during re-initialization after PCIe FLR.
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_bo_restore_map(struct xe_device *xe)
+{
+ int ret;
+
+ ret = xe_bo_apply_to_pinned(xe, &xe->pinned.early.kernel_bo_present,
+ &xe->pinned.early.kernel_bo_present, xe_bo_map_ggtt);
+ if (!ret)
+ ret = xe_bo_apply_to_pinned(xe, &xe->pinned.late.kernel_bo_present,
+ &xe->pinned.late.kernel_bo_present, xe_bo_map_ggtt);
+
+ return ret;
+}
+
+static int xe_bo_restore_and_map_ggtt(struct xe_bo *bo)
+{
+ int ret;
+
+ ret = xe_bo_restore_pinned(bo);
+ if (ret)
+ return ret;
+
+ return xe_bo_map_ggtt(bo);
+}
+
/**
* xe_bo_restore_early - restore early phase kernel BOs to VRAM
*
diff --git a/drivers/gpu/drm/xe/xe_bo_evict.h b/drivers/gpu/drm/xe/xe_bo_evict.h
index e8385cb7f5e9..aabba06f0abf 100644
--- a/drivers/gpu/drm/xe/xe_bo_evict.h
+++ b/drivers/gpu/drm/xe/xe_bo_evict.h
@@ -14,6 +14,7 @@ int xe_bo_notifier_prepare_all_pinned(struct xe_device *xe);
void xe_bo_notifier_unprepare_all_pinned(struct xe_device *xe);
int xe_bo_restore_early(struct xe_device *xe);
int xe_bo_restore_late(struct xe_device *xe);
+int xe_bo_restore_map(struct xe_device *xe);
void xe_bo_pci_dev_remove_all(struct xe_device *xe);
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v12 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (3 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 04/10] drm/xe/bo_evict: Introduce xe_bo_restore_map() Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:06 ` [PATCH v12 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
` (8 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing exec queue
after PCIe FLR, introduce xe_exec_queue_reinit() helper. All the exec
queue LCRs already exist but the context is lost on PCIe FLR and needs
re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
v6: Add IS_DGFX() and EXEC_QUEUE_FLAG_KERNEL asserts (Daniele)
v9: Add negative asserts for GSC and PXP (Daniele)
Provide xe_lrc_ctx_init() as regular function (Daniele)
---
drivers/gpu/drm/xe/xe_exec_queue.c | 47 +++++++++++++++++++++++++++---
drivers/gpu/drm/xe/xe_exec_queue.h | 1 +
drivers/gpu/drm/xe/xe_lrc.c | 15 ++++++++--
drivers/gpu/drm/xe/xe_lrc.h | 2 ++
4 files changed, 59 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 7ade915c59a8..ddd9e38aa80b 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -29,6 +29,7 @@
#include "xe_migrate.h"
#include "xe_pm.h"
#include "xe_trace.h"
+#include "xe_uc_fw.h"
#include "xe_vm.h"
#include "xe_pxp.h"
@@ -391,9 +392,8 @@ static void __xe_exec_queue_fini(struct xe_exec_queue *q)
xe_lrc_put(q->lrc[i]);
}
-static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+static u32 xe_lrc_init_flags(struct xe_exec_queue *q, u32 exec_queue_flags)
{
- int i, err;
u32 flags = 0;
/*
@@ -416,6 +416,13 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
if (q->flags & EXEC_QUEUE_FLAG_DISABLE_STATE_CACHE_PERF_FIX)
flags |= XE_LRC_DISABLE_STATE_CACHE_PERF_FIX;
+ return flags;
+}
+
+static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
+{
+ int i, err;
+
err = q->ops->init(q);
if (err)
return err;
@@ -439,8 +446,8 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
marker = xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
- lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state,
- xe_lrc_ring_size(), q->msix_vec, flags);
+ lrc = xe_lrc_create(q->hwe, q->vm, q->replay_state, xe_lrc_ring_size(),
+ q->msix_vec, xe_lrc_init_flags(q, exec_queue_flags));
if (IS_ERR(lrc)) {
err = PTR_ERR(lrc);
goto err_lrc;
@@ -462,6 +469,38 @@ static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
return err;
}
+/**
+ * xe_exec_queue_reinit() - Re-initialize exec queue
+ * @q: exec queue to re-initialize
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_exec_queue_reinit(struct xe_exec_queue *q)
+{
+ struct xe_gt *gt = q->gt;
+ int i, err;
+
+ /* TODO: Re-initialize GSC and PXP queues */
+ xe_gt_assert(gt, IS_DGFX(gt_to_xe(gt)));
+ xe_gt_assert(gt, !xe_uc_fw_is_loadable(>->uc.gsc.fw));
+ xe_gt_assert(gt, !xe_pxp_is_enabled(gt_to_xe(gt)->pxp));
+
+ /* Re-initialization only allowed for kernel queues */
+ xe_gt_assert(gt, q->flags & EXEC_QUEUE_FLAG_KERNEL);
+
+ /* Re-initialize submission backend */
+ q->ops->reinit_kernel(q);
+
+ for (i = 0; i < q->width; i++) {
+ err = xe_lrc_ctx_init(q->lrc[i], q->hwe, q->vm, q->replay_state,
+ q->msix_vec, xe_lrc_init_flags(q, q->flags));
+ if (err)
+ return err;
+ }
+
+ return 0;
+}
+
/**
* xe_exec_queue_create() - Create an exec queue
* @xe: Xe device
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index e8963f85cabd..d48775ef6baf 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -34,6 +34,7 @@ struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
void xe_exec_queue_fini(struct xe_exec_queue *q);
void xe_exec_queue_destroy(struct kref *ref);
void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance);
+int xe_exec_queue_reinit(struct xe_exec_queue *q);
static inline struct xe_exec_queue *
xe_exec_queue_get_unless_zero(struct xe_exec_queue *q)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 040a52f9320e..8e4f767d7f59 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -1536,8 +1536,19 @@ static void xe_lrc_set_gpgpu_preemption_level(struct xe_lrc *lrc, struct xe_gt *
xe_lrc_write_ctx_reg(lrc, CTX_CS_CHICKEN1, val);
}
-static int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
- void *replay_state, u16 msix_vec, u32 init_flags)
+/**
+ * xe_lrc_ctx_init() - Initialize LRC with context details
+ * @lrc: Pointer to the LRC
+ * @hwe: Hardware Engine
+ * @vm: The VM (address space)
+ * @replay_state: GPU hang replay state
+ * @msix_vec: MSI-X interrupt vector (for platforms that support it)
+ * @init_flags: LRC initialization flags
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags)
{
struct xe_gt *gt = hwe->gt;
struct xe_tile *tile = gt_to_tile(gt);
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index f2e829e62168..840f303db97e 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -63,6 +63,8 @@ struct xe_lrc_snapshot {
struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
void *replay_state, u32 ring_size, u16 msix_vec, u32 flags);
+int xe_lrc_ctx_init(struct xe_lrc *lrc, struct xe_hw_engine *hwe, struct xe_vm *vm,
+ void *replay_state, u16 msix_vec, u32 init_flags);
void xe_lrc_destroy(struct kref *ref);
/**
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH v12 06/10] drm/xe/migrate: Introduce xe_migrate_reinit()
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (4 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 05/10] drm/xe/exec_queue: Introduce xe_exec_queue_reinit() Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:31 ` sashiko-bot
2026-11-03 6:06 ` [PATCH v12 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
` (7 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
In preparation of usecases which require re-initializing migrate context
after PCIe FLR, introduce xe_migrate_reinit() helper. Migrate exec queue
and pt_bo already exist in migrate structure but since their contents live
on VRAM, they are lost on PCIe FLR and need re-initialization.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
v2: Re-initialize migrate context (Matthew Brost)
---
drivers/gpu/drm/xe/xe_gt.c | 10 ++++++++++
drivers/gpu/drm/xe/xe_migrate.c | 12 ++++++++++++
drivers/gpu/drm/xe/xe_migrate.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 0e0eb8de3a98..dbf023c22517 100644
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -926,6 +926,16 @@ void xe_gt_flr_prepare(struct xe_gt *gt)
*/
int xe_gt_reinit(struct xe_gt *gt)
{
+ int err;
+
+ if (xe_gt_is_main_type(gt)) {
+ struct xe_tile *tile = gt_to_tile(gt);
+
+ err = xe_migrate_reinit(tile->migrate);
+ if (err)
+ return err;
+ }
+
return xe_uc_reinit(>->uc);
}
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index 19c37eb31589..71dfb1b3362a 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -778,6 +778,18 @@ static void xe_migrate_ulls_exit(struct work_struct *work)
drm_dev_exit(idx);
}
+/**
+ * xe_migrate_reinit() - Re-initialize a migrate context
+ * @m: The migration context
+ *
+ * Returns: 0 on success, negative error code otherwise.
+ */
+int xe_migrate_reinit(struct xe_migrate *m)
+{
+ xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
+ return xe_exec_queue_reinit(m->q);
+}
+
/**
* xe_migrate_init() - Initialize a migrate context
* @m: The migration context
diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrate.h
index 2e8be10fdb71..100b485e519b 100644
--- a/drivers/gpu/drm/xe/xe_migrate.h
+++ b/drivers/gpu/drm/xe/xe_migrate.h
@@ -36,6 +36,7 @@ enum xe_migrate_copy_dir {
struct xe_migrate *xe_migrate_alloc(struct xe_tile *tile);
int xe_migrate_init(struct xe_migrate *m);
+int xe_migrate_reinit(struct xe_migrate *m);
struct dma_fence *xe_migrate_to_vram(struct xe_migrate *m,
unsigned long npages,
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v12 06/10] drm/xe/migrate: Introduce xe_migrate_reinit()
2026-11-03 6:06 ` [PATCH v12 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
@ 2026-11-03 6:31 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-03 6:31 UTC (permalink / raw)
To: Raag Jadav, intel-xe
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm/xe/migrate: missing ULLS teardown and race in xe_migrate_reinit()
--
commit e6b24d47b598778e5ce6fbebf60700ba786119b2
Author: Raag Jadav <raag.jadav@intel.com>
drm/xe/migrate: Introduce xe_migrate_reinit()
This commit introduces xe_migrate_reinit() and wires it into xe_gt_reinit()
to re-initialize the migration VM page tables and migration exec queue after
a PCIe FLR.
> diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
> index 19c37eb315893..71dfb1b3362a3 100644
> --- a/drivers/gpu/drm/xe/xe_migrate.c
> +++ b/drivers/gpu/drm/xe/xe_migrate.c
> @@ -778,6 +778,18 @@ static void xe_migrate_ulls_exit(struct work_struct *work)
> drm_dev_exit(idx);
> }
>
> +/**
> + * xe_migrate_reinit() - Re-initialize a migrate context
> + * @m: The migration context
> + *
> + * Returns: 0 on success, negative error code otherwise.
> + */
> +int xe_migrate_reinit(struct xe_migrate *m)
> +{
> + xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
> + return xe_exec_queue_reinit(m->q);
> +}
[Severity: High]
Does xe_migrate_reinit() (or the preceding FLR preparation path) also need to
stop m->ulls.exit_work and reset m->ulls.enabled along with its runtime PM
reference?
On USM-capable dGFX platforms, xe_migrate_ulls_enter() takes a runtime PM
reference via xe_pm_runtime_get_noresume(), sets m->ulls.enabled = true,
parks the migration engine on a PPHWSP semaphore in VRAM, and schedules
m->ulls.exit_work (xe_migrate_ulls_exit()) on system_percpu_wq.
During teardown, xe_migrate_fini() cleans this up before destroying the
queue:
drivers/gpu/drm/xe/xe_migrate.c:xe_migrate_fini() {
...
disable_delayed_work_sync(&m->ulls.exit_work);
scoped_guard(mutex, &m->job_mutex) {
if (xe_migrate_ulls_enabled(m)) {
xe_pm_runtime_put(xe);
xe_migrate_ulls_toggle_enable(m, false);
}
}
...
}
Across PCIe FLR, however, neither xe_gt_flr_prepare() nor xe_migrate_reinit()
cancels m->ulls.exit_work or resets m->ulls.enabled:
1. If m->ulls.exit_work has not fired yet when xe_migrate_reinit() and GT
restart finish, m->ulls.enabled remains true and the runtime PM reference
stays held, even though PCIe FLR and xe_lrc_ctx_init() wiped VRAM, zeroed
the LRC PPHWSP semaphores, and reset the engine out of ULLS mode.
Subsequent calls to xe_migrate_ulls_enter() will see m->ulls.enabled set
and skip submitting a ULLS_ENTER job, while xe_migrate_job_push() will tag
post-FLR jobs as ULLS_ACTIVE, suppressing H2G context submission and ring
tail updates in submit_exec_queue() and stalling migrations.
2. If xe_migrate_ulls_exit() runs after uc_flr_sanitize() has stopped the
scheduler (or concurrently with xe_migrate_reinit(), which does not take
m->job_mutex), xe_migrate_ulls_exit() sees xe_exec_queue_is_idle(m->q, 1)
and calls __xe_migrate_job_push(m, job, ULLS_EXIT), which arms the job
(advancing lrc->fence_ctx.next_seqno) and pushes it to m->q->entity. When
xe_migrate_reinit() -> xe_exec_queue_reinit() -> xe_lrc_ctx_init() runs:
drivers/gpu/drm/xe/xe_lrc.c:xe_lrc_ctx_init() {
...
map = __xe_lrc_seqno_map(lrc);
xe_map_write32(lrc_to_xe(lrc), &map, lrc->fence_ctx.next_seqno - 1);
...
}
it writes lrc->fence_ctx.next_seqno - 1 into the LRC seqno map,
prematurely signaling the unsubmitted ULLS_EXIT fence seqno while the
stale job remains queued in m->q->entity.
3. If xe_migrate_ulls_exit() runs during xe_uc_flr_prepare() in the window
after xe_guc_submit_pause_abort() (which restarts the scheduler with m->q
marked killed and timeout set to 0) and before uc_flr_sanitize() stops the
scheduler, the ULLS_EXIT job is popped without emitting to the ring
(leaving job->ptrs[0].head == 0) and queues TDR on gt->ordered_wq, which
can either restart scheduler submission before xe_sched_reinit() asserts
drm_sched_is_stopped() or leave the un-emitted job on pending_list so
guc_exec_queue_start() rewinds lrc->ring.tail to 0 over the instructions
written by xe_lrc_ctx_init().
Should m->ulls.exit_work be canceled and m->ulls.enabled (along with its
runtime PM reference) be reset before re-initializing m->q?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060649.1015468-1-raag.jadav@intel.com?part=6
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v12 07/10] drm/xe/pm: Introduce xe_device_suspend/resume()
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (5 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 06/10] drm/xe/migrate: Introduce xe_migrate_reinit() Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:48 ` sashiko-bot
2026-11-03 6:06 ` [PATCH v12 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
` (6 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
PCIe FLR prepare/re-initialization flows pretty much reflect system
suspend/resume flows with a few notable exceptions. Repurpose existing
helpers for PCIe FLR with an explicit flag to distinguish between both
flows.
While at it, wait for xe_pcode_ready() before resuming to comply with
PCI reset requirements. This is harmless for system resume flow and
should not have any side effects.
Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
v6: Repurpose system suspend/resume helpers for FLR (Daniele)
v11: Wait for xe_pcode_ready() before resume (Riana)
---
drivers/gpu/drm/xe/xe_device.c | 149 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_device.h | 2 +
drivers/gpu/drm/xe/xe_pm.c | 103 ++---------------------
3 files changed, 159 insertions(+), 95 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 07a7ab6ac083..c54a42cdf9a4 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -39,6 +39,7 @@
#include "xe_force_wake.h"
#include "xe_ggtt.h"
#include "xe_gt.h"
+#include "xe_gt_idle.h"
#include "xe_gt_mcr.h"
#include "xe_gt_printk.h"
#include "xe_gt_sriov_vf.h"
@@ -69,6 +70,7 @@
#include "xe_soc_remapper.h"
#include "xe_survivability_mode.h"
#include "xe_sriov.h"
+#include "xe_sriov_vf_ccs.h"
#include "xe_svm.h"
#include "xe_sysctrl.h"
#include "xe_tile.h"
@@ -1384,3 +1386,150 @@ void xe_device_exit(void)
wait_var_event(&xe_device_count, !atomic_read(&xe_device_count));
}
}
+
+/**
+ * xe_device_suspend() - Common helper for system suspend and FLR prepare
+ * @xe: xe device instance
+ * @flr: indicate FLR prepare
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_suspend(struct xe_device *xe, bool flr)
+{
+ struct xe_gt *gt;
+ u8 id;
+ int err;
+
+ err = xe_pxp_pm_suspend(xe->pxp);
+ if (err)
+ return err;
+
+ xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
+ for_each_gt(gt, xe, id)
+ xe_gt_suspend_prepare(gt);
+
+ if (flr) {
+ for_each_gt(gt, xe, id)
+ xe_gt_flr_prepare(gt);
+ } else {
+ xe_display_pm_suspend(xe);
+
+ /* FIXME: Super racey... */
+ err = xe_bo_evict_all(xe);
+ if (err)
+ goto err_display;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_suspend(gt);
+ if (err)
+ goto err_display;
+ }
+ }
+
+ xe_irq_suspend(xe);
+
+ if (flr) {
+ unmap_mapping_range(xe->drm.anon_inode->i_mapping, 0, 0, 1);
+ } else {
+ xe_display_pm_suspend_late(xe);
+
+ xe_i2c_pm_suspend(xe);
+ }
+
+ return 0;
+
+err_display:
+ xe_display_pm_resume(xe);
+ xe_pxp_pm_resume(xe->pxp);
+ return err;
+}
+
+/**
+ * xe_device_resume() - Common helper for system resume and re-initialization post FLR
+ * @xe: xe device instance
+ * @flr: indicate re-initialization post FLR
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+int xe_device_resume(struct xe_device *xe, bool flr)
+{
+ struct xe_tile *tile;
+ struct xe_gt *gt;
+ u8 id;
+ int err;
+
+ err = xe_pcode_ready(xe, true);
+ if (err)
+ return err;
+
+ assert_lmem_ready(xe);
+
+ for_each_tile(tile, xe, id)
+ xe_wa_apply_tile_workarounds(tile);
+
+ if (flr) {
+ err = xe_bo_restore_map(xe);
+ if (err)
+ return err;
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_reinit(gt);
+ if (err)
+ return err;
+ }
+ }
+
+ for_each_gt(gt, xe, id)
+ xe_gt_resume_early(gt);
+
+ if (!flr) {
+ xe_display_pm_resume_early(xe);
+
+ /*
+ * This only restores pinned memory which is the memory required for the
+ * GT(s) to resume.
+ */
+ err = xe_bo_restore_early(xe);
+ if (err)
+ return err;
+ }
+
+ xe_i2c_pm_resume(xe, true);
+
+ xe_sysctrl_pm_resume(xe);
+
+ xe_irq_resume(xe);
+
+ for_each_gt(gt, xe, id) {
+ err = xe_gt_resume(gt);
+ if (err)
+ break;
+ }
+
+ if (flr) {
+ if (err)
+ return err;
+ } else {
+ /*
+ * Try to bring up display before bailing from GT resume failure,
+ * so we don't leave the user clueless with a blank screen.
+ */
+ xe_display_pm_resume(xe);
+ if (err)
+ return err;
+
+ err = xe_bo_restore_late(xe);
+ if (err)
+ return err;
+
+ if (IS_VF_CCS_READY(xe))
+ xe_sriov_vf_ccs_register_context(xe);
+ }
+
+ xe_pxp_pm_resume(xe->pxp);
+
+ xe_late_bind_fw_load(&xe->late_bind);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h
index 6df60edcb8f8..4d9e3c23b221 100644
--- a/drivers/gpu/drm/xe/xe_device.h
+++ b/drivers/gpu/drm/xe/xe_device.h
@@ -48,7 +48,9 @@ int xe_device_init_early(struct xe_device *xe);
int xe_device_probe_early(struct xe_device *xe);
int xe_device_probe(struct xe_device *xe);
void xe_device_remove(struct xe_device *xe);
+int xe_device_resume(struct xe_device *xe, bool flr);
void xe_device_shutdown(struct xe_device *xe);
+int xe_device_suspend(struct xe_device *xe, bool flr);
void xe_device_wmb(struct xe_device *xe);
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 5a562d8daeb9..76f2f5524dca 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -174,52 +174,18 @@ static void xe_rpm_lockmap_release(const struct xe_device *xe)
*/
int xe_pm_suspend(struct xe_device *xe)
{
- struct xe_gt *gt;
- u8 id;
int err;
drm_dbg(&xe->drm, "Suspending device\n");
xe_pm_block_begin_signalling();
trace_xe_pm_suspend(xe, __builtin_return_address(0));
- err = xe_pxp_pm_suspend(xe->pxp);
+ err = xe_device_suspend(xe, false);
if (err)
- goto err;
+ drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
+ else
+ drm_dbg(&xe->drm, "Device suspended\n");
- xe_late_bind_wait_for_worker_completion(&xe->late_bind);
-
- for_each_gt(gt, xe, id)
- xe_gt_suspend_prepare(gt);
-
- xe_display_pm_suspend(xe);
-
- /* FIXME: Super racey... */
- err = xe_bo_evict_all(xe);
- if (err)
- goto err_display;
-
- for_each_gt(gt, xe, id) {
- err = xe_gt_suspend(gt);
- if (err)
- goto err_display;
- }
-
- xe_irq_suspend(xe);
-
- xe_display_pm_suspend_late(xe);
-
- xe_i2c_pm_suspend(xe);
-
- drm_dbg(&xe->drm, "Device suspended\n");
- xe_pm_block_end_signalling();
-
- return 0;
-
-err_display:
- xe_display_pm_resume(xe);
- xe_pxp_pm_resume(xe->pxp);
-err:
- drm_dbg(&xe->drm, "Device suspend failed %d\n", err);
xe_pm_block_end_signalling();
return err;
}
@@ -232,71 +198,18 @@ int xe_pm_suspend(struct xe_device *xe)
*/
int xe_pm_resume(struct xe_device *xe)
{
- struct xe_tile *tile;
- struct xe_gt *gt;
- u8 id;
int err;
xe_pm_block_begin_signalling();
drm_dbg(&xe->drm, "Resuming device\n");
trace_xe_pm_resume(xe, __builtin_return_address(0));
- for_each_tile(tile, xe, id)
- xe_wa_apply_tile_workarounds(tile);
-
- err = xe_pcode_ready(xe, true);
- if (err)
- return err;
-
- for_each_gt(gt, xe, id)
- xe_gt_resume_early(gt);
-
- xe_display_pm_resume_early(xe);
-
- /*
- * This only restores pinned memory which is the memory required for the
- * GT(s) to resume.
- */
- err = xe_bo_restore_early(xe);
- if (err)
- goto err;
-
- xe_i2c_pm_resume(xe, true);
-
- xe_sysctrl_pm_resume(xe);
-
- xe_irq_resume(xe);
-
- for_each_gt(gt, xe, id) {
- err = xe_gt_resume(gt);
- if (err)
- break;
- }
-
- /*
- * Try to bring up display before bailing from GT resume failure,
- * so we don't leave the user clueless with a blank screen.
- */
- xe_display_pm_resume(xe);
- if (err)
- goto err;
-
- err = xe_bo_restore_late(xe);
+ err = xe_device_resume(xe, false);
if (err)
- goto err;
-
- xe_pxp_pm_resume(xe->pxp);
-
- if (IS_VF_CCS_READY(xe))
- xe_sriov_vf_ccs_register_context(xe);
-
- xe_late_bind_fw_load(&xe->late_bind);
+ drm_dbg(&xe->drm, "Device resume failed %d\n", err);
+ else
+ drm_dbg(&xe->drm, "Device resumed\n");
- drm_dbg(&xe->drm, "Device resumed\n");
- xe_pm_block_end_signalling();
- return 0;
-err:
- drm_dbg(&xe->drm, "Device resume failed %d\n", err);
xe_pm_block_end_signalling();
return err;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v12 07/10] drm/xe/pm: Introduce xe_device_suspend/resume()
2026-11-03 6:06 ` [PATCH v12 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
@ 2026-11-03 6:48 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-03 6:48 UTC (permalink / raw)
To: Raag Jadav, intel-xe
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] drm/xe: work_tdr livelock and scheduler race in xe_device_suspend() FLR path
- [High] drm/xe: missing ULLS teardown and synchronization across FLR in xe_device_suspend()
- [High] drm/xe: missing re-initialization of xe->cpu_bind->q in xe_device_resume()
--
commit c9d7243b4c02644f3740b46ba51d0f51d005d2ba
Author: Raag Jadav <raag.jadav@intel.com>
drm/xe/pm: Introduce xe_device_suspend/resume()
This commit extracts the system suspend and resume logic from xe_pm.c into
common xe_device_suspend() and xe_device_resume() helpers in xe_device.c,
adding an flr parameter to support PCIe FLR preparation and
re-initialization alongside system suspend and resume.
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index 07a7ab6ac0832..c54a42cdf9a47 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
[ ... ]
> @@ -1384,3 +1386,150 @@ void xe_device_exit(void)
> wait_var_event(&xe_device_count, !atomic_read(&xe_device_count));
> }
> }
> +
> +/**
> + * xe_device_suspend() - Common helper for system suspend and FLR prepare
> + * @xe: xe device instance
> + * @flr: indicate FLR prepare
> + *
> + * Return: 0 on success, negative error code otherwise.
> + */
> +int xe_device_suspend(struct xe_device *xe, bool flr)
> +{
> + struct xe_gt *gt;
> + u8 id;
> + int err;
> +
> + err = xe_pxp_pm_suspend(xe->pxp);
> + if (err)
> + return err;
> +
> + xe_late_bind_wait_for_worker_completion(&xe->late_bind);
> +
> + for_each_gt(gt, xe, id)
> + xe_gt_suspend_prepare(gt);
> +
> + if (flr) {
> + for_each_gt(gt, xe, id)
> + xe_gt_flr_prepare(gt);
[Severity: High]
Can this FLR preparation path livelock on sched->base.work_tdr or leave the
scheduler running when xe_device_resume() later calls xe_sched_reinit()?
In xe_gt_flr_prepare() -> xe_uc_flr_prepare(), uc_flr_prepare() and
uc_flr_sanitize() are queued and flushed back-to-back on gt->ordered_wq:
INIT_WORK_ONSTACK(&flr.work, uc_flr_prepare);
queue_work(gt->ordered_wq, &flr.work);
flush_work(&flr.work);
destroy_work_on_stack(&flr.work);
INIT_WORK_ONSTACK(&flr.work, uc_flr_sanitize);
queue_work(gt->ordered_wq, &flr.work);
flush_work(&flr.work);
destroy_work_on_stack(&flr.work);
When an exec queue has jobs in flight, uc_flr_prepare() ->
xe_guc_flr_prepare() -> xe_guc_submit_pause_abort() starts submission and
calls guc_exec_queue_kill() -> xe_guc_exec_queue_trigger_cleanup() ->
xe_sched_tdr_queue_imm(), which sets sched->base.timeout = 0 and queues
sched->base.work_tdr (drm_sched_job_timedout) on gt->ordered_wq with delay 0.
When drm_sched_job_timedout() runs on gt->ordered_wq before
uc_flr_sanitize(), guc_exec_queue_timedout_job() marks the job fence with
-ETIME, calls xe_sched_submission_start(), and returns
DRM_GPU_SCHED_STAT_NO_HANG. drm_sched_job_timedout() then calls
drm_sched_job_reinsert_on_false_timeout(), which puts the signaled job back
on sched->base.pending_list and queues work_free_job on
sched->base.submit_wq (a separate workqueue from gt->ordered_wq), followed
immediately by drm_sched_start_timeout_unlocked(). Unless work_free_job on
submit_wq has already completed on another CPU and removed the job from
pending_list before that call, drm_sched_start_timeout() sees
sched->base.timeout == 0 and a non-empty pending_list, re-queueing work_tdr
with delay 0 on gt->ordered_wq behind uc_flr_sanitize().
Next on gt->ordered_wq, uc_flr_sanitize() -> xe_uc_stop() -> xe_guc_stop() ->
xe_guc_submit_stop() -> guc_exec_queue_stop() calls
xe_sched_submission_stop(), which sets sched->base.pause_submit = true and
cancels work_free_job. If work_free_job had not run yet on submit_wq, the
signaled job remains on sched->base.pending_list. When the re-queued
work_tdr runs, guc_exec_queue_timedout_job() sees DMA_FENCE_FLAG_SIGNALED_BIT
set and returns DRM_GPU_SCHED_STAT_NO_HANG without starting the scheduler;
drm_sched_job_reinsert_on_false_timeout() re-adds the job to pending_list
while drm_sched_run_free_queue() is a no-op because drm_sched_is_stopped() is
true, and drm_sched_start_timeout_unlocked() re-queues work_tdr with delay 0
in an infinite loop on gt->ordered_wq.
Conversely, if a job was still in entity->job_queue when uc_flr_prepare()
ran, work_run_job on sched->base.submit_wq can pop the job into pending_list
and queue work_tdr on gt->ordered_wq after uc_flr_sanitize() was queued.
After uc_flr_sanitize() stops the scheduler, work_tdr runs
guc_exec_queue_timedout_job(), which calls xe_sched_submission_start() and
leaves pause_submit == false, triggering:
xe_gt_assert(ge->q->gt, drm_sched_is_stopped(&sched->base));
in xe_sched_reinit() during xe_device_resume(xe, true).
[Severity: High]
What stops tile->migrate->ulls.exit_work from racing with FLR preparation
and re-initialization or leaving stale ULLS state after reset?
On DGFX platforms, GPU page faults (xe_pagefault_service()) and SVM
prefetches (xe_vm_prefetch()) call xe_migrate_ulls_enter(), which sets
m->ulls.enabled = true under m->job_mutex, submits a ULLS_ENTER job to m->q,
and schedules m->ulls.exit_work (xe_migrate_ulls_exit()) on
system_percpu_wq. Neither xe_device_suspend(xe, true) nor
xe_device_resume(xe, true) (via xe_gt_reinit() -> xe_migrate_reinit())
disables or flushes m->ulls.exit_work, takes m->job_mutex, or resets
m->ulls.enabled (unlike xe_migrate_fini()).
This appears to allow three failure modes across FLR:
1. If m->ulls.exit_work fires while m->q->guc->sched is stopped (after
uc_flr_sanitize() during the FLR window, or in xe_device_resume(xe, true)
before xe_migrate_reinit()), xe_migrate_ulls_exit() sees
xe_exec_queue_is_idle(m->q, 1) and calls __xe_migrate_job_push(m, job,
ULLS_EXIT), which arms the job via xe_sched_job_arm() ->
xe_lrc_init_seqno_fence(), incrementing m->q->lrc[0]->fence_ctx.next_seqno
and queueing the job on m->q->entity. When xe_migrate_reinit() ->
xe_exec_queue_reinit(m->q) -> xe_lrc_ctx_init() runs without m->job_mutex,
it writes lrc->fence_ctx.next_seqno - 1 into __xe_lrc_seqno_map(lrc) and
__xe_lrc_start_seqno_map(lrc), marking the unexecuted ULLS_EXIT job's seqno
as completed in the hardware seqno page before the job is emitted in
xe_guc_submit_start().
2. If m->ulls.exit_work fires during xe_uc_flr_prepare() between
xe_guc_submit_pause_abort() (which sets EXEC_QUEUE_STATE_KILLED on m->q) and
uc_flr_sanitize(), guc_exec_queue_run_job() sees
exec_queue_killed_or_banned_or_wedged(m->q), skips q->ring_ops->emit_job(job)
(leaving job->ptrs[0].head == 0), and places the unsignaled ULLS_EXIT job on
sched->base.pending_list. During xe_device_resume(xe, true), after
xe_lrc_ctx_init() writes MI_ARB_ON_OFF into the ring, xe_guc_submit_start()
-> guc_exec_queue_start(m->q) finds that pending job and rewinds
lrc->ring.tail, RING_HEAD, and RING_TAIL to job->ptrs[0].head (0),
overwriting the ring state initialized by xe_lrc_ctx_init().
3. If m->ulls.exit_work has not fired before FLR resume completes,
m->ulls.enabled remains true even though the hardware reset wiped engine
state, causing subsequent xe_migrate_ulls_enter() calls to skip submitting a
ULLS_ENTER job.
[ ... ]
> +int xe_device_resume(struct xe_device *xe, bool flr)
> +{
> + struct xe_tile *tile;
> + struct xe_gt *gt;
> + u8 id;
> + int err;
> +
> + err = xe_pcode_ready(xe, true);
> + if (err)
> + return err;
> +
> + assert_lmem_ready(xe);
> +
> + for_each_tile(tile, xe, id)
> + xe_wa_apply_tile_workarounds(tile);
> +
> + if (flr) {
> + err = xe_bo_restore_map(xe);
> + if (err)
> + return err;
> +
> + for_each_gt(gt, xe, id) {
> + err = xe_gt_reinit(gt);
> + if (err)
> + return err;
> + }
> + }
[Severity: High]
Does the FLR re-initialization branch also need to re-initialize
xe->cpu_bind->q?
During probe, xe_device_probe() -> xe_cpu_bind_init() creates the device-wide
kernel bind queue xe->cpu_bind->q with EXEC_QUEUE_FLAG_KERNEL |
EXEC_QUEUE_FLAG_MIGRATE, and guc_exec_queue_init() inserts it into
guc->submission_state.exec_queue_lookup.
During xe_device_suspend(xe, true), xe_gt_flr_prepare() ->
xe_uc_flr_prepare() -> xe_guc_flr_prepare() -> xe_guc_submit_pause_abort()
iterates over guc->submission_state.exec_queue_lookup and calls
guc_exec_queue_kill() on every queue, which sets EXEC_QUEUE_STATE_KILLED on
xe->cpu_bind->q and zeroes its scheduler timeout.
In xe_device_resume(xe, true), xe_gt_reinit() only re-initializes
tile->migrate->q via xe_migrate_reinit() -> xe_exec_queue_reinit(m->q),
leaving xe->cpu_bind->q with EXEC_QUEUE_STATE_KILLED set. When a subsequent
pipelined page-table update is scheduled on xe->cpu_bind->q (via
xe_vm_rebind(), xe_vma_rebind(), xe_vm_range_rebind(), or
xe_vm_range_unbind() -> xe_cpu_bind_update_pgtables_job()),
guc_exec_queue_run_job() sees exec_queue_killed_or_banned_or_wedged(q) as
true:
if (is_pt_job(job)) {
xe_gt_assert(guc_to_gt(guc), !exec_queue_registered(q));
run_pt_job(guc_to_xe(guc), job,
killed_or_banned_or_wedged_or_error);
and passes force_clear = true to run_pt_job() ->
xe_cpu_bind_update_pgtables_execute(), clearing page table entries instead of
populating them while still committing the VMA as present.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060649.1015468-1-raag.jadav@intel.com?part=7
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v12 08/10] drm/xe: Introduce temporary device wedging
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (6 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 07/10] drm/xe/pm: Introduce xe_device_suspend/resume() Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:44 ` sashiko-bot
2026-11-03 6:06 ` [PATCH v12 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
` (5 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
Currently, wedged state is serving a single usecase where the device is
permanently declared wedged, but this doesn't allow any wedged state
management for runtime usecases. In preparation of usecases which require
to facilitate temporary device wedging, convert wedged.flag to wedged.ref
which serves as a driver internal refcount for wedged state and blocks
critical path execution during device lifetime. While at it, introduce
wedged.perm which signifies permanent device wedging and operates
independent of the refcount allowing relevant cleanup action on unwind
path.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
v9: Redesign to prevent races (Sashiko)
v10: Spell out temporary device wedging in subject (Lukasz)
v11: Update GuC CT path to check against permanent wedging (Lukasz, Riana)
Put wedge reference only if device is wedged during resume() (Riana)
v12: s/xe_wedge_not_recoverable/xe_wedged_permanent (Riana)
Refine documentation (Riana)
---
drivers/gpu/drm/xe/xe_guc_ct.c | 6 ++--
drivers/gpu/drm/xe/xe_pci.c | 2 ++
drivers/gpu/drm/xe/xe_pci_error.c | 24 +++++++++------
drivers/gpu/drm/xe/xe_wedge.c | 48 ++++++++++++++++++++++++++---
drivers/gpu/drm/xe/xe_wedge.h | 13 +++++++-
drivers/gpu/drm/xe/xe_wedge_types.h | 13 ++++++--
6 files changed, 87 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index 0a1b37fa0efb..5b43ca73f6dd 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -1162,7 +1162,7 @@ static int __guc_ct_send_locked(struct xe_guc_ct *ct, const u32 *action,
xe_gt_assert(gt, g2h_len || !num_g2h);
lockdep_assert_held(&ct->lock);
- if (xe_wedged(ct_to_xe(ct))) {
+ if (xe_wedged_permanent(ct_to_xe(ct))) {
ret = -ENOTRECOVERABLE;
goto out;
}
@@ -1591,7 +1591,7 @@ static int guc_ct_send_recv(struct xe_guc_ct *ct, const u32 *action, u32 len,
if (g2h_fence.fail) {
if (g2h_fence.cancel) {
xe_gt_dbg(gt, "H2G request %#x canceled!\n", action[0]);
- ret = xe_wedged(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
+ ret = xe_wedged_permanent(ct_to_xe(ct)) ? -ENOTRECOVERABLE : -ECANCELED;
goto unlock;
}
xe_gt_err(gt, "H2G request %#x failed: error %#x hint %#x\n",
@@ -1936,7 +1936,7 @@ static int g2h_read(struct xe_guc_ct *ct, u32 *msg, bool fast_path)
lockdep_assert_held(&ct->fast_lock);
/* Keep in sync with g2h_err_is_fatal() */
- if (xe_wedged(xe))
+ if (xe_wedged_permanent(xe))
return -ENOTRECOVERABLE;
if (ct->state == XE_GUC_CT_STATE_DISABLED)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index d13599d79ae9..bb9657a3e323 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -39,6 +39,7 @@
#include "xe_survivability_mode.h"
#include "xe_tile.h"
#include "xe_tile_printk.h"
+#include "xe_wedge.h"
enum toggle_d3cold {
D3COLD_DISABLE,
@@ -1403,6 +1404,7 @@ static int xe_pci_runtime_suspend(struct device *dev)
*/
xe_assert(xe, !IS_SRIOV_VF(xe));
xe_assert(xe, !pci_num_vf(pdev));
+ xe_assert(xe, !xe_wedged(xe));
flags = memalloc_noreclaim_save();
pme_enabled = xe->pme.capable && !xe->d3cold.allowed &&
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 9bf0da3a3d15..6a942cb6f69d 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -21,13 +21,8 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
struct xe_gt *gt;
u8 id;
- /*
- * Wedge the device to prevent userspace access but do not send the uevent.
- * xe_wedge_fini() releases runtime pm if wedged flag is set, so acquire a runtime
- * pm reference to avoid underflow.
- */
- if (!atomic_xchg(&xe->wedged.flag, 1))
- xe_pm_runtime_get_noresume(xe);
+ /* Wedge the device to prevent userspace access but do not send the uevent. */
+ xe_wedge_get(xe);
xe_device_set_in_reset(xe);
@@ -41,10 +36,16 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action)
{
+ struct xe_device *xe = xe_any_to_xe(pdev);
+
switch (action) {
case XE_RAS_RECOVERY_ACTION_RECOVERED:
return PCI_ERS_RESULT_RECOVERED;
case XE_RAS_RECOVERY_ACTION_RESET:
+ /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
+ if (atomic_xchg(&xe->wedged.perm, 1))
+ return PCI_ERS_RESULT_DISCONNECT;
+
prepare_device_for_reset(pdev);
return PCI_ERS_RESULT_NEED_RESET;
case XE_RAS_RECOVERY_ACTION_DISCONNECT:
@@ -71,6 +72,10 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
case pci_channel_io_normal:
return PCI_ERS_RESULT_CAN_RECOVER;
case pci_channel_io_frozen:
+ /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
+ if (atomic_xchg(&xe->wedged.perm, 1))
+ return PCI_ERS_RESULT_DISCONNECT;
+
prepare_device_for_reset(pdev);
return PCI_ERS_RESULT_NEED_RESET;
default:
@@ -129,7 +134,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
xe = pdev_to_xe_device(pdev);
/* Wedge the device to prevent I/O operations till the resume callback */
- atomic_set(&xe->wedged.flag, 1);
+ xe_wedge_get(xe);
return PCI_ERS_RESULT_RECOVERED;
}
@@ -140,7 +145,8 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
xe_info(xe, "PCI error: resume\n");
- atomic_set(&xe->wedged.flag, 0);
+ if (xe_wedged(xe))
+ xe_wedge_put(xe);
}
const struct pci_error_handlers xe_pci_error_handlers = {
diff --git a/drivers/gpu/drm/xe/xe_wedge.c b/drivers/gpu/drm/xe/xe_wedge.c
index 2f35937c5e66..8596c1a7e7c0 100644
--- a/drivers/gpu/drm/xe/xe_wedge.c
+++ b/drivers/gpu/drm/xe/xe_wedge.c
@@ -6,6 +6,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_managed.h>
+#include "xe_assert.h"
#include "xe_defaults.h"
#include "xe_device.h"
#include "xe_gt.h"
@@ -55,6 +56,43 @@
* firmware and restore device to normal operation.
*/
+/**
+ * xe_wedge_get() - Acquire wedge reference
+ * @xe: xe device instance
+ *
+ * Get runtime PM reference and block critical path execution.
+ *
+ * Use this for driver internal usecases which require temporarily blocking
+ * userspace access to the device during autonomous recovery, like PCIe FLR
+ * and bus reset. For everything else, use xe_wedge_declare().
+ */
+void xe_wedge_get(struct xe_device *xe)
+{
+ int ref;
+
+ /* We should not be runtime suspending as long as critical paths are blocked */
+ xe_pm_runtime_get_noresume(xe);
+
+ ref = atomic_inc_return(&xe->wedged.ref);
+ xe_assert(xe, ref > 0);
+}
+
+/**
+ * xe_wedge_put() - Relinquish wedge reference
+ * @xe: xe device instance
+ *
+ * Restore critical path execution and put runtime PM reference.
+ */
+void xe_wedge_put(struct xe_device *xe)
+{
+ int ref;
+
+ ref = atomic_dec_return(&xe->wedged.ref);
+ xe_assert(xe, ref >= 0);
+
+ xe_pm_runtime_put(xe);
+}
+
static void wedge_work(struct work_struct *work)
{
struct xe_device *xe = container_of(work, struct xe_device, wedged.work);
@@ -97,11 +135,11 @@ void xe_wedge_declare(struct xe_device *xe, unsigned long method)
return;
}
- if (atomic_xchg(&xe->wedged.flag, 1))
+ if (atomic_xchg(&xe->wedged.perm, 1))
return;
+ xe_wedge_get(xe);
xe->needs_flr_on_fini = true;
- xe_pm_runtime_get_noresume(xe);
xe_log_err_fatal(xe, WEDGED, -EIO, "Device declared wedged!\n");
xe_err_once(xe, "IOCTLs and executions are now blocked!\n"
@@ -239,8 +277,10 @@ static void xe_wedge_fini(struct drm_device *drm, void *arg)
disable_work_sync(&xe->wedged.work);
- if (atomic_read(&xe->wedged.flag))
- xe_pm_runtime_put(xe);
+ if (atomic_read(&xe->wedged.perm))
+ xe_wedge_put(xe);
+
+ xe_assert(xe, !xe_wedged(xe));
}
/**
diff --git a/drivers/gpu/drm/xe/xe_wedge.h b/drivers/gpu/drm/xe/xe_wedge.h
index 3b5499dfc30d..f2cab855db35 100644
--- a/drivers/gpu/drm/xe/xe_wedge.h
+++ b/drivers/gpu/drm/xe/xe_wedge.h
@@ -14,11 +14,22 @@
static inline bool xe_wedged(struct xe_device *xe)
{
- return atomic_read(&xe->wedged.flag);
+ return atomic_read(&xe->wedged.ref);
+}
+
+/*
+ * Do not abuse this. Prefer xe_wedged() where possible. Only use this
+ * as a last resort where xe_wedged() is problematic.
+ */
+static inline bool xe_wedged_permanent(struct xe_device *xe)
+{
+ return atomic_read(&xe->wedged.perm);
}
void xe_wedge_declare(struct xe_device *xe, unsigned long method);
int xe_wedge_init(struct xe_device *xe);
int xe_wedge_set_mode(struct xe_device *xe, enum xe_wedged_mode mode);
+void xe_wedge_get(struct xe_device *xe);
+void xe_wedge_put(struct xe_device *xe);
#endif
diff --git a/drivers/gpu/drm/xe/xe_wedge_types.h b/drivers/gpu/drm/xe/xe_wedge_types.h
index e472c5fcbd26..0ca9f30dbda0 100644
--- a/drivers/gpu/drm/xe/xe_wedge_types.h
+++ b/drivers/gpu/drm/xe/xe_wedge_types.h
@@ -29,8 +29,17 @@ enum xe_wedged_mode {
* struct xe_wedge - Struct to control Wedged States and mode
*/
struct xe_wedge {
- /** @flag: Xe device faced a critical error and is now blocked. */
- atomic_t flag;
+ /**
+ * @ref: Refcount for wedged device, blocks critical path execution. Used for
+ * driver internal usecases which require temporarily blocking userspace access
+ * to the device during autonomous recovery, like PCIe FLR and bus reset.
+ */
+ atomic_t ref;
+ /**
+ * @perm: Permanently wedged device, not recoverable. Only to be set when
+ * notifying userspace of wedged device through drm wedged uevent.
+ */
+ atomic_t perm;
/** @mode: Mode controlled by kernel parameter and debugfs */
enum xe_wedged_mode mode;
/** @method: Recovery method to be sent in the drm device wedged uevent */
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v12 08/10] drm/xe: Introduce temporary device wedging
2026-11-03 6:06 ` [PATCH v12 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
@ 2026-11-03 6:44 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-03 6:44 UTC (permalink / raw)
To: Raag Jadav, intel-xe
Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
- [High] drm/xe: unmatched xe_wedge_put() in xe_pci_error_resume()
- [High] drm/xe: leaked wedge and runtime PM ref after xe_pci_error_slot_reset()
- [Medium] drm/xe: premature wedged.perm set before PCI reset suppresses xe_wedge_declare()
--
commit 9aa7e09375e91e8cc39d736cc124e54fea45236b
Author: Raag Jadav <raag.jadav@intel.com>
drm/xe: Introduce temporary device wedging
This commit converts xe->wedged.flag into a reference count (xe->wedged.ref)
for temporary device wedging and adds xe->wedged.perm to track permanent
device wedging.
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 9bf0da3a3d152..6a942cb6f69d9 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
> @@ -21,13 +21,8 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
> struct xe_gt *gt;
> u8 id;
>
> - /*
> - * Wedge the device to prevent userspace access but do not send the uevent.
> - * xe_wedge_fini() releases runtime pm if wedged flag is set, so acquire a runtime
> - * pm reference to avoid underflow.
> - */
> - if (!atomic_xchg(&xe->wedged.flag, 1))
> - xe_pm_runtime_get_noresume(xe);
> + /* Wedge the device to prevent userspace access but do not send the uevent. */
> + xe_wedge_get(xe);
>
> xe_device_set_in_reset(xe);
>
> @@ -41,10 +36,16 @@ static void prepare_device_for_reset(struct pci_dev *pdev)
>
> static pci_ers_result_t ras_action_to_pci_result(struct pci_dev *pdev, u8 action)
> {
> + struct xe_device *xe = xe_any_to_xe(pdev);
> +
> switch (action) {
> case XE_RAS_RECOVERY_ACTION_RECOVERED:
> return PCI_ERS_RESULT_RECOVERED;
> case XE_RAS_RECOVERY_ACTION_RESET:
> + /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
> + if (atomic_xchg(&xe->wedged.perm, 1))
> + return PCI_ERS_RESULT_DISCONNECT;
> +
> prepare_device_for_reset(pdev);
> return PCI_ERS_RESULT_NEED_RESET;
> case XE_RAS_RECOVERY_ACTION_DISCONNECT:
> @@ -71,6 +72,10 @@ static pci_ers_result_t xe_pci_error_detected(struct pci_dev *pdev, pci_channel_
> case pci_channel_io_normal:
> return PCI_ERS_RESULT_CAN_RECOVER;
> case pci_channel_io_frozen:
> + /* We should not be doing such ugly hacks, reuse FLR callbacks and drop this. */
> + if (atomic_xchg(&xe->wedged.perm, 1))
> + return PCI_ERS_RESULT_DISCONNECT;
> +
> prepare_device_for_reset(pdev);
> return PCI_ERS_RESULT_NEED_RESET;
[Severity: Medium]
What happens if the PCI reset fails before xe_pci_error_slot_reset() removes
the old driver instance?
Both ras_action_to_pci_result() and xe_pci_error_detected() set
xe->wedged.perm to 1 via atomic_xchg() before calling
prepare_device_for_reset() -> xe_wedge_get().
If reset_subordinates() fails in pcie_do_recovery(), or if pci_enable_device()
fails in xe_pci_error_slot_reset():
drivers/gpu/drm/xe/xe_pci_error.c:xe_pci_error_slot_reset() {
...
err = pci_enable_device(pdev);
if (err) {
xe_log_err_fatal(xe, PCI, err, "Cannot re-enable PCI device after reset\n");
return PCI_ERS_RESULT_DISCONNECT;
}
xe_device_clear_in_reset(xe);
pdev->driver->remove(pdev);
...
}
the old xe_device remains bound with xe->wedged.perm == 1 and
xe->wedged.ref == 1.
Because xe->wedged.perm is already set to 1, xe_wedge_declare() was never
called and any subsequent call to xe_wedge_declare() will return early:
drivers/gpu/drm/xe/xe_wedge.c:xe_wedge_declare() {
...
if (atomic_xchg(&xe->wedged.perm, 1))
return;
xe_wedge_get(xe);
xe->needs_flr_on_fini = true;
...
schedule_work(&xe->wedged.work);
}
Wouldn't this leave the device permanently blocking IOCTLs and GuC CT
communication with -ENOTRECOVERABLE while suppressing the drm_dev_wedged_event
uevent to userspace and leaving xe->needs_flr_on_fini unset?
[ ... ]
> @@ -129,7 +134,7 @@ static pci_ers_result_t xe_pci_error_slot_reset(struct pci_dev *pdev)
> xe = pdev_to_xe_device(pdev);
>
> /* Wedge the device to prevent I/O operations till the resume callback */
> - atomic_set(&xe->wedged.flag, 1);
> + xe_wedge_get(xe);
>
> return PCI_ERS_RESULT_RECOVERED;
> }
[Severity: High]
As reported by Sashiko on v10 [1], does xe_pci_error_slot_reset() leak the
wedge reference and runtime PM reference if pcie_do_recovery() aborts before
calling xe_pci_error_resume()?
In xe_pci_error_slot_reset(), after removing the old device and probing a new
xe_device via pdev->driver->probe(), xe_wedge_get(xe) increments
xe->wedged.ref to 1 and acquires a runtime PM reference while xe->wedged.perm
remains 0.
In pcie_do_recovery(), pci_walk_bridge(bridge, report_slot_reset, &status)
walks all subordinate devices under the upstream bridge and merges their
results. If a sibling PCI device returns failure from slot_reset,
pcie_do_recovery() jumps to its failed path and broadcasts
report_perm_failure_detected() -> xe_pci_error_detected(pdev,
pci_channel_io_perm_failure) without calling report_resume(). Likewise,
report_slot_reset() releases device_lock(&pdev->dev) before report_resume()
re-acquires it, allowing driver unbind in between.
When the newly probed xe_device is later torn down, xe_wedge_fini() only puts
a reference if xe->wedged.perm is set:
drivers/gpu/drm/xe/xe_wedge.c:xe_wedge_fini() {
...
if (atomic_read(&xe->wedged.perm))
xe_wedge_put(xe);
xe_assert(xe, !xe_wedged(xe));
}
Wouldn't this leave the temporary reference from xe_pci_error_slot_reset()
unreleased, leaking the runtime PM reference and triggering the
xe_assert(xe, !xe_wedged(xe)) assertion on teardown?
Additionally, if pdev->driver->probe() in xe_pci_error_slot_reset() succeeds
by entering boot survivability mode in __xe_pci_probe(), it returns 0 before
xe_wedge_init() or xe_pm_init() are called, yet xe_pci_error_slot_reset()
unconditionally calls xe_wedge_get(xe).
> @@ -140,7 +145,8 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
>
> xe_info(xe, "PCI error: resume\n");
>
> - atomic_set(&xe->wedged.flag, 0);
> + if (xe_wedged(xe))
> + xe_wedge_put(xe);
> }
[Severity: High]
Can xe_pci_error_resume() drop a wedge reference and runtime PM reference that
the PCI error recovery path never acquired?
When a non-fatal PCIe error occurs (state == pci_channel_io_normal),
pcie_do_recovery() runs:
report_normal_detected()
-> xe_pci_error_detected(pdev, pci_channel_io_normal)
returns PCI_ERS_RESULT_CAN_RECOVER (without calling xe_wedge_get())
report_mmio_enabled()
-> xe_pci_error_mmio_enabled()
-> xe_ras_process_errors()
-> ras_action_to_pci_result(pdev, XE_RAS_RECOVERY_ACTION_RECOVERED)
returns PCI_ERS_RESULT_RECOVERED (without calling xe_wedge_get())
report_resume()
-> xe_pci_error_resume()
Because xe_pci_error_detected() does not wedge the device or stop driver work
for pci_channel_io_normal, normal driver activity continues between
xe_pci_error_detected() and xe_pci_error_resume(). If a concurrent GT reset
failure, job timeout, or hardware error handler calls xe_wedge_declare() in
that window (or if xe_wedge_declare() was between atomic_xchg(&xe->wedged.perm,
1) and xe_wedge_get(xe) when xe_pci_error_detected() checked xe_wedged(xe)),
xe->wedged.ref becomes 1.
When xe_pci_error_resume() then checks xe_wedged(xe), it sees the global
xe->wedged.ref > 0 and calls xe_wedge_put(xe).
Wouldn't that consume the reference owned by xe_wedge_declare(), dropping
xe->wedged.ref back to 0 (unblocking IOCTLs on a permanently wedged device)
and later causing xe_wedge_fini() to underflow xe->wedged.ref to -1 and
underflow runtime PM when it sees xe->wedged.perm == 1?
[1] https://lore.kernel.org/r/20260821113758.006681F000E9@smtp.kernel.org
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060649.1015468-1-raag.jadav@intel.com?part=8
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v12 09/10] drm/xe/pci: Introduce PCIe Function Level Reset
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (7 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 08/10] drm/xe: Introduce temporary device wedging Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:46 ` sashiko-bot
2026-11-03 6:06 ` [PATCH v12 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
` (4 subsequent siblings)
13 siblings, 1 reply; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
With bare minimum pieces in place, we can finally introduce PCIe Function
Level Reset (FLR) support which re-initializes hardware state without the
need for reloading the driver from userspace. All VRAM contents are lost
along with hardware state and driver takes care of recreating the required
kernel bos as part of re-initialization, but user still needs to recreate
user bos and reload context after PCIe FLR.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Tested-by: Lukasz Laguna <lukasz.laguna@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
---
v2: Spell out Function Level Reset (Jani)
v5: Prevent PM ref leak for wedged device (Matthew Brost)
v6: Add PCIe FLR documentation (Daniele)
v7: Refine PCIe FLR documentation (Daniele)
Introduce xe_pci_reset_skip() helper (Lukasz)
v9: Add 'Xe' prefix to document title (Rodrigo)
v10: Update documentation to include PCI Error Handling (Lukasz)
Maintain wedge reference on FLR failure (Lukasz)
v11: Cleanup wedge reference logic in ->reset_prepare() (Lukasz)
Use 'PCI reset' in logs (Riana)
v12: Refine error logging (Riana)
---
drivers/gpu/drm/xe/xe_device_types.h | 3 +
drivers/gpu/drm/xe/xe_pci_error.c | 136 +++++++++++++++++++++++++++
2 files changed, 139 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index b98418795d5e..9c9f9cd590b1 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -535,6 +535,9 @@ struct xe_device {
/** @pxp: Encapsulate Protected Xe Path support */
struct xe_pxp *pxp;
+ /** @flr_prepared: Prepared for function-reset */
+ bool flr_prepared;
+
/** @needs_flr_on_fini: requests function-reset on fini */
bool needs_flr_on_fini;
diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
index 6a942cb6f69d..fe8d83da1e8b 100644
--- a/drivers/gpu/drm/xe/xe_pci_error.c
+++ b/drivers/gpu/drm/xe/xe_pci_error.c
@@ -12,9 +12,55 @@
#include "xe_pm.h"
#include "xe_printk.h"
#include "xe_ras.h"
+#include "xe_sriov_pf_helpers.h"
#include "xe_survivability_mode.h"
#include "xe_wedge.h"
+/**
+ * DOC: Xe PCI Error Handling
+ *
+ * Xe driver registers PCI callbacks which are called by PCI core in case of
+ * bus errors or resets.
+ *
+ * Currently both Function Level Reset (FLR) and bus error handling callbacks are
+ * supported. Both wipe the VRAM and resets the state of all the hardware units.
+ * Therefore, the contents of all exec queues and BOs in VRAM are lost, and the
+ * hardware needs a full re-initialization. The way Xe driver handles it, is
+ * pretty much similar to system suspend/resume flow with a few notable exceptions.
+ *
+ * Prepare phase:
+ *
+ * - Temporarily wedge the device to prevent userspace access
+ * - Kill exec queues which signals all fences and frees in-flight jobs
+ * - Stop the scheduler and all submissions to GuC
+ * - The fact that FLR is needed is because hardware could be in corrupted state
+ * and access unreliable, so skip memory eviction due to untrustworthy VRAM
+ * contents
+ * - Remove all memory mappings since VRAM contents will be lost
+ *
+ * Re-initialization phase:
+ *
+ * - Recreate kernel BOs due to skipped memory eviction in prepare phase
+ * - Restore kernel queues which were killed in prepare phase
+ * - Reload all uC firmwares
+ * - Bring up all hardware units
+ * - Unwedge the device to allow userspace access
+ *
+ * Since VRAM contents are lost, the user is expected to recreate user memory
+ * and reload context.
+ *
+ * TODO: Reuse FLR callbacks for bus error handling.
+ *
+ * Current implementation is only limited to re-initializing GT. This needs to
+ * be extended for a lot of components listed below.
+ *
+ * - Proper re-initialization of GSC and PXP for integrated platforms
+ * - SR-IOV cases which need PF and VF synchronization
+ * - Re-initialization of all child devices registered by Xe
+ * - MM corner cases
+ * - Display
+ */
+
static void prepare_device_for_reset(struct pci_dev *pdev)
{
struct xe_device *xe = pdev_to_xe_device(pdev);
@@ -149,9 +195,99 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
xe_wedge_put(xe);
}
+static inline bool xe_pci_reset_skip(struct xe_device *xe)
+{
+ return !IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe_sriov_pf_num_vfs(xe) || xe->info.probe_display;
+}
+
+static void xe_pci_reset_prepare(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+ int err;
+
+ /* No guarantees by PCI core */
+ if (!pm_runtime_active(&pdev->dev)) {
+ xe_err(xe, "PCI reset: unexpected power state\n");
+ return;
+ }
+
+ err = xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe);
+ if (err)
+ xe_err(xe, "PCI reset: device in unexpected state\n");
+
+ /* Wedge the device to prevent userspace access but don't send the event yet */
+ xe_wedge_get(xe);
+ if (err)
+ return;
+
+ err = xe_pci_reset_skip(xe);
+ if (err) {
+ xe_err(xe, "PCI reset: not supported\n");
+ return;
+ }
+
+ /*
+ * The hardware could be in corrupted state and access unreliable, but we try to
+ * update data structures and cleanup any pending work to avoid side effects during
+ * PCIe FLR. This will be similar to system suspend flow but without eviction.
+ */
+ err = xe_device_suspend(xe, true);
+ if (err) {
+ xe_err(xe, "PCI reset: failed to prepare\n");
+ return;
+ }
+
+ xe->flr_prepared = true;
+ xe_info(xe, "PCI reset: prepared\n");
+}
+
+static void xe_pci_reset_done(struct pci_dev *pdev)
+{
+ struct xe_device *xe = pdev_to_xe_device(pdev);
+ int err;
+
+ /* No guarantees by PCI core */
+ if (!pm_runtime_active(&pdev->dev))
+ return;
+
+ err = xe_pci_reset_skip(xe);
+ if (err)
+ goto out;
+
+ if (!xe->flr_prepared)
+ goto out;
+
+ /* Unprepare early in case we fail */
+ xe->flr_prepared = false;
+
+ /*
+ * We already have the data structures intact, so try to re-initialize the device.
+ * This will be similar to system resume flow, except we'll also need to recreate
+ * kernel bos and restore kernel queues.
+ */
+ err = xe_device_resume(xe, true);
+ if (err) {
+ xe_err(xe, "PCI reset: re-initialization failed\n");
+ goto out;
+ }
+
+ /* Unwedge to allow userspace access */
+ xe_wedge_put(xe);
+ xe_info(xe, "PCI reset: done\n");
+
+ return;
+out:
+ /* Most likely the device is unusable and there's nothing we can do about it */
+ xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_REBIND | DRM_WEDGE_RECOVERY_BUS_RESET);
+ /* Drop local reference */
+ xe_wedge_put(xe);
+}
+
const struct pci_error_handlers xe_pci_error_handlers = {
.error_detected = xe_pci_error_detected,
.mmio_enabled = xe_pci_error_mmio_enabled,
.slot_reset = xe_pci_error_slot_reset,
.resume = xe_pci_error_resume,
+ .reset_prepare = xe_pci_reset_prepare,
+ .reset_done = xe_pci_reset_done,
};
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH v12 09/10] drm/xe/pci: Introduce PCIe Function Level Reset
2026-11-03 6:06 ` [PATCH v12 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
@ 2026-11-03 6:46 ` sashiko-bot
0 siblings, 0 replies; 20+ messages in thread
From: sashiko-bot @ 2026-11-03 6:46 UTC (permalink / raw)
To: Raag Jadav, intel-xe
Thank you for your contribution! Sashiko AI review found 5 potential issue(s) to consider:
- [High] drm/xe/pci: lockless pm_runtime_active() checks in FLR callbacks
- [High] drm/xe/pci: broken FLR error handling under non-default wedged.mode
- [High] drm/xe/pci: missing xe->cpu_bind->q re-initialization on FLR resume
- [High] drm/xe/migrate: unreset ULLS state and exit_work across PCIe FLR
- [Medium] drm/xe/pci: uninitialized wedge and PM access in survivability mode
--
commit cf08cadf19ba560845f140c4f8eb3d6efc8fd9de
Author: Raag Jadav <raag.jadav@intel.com>
drm/xe/pci: Introduce PCIe Function Level Reset
This commit adds PCIe Function Level Reset (FLR) support via the
reset_prepare and reset_done PCI error handlers. It suspends GT activity
without VRAM eviction before the reset and re-initializes hardware state,
kernel BOs, and kernel queues afterwards.
> diff --git a/drivers/gpu/drm/xe/xe_pci_error.c b/drivers/gpu/drm/xe/xe_pci_error.c
> index 6a942cb6f69d9..fe8d83da1e8b6 100644
> --- a/drivers/gpu/drm/xe/xe_pci_error.c
> +++ b/drivers/gpu/drm/xe/xe_pci_error.c
[ ... ]
> @@ -149,9 +195,99 @@ static void xe_pci_error_resume(struct pci_dev *pdev)
> xe_wedge_put(xe);
> }
>
> +static inline bool xe_pci_reset_skip(struct xe_device *xe)
> +{
> + return !IS_DGFX(xe) || IS_SRIOV_VF(xe) || xe_sriov_pf_num_vfs(xe) || xe->info.probe_display;
> +}
> +
> +static void xe_pci_reset_prepare(struct pci_dev *pdev)
> +{
> + struct xe_device *xe = pdev_to_xe_device(pdev);
> + int err;
> +
> + /* No guarantees by PCI core */
> + if (!pm_runtime_active(&pdev->dev)) {
> + xe_err(xe, "PCI reset: unexpected power state\n");
> + return;
> + }
[Severity: High]
Can checking pm_runtime_active(&pdev->dev) locklessly in both
xe_pci_reset_prepare() and xe_pci_reset_done() without holding a runtime PM
reference cause unbalanced xe_wedge_get() and xe_wedge_put() calls or leave
the device unwedged after a reset?
There appear to be several paths where this goes wrong:
1. Because reset_prepare returns void, returning early when
!pm_runtime_active(&pdev->dev) is true does not stop the PCI core
(pci_dev_save_and_disable() -> __pci_reset_function_locked() ->
pci_dev_restore()) from transitioning the function to PCI_D0 and resetting
the hardware, wiping VRAM (which is not evicted in D3hot when
!xe->d3cold.allowed), GGTT mappings, and GuC state. If the device is still
runtime-suspended when xe_pci_reset_done() runs, xe_pci_reset_done() also
returns early without calling xe_wedge_declare(), leaving the wiped GPU
unwedged on the next runtime resume.
2. If !pm_runtime_active(&pdev->dev) is true in xe_pci_reset_prepare() (for
example, during RPM_RESUMING, a failed RPM_SUSPENDING transition, or a
concurrent runtime resume from an ioctl or sysfs read since xe_wedge_get()
was skipped) and runtime_status becomes RPM_ACTIVE before xe_pci_reset_done()
runs, xe_pci_reset_done() sees pm_runtime_active(&pdev->dev) as true and
!xe->flr_prepared, jumps to out:, and calls xe_wedge_put(xe) without a
matching xe_wedge_get(xe). That drops the permanent reference just acquired
by xe_wedge_declare() (or immediately underflows xe->wedged.ref).
3. Conversely, if pm_runtime_active(&pdev->dev) is true while
dev->power.usage_count is 0 during the autosuspend window, xe_wedge_get(xe)
calls xe_pm_runtime_get_noresume(xe), which triggers drm_WARN() for missing
outer runtime PM protection. If autosuspend transitions runtime_status to
RPM_SUSPENDING or RPM_SUSPENDED between the lockless pm_runtime_active()
check and xe_wedge_get(xe), runtime suspend runs concurrently with
xe_pci_reset_prepare(), and xe_pci_reset_done() returns early at
!pm_runtime_active(&pdev->dev), leaking the wedge and runtime PM references
and leaving xe->flr_prepared set to true.
> +
> + err = xe_survivability_mode_is_boot_enabled(xe) || xe_wedged(xe);
> + if (err)
> + xe_err(xe, "PCI reset: device in unexpected state\n");
> +
> + /* Wedge the device to prevent userspace access but don't send the event yet */
> + xe_wedge_get(xe);
> + if (err)
> + return;
[Severity: Medium]
Should xe_pci_reset_prepare() and xe_pci_reset_done() return immediately when
xe_survivability_mode_is_boot_enabled(xe) is true, before calling
xe_wedge_get(xe)?
When boot survivability mode is enabled during probe, xe_device_probe_early()
returns early before calling xe_wedge_init(xe), and __xe_pci_probe() returns
0 before calling xe_device_probe(xe) and xe_pm_init(xe):
drivers/gpu/drm/xe/xe_device.c:xe_device_probe_early()
err = xe_pcode_probe_early(xe);
if (err) {
int save_err = err;
/*
* In Boot Survivability mode, no drm card is exposed and driver
* is loaded with bare minimum to allow for firmware to be
* flashed through mei. Return success, if survivability mode
* is enabled due to pcode failure.
*/
err = xe_survivability_mode_boot_enable(xe);
if (err)
return err;
return save_err;
}
err = wait_for_lmem_ready(xe);
if (err)
return err;
err = xe_wedge_init(xe);
Because xe_pm_init(xe) was never called, runtime PM remains disabled
(dev->power.disable_depth > 0), so pm_runtime_active(&pdev->dev) returns
true. Calling xe_wedge_get(xe) then invokes xe_pm_runtime_get_noresume(xe) ->
pm_runtime_get_if_in_use(), which fails with -EINVAL and triggers drm_WARN()
for missing outer runtime PM protection, and xe_pci_reset_done() subsequently
calls xe_wedge_declare() and xe_wedge_put() on an uninitialized xe->wedged
struct.
> +
> + err = xe_pci_reset_skip(xe);
> + if (err) {
> + xe_err(xe, "PCI reset: not supported\n");
> + return;
> + }
> +
> + /*
> + * The hardware could be in corrupted state and access unreliable, but we try to
> + * update data structures and cleanup any pending work to avoid side effects during
> + * PCIe FLR. This will be similar to system suspend flow but without eviction.
> + */
> + err = xe_device_suspend(xe, true);
[Severity: High]
What happens if Ultra Low Latency Submission (ULLS) mode is active on
tile->migrate when a PCIe FLR occurs?
When xe_migrate_ulls_enter(m) is called from page fault or SVM prefetch
paths, it takes a runtime PM reference via xe_pm_runtime_get_noresume(xe),
submits a ULLS_ENTER job to keep m->q spinning on a semaphore in m->q->lrc[0],
sets m->ulls.enabled = true, and schedules m->ulls.exit_work.
Neither xe_device_suspend(xe, true) nor xe_device_resume(xe, true) ->
xe_gt_reinit() -> xe_migrate_reinit(m) cancels m->ulls.exit_work, resets
m->ulls.enabled to false, or drops the ULLS runtime PM reference:
drivers/gpu/drm/xe/xe_migrate.c:xe_migrate_reinit()
int xe_migrate_reinit(struct xe_migrate *m)
{
xe_migrate_prepare_vm(m->tile, m, m->q->vm, NULL);
return xe_exec_queue_reinit(m->q);
}
After the hardware reset and xe_exec_queue_reinit(m->q) -> xe_lrc_ctx_init()
wipe m->q->lrc[0] and terminate the spinning context on the copy engine,
m->ulls.enabled remains true. Won't the next job pushed via
xe_migrate_job_push() (tagged ULLS_ACTIVE) or xe_migrate_ulls_exit() (tagged
ULLS_EXIT) have xe_sched_job_ulls_is_chained(job) == true, causing
submit_exec_queue() to suppress XE_GUC_ACTION_SCHED_CONTEXT and ring-tail
updates while waiting on a semaphore that no job is parked on, hanging
tile->migrate->q and wedging the device?
> + if (err) {
> + xe_err(xe, "PCI reset: failed to prepare\n");
> + return;
> + }
> +
> + xe->flr_prepared = true;
> + xe_info(xe, "PCI reset: prepared\n");
> +}
> +
> +static void xe_pci_reset_done(struct pci_dev *pdev)
> +{
> + struct xe_device *xe = pdev_to_xe_device(pdev);
> + int err;
> +
> + /* No guarantees by PCI core */
> + if (!pm_runtime_active(&pdev->dev))
> + return;
> +
> + err = xe_pci_reset_skip(xe);
> + if (err)
> + goto out;
> +
> + if (!xe->flr_prepared)
> + goto out;
> +
> + /* Unprepare early in case we fail */
> + xe->flr_prepared = false;
> +
> + /*
> + * We already have the data structures intact, so try to re-initialize the device.
> + * This will be similar to system resume flow, except we'll also need to recreate
> + * kernel bos and restore kernel queues.
> + */
> + err = xe_device_resume(xe, true);
[Severity: High]
Does xe_device_resume(xe, true) leave the device-wide kernel bind queue
(xe->cpu_bind->q) in the killed state after a PCIe FLR?
During xe_pci_reset_prepare(), xe_device_suspend(xe, true) calls
xe_gt_flr_prepare() -> xe_uc_flr_prepare() -> xe_guc_flr_prepare() ->
xe_guc_submit_pause_abort(), which iterates over all queues in
guc->submission_state.exec_queue_lookup and calls guc_exec_queue_kill(q) on
each one, including xe->cpu_bind->q. That sets EXEC_QUEUE_STATE_KILLED in
xe->cpu_bind->q->guc->state and sets sched.base.timeout = 0, while the
hardware reset wipes the VRAM backing xe->cpu_bind->q->lrc[0].
During xe_device_resume(xe, true), xe_gt_reinit() only re-initializes
tile->migrate->q via xe_migrate_reinit() -> xe_exec_queue_reinit(m->q) and
never calls xe_exec_queue_reinit(xe->cpu_bind->q). Once the device is
unwedged, when a pipelined CPU page-table bind job is submitted on
xe->cpu_bind->q via xe_cpu_bind_update_pgtables_job(), won't
guc_exec_queue_run_job() see exec_queue_killed_or_banned_or_wedged(q) as true
and pass force_clear = true to run_pt_job(), clearing page tables instead of
populating them?
> + if (err) {
> + xe_err(xe, "PCI reset: re-initialization failed\n");
> + goto out;
> + }
> +
> + /* Unwedge to allow userspace access */
> + xe_wedge_put(xe);
> + xe_info(xe, "PCI reset: done\n");
> +
> + return;
> +out:
> + /* Most likely the device is unusable and there's nothing we can do about it */
> + xe_wedge_declare(xe, DRM_WEDGE_RECOVERY_REBIND | DRM_WEDGE_RECOVERY_BUS_RESET);
> + /* Drop local reference */
> + xe_wedge_put(xe);
[Severity: High]
What happens in this error path when xe->wedged.mode is non-default
(XE_WEDGED_MODE_NEVER or XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET)?
1. When xe->wedged.mode is XE_WEDGED_MODE_NEVER (via module parameter
wedged_mode=0 or debugfs), xe_wedge_declare() returns early without calling
xe_wedge_get(xe) or xe_gt_wedge_declare(gt):
drivers/gpu/drm/xe/xe_wedge.c:xe_wedge_declare()
if (xe->wedged.mode == XE_WEDGED_MODE_NEVER) {
xe_dbg(xe, "Wedged mode is forcibly disabled\n");
return;
}
The subsequent xe_wedge_put(xe) then drops the temporary reference taken in
xe_pci_reset_prepare(), reducing xe->wedged.ref to 0 and unblocking userspace
IOCTLs on a device whose VRAM and hardware state were wiped by FLR and whose
GTs and IRQs remain suspended.
2. If xe_device_resume(xe, true) fails before xe_uc_start() restarts the DRM
schedulers that were stopped in xe_device_suspend(xe, true) ->
xe_gt_flr_prepare() -> xe_uc_flr_prepare() -> uc_flr_sanitize() ->
xe_uc_stop() -> xe_guc_submit_stop(), and xe->wedged.mode is either
XE_WEDGED_MODE_NEVER or XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET (where
xe_guc_submit_wedge() skips xe_guc_submit_pause_abort()), the schedulers for
all queues remain stopped (drm_sched_is_stopped(&sched->base) == true). When
those queues are later destroyed on file close or driver unbind,
guc_exec_queue_destroy() queues STATIC_MSG_CLEANUP, which
xe_sched_process_msg_queue() ignores while the scheduler is stopped, leaking
the queues and their drm_dev_get() references and hanging module unload.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261103060649.1015468-1-raag.jadav@intel.com?part=9
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v12 10/10] drm/xe/doc: Wire up PCI Error Handling
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (8 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 09/10] drm/xe/pci: Introduce PCIe Function Level Reset Raag Jadav
@ 2026-11-03 6:06 ` Raag Jadav
2026-11-03 6:51 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev12) Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Raag Jadav @ 2026-11-03 6:06 UTC (permalink / raw)
To: intel-xe
Cc: matthew.brost, rodrigo.vivi, thomas.hellstrom, riana.tauro,
michal.wajdeczko, matthew.d.roper, michal.winiarski, matthew.auld,
dev, jani.nikula, lukasz.laguna, lukas, daniele.ceraolospurio,
badal.nilawar, Raag Jadav
Wire up PCI Error Handling documentation.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
---
Documentation/gpu/xe/index.rst | 1 +
Documentation/gpu/xe/xe_pci_error.rst | 8 ++++++++
2 files changed, 9 insertions(+)
create mode 100644 Documentation/gpu/xe/xe_pci_error.rst
diff --git a/Documentation/gpu/xe/index.rst b/Documentation/gpu/xe/index.rst
index 0247a255f7e6..497a0a4b12f6 100644
--- a/Documentation/gpu/xe/index.rst
+++ b/Documentation/gpu/xe/index.rst
@@ -36,3 +36,4 @@ The display, or :ref:`drm-kms`, support for drm/xe is provided by
xe_configfs
xe_gt_stats
xe_sigid
+ xe_pci_error
diff --git a/Documentation/gpu/xe/xe_pci_error.rst b/Documentation/gpu/xe/xe_pci_error.rst
new file mode 100644
index 000000000000..25cc5a8adf99
--- /dev/null
+++ b/Documentation/gpu/xe/xe_pci_error.rst
@@ -0,0 +1,8 @@
+.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+=====================
+Xe PCI Error Handling
+=====================
+
+.. kernel-doc:: drivers/gpu/drm/xe/xe_pci_error.c
+ :doc: Xe PCI Error Handling
--
2.43.0
^ permalink raw reply related [flat|nested] 20+ messages in thread* ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev12)
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (9 preceding siblings ...)
2026-11-03 6:06 ` [PATCH v12 10/10] drm/xe/doc: Wire up PCI Error Handling Raag Jadav
@ 2026-11-03 6:51 ` Patchwork
2026-11-03 6:53 ` ✓ CI.KUnit: success " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-11-03 6:51 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe PCIe FLR (rev12)
URL : https://patchwork.freedesktop.org/series/162055/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
3009867cd31863246e4afc138520a7a8bd37bb11
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 1aca39c3812c3c76bf8f9ac1a25a7b1e8d6e4c17
Author: Raag Jadav <raag.jadav@intel.com>
Date: Tue Nov 3 11:36:26 2026 +0530
drm/xe/doc: Wire up PCI Error Handling
Wire up PCI Error Handling documentation.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
+ /mt/dim checkpatch 0f5e7199aaceed05aa49dad4c97df2677e32f779 drm-intel
da4e9abd5b45 drm/xe/uc_fw: Allow re-initializing firmware
d9f8827dfe22 drm/xe/guc_submit: Introduce guc_exec_queue_reinit_kernel()
a88674d927ee drm/xe/gt: Introduce FLR helpers
88ebae77583b drm/xe/bo_evict: Introduce xe_bo_restore_map()
875bc2d39e89 drm/xe/exec_queue: Introduce xe_exec_queue_reinit()
281943974e33 drm/xe/migrate: Introduce xe_migrate_reinit()
a2e09eefbdc0 drm/xe/pm: Introduce xe_device_suspend/resume()
7566f077235b drm/xe: Introduce temporary device wedging
5bc85b3e6c0a drm/xe/pci: Introduce PCIe Function Level Reset
1aca39c3812c drm/xe/doc: Wire up PCI Error Handling
-:21: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#21:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 12 lines checked
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ CI.KUnit: success for Introduce Xe PCIe FLR (rev12)
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (10 preceding siblings ...)
2026-11-03 6:51 ` ✗ CI.checkpatch: warning for Introduce Xe PCIe FLR (rev12) Patchwork
@ 2026-11-03 6:53 ` Patchwork
2026-11-03 7:29 ` ✓ Xe.CI.BAT: " Patchwork
2026-11-03 12:43 ` ✓ Xe.CI.FULL: " Patchwork
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-11-03 6:53 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
== Series Details ==
Series: Introduce Xe PCIe FLR (rev12)
URL : https://patchwork.freedesktop.org/series/162055/
State : success
== Summary ==
+ trap cleanup EXIT
+ kunitconfigs=('/kernel/drivers/gpu/tests/.kunitconfig' '/kernel/drivers/gpu/drm/xe/.kunitconfig' '/kernel/drivers/gpu/drm/tests/.kunitconfig' '/kernel/drivers/gpu/drm/ttm/tests/.kunitconfig' '/kernel/drivers/dma-buf/.kunitconfig')
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/tests/.kunitconfig
[06:51:05] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:51:10] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:51:31] Starting KUnit Kernel (1/1)...
[06:51:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:51:31] ================= gpu_buddy (14 subtests) ==================
[06:51:31] [PASSED] gpu_test_buddy_alloc_limit
[06:51:31] [PASSED] gpu_test_buddy_alloc_optimistic
[06:51:31] [PASSED] gpu_test_buddy_alloc_pessimistic
[06:51:31] [PASSED] gpu_test_buddy_alloc_pathological
[06:51:31] [PASSED] gpu_test_buddy_alloc_contiguous
[06:51:31] [PASSED] gpu_test_buddy_alloc_clear
[06:51:31] [PASSED] gpu_test_buddy_alloc_range
[06:51:31] [PASSED] gpu_test_buddy_alloc_range_bias
[06:51:32] [PASSED] gpu_test_buddy_fragmentation_performance
[06:51:33] [PASSED] gpu_test_buddy_dirty_tracker_performance
[06:51:33] [PASSED] gpu_test_buddy_alloc_exceeds_max_order
[06:51:33] [PASSED] gpu_test_buddy_offset_aligned_allocation
[06:51:33] [PASSED] gpu_test_buddy_subtree_offset_alignment_stress
[06:51:33] [PASSED] gpu_test_buddy_addr_to_block
[06:51:33] ==================== [PASSED] gpu_buddy ====================
[06:51:33] ============================================================
[06:51:33] Testing complete. Ran 14 tests: passed: 14
[06:51:33] Elapsed time: 27.462s total, 5.118s configuring, 20.476s building, 1.824s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/xe/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[06:51:33] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:51:35] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:52:14] Starting KUnit Kernel (1/1)...
[06:52:14] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:52:14] ================== guc_buf (11 subtests) ===================
[06:52:14] [PASSED] test_smallest
[06:52:14] [PASSED] test_largest
[06:52:14] [PASSED] test_granular
[06:52:14] [PASSED] test_unique
[06:52:14] [PASSED] test_overlap
[06:52:14] [PASSED] test_reusable
[06:52:14] [PASSED] test_too_big
[06:52:14] [PASSED] test_flush
[06:52:14] [PASSED] test_lookup
[06:52:14] [PASSED] test_data
[06:52:14] [PASSED] test_class
[06:52:14] ===================== [PASSED] guc_buf =====================
[06:52:14] =================== guc_dbm (7 subtests) ===================
[06:52:14] [PASSED] test_empty
[06:52:14] [PASSED] test_default
[06:52:14] ======================== test_size ========================
[06:52:14] [PASSED] 4
[06:52:14] [PASSED] 8
[06:52:14] [PASSED] 32
[06:52:14] [PASSED] 256
[06:52:14] ==================== [PASSED] test_size ====================
[06:52:14] ======================= test_reuse ========================
[06:52:14] [PASSED] 4
[06:52:14] [PASSED] 8
[06:52:14] [PASSED] 32
[06:52:14] [PASSED] 256
[06:52:14] =================== [PASSED] test_reuse ====================
[06:52:14] =================== test_range_overlap ====================
[06:52:14] [PASSED] 4
[06:52:14] [PASSED] 8
[06:52:14] [PASSED] 32
[06:52:14] [PASSED] 256
[06:52:14] =============== [PASSED] test_range_overlap ================
[06:52:14] =================== test_range_compact ====================
[06:52:14] [PASSED] 4
[06:52:14] [PASSED] 8
[06:52:14] [PASSED] 32
[06:52:14] [PASSED] 256
[06:52:14] =============== [PASSED] test_range_compact ================
[06:52:14] ==================== test_range_spare =====================
[06:52:14] [PASSED] 4
[06:52:14] [PASSED] 8
[06:52:14] [PASSED] 32
[06:52:14] [PASSED] 256
[06:52:14] ================ [PASSED] test_range_spare =================
[06:52:14] ===================== [PASSED] guc_dbm =====================
[06:52:14] ================== guc_idm (22 subtests) ===================
[06:52:14] [PASSED] bad_init
[06:52:14] [PASSED] no_init
[06:52:14] [PASSED] init_fini
[06:52:14] [PASSED] check_init_small
[06:52:14] [PASSED] check_init_shared
[06:52:14] [PASSED] check_used
[06:52:14] [PASSED] check_quota
[06:52:14] [PASSED] check_all
[06:52:14] [PASSED] check_limits
[06:52:14] [PASSED] check_overlap
[06:52:14] [PASSED] check_overlap_alloc
[06:52:14] [PASSED] check_overlap_release
[06:52:14] [PASSED] check_overlap_partial_init
[06:52:14] [PASSED] check_overlap_partial_shared_range_blocking
[06:52:14] [PASSED] check_used_usable
[06:52:14] [PASSED] check_used_shareable
[06:52:14] [PASSED] check_used_mixed
[06:52:14] [PASSED] check_release_usable_range
[06:52:14] [PASSED] check_release_shareable_range
[06:52:14] [PASSED] check_split_boundaries
[06:52:14] [PASSED] check_shareable_spare
[06:52:14] [PASSED] check_shareable_spare_fragmented_tail
[06:52:14] ===================== [PASSED] guc_idm =====================
[06:52:14] ============== guc_klv_helpers (13 subtests) ===============
[06:52:14] [PASSED] test_count
[06:52:14] [PASSED] test_encode_u32
[06:52:14] [PASSED] test_encode_u64
[06:52:14] [PASSED] test_encode_string
[06:52:14] [PASSED] test_encode_object_raw
[06:52:14] [PASSED] test_encode_object_klv
[06:52:14] [PASSED] test_encode_object_nested
[06:52:14] [PASSED] test_encode_object_basic
[06:52:14] ===================== test_decode_u16 =====================
[06:52:14] [PASSED] empty
[06:52:14] [PASSED] valid
[06:52:14] [PASSED] max
[06:52:14] [PASSED] big
[06:52:14] [PASSED] long
[06:52:14] ================= [PASSED] test_decode_u16 =================
[06:52:14] ===================== test_decode_u32 =====================
[06:52:14] [PASSED] empty
[06:52:14] [PASSED] valid
[06:52:14] [PASSED] max
[06:52:14] [PASSED] long
[06:52:14] ================= [PASSED] test_decode_u32 =================
[06:52:14] ===================== test_decode_u64 =====================
[06:52:14] [PASSED] empty
[06:52:14] [PASSED] short
[06:52:14] [PASSED] valid
[06:52:14] [PASSED] max
[06:52:14] [PASSED] long
[06:52:14] ================= [PASSED] test_decode_u64 =================
[06:52:14] ===================== test_decode_str =====================
[06:52:14] [PASSED] empty
[06:52:14] [PASSED] one
[06:52:14] [PASSED] one_trash
[06:52:14] [PASSED] two
[06:52:14] [PASSED] two_trash
[06:52:14] [PASSED] three
[06:52:14] [PASSED] dword
[06:52:14] [PASSED] four
[06:52:14] [PASSED] five
[06:52:14] [PASSED] six
[06:52:14] [PASSED] seven
[06:52:14] [PASSED] qword
[06:52:14] ================= [PASSED] test_decode_str =================
[06:52:14] [PASSED] test_print
[06:52:14] ================= [PASSED] guc_klv_helpers =================
[06:52:14] =================== xe_log (4 subtests) ====================
[06:52:14] [PASSED] demo_cper
[06:52:14] [PASSED] demo_dmesg
[06:52:14] ======================= test_dmesg ========================
[06:52:14] [PASSED] test_fatal
[06:52:14] [PASSED] test_fatal_tile
[06:52:14] [PASSED] test_fatal_gt
[06:52:14] [PASSED] test_fatal_comp
[06:52:14] [PASSED] test_fatal_comp_tile
[06:52:14] [PASSED] test_fatal_comp_gt
[06:52:14] [PASSED] test_fatal_all
[06:52:14] [PASSED] test_recoverable
[06:52:14] [PASSED] test_recoverable_tile
[06:52:14] [PASSED] test_recoverable_gt
[06:52:14] [PASSED] test_recoverable_comp
[06:52:14] [PASSED] test_recoverable_comp_tile
[06:52:14] [PASSED] test_recoverable_comp_gt
[06:52:14] [PASSED] test_recoverable_all
[06:52:14] [PASSED] test_info
[06:52:14] [PASSED] test_info_tile
[06:52:14] [PASSED] test_info_gt
[06:52:14] [PASSED] test_info_err
[06:52:14] [PASSED] test_info_comp
[06:52:14] [PASSED] test_info_comp_tile
[06:52:14] [PASSED] test_info_comp_gt
[06:52:14] [PASSED] test_info_all
[06:52:14] [PASSED] test_hw_fatal
[06:52:14] [PASSED] test_hw_recoverable
[06:52:14] [PASSED] test_hw_corrected
[06:52:14] [PASSED] test_hw_informational
[06:52:14] =================== [PASSED] test_dmesg ====================
[06:52:14] ====================== test_invalid =======================
[06:52:14] [SKIPPED] no-component no-location no-warn (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] reserved location (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] unknown location (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] nonzero-device-id location (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] invalid-tile-id location (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] invalid-gt-id location (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] unknown component class (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] unknown system component (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] unknown hardware component (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] [SKIPPED] unknown component and location (requires CONFIG_DRM_XE_DEBUG)
[06:52:14] ================== [SKIPPED] test_invalid ==================
[06:52:14] ===================== [PASSED] xe_log ======================
[06:52:14] ================== no_relay (3 subtests) ===================
[06:52:14] [PASSED] xe_drops_guc2pf_if_not_ready
[06:52:14] [PASSED] xe_drops_guc2vf_if_not_ready
[06:52:14] [PASSED] xe_rejects_send_if_not_ready
[06:52:14] ==================== [PASSED] no_relay =====================
[06:52:14] ================== pf_relay (14 subtests) ==================
[06:52:14] [PASSED] pf_rejects_guc2pf_too_short
[06:52:14] [PASSED] pf_rejects_guc2pf_too_long
[06:52:14] [PASSED] pf_rejects_guc2pf_no_payload
[06:52:14] [PASSED] pf_fails_no_payload
[06:52:14] [PASSED] pf_fails_bad_origin
[06:52:14] [PASSED] pf_fails_bad_type
[06:52:14] [PASSED] pf_txn_reports_error
[06:52:14] [PASSED] pf_txn_sends_pf2guc
[06:52:14] [PASSED] pf_sends_pf2guc
[06:52:14] [SKIPPED] pf_loopback_nop (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:52:14] [SKIPPED] pf_loopback_echo (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:52:14] [SKIPPED] pf_loopback_fail (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:52:14] [SKIPPED] pf_loopback_busy (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:52:14] [SKIPPED] pf_loopback_retry (requires CONFIG_DRM_XE_DEBUG_SRIOV)
[06:52:14] ==================== [PASSED] pf_relay =====================
[06:52:14] ================== vf_relay (3 subtests) ===================
[06:52:14] [PASSED] vf_rejects_guc2vf_too_short
[06:52:14] [PASSED] vf_rejects_guc2vf_too_long
[06:52:14] [PASSED] vf_rejects_guc2vf_no_payload
[06:52:14] ==================== [PASSED] vf_relay =====================
[06:52:14] ================ pf_gt_config (9 subtests) =================
[06:52:14] [PASSED] fair_contexts_1vf
[06:52:14] [PASSED] fair_doorbells_1vf
[06:52:14] [PASSED] fair_ggtt_1vf
[06:52:14] ====================== fair_vram_1vf ======================
[06:52:14] [PASSED] 3.50 GiB
[06:52:14] [PASSED] 11.5 GiB
[06:52:14] [PASSED] 15.5 GiB
[06:52:14] [PASSED] 31.5 GiB
[06:52:14] [PASSED] 63.5 GiB
[06:52:14] [PASSED] 1.91 GiB
[06:52:14] ================== [PASSED] fair_vram_1vf ==================
[06:52:14] ================ fair_vram_1vf_admin_only =================
[06:52:14] [PASSED] 3.50 GiB
[06:52:14] [PASSED] 11.5 GiB
[06:52:14] [PASSED] 15.5 GiB
[06:52:14] [PASSED] 31.5 GiB
[06:52:14] [PASSED] 63.5 GiB
[06:52:14] [PASSED] 1.91 GiB
[06:52:14] ============ [PASSED] fair_vram_1vf_admin_only =============
[06:52:14] ====================== fair_contexts ======================
[06:52:14] [PASSED] 1 VF
[06:52:14] [PASSED] 2 VFs
[06:52:14] [PASSED] 3 VFs
[06:52:14] [PASSED] 4 VFs
[06:52:14] [PASSED] 5 VFs
[06:52:14] [PASSED] 6 VFs
[06:52:14] [PASSED] 7 VFs
[06:52:14] [PASSED] 8 VFs
[06:52:14] [PASSED] 9 VFs
[06:52:14] [PASSED] 10 VFs
[06:52:14] [PASSED] 11 VFs
[06:52:14] [PASSED] 12 VFs
[06:52:14] [PASSED] 13 VFs
[06:52:14] [PASSED] 14 VFs
[06:52:14] [PASSED] 15 VFs
[06:52:14] [PASSED] 16 VFs
[06:52:14] [PASSED] 17 VFs
[06:52:14] [PASSED] 18 VFs
[06:52:14] [PASSED] 19 VFs
[06:52:14] [PASSED] 20 VFs
[06:52:14] [PASSED] 21 VFs
[06:52:14] [PASSED] 22 VFs
[06:52:14] [PASSED] 23 VFs
[06:52:14] [PASSED] 24 VFs
[06:52:14] [PASSED] 25 VFs
[06:52:14] [PASSED] 26 VFs
[06:52:14] [PASSED] 27 VFs
[06:52:14] [PASSED] 28 VFs
[06:52:14] [PASSED] 29 VFs
[06:52:14] [PASSED] 30 VFs
[06:52:14] [PASSED] 31 VFs
[06:52:14] [PASSED] 32 VFs
[06:52:14] [PASSED] 33 VFs
[06:52:14] [PASSED] 34 VFs
[06:52:14] [PASSED] 35 VFs
[06:52:14] [PASSED] 36 VFs
[06:52:14] [PASSED] 37 VFs
[06:52:14] [PASSED] 38 VFs
[06:52:14] [PASSED] 39 VFs
[06:52:14] [PASSED] 40 VFs
[06:52:14] [PASSED] 41 VFs
[06:52:14] [PASSED] 42 VFs
[06:52:14] [PASSED] 43 VFs
[06:52:14] [PASSED] 44 VFs
[06:52:14] [PASSED] 45 VFs
[06:52:14] [PASSED] 46 VFs
[06:52:14] [PASSED] 47 VFs
[06:52:14] [PASSED] 48 VFs
[06:52:14] [PASSED] 49 VFs
[06:52:14] [PASSED] 50 VFs
[06:52:14] [PASSED] 51 VFs
[06:52:14] [PASSED] 52 VFs
[06:52:14] [PASSED] 53 VFs
[06:52:14] [PASSED] 54 VFs
[06:52:14] [PASSED] 55 VFs
[06:52:14] [PASSED] 56 VFs
[06:52:14] [PASSED] 57 VFs
[06:52:14] [PASSED] 58 VFs
[06:52:14] [PASSED] 59 VFs
[06:52:14] [PASSED] 60 VFs
[06:52:14] [PASSED] 61 VFs
[06:52:14] [PASSED] 62 VFs
[06:52:14] [PASSED] 63 VFs
[06:52:14] ================== [PASSED] fair_contexts ==================
[06:52:14] ===================== fair_doorbells ======================
[06:52:14] [PASSED] 1 VF
[06:52:14] [PASSED] 2 VFs
[06:52:14] [PASSED] 3 VFs
[06:52:14] [PASSED] 4 VFs
[06:52:14] [PASSED] 5 VFs
[06:52:14] [PASSED] 6 VFs
[06:52:14] [PASSED] 7 VFs
[06:52:14] [PASSED] 8 VFs
[06:52:14] [PASSED] 9 VFs
[06:52:14] [PASSED] 10 VFs
[06:52:14] [PASSED] 11 VFs
[06:52:14] [PASSED] 12 VFs
[06:52:14] [PASSED] 13 VFs
[06:52:14] [PASSED] 14 VFs
[06:52:14] [PASSED] 15 VFs
[06:52:14] [PASSED] 16 VFs
[06:52:14] [PASSED] 17 VFs
[06:52:14] [PASSED] 18 VFs
[06:52:14] [PASSED] 19 VFs
[06:52:14] [PASSED] 20 VFs
[06:52:14] [PASSED] 21 VFs
[06:52:14] [PASSED] 22 VFs
[06:52:14] [PASSED] 23 VFs
[06:52:14] [PASSED] 24 VFs
[06:52:14] [PASSED] 25 VFs
[06:52:14] [PASSED] 26 VFs
[06:52:14] [PASSED] 27 VFs
[06:52:14] [PASSED] 28 VFs
[06:52:14] [PASSED] 29 VFs
[06:52:14] [PASSED] 30 VFs
[06:52:14] [PASSED] 31 VFs
[06:52:14] [PASSED] 32 VFs
[06:52:14] [PASSED] 33 VFs
[06:52:14] [PASSED] 34 VFs
[06:52:14] [PASSED] 35 VFs
[06:52:14] [PASSED] 36 VFs
[06:52:14] [PASSED] 37 VFs
[06:52:14] [PASSED] 38 VFs
[06:52:14] [PASSED] 39 VFs
[06:52:14] [PASSED] 40 VFs
[06:52:14] [PASSED] 41 VFs
[06:52:14] [PASSED] 42 VFs
[06:52:14] [PASSED] 43 VFs
[06:52:14] [PASSED] 44 VFs
[06:52:14] [PASSED] 45 VFs
[06:52:14] [PASSED] 46 VFs
[06:52:14] [PASSED] 47 VFs
[06:52:14] [PASSED] 48 VFs
[06:52:14] [PASSED] 49 VFs
[06:52:14] [PASSED] 50 VFs
[06:52:14] [PASSED] 51 VFs
[06:52:14] [PASSED] 52 VFs
[06:52:14] [PASSED] 53 VFs
[06:52:14] [PASSED] 54 VFs
[06:52:14] [PASSED] 55 VFs
[06:52:14] [PASSED] 56 VFs
[06:52:14] [PASSED] 57 VFs
[06:52:14] [PASSED] 58 VFs
[06:52:14] [PASSED] 59 VFs
[06:52:14] [PASSED] 60 VFs
[06:52:14] [PASSED] 61 VFs
[06:52:14] [PASSED] 62 VFs
[06:52:14] [PASSED] 63 VFs
[06:52:14] ================= [PASSED] fair_doorbells ==================
[06:52:14] ======================== fair_ggtt ========================
[06:52:14] [PASSED] 1 VF
[06:52:14] [PASSED] 2 VFs
[06:52:14] [PASSED] 3 VFs
[06:52:14] [PASSED] 4 VFs
[06:52:14] [PASSED] 5 VFs
[06:52:14] [PASSED] 6 VFs
[06:52:14] [PASSED] 7 VFs
[06:52:14] [PASSED] 8 VFs
[06:52:14] [PASSED] 9 VFs
[06:52:14] [PASSED] 10 VFs
[06:52:14] [PASSED] 11 VFs
[06:52:14] [PASSED] 12 VFs
[06:52:14] [PASSED] 13 VFs
[06:52:14] [PASSED] 14 VFs
[06:52:14] [PASSED] 15 VFs
[06:52:14] [PASSED] 16 VFs
[06:52:14] [PASSED] 17 VFs
[06:52:14] [PASSED] 18 VFs
[06:52:14] [PASSED] 19 VFs
[06:52:14] [PASSED] 20 VFs
[06:52:14] [PASSED] 21 VFs
[06:52:14] [PASSED] 22 VFs
[06:52:14] [PASSED] 23 VFs
[06:52:14] [PASSED] 24 VFs
[06:52:14] [PASSED] 25 VFs
[06:52:14] [PASSED] 26 VFs
[06:52:14] [PASSED] 27 VFs
[06:52:14] [PASSED] 28 VFs
[06:52:14] [PASSED] 29 VFs
[06:52:14] [PASSED] 30 VFs
[06:52:14] [PASSED] 31 VFs
[06:52:14] [PASSED] 32 VFs
[06:52:14] [PASSED] 33 VFs
[06:52:14] [PASSED] 34 VFs
[06:52:14] [PASSED] 35 VFs
[06:52:14] [PASSED] 36 VFs
[06:52:14] [PASSED] 37 VFs
[06:52:14] [PASSED] 38 VFs
[06:52:14] [PASSED] 39 VFs
[06:52:14] [PASSED] 40 VFs
[06:52:14] [PASSED] 41 VFs
[06:52:14] [PASSED] 42 VFs
[06:52:14] [PASSED] 43 VFs
[06:52:14] [PASSED] 44 VFs
[06:52:14] [PASSED] 45 VFs
[06:52:14] [PASSED] 46 VFs
[06:52:14] [PASSED] 47 VFs
[06:52:14] [PASSED] 48 VFs
[06:52:14] [PASSED] 49 VFs
[06:52:14] [PASSED] 50 VFs
[06:52:14] [PASSED] 51 VFs
[06:52:14] [PASSED] 52 VFs
[06:52:14] [PASSED] 53 VFs
[06:52:14] [PASSED] 54 VFs
[06:52:14] [PASSED] 55 VFs
[06:52:14] [PASSED] 56 VFs
[06:52:14] [PASSED] 57 VFs
[06:52:14] [PASSED] 58 VFs
[06:52:14] [PASSED] 59 VFs
[06:52:14] [PASSED] 60 VFs
[06:52:14] [PASSED] 61 VFs
[06:52:14] [PASSED] 62 VFs
[06:52:14] [PASSED] 63 VFs
[06:52:14] ==================== [PASSED] fair_ggtt ====================
[06:52:14] ======================== fair_vram ========================
[06:52:14] [PASSED] 1 VF
[06:52:14] [PASSED] 2 VFs
[06:52:14] [PASSED] 3 VFs
[06:52:14] [PASSED] 4 VFs
[06:52:14] [PASSED] 5 VFs
[06:52:14] [PASSED] 6 VFs
[06:52:14] [PASSED] 7 VFs
[06:52:14] [PASSED] 8 VFs
[06:52:14] [PASSED] 9 VFs
[06:52:14] [PASSED] 10 VFs
[06:52:14] [PASSED] 11 VFs
[06:52:14] [PASSED] 12 VFs
[06:52:14] [PASSED] 13 VFs
[06:52:14] [PASSED] 14 VFs
[06:52:14] [PASSED] 15 VFs
[06:52:14] [PASSED] 16 VFs
[06:52:14] [PASSED] 17 VFs
[06:52:14] [PASSED] 18 VFs
[06:52:14] [PASSED] 19 VFs
[06:52:14] [PASSED] 20 VFs
[06:52:14] [PASSED] 21 VFs
[06:52:14] [PASSED] 22 VFs
[06:52:14] [PASSED] 23 VFs
[06:52:14] [PASSED] 24 VFs
[06:52:14] [PASSED] 25 VFs
[06:52:14] [PASSED] 26 VFs
[06:52:14] [PASSED] 27 VFs
[06:52:14] [PASSED] 28 VFs
[06:52:14] [PASSED] 29 VFs
[06:52:14] [PASSED] 30 VFs
[06:52:14] [PASSED] 31 VFs
[06:52:14] [PASSED] 32 VFs
[06:52:14] [PASSED] 33 VFs
[06:52:14] [PASSED] 34 VFs
[06:52:14] [PASSED] 35 VFs
[06:52:14] [PASSED] 36 VFs
[06:52:14] [PASSED] 37 VFs
[06:52:14] [PASSED] 38 VFs
[06:52:14] [PASSED] 39 VFs
[06:52:14] [PASSED] 40 VFs
[06:52:14] [PASSED] 41 VFs
[06:52:14] [PASSED] 42 VFs
[06:52:14] [PASSED] 43 VFs
[06:52:14] [PASSED] 44 VFs
[06:52:14] [PASSED] 45 VFs
[06:52:14] [PASSED] 46 VFs
[06:52:14] [PASSED] 47 VFs
[06:52:14] [PASSED] 48 VFs
[06:52:14] [PASSED] 49 VFs
[06:52:14] [PASSED] 50 VFs
[06:52:14] [PASSED] 51 VFs
[06:52:14] [PASSED] 52 VFs
[06:52:14] [PASSED] 53 VFs
[06:52:14] [PASSED] 54 VFs
[06:52:14] [PASSED] 55 VFs
[06:52:14] [PASSED] 56 VFs
[06:52:14] [PASSED] 57 VFs
[06:52:14] [PASSED] 58 VFs
[06:52:14] [PASSED] 59 VFs
[06:52:14] [PASSED] 60 VFs
[06:52:14] [PASSED] 61 VFs
[06:52:14] [PASSED] 62 VFs
[06:52:14] [PASSED] 63 VFs
[06:52:14] ==================== [PASSED] fair_vram ====================
[06:52:14] ================== [PASSED] pf_gt_config ===================
[06:52:14] ===================== lmtt (1 subtest) =====================
[06:52:14] ======================== test_ops =========================
[06:52:14] [PASSED] 2-level
[06:52:14] [PASSED] multi-level
[06:52:14] ==================== [PASSED] test_ops =====================
[06:52:14] ====================== [PASSED] lmtt =======================
[06:52:14] ================= sriov_packet (1 subtest) =================
[06:52:14] [PASSED] test_descriptor_init
[06:52:14] ================== [PASSED] sriov_packet ===================
[06:52:14] ================= pf_service (11 subtests) =================
[06:52:14] [PASSED] pf_negotiate_any
[06:52:14] [PASSED] pf_negotiate_base_match
[06:52:14] [PASSED] pf_negotiate_base_newer
[06:52:14] [PASSED] pf_negotiate_base_next
[06:52:14] [SKIPPED] pf_negotiate_base_older (no older minor)
[06:52:14] [PASSED] pf_negotiate_base_prev
[06:52:14] [PASSED] pf_negotiate_latest_match
[06:52:14] [PASSED] pf_negotiate_latest_newer
[06:52:14] [PASSED] pf_negotiate_latest_next
[06:52:14] [SKIPPED] pf_negotiate_latest_older (no older minor)
[06:52:14] [SKIPPED] pf_negotiate_latest_prev (no prev major)
[06:52:14] =================== [PASSED] pf_service ====================
[06:52:14] ================= xe_guc_g2g (2 subtests) ==================
[06:52:14] ============== xe_live_guc_g2g_kunit_default ==============
[06:52:14] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[06:52:14] ============== xe_live_guc_g2g_kunit_allmem ===============
[06:52:14] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[06:52:14] =================== [SKIPPED] xe_guc_g2g ===================
[06:52:14] =================== xe_mocs (2 subtests) ===================
[06:52:14] ================ xe_live_mocs_kernel_kunit ================
[06:52:14] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[06:52:14] ================ xe_live_mocs_reset_kunit =================
[06:52:14] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[06:52:14] ==================== [SKIPPED] xe_mocs =====================
[06:52:14] ================= xe_migrate (3 subtests) ==================
[06:52:14] ================= xe_migrate_sanity_kunit =================
[06:52:14] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[06:52:14] ================== xe_validate_ccs_kunit ==================
[06:52:14] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[06:52:14] ============= xe_migrate_access_memory_kunit ==============
[06:52:14] ========= [SKIPPED] xe_migrate_access_memory_kunit =========
[06:52:14] =================== [SKIPPED] xe_migrate ===================
[06:52:14] ================== xe_dma_buf (1 subtest) ==================
[06:52:14] ==================== xe_dma_buf_kunit =====================
[06:52:14] ================ [SKIPPED] xe_dma_buf_kunit ================
[06:52:14] =================== [SKIPPED] xe_dma_buf ===================
[06:52:14] ================= xe_bo_shrink (1 subtest) =================
[06:52:14] =================== xe_bo_shrink_kunit ====================
[06:52:14] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[06:52:14] ================== [SKIPPED] xe_bo_shrink ==================
[06:52:14] ==================== xe_bo (2 subtests) ====================
[06:52:14] ================== xe_ccs_migrate_kunit ===================
[06:52:14] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[06:52:14] ==================== xe_bo_evict_kunit ====================
[06:52:14] =============== [SKIPPED] xe_bo_evict_kunit ================
[06:52:14] ===================== [SKIPPED] xe_bo ======================
[06:52:14] =================== xe_any (9 subtests) ====================
[06:52:14] [PASSED] test_to_xe
[06:52:14] [PASSED] test_to_dev
[06:52:14] [PASSED] test_to_pdev
[06:52:14] [PASSED] test_to_drm
[06:52:14] [PASSED] test_if_pdev
[06:52:14] [PASSED] test_if_xe
[06:52:14] [PASSED] test_if_tile
[06:52:14] [PASSED] test_if_gt
[06:52:14] [PASSED] test_to_id
[06:52:14] ===================== [PASSED] xe_any ======================
[06:52:14] ==================== args (13 subtests) ====================
[06:52:14] [PASSED] count_args_test
[06:52:14] [PASSED] call_args_example
[06:52:14] [PASSED] call_args_test
[06:52:14] [PASSED] drop_first_arg_example
[06:52:14] [PASSED] drop_first_arg_test
[06:52:14] [PASSED] first_arg_example
[06:52:14] [PASSED] first_arg_test
[06:52:14] [PASSED] last_arg_example
[06:52:14] [PASSED] last_arg_test
[06:52:14] [PASSED] pick_arg_example
[06:52:14] [PASSED] if_args_example
[06:52:14] [PASSED] if_args_test
[06:52:14] [PASSED] sep_comma_example
[06:52:14] ====================== [PASSED] args =======================
[06:52:14] =================== xe_pci (3 subtests) ====================
[06:52:14] ==================== check_graphics_ip ====================
[06:52:14] [PASSED] 12.00 Xe_LP
[06:52:14] [PASSED] 12.10 Xe_LP+
[06:52:14] [PASSED] 12.55 Xe_HPG
[06:52:14] [PASSED] 12.60 Xe_HPC
[06:52:14] [PASSED] 12.70 Xe_LPG
[06:52:14] [PASSED] 12.71 Xe_LPG
[06:52:14] [PASSED] 12.74 Xe_LPG+
[06:52:14] [PASSED] 20.01 Xe2_HPG
[06:52:14] [PASSED] 20.02 Xe2_HPG
[06:52:14] [PASSED] 20.04 Xe2_LPG
[06:52:14] [PASSED] 30.00 Xe3_LPG
[06:52:14] [PASSED] 30.01 Xe3_LPG
[06:52:14] [PASSED] 30.03 Xe3_LPG
[06:52:14] [PASSED] 30.04 Xe3_LPG
[06:52:14] [PASSED] 30.05 Xe3_LPG
[06:52:14] [PASSED] 35.10 Xe3p_LPG
[06:52:14] [PASSED] 35.11 Xe3p_XPC
[06:52:14] ================ [PASSED] check_graphics_ip ================
[06:52:14] ===================== check_media_ip ======================
[06:52:14] [PASSED] 12.00 Xe_M
[06:52:14] [PASSED] 12.55 Xe_HPM
[06:52:14] [PASSED] 13.00 Xe_LPM+
[06:52:14] [PASSED] 13.01 Xe2_HPM
[06:52:14] [PASSED] 20.00 Xe2_LPM
[06:52:14] [PASSED] 30.00 Xe3_LPM
[06:52:14] [PASSED] 30.02 Xe3_LPM
[06:52:14] [PASSED] 35.00 Xe3p_LPM
[06:52:14] [PASSED] 35.03 Xe3p_HPM
[06:52:14] ================= [PASSED] check_media_ip ==================
[06:52:14] =================== check_platform_desc ===================
[06:52:14] [PASSED] 0x9A60 (TIGERLAKE)
[06:52:14] [PASSED] 0x9A68 (TIGERLAKE)
[06:52:14] [PASSED] 0x9A70 (TIGERLAKE)
[06:52:14] [PASSED] 0x9A40 (TIGERLAKE)
[06:52:14] [PASSED] 0x9A49 (TIGERLAKE)
[06:52:14] [PASSED] 0x9A59 (TIGERLAKE)
[06:52:14] [PASSED] 0x9A78 (TIGERLAKE)
[06:52:14] [PASSED] 0x9AC0 (TIGERLAKE)
[06:52:14] [PASSED] 0x9AC9 (TIGERLAKE)
[06:52:14] [PASSED] 0x9AD9 (TIGERLAKE)
[06:52:14] [PASSED] 0x9AF8 (TIGERLAKE)
[06:52:14] [PASSED] 0x4C80 (ROCKETLAKE)
[06:52:14] [PASSED] 0x4C8A (ROCKETLAKE)
[06:52:14] [PASSED] 0x4C8B (ROCKETLAKE)
[06:52:14] [PASSED] 0x4C8C (ROCKETLAKE)
[06:52:14] [PASSED] 0x4C90 (ROCKETLAKE)
[06:52:14] [PASSED] 0x4C9A (ROCKETLAKE)
[06:52:14] [PASSED] 0x4680 (ALDERLAKE_S)
[06:52:14] [PASSED] 0x4682 (ALDERLAKE_S)
[06:52:14] [PASSED] 0x4688 (ALDERLAKE_S)
[06:52:14] [PASSED] 0x468A (ALDERLAKE_S)
[06:52:14] [PASSED] 0x468B (ALDERLAKE_S)
[06:52:14] [PASSED] 0x4690 (ALDERLAKE_S)
[06:52:14] [PASSED] 0x4692 (ALDERLAKE_S)
[06:52:14] [PASSED] 0x4693 (ALDERLAKE_S)
[06:52:14] [PASSED] 0x46A0 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46A1 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46A2 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46A3 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46A6 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46A8 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46AA (ALDERLAKE_P)
[06:52:14] [PASSED] 0x462A (ALDERLAKE_P)
[06:52:14] [PASSED] 0x4626 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x4628 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46B0 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46B1 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46B2 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46B3 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46C0 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46C1 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46C2 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46C3 (ALDERLAKE_P)
[06:52:14] [PASSED] 0x46D0 (ALDERLAKE_N)
[06:52:14] [PASSED] 0x46D1 (ALDERLAKE_N)
[06:52:14] [PASSED] 0x46D2 (ALDERLAKE_N)
[06:52:14] [PASSED] 0x46D3 (ALDERLAKE_N)
[06:52:14] [PASSED] 0x46D4 (ALDERLAKE_N)
[06:52:14] [PASSED] 0xA721 (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7A1 (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7A9 (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7AC (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7AD (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA720 (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7A0 (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7A8 (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7AA (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA7AB (ALDERLAKE_P)
[06:52:14] [PASSED] 0xA780 (ALDERLAKE_S)
[06:52:14] [PASSED] 0xA781 (ALDERLAKE_S)
[06:52:14] [PASSED] 0xA782 (ALDERLAKE_S)
[06:52:14] [PASSED] 0xA783 (ALDERLAKE_S)
[06:52:14] [PASSED] 0xA788 (ALDERLAKE_S)
[06:52:14] [PASSED] 0xA789 (ALDERLAKE_S)
[06:52:14] [PASSED] 0xA78A (ALDERLAKE_S)
[06:52:14] [PASSED] 0xA78B (ALDERLAKE_S)
[06:52:14] [PASSED] 0x4905 (DG1)
[06:52:14] [PASSED] 0x4906 (DG1)
[06:52:14] [PASSED] 0x4907 (DG1)
[06:52:14] [PASSED] 0x4908 (DG1)
[06:52:14] [PASSED] 0x4909 (DG1)
[06:52:14] [PASSED] 0x56C0 (DG2)
[06:52:14] [PASSED] 0x56C2 (DG2)
[06:52:14] [PASSED] 0x56C1 (DG2)
[06:52:14] [PASSED] 0x7D51 (METEORLAKE)
[06:52:14] [PASSED] 0x7DD1 (METEORLAKE)
[06:52:14] [PASSED] 0x7D41 (METEORLAKE)
[06:52:14] [PASSED] 0x7D67 (METEORLAKE)
[06:52:14] [PASSED] 0xB640 (METEORLAKE)
[06:52:14] [PASSED] 0x56A0 (DG2)
[06:52:14] [PASSED] 0x56A1 (DG2)
[06:52:14] [PASSED] 0x56A2 (DG2)
[06:52:14] [PASSED] 0x56BE (DG2)
[06:52:14] [PASSED] 0x56BF (DG2)
[06:52:14] [PASSED] 0x5690 (DG2)
[06:52:14] [PASSED] 0x5691 (DG2)
[06:52:14] [PASSED] 0x5692 (DG2)
[06:52:14] [PASSED] 0x56A5 (DG2)
[06:52:14] [PASSED] 0x56A6 (DG2)
[06:52:14] [PASSED] 0x56B0 (DG2)
[06:52:14] [PASSED] 0x56B1 (DG2)
[06:52:14] [PASSED] 0x56BA (DG2)
[06:52:14] [PASSED] 0x56BB (DG2)
[06:52:14] [PASSED] 0x56BC (DG2)
[06:52:14] [PASSED] 0x56BD (DG2)
[06:52:14] [PASSED] 0x5693 (DG2)
[06:52:14] [PASSED] 0x5694 (DG2)
[06:52:14] [PASSED] 0x5695 (DG2)
[06:52:14] [PASSED] 0x56A3 (DG2)
[06:52:14] [PASSED] 0x56A4 (DG2)
[06:52:14] [PASSED] 0x56B2 (DG2)
[06:52:14] [PASSED] 0x56B3 (DG2)
[06:52:14] [PASSED] 0x5696 (DG2)
[06:52:14] [PASSED] 0x5697 (DG2)
[06:52:14] [PASSED] 0xB69 (PVC)
[06:52:14] [PASSED] 0xB6E (PVC)
[06:52:14] [PASSED] 0xBD4 (PVC)
[06:52:14] [PASSED] 0xBD5 (PVC)
[06:52:14] [PASSED] 0xBD6 (PVC)
[06:52:14] [PASSED] 0xBD7 (PVC)
[06:52:14] [PASSED] 0xBD8 (PVC)
[06:52:14] [PASSED] 0xBD9 (PVC)
[06:52:14] [PASSED] 0xBDA (PVC)
[06:52:14] [PASSED] 0xBDB (PVC)
[06:52:14] [PASSED] 0xBE0 (PVC)
[06:52:14] [PASSED] 0xBE1 (PVC)
[06:52:14] [PASSED] 0xBE5 (PVC)
[06:52:14] [PASSED] 0x7D40 (METEORLAKE)
[06:52:14] [PASSED] 0x7D45 (METEORLAKE)
[06:52:14] [PASSED] 0x7D55 (METEORLAKE)
[06:52:14] [PASSED] 0x7D60 (METEORLAKE)
[06:52:14] [PASSED] 0x7DD5 (METEORLAKE)
[06:52:14] [PASSED] 0x6420 (LUNARLAKE)
[06:52:14] [PASSED] 0x64A0 (LUNARLAKE)
[06:52:14] [PASSED] 0x64B0 (LUNARLAKE)
[06:52:14] [PASSED] 0xE202 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE209 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE20B (BATTLEMAGE)
[06:52:14] [PASSED] 0xE20C (BATTLEMAGE)
[06:52:14] [PASSED] 0xE20D (BATTLEMAGE)
[06:52:14] [PASSED] 0xE210 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE211 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE212 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE216 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE220 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE221 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE222 (BATTLEMAGE)
[06:52:14] [PASSED] 0xE223 (BATTLEMAGE)
[06:52:14] [PASSED] 0xB080 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB081 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB082 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB083 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB084 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB085 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB086 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB087 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB08F (PANTHERLAKE)
[06:52:14] [PASSED] 0xB090 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB0A0 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB0A1 (PANTHERLAKE)
[06:52:14] [PASSED] 0xB0B0 (PANTHERLAKE)
[06:52:14] [PASSED] 0xFD80 (PANTHERLAKE)
[06:52:14] [PASSED] 0xFD81 (PANTHERLAKE)
[06:52:14] [PASSED] 0xD740 (NOVALAKE_S)
[06:52:14] [PASSED] 0xD741 (NOVALAKE_S)
[06:52:14] [PASSED] 0xD742 (NOVALAKE_S)
[06:52:14] [PASSED] 0xD743 (NOVALAKE_S)
[06:52:14] [PASSED] 0xD745 (NOVALAKE_S)
[06:52:14] [PASSED] 0xD74A (NOVALAKE_S)
[06:52:14] [PASSED] 0xD74B (NOVALAKE_S)
[06:52:14] [PASSED] 0x674C (CRESCENTISLAND)
[06:52:14] [PASSED] 0x674D (CRESCENTISLAND)
[06:52:14] [PASSED] 0x674E (CRESCENTISLAND)
[06:52:14] [PASSED] 0x674F (CRESCENTISLAND)
[06:52:14] [PASSED] 0x6750 (CRESCENTISLAND)
[06:52:14] [PASSED] 0x6751 (CRESCENTISLAND)
[06:52:14] [PASSED] 0x6752 (CRESCENTISLAND)
[06:52:14] [PASSED] 0xD750 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD751 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD752 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD753 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD754 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD755 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD756 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD757 (NOVALAKE_P)
[06:52:14] [PASSED] 0xD75F (NOVALAKE_P)
[06:52:14] =============== [PASSED] check_platform_desc ===============
[06:52:14] ===================== [PASSED] xe_pci ======================
[06:52:14] ============= xe_rtp_tables_test (5 subtests) ==============
[06:52:14] ================== xe_rtp_table_gt_test ===================
[06:52:14] [PASSED] gt_was/14011060649
[06:52:14] [PASSED] gt_was/14011059788
[06:52:14] [PASSED] gt_was/14015795083
[06:52:14] [PASSED] gt_was/16021867713
[06:52:14] [PASSED] gt_was/14019449301
[06:52:14] [PASSED] gt_was/16028005424
[06:52:14] [PASSED] gt_was/14026578760
[06:52:14] [PASSED] gt_was/1409420604
[06:52:14] [PASSED] gt_was/1408615072
[06:52:14] [PASSED] gt_was/22010523718
[06:52:14] [PASSED] gt_was/14011006942
[06:52:14] [PASSED] gt_was/14014830051
[06:52:14] [PASSED] gt_was/18018781329
[06:52:14] [PASSED] gt_was/1509235366
[06:52:14] [PASSED] gt_was/18018781329
[06:52:14] [PASSED] gt_was/16016694945
[06:52:14] [PASSED] gt_was/14018575942
[06:52:14] [PASSED] gt_was/22016670082
[06:52:14] [PASSED] gt_was/22016670082
[06:52:14] [PASSED] gt_was/14017421178
[06:52:14] [PASSED] gt_was/16025250150
[06:52:14] [PASSED] gt_was/14021871409
[06:52:14] [PASSED] gt_was/16021865536
[06:52:14] [PASSED] gt_was/14021486841
[06:52:14] [PASSED] gt_was/14025160223
[06:52:14] [PASSED] gt_was/14026144927, 16029437861, 14026127056
[06:52:14] [PASSED] gt_was/14025635424
[06:52:14] [PASSED] gt_was/16028005424
[06:52:14] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:52:14] ================== xe_rtp_table_gt_test ===================
[06:52:14] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[06:52:14] [PASSED] gt_tunings/Tuning: 32B Access Enable
[06:52:14] [PASSED] gt_tunings/Tuning: L3 cache
[06:52:14] [PASSED] gt_tunings/Tuning: L3 cache - media
[06:52:14] [PASSED] gt_tunings/Tuning: Compression Overfetch
[06:52:14] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[06:52:14] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[06:52:14] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[06:52:14] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[06:52:14] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[06:52:14] [PASSED] gt_tunings/Tuning: Stateless compression control
[06:52:14] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[06:52:14] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[06:52:14] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[06:52:14] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[06:52:14] [PASSED] gt_tunings/Tuning: Force All Non-Compressible Memory Reads to be 256B Overfetches
[06:52:14] ============== [PASSED] xe_rtp_table_gt_test ===============
[06:52:14] ================== xe_rtp_table_oob_test ==================
[06:52:14] [PASSED] oob_was/1607983814
[06:52:14] [PASSED] oob_was/16010904313
[06:52:14] [PASSED] oob_was/18022495364
[06:52:14] [PASSED] oob_was/22012773006
[06:52:14] [PASSED] oob_was/14014475959
[06:52:14] [PASSED] oob_was/22011391025
[06:52:14] [PASSED] oob_was/22012727170
[06:52:14] [PASSED] oob_was/22012727685
[06:52:14] [PASSED] oob_was/22016596838
[06:52:14] [PASSED] oob_was/18020744125
[06:52:14] [PASSED] oob_was/1409600907
[06:52:14] [PASSED] oob_was/22014953428
[06:52:14] [PASSED] oob_was/16017236439
[06:52:14] [PASSED] oob_was/14019821291
[06:52:14] [PASSED] oob_was/14015076503
[06:52:14] [PASSED] oob_was/22016122933
[06:52:14] [PASSED] oob_was/14018913170
[06:52:14] [PASSED] oob_was/14018094691
[06:52:14] [PASSED] oob_was/18024947630
[06:52:14] [PASSED] oob_was/16022287689
[06:52:14] [PASSED] oob_was/13011645652
[06:52:14] [PASSED] oob_was/14022293748
[06:52:14] [PASSED] oob_was/22019794406
[06:52:14] [PASSED] oob_was/22019338487
[06:52:14] [PASSED] oob_was/16023588340
[06:52:14] [PASSED] oob_was/14019789679
[06:52:14] [PASSED] oob_was/14022866841
[06:52:14] [PASSED] oob_was/16021333562
[06:52:14] [PASSED] oob_was/14016712196
[06:52:14] [PASSED] oob_was/14015568240
[06:52:14] [PASSED] oob_was/18013179988
[06:52:14] [PASSED] oob_was/1508761755
[06:52:14] [PASSED] oob_was/16023105232
[06:52:14] [PASSED] oob_was/16026508708
[06:52:14] [PASSED] oob_was/14020001231
[06:52:14] [PASSED] oob_was/16023683509
[06:52:14] [PASSED] oob_was/14025515070
[06:52:14] [PASSED] oob_was/15015404425_disable
[06:52:14] [PASSED] oob_was/16026007364
[06:52:14] [PASSED] oob_was/14020316580
[06:52:14] [PASSED] oob_was/14025883347
[06:52:14] [PASSED] oob_was/16029380221
[06:52:14] [PASSED] oob_was/22022079272
[06:52:14] [PASSED] oob_was/16029897822
[06:52:14] [PASSED] oob_was/14026539277
[06:52:14] [PASSED] oob_was/14027054324
[06:52:14] [PASSED] oob_was/14025941587
[06:52:14] [PASSED] oob_was/16030224309
[06:52:14] [PASSED] oob_was/14028709524
[06:52:14] ============== [PASSED] xe_rtp_table_oob_test ==============
[06:52:14] ================ xe_rtp_table_dev_oob_test ================
[06:52:14] [PASSED] device_oob_was/22010954014
[06:52:14] [PASSED] device_oob_was/15015404425
[06:52:14] [PASSED] device_oob_was/22019338487_display
[06:52:14] [PASSED] device_oob_was/14022085890
[06:52:14] [PASSED] device_oob_was/14026633728
[06:52:14] [PASSED] device_oob_was/14026746987
[06:52:14] [PASSED] device_oob_was/14026779378
[06:52:14] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[06:52:14] ========== xe_rtp_table_missing_upper_bound_test ==========
[06:52:14] [PASSED] register_whitelist/WaAllowPMDepthAndInvocationCountAccessFromUMD, 1408556865
[06:52:14] [PASSED] register_whitelist/1508744258, 14012131227, 1808121037
[06:52:14] [PASSED] register_whitelist/1806527549
[06:52:14] [PASSED] register_whitelist/allow_read_ctx_timestamp
[06:52:14] [PASSED] register_whitelist/allow_read_queue_timestamp
[06:52:14] [PASSED] register_whitelist/16014440446
[06:52:14] [PASSED] register_whitelist/16017236439
[06:52:14] [PASSED] register_whitelist/16020183090
[06:52:14] [PASSED] register_whitelist/14024997852
[06:52:14] [PASSED] register_whitelist/14024997852
[06:52:14] ====== [PASSED] xe_rtp_table_missing_upper_bound_test ======
[06:52:14] =============== [PASSED] xe_rtp_tables_test ================
[06:52:14] =================== xe_rtp (3 subtests) ====================
[06:52:14] =================== xe_rtp_rules_tests ====================
[06:52:14] [PASSED] no
[06:52:14] [PASSED] yes
[06:52:14] [PASSED] no-and-no
[06:52:14] [PASSED] no-and-yes
[06:52:14] [PASSED] yes-and-no
[06:52:14] [PASSED] yes-and-yes
[06:52:14] [PASSED] no-or-no
[06:52:14] [PASSED] no-or-yes
[06:52:14] [PASSED] yes-or-no
[06:52:14] [PASSED] yes-or-yes
[06:52:14] [PASSED] no-yes-or-yes-no
[06:52:14] [PASSED] no-yes-or-yes-yes
[06:52:14] [PASSED] yes-yes-or-no-yes
[06:52:14] [PASSED] yes-yes-or-yes-yes
[06:52:14] [PASSED] no-no-or-yes-or-no
[06:52:14] [PASSED] or
[06:52:14] [PASSED] or-yes
[06:52:14] [PASSED] or-no
[06:52:14] [PASSED] yes-or
[06:52:14] [PASSED] no-or
[06:52:14] [PASSED] no-or-or-yes
[06:52:14] [PASSED] yes-or-or-no
[06:52:14] [PASSED] no-or-or-no
[06:52:14] [PASSED] missing-context-engine-class
[06:52:14] [PASSED] missing-context-engine-class-or-yes
[06:52:14] [PASSED] missing-context-engine-class-or-or-yes
[06:52:14] =============== [PASSED] xe_rtp_rules_tests ================
[06:52:14] =============== xe_rtp_process_to_sr_tests ================
[06:52:14] [PASSED] coalesce-same-reg
[06:52:14] [PASSED] coalesce-same-reg-literal-and-func
[06:52:14] [PASSED] no-match-no-add
[06:52:14] [PASSED] two-regs-two-entries
[06:52:14] [PASSED] clr-one-set-other
[06:52:14] [PASSED] set-field
[06:52:14] [PASSED] conflict-duplicate
[06:52:14] [PASSED] conflict-not-disjoint
[06:52:14] [PASSED] conflict-not-disjoint-literal-and-func
[06:52:14] [PASSED] conflict-reg-type
[06:52:14] [PASSED] bad-mcr-reg-forced-to-regular
[06:52:14] [PASSED] bad-regular-reg-forced-to-mcr
[06:52:14] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[06:52:14] ================== xe_rtp_process_tests ===================
[06:52:14] [PASSED] active1
[06:52:14] [PASSED] active2
[06:52:14] [PASSED] active-inactive
[06:52:14] [PASSED] inactive-active
[06:52:14] [PASSED] inactive-active-inactive
[06:52:14] [PASSED] inactive-inactive-inactive
[06:52:14] ============== [PASSED] xe_rtp_process_tests ===============
[06:52:14] ===================== [PASSED] xe_rtp ======================
[06:52:14] ==================== xe_wa (1 subtest) =====================
[06:52:14] ======================== xe_wa_gt =========================
[06:52:14] [PASSED] TIGERLAKE B0
[06:52:14] [PASSED] DG1 A0
[06:52:14] [PASSED] DG1 B0
[06:52:14] [PASSED] ALDERLAKE_S A0
[06:52:14] [PASSED] ALDERLAKE_S B0
[06:52:14] [PASSED] ALDERLAKE_S C0
[06:52:14] [PASSED] ALDERLAKE_S D0
[06:52:14] [PASSED] ALDERLAKE_P A0
[06:52:14] [PASSED] ALDERLAKE_P B0
[06:52:14] [PASSED] ALDERLAKE_P C0
[06:52:14] [PASSED] ALDERLAKE_S RPLS D0
[06:52:14] [PASSED] ALDERLAKE_P RPLU E0
[06:52:14] [PASSED] DG2 G10 C0
[06:52:14] [PASSED] DG2 G11 B1
[06:52:14] [PASSED] DG2 G12 A1
[06:52:14] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:52:14] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[06:52:14] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[06:52:14] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[06:52:14] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[06:52:14] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[06:52:14] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[06:52:14] ==================== [PASSED] xe_wa_gt =====================
[06:52:14] ====================== [PASSED] xe_wa ======================
[06:52:14] ============================================================
[06:52:14] Testing complete. Ran 840 tests: passed: 811, skipped: 29
[06:52:14] Elapsed time: 41.437s total, 2.544s configuring, 38.175s building, 0.709s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[06:52:14] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:52:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:52:42] Starting KUnit Kernel (1/1)...
[06:52:42] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:52:42] ============ drm_test_pick_cmdline (2 subtests) ============
[06:52:42] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[06:52:42] =============== drm_test_pick_cmdline_named ===============
[06:52:42] [PASSED] NTSC
[06:52:42] [PASSED] NTSC-J
[06:52:42] [PASSED] PAL
[06:52:42] [PASSED] PAL-M
[06:52:42] =========== [PASSED] drm_test_pick_cmdline_named ===========
[06:52:42] ============== [PASSED] drm_test_pick_cmdline ==============
[06:52:42] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[06:52:42] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[06:52:42] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[06:52:42] =========== drm_validate_clone_mode (2 subtests) ===========
[06:52:42] ============== drm_test_check_in_clone_mode ===============
[06:52:42] [PASSED] in_clone_mode
[06:52:42] [PASSED] not_in_clone_mode
[06:52:42] ========== [PASSED] drm_test_check_in_clone_mode ===========
[06:52:42] =============== drm_test_check_valid_clones ===============
[06:52:42] [PASSED] not_in_clone_mode
[06:52:42] [PASSED] valid_clone
[06:52:42] [PASSED] invalid_clone
[06:52:42] =========== [PASSED] drm_test_check_valid_clones ===========
[06:52:42] ============= [PASSED] drm_validate_clone_mode =============
[06:52:42] ============= drm_validate_modeset (1 subtest) =============
[06:52:42] [PASSED] drm_test_check_connector_changed_modeset
[06:52:42] ============== [PASSED] drm_validate_modeset ===============
[06:52:42] ====== drm_test_bridge_get_current_state (1 subtest) =======
[06:52:42] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[06:52:42] ======== [PASSED] drm_test_bridge_get_current_state ========
[06:52:42] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[06:52:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[06:52:42] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[06:52:42] [PASSED] drm_test_drm_bridge_helper_hdmi_output_bus_fmts
[06:52:42] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[06:52:42] ============== drm_bridge_alloc (2 subtests) ===============
[06:52:42] [PASSED] drm_test_drm_bridge_alloc_basic
[06:52:42] [PASSED] drm_test_drm_bridge_alloc_get_put
[06:52:42] ================ [PASSED] drm_bridge_alloc =================
[06:52:42] ============= drm_bridge_bus_fmt (5 subtests) ==============
[06:52:42] [PASSED] drm_test_bridge_rgb_yuv_rgb
[06:52:42] [PASSED] drm_test_bridge_must_convert_to_yuv444
[06:52:42] [PASSED] drm_test_bridge_hdmi_auto_rgb
[06:52:42] [PASSED] drm_test_bridge_auto_first
[06:52:42] [PASSED] drm_test_bridge_rgb_yuv_no_path
[06:52:42] =============== [PASSED] drm_bridge_bus_fmt ================
[06:52:42] ============= drm_cmdline_parser (40 subtests) =============
[06:52:42] [PASSED] drm_test_cmdline_force_d_only
[06:52:42] [PASSED] drm_test_cmdline_force_D_only_dvi
[06:52:42] [PASSED] drm_test_cmdline_force_D_only_hdmi
[06:52:42] [PASSED] drm_test_cmdline_force_D_only_not_digital
[06:52:42] [PASSED] drm_test_cmdline_force_e_only
[06:52:42] [PASSED] drm_test_cmdline_res
[06:52:42] [PASSED] drm_test_cmdline_res_vesa
[06:52:42] [PASSED] drm_test_cmdline_res_vesa_rblank
[06:52:42] [PASSED] drm_test_cmdline_res_rblank
[06:52:42] [PASSED] drm_test_cmdline_res_bpp
[06:52:42] [PASSED] drm_test_cmdline_res_refresh
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[06:52:42] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[06:52:42] [PASSED] drm_test_cmdline_res_margins_force_on
[06:52:42] [PASSED] drm_test_cmdline_res_vesa_margins
[06:52:42] [PASSED] drm_test_cmdline_name
[06:52:42] [PASSED] drm_test_cmdline_name_bpp
[06:52:42] [PASSED] drm_test_cmdline_name_option
[06:52:42] [PASSED] drm_test_cmdline_name_bpp_option
[06:52:42] [PASSED] drm_test_cmdline_rotate_0
[06:52:42] [PASSED] drm_test_cmdline_rotate_90
[06:52:42] [PASSED] drm_test_cmdline_rotate_180
[06:52:42] [PASSED] drm_test_cmdline_rotate_270
[06:52:42] [PASSED] drm_test_cmdline_hmirror
[06:52:42] [PASSED] drm_test_cmdline_vmirror
[06:52:42] [PASSED] drm_test_cmdline_margin_options
[06:52:42] [PASSED] drm_test_cmdline_multiple_options
[06:52:42] [PASSED] drm_test_cmdline_bpp_extra_and_option
[06:52:42] [PASSED] drm_test_cmdline_extra_and_option
[06:52:42] [PASSED] drm_test_cmdline_freestanding_options
[06:52:42] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[06:52:42] [PASSED] drm_test_cmdline_panel_orientation
[06:52:42] ================ drm_test_cmdline_invalid =================
[06:52:42] [PASSED] margin_only
[06:52:42] [PASSED] interlace_only
[06:52:42] [PASSED] res_missing_x
[06:52:42] [PASSED] res_missing_y
[06:52:42] [PASSED] res_bad_y
[06:52:42] [PASSED] res_missing_y_bpp
[06:52:42] [PASSED] res_bad_bpp
[06:52:42] [PASSED] res_bad_refresh
[06:52:42] [PASSED] res_bpp_refresh_force_on_off
[06:52:42] [PASSED] res_invalid_mode
[06:52:42] [PASSED] res_bpp_wrong_place_mode
[06:52:42] [PASSED] name_bpp_refresh
[06:52:42] [PASSED] name_refresh
[06:52:42] [PASSED] name_refresh_wrong_mode
[06:52:42] [PASSED] name_refresh_invalid_mode
[06:52:42] [PASSED] rotate_multiple
[06:52:42] [PASSED] rotate_invalid_val
[06:52:42] [PASSED] rotate_truncated
[06:52:42] [PASSED] invalid_option
[06:52:42] [PASSED] invalid_tv_option
[06:52:42] [PASSED] truncated_tv_option
[06:52:42] ============ [PASSED] drm_test_cmdline_invalid =============
[06:52:42] =============== drm_test_cmdline_tv_options ===============
[06:52:42] [PASSED] NTSC
[06:52:42] [PASSED] NTSC_443
[06:52:42] [PASSED] NTSC_J
[06:52:42] [PASSED] PAL
[06:52:42] [PASSED] PAL_M
[06:52:42] [PASSED] PAL_N
[06:52:42] [PASSED] SECAM
[06:52:42] [PASSED] MONO_525
[06:52:42] [PASSED] MONO_625
[06:52:42] =========== [PASSED] drm_test_cmdline_tv_options ===========
[06:52:42] =============== [PASSED] drm_cmdline_parser ================
[06:52:42] ========== drmm_connector_hdmi_init (20 subtests) ==========
[06:52:42] [PASSED] drm_test_connector_hdmi_init_valid
[06:52:42] [PASSED] drm_test_connector_hdmi_init_bpc_8
[06:52:42] [PASSED] drm_test_connector_hdmi_init_bpc_10
[06:52:42] [PASSED] drm_test_connector_hdmi_init_bpc_12
[06:52:42] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[06:52:42] [PASSED] drm_test_connector_hdmi_init_bpc_null
[06:52:42] [PASSED] drm_test_connector_hdmi_init_formats_empty
[06:52:42] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[06:52:42] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:52:42] [PASSED] supported_formats=0x9 yuv420_allowed=1
[06:52:42] [PASSED] supported_formats=0x9 yuv420_allowed=0
[06:52:42] [PASSED] supported_formats=0x5 yuv420_allowed=1
[06:52:42] [PASSED] supported_formats=0x5 yuv420_allowed=0
[06:52:42] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[06:52:42] [PASSED] drm_test_connector_hdmi_init_null_ddc
[06:52:42] [PASSED] drm_test_connector_hdmi_init_null_product
[06:52:42] [PASSED] drm_test_connector_hdmi_init_null_vendor
[06:52:42] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[06:52:42] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[06:52:42] [PASSED] drm_test_connector_hdmi_init_product_valid
[06:52:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[06:52:42] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[06:52:42] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[06:52:42] ========= drm_test_connector_hdmi_init_type_valid =========
[06:52:42] [PASSED] HDMI-A
[06:52:42] [PASSED] HDMI-B
[06:52:42] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[06:52:42] ======== drm_test_connector_hdmi_init_type_invalid ========
[06:52:42] [PASSED] Unknown
[06:52:42] [PASSED] VGA
[06:52:42] [PASSED] DVI-I
[06:52:42] [PASSED] DVI-D
[06:52:42] [PASSED] DVI-A
[06:52:42] [PASSED] Composite
[06:52:42] [PASSED] SVIDEO
[06:52:42] [PASSED] LVDS
[06:52:42] [PASSED] Component
[06:52:42] [PASSED] DIN
[06:52:42] [PASSED] DP
[06:52:42] [PASSED] TV
[06:52:42] [PASSED] eDP
[06:52:42] [PASSED] Virtual
[06:52:42] [PASSED] DSI
[06:52:42] [PASSED] DPI
[06:52:42] [PASSED] Writeback
[06:52:42] [PASSED] SPI
[06:52:42] [PASSED] USB
[06:52:42] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[06:52:42] ============ [PASSED] drmm_connector_hdmi_init =============
[06:52:42] ============= drmm_connector_init (3 subtests) =============
[06:52:42] [PASSED] drm_test_drmm_connector_init
[06:52:42] [PASSED] drm_test_drmm_connector_init_null_ddc
[06:52:42] ========= drm_test_drmm_connector_init_type_valid =========
[06:52:42] [PASSED] Unknown
[06:52:42] [PASSED] VGA
[06:52:42] [PASSED] DVI-I
[06:52:42] [PASSED] DVI-D
[06:52:42] [PASSED] DVI-A
[06:52:42] [PASSED] Composite
[06:52:42] [PASSED] SVIDEO
[06:52:42] [PASSED] LVDS
[06:52:42] [PASSED] Component
[06:52:42] [PASSED] DIN
[06:52:42] [PASSED] DP
[06:52:42] [PASSED] HDMI-A
[06:52:42] [PASSED] HDMI-B
[06:52:42] [PASSED] TV
[06:52:42] [PASSED] eDP
[06:52:42] [PASSED] Virtual
[06:52:42] [PASSED] DSI
[06:52:42] [PASSED] DPI
[06:52:42] [PASSED] Writeback
[06:52:42] [PASSED] SPI
[06:52:42] [PASSED] USB
[06:52:42] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[06:52:42] =============== [PASSED] drmm_connector_init ===============
[06:52:42] ========= drm_connector_dynamic_init (6 subtests) ==========
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_init
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_init_properties
[06:52:42] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[06:52:42] [PASSED] Unknown
[06:52:42] [PASSED] VGA
[06:52:42] [PASSED] DVI-I
[06:52:42] [PASSED] DVI-D
[06:52:42] [PASSED] DVI-A
[06:52:42] [PASSED] Composite
[06:52:42] [PASSED] SVIDEO
[06:52:42] [PASSED] LVDS
[06:52:42] [PASSED] Component
[06:52:42] [PASSED] DIN
[06:52:42] [PASSED] DP
[06:52:42] [PASSED] HDMI-A
[06:52:42] [PASSED] HDMI-B
[06:52:42] [PASSED] TV
[06:52:42] [PASSED] eDP
[06:52:42] [PASSED] Virtual
[06:52:42] [PASSED] DSI
[06:52:42] [PASSED] DPI
[06:52:42] [PASSED] Writeback
[06:52:42] [PASSED] SPI
[06:52:42] [PASSED] USB
[06:52:42] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[06:52:42] ======== drm_test_drm_connector_dynamic_init_name =========
[06:52:42] [PASSED] Unknown
[06:52:42] [PASSED] VGA
[06:52:42] [PASSED] DVI-I
[06:52:42] [PASSED] DVI-D
[06:52:42] [PASSED] DVI-A
[06:52:42] [PASSED] Composite
[06:52:42] [PASSED] SVIDEO
[06:52:42] [PASSED] LVDS
[06:52:42] [PASSED] Component
[06:52:42] [PASSED] DIN
[06:52:42] [PASSED] DP
[06:52:42] [PASSED] HDMI-A
[06:52:42] [PASSED] HDMI-B
[06:52:42] [PASSED] TV
[06:52:42] [PASSED] eDP
[06:52:42] [PASSED] Virtual
[06:52:42] [PASSED] DSI
[06:52:42] [PASSED] DPI
[06:52:42] [PASSED] Writeback
[06:52:42] [PASSED] SPI
[06:52:42] [PASSED] USB
[06:52:42] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[06:52:42] =========== [PASSED] drm_connector_dynamic_init ============
[06:52:42] ==== drm_connector_dynamic_register_early (4 subtests) =====
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[06:52:42] ====== [PASSED] drm_connector_dynamic_register_early =======
[06:52:42] ======= drm_connector_dynamic_register (7 subtests) ========
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[06:52:42] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[06:52:42] ========= [PASSED] drm_connector_dynamic_register ==========
[06:52:42] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[06:52:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[06:52:42] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[06:52:42] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[06:52:42] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[06:52:42] ========== drm_test_get_tv_mode_from_name_valid ===========
[06:52:42] [PASSED] NTSC
[06:52:42] [PASSED] NTSC-443
[06:52:42] [PASSED] NTSC-J
[06:52:42] [PASSED] PAL
[06:52:42] [PASSED] PAL-M
[06:52:42] [PASSED] PAL-N
[06:52:42] [PASSED] SECAM
[06:52:42] [PASSED] Mono
[06:52:42] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[06:52:42] [PASSED] drm_test_get_tv_mode_from_name_truncated
[06:52:42] ============ [PASSED] drm_get_tv_mode_from_name ============
[06:52:42] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[06:52:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[06:52:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[06:52:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[06:52:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[06:52:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[06:52:42] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[06:52:42] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[06:52:42] [PASSED] VIC 96
[06:52:42] [PASSED] VIC 97
[06:52:42] [PASSED] VIC 101
[06:52:42] [PASSED] VIC 102
[06:52:42] [PASSED] VIC 106
[06:52:42] [PASSED] VIC 107
[06:52:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[06:52:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[06:52:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[06:52:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[06:52:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[06:52:42] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[06:52:42] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[06:52:42] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[06:52:42] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[06:52:42] [PASSED] Automatic
[06:52:42] [PASSED] Full
[06:52:42] [PASSED] Limited 16:235
[06:52:42] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[06:52:42] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[06:52:42] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[06:52:42] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[06:52:42] === drm_test_drm_hdmi_connector_get_output_format_name ====
[06:52:42] [PASSED] RGB
[06:52:42] [PASSED] YUV 4:2:0
[06:52:42] [PASSED] YUV 4:2:2
[06:52:42] [PASSED] YUV 4:4:4
[06:52:42] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[06:52:42] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[06:52:42] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[06:52:42] ============= drm_damage_helper (21 subtests) ==============
[06:52:42] [PASSED] drm_test_damage_iter_no_damage
[06:52:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[06:52:42] [PASSED] drm_test_damage_iter_no_damage_src_moved
[06:52:42] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[06:52:42] [PASSED] drm_test_damage_iter_no_damage_not_visible
[06:52:42] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[06:52:42] [PASSED] drm_test_damage_iter_no_damage_no_fb
[06:52:42] [PASSED] drm_test_damage_iter_simple_damage
[06:52:42] [PASSED] drm_test_damage_iter_single_damage
[06:52:42] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[06:52:42] [PASSED] drm_test_damage_iter_single_damage_outside_src
[06:52:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[06:52:42] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[06:52:42] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[06:52:42] [PASSED] drm_test_damage_iter_single_damage_src_moved
[06:52:42] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[06:52:42] [PASSED] drm_test_damage_iter_damage
[06:52:42] [PASSED] drm_test_damage_iter_damage_one_intersect
[06:52:42] [PASSED] drm_test_damage_iter_damage_one_outside
[06:52:42] [PASSED] drm_test_damage_iter_damage_src_moved
[06:52:42] [PASSED] drm_test_damage_iter_damage_not_visible
[06:52:42] ================ [PASSED] drm_damage_helper ================
[06:52:42] ============== drm_dp_mst_helper (3 subtests) ==============
[06:52:42] ============== drm_test_dp_mst_calc_pbn_mode ==============
[06:52:42] [PASSED] Clock 154000 BPP 30 DSC disabled
[06:52:42] [PASSED] Clock 234000 BPP 30 DSC disabled
[06:52:42] [PASSED] Clock 297000 BPP 24 DSC disabled
[06:52:42] [PASSED] Clock 332880 BPP 24 DSC enabled
[06:52:42] [PASSED] Clock 324540 BPP 24 DSC enabled
[06:52:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[06:52:42] ============== drm_test_dp_mst_calc_pbn_div ===============
[06:52:42] [PASSED] Link rate 2000000 lane count 4
[06:52:42] [PASSED] Link rate 2000000 lane count 2
[06:52:42] [PASSED] Link rate 2000000 lane count 1
[06:52:42] [PASSED] Link rate 1350000 lane count 4
[06:52:42] [PASSED] Link rate 1350000 lane count 2
[06:52:42] [PASSED] Link rate 1350000 lane count 1
[06:52:42] [PASSED] Link rate 1000000 lane count 4
[06:52:42] [PASSED] Link rate 1000000 lane count 2
[06:52:42] [PASSED] Link rate 1000000 lane count 1
[06:52:42] [PASSED] Link rate 810000 lane count 4
[06:52:42] [PASSED] Link rate 810000 lane count 2
[06:52:42] [PASSED] Link rate 810000 lane count 1
[06:52:42] [PASSED] Link rate 540000 lane count 4
[06:52:42] [PASSED] Link rate 540000 lane count 2
[06:52:42] [PASSED] Link rate 540000 lane count 1
[06:52:42] [PASSED] Link rate 270000 lane count 4
[06:52:42] [PASSED] Link rate 270000 lane count 2
[06:52:42] [PASSED] Link rate 270000 lane count 1
[06:52:42] [PASSED] Link rate 162000 lane count 4
[06:52:42] [PASSED] Link rate 162000 lane count 2
[06:52:42] [PASSED] Link rate 162000 lane count 1
[06:52:42] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[06:52:42] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[06:52:42] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[06:52:42] [PASSED] DP_POWER_UP_PHY with port number
[06:52:42] [PASSED] DP_POWER_DOWN_PHY with port number
[06:52:42] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[06:52:42] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[06:52:42] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[06:52:42] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[06:52:42] [PASSED] DP_QUERY_PAYLOAD with port number
[06:52:42] [PASSED] DP_QUERY_PAYLOAD with VCPI
[06:52:42] [PASSED] DP_REMOTE_DPCD_READ with port number
[06:52:42] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[06:52:42] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[06:52:42] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[06:52:42] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[06:52:42] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[06:52:42] [PASSED] DP_REMOTE_I2C_READ with port number
[06:52:42] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[06:52:42] [PASSED] DP_REMOTE_I2C_READ with transactions array
[06:52:42] [PASSED] DP_REMOTE_I2C_WRITE with port number
[06:52:42] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[06:52:42] [PASSED] DP_REMOTE_I2C_WRITE with data array
[06:52:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[06:52:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[06:52:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[06:52:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[06:52:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[06:52:42] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[06:52:42] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[06:52:42] ================ [PASSED] drm_dp_mst_helper ================
[06:52:42] ================== drm_exec (7 subtests) ===================
[06:52:42] [PASSED] sanitycheck
[06:52:42] [PASSED] test_lock
[06:52:42] [PASSED] test_lock_unlock
[06:52:42] [PASSED] test_duplicates
[06:52:42] [PASSED] test_prepare
[06:52:42] [PASSED] test_prepare_array
[06:52:42] [PASSED] test_multiple_loops
[06:52:42] ==================== [PASSED] drm_exec =====================
[06:52:42] =========== drm_format_helper_test (17 subtests) ===========
[06:52:42] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[06:52:42] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[06:52:42] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[06:52:42] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[06:52:42] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[06:52:42] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[06:52:42] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[06:52:42] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[06:52:42] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[06:52:42] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[06:52:42] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[06:52:42] ============== drm_test_fb_xrgb8888_to_mono ===============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[06:52:42] ==================== drm_test_fb_swab =====================
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ================ [PASSED] drm_test_fb_swab =================
[06:52:42] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[06:52:42] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[06:52:42] [PASSED] single_pixel_source_buffer
[06:52:42] [PASSED] single_pixel_clip_rectangle
[06:52:42] [PASSED] well_known_colors
[06:52:42] [PASSED] destination_pitch
[06:52:42] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[06:52:42] ================= drm_test_fb_clip_offset =================
[06:52:42] [PASSED] pass through
[06:52:42] [PASSED] horizontal offset
[06:52:42] [PASSED] vertical offset
[06:52:42] [PASSED] horizontal and vertical offset
[06:52:42] [PASSED] horizontal offset (custom pitch)
[06:52:42] [PASSED] vertical offset (custom pitch)
[06:52:42] [PASSED] horizontal and vertical offset (custom pitch)
[06:52:42] ============= [PASSED] drm_test_fb_clip_offset =============
[06:52:42] =================== drm_test_fb_memcpy ====================
[06:52:42] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[06:52:42] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[06:52:42] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[06:52:42] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[06:52:42] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[06:52:42] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[06:52:42] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[06:52:42] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[06:52:42] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[06:52:42] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[06:52:42] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[06:52:42] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[06:52:42] =============== [PASSED] drm_test_fb_memcpy ================
[06:52:42] ============= [PASSED] drm_format_helper_test ==============
[06:52:42] ================= drm_format (18 subtests) =================
[06:52:42] [PASSED] drm_test_format_block_width_invalid
[06:52:42] [PASSED] drm_test_format_block_width_one_plane
[06:52:42] [PASSED] drm_test_format_block_width_two_plane
[06:52:42] [PASSED] drm_test_format_block_width_three_plane
[06:52:42] [PASSED] drm_test_format_block_width_tiled
[06:52:42] [PASSED] drm_test_format_block_height_invalid
[06:52:42] [PASSED] drm_test_format_block_height_one_plane
[06:52:42] [PASSED] drm_test_format_block_height_two_plane
[06:52:42] [PASSED] drm_test_format_block_height_three_plane
[06:52:42] [PASSED] drm_test_format_block_height_tiled
[06:52:42] [PASSED] drm_test_format_min_pitch_invalid
[06:52:42] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[06:52:42] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[06:52:42] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[06:52:42] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[06:52:42] [PASSED] drm_test_format_min_pitch_two_plane
[06:52:42] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[06:52:42] [PASSED] drm_test_format_min_pitch_tiled
[06:52:42] =================== [PASSED] drm_format ====================
[06:52:42] ============== drm_framebuffer (10 subtests) ===============
[06:52:42] ========== drm_test_framebuffer_check_src_coords ==========
[06:52:42] [PASSED] Success: source fits into fb
[06:52:42] [PASSED] Fail: overflowing fb with x-axis coordinate
[06:52:42] [PASSED] Fail: overflowing fb with y-axis coordinate
[06:52:42] [PASSED] Fail: overflowing fb with source width
[06:52:42] [PASSED] Fail: overflowing fb with source height
[06:52:42] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[06:52:42] [PASSED] drm_test_framebuffer_cleanup
[06:52:42] =============== drm_test_framebuffer_create ===============
[06:52:42] [PASSED] ABGR8888 normal sizes
[06:52:42] [PASSED] ABGR8888 max sizes
[06:52:42] [PASSED] ABGR8888 pitch greater than min required
[06:52:42] [PASSED] ABGR8888 pitch less than min required
[06:52:42] [PASSED] ABGR8888 Invalid width
[06:52:42] [PASSED] ABGR8888 Invalid buffer handle
[06:52:42] [PASSED] No pixel format
[06:52:42] [PASSED] ABGR8888 Width 0
[06:52:42] [PASSED] ABGR8888 Height 0
[06:52:42] [PASSED] ABGR8888 Out of bound height * pitch combination
[06:52:42] [PASSED] ABGR8888 Large buffer offset
[06:52:42] [PASSED] ABGR8888 Buffer offset for inexistent plane
[06:52:42] [PASSED] ABGR8888 Invalid flag
[06:52:42] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[06:52:42] [PASSED] ABGR8888 Valid buffer modifier
[06:52:42] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[06:52:42] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[06:52:42] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[06:52:42] [PASSED] NV12 Normal sizes
[06:52:42] [PASSED] NV12 Max sizes
[06:52:42] [PASSED] NV12 Invalid pitch
[06:52:42] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[06:52:42] [PASSED] NV12 different modifier per-plane
[06:52:42] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[06:52:42] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[06:52:42] [PASSED] NV12 Modifier for inexistent plane
[06:52:42] [PASSED] NV12 Handle for inexistent plane
[06:52:42] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[06:52:42] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[06:52:42] [PASSED] YVU420 Normal sizes
[06:52:42] [PASSED] YVU420 Max sizes
[06:52:42] [PASSED] YVU420 Invalid pitch
[06:52:42] [PASSED] YVU420 Different pitches
[06:52:42] [PASSED] YVU420 Different buffer offsets/pitches
[06:52:42] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[06:52:42] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[06:52:42] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[06:52:42] [PASSED] YVU420 Valid modifier
[06:52:42] [PASSED] YVU420 Different modifiers per plane
[06:52:42] [PASSED] YVU420 Modifier for inexistent plane
[06:52:42] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[06:52:42] [PASSED] X0L2 Normal sizes
[06:52:42] [PASSED] X0L2 Max sizes
[06:52:42] [PASSED] X0L2 Invalid pitch
[06:52:42] [PASSED] X0L2 Pitch greater than minimum required
[06:52:42] [PASSED] X0L2 Handle for inexistent plane
[06:52:42] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[06:52:42] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[06:52:42] [PASSED] X0L2 Valid modifier
[06:52:42] [PASSED] X0L2 Modifier for inexistent plane
[06:52:42] =========== [PASSED] drm_test_framebuffer_create ===========
[06:52:42] [PASSED] drm_test_framebuffer_free
[06:52:42] [PASSED] drm_test_framebuffer_init
[06:52:42] [PASSED] drm_test_framebuffer_init_bad_format
[06:52:42] [PASSED] drm_test_framebuffer_init_dev_mismatch
[06:52:42] [PASSED] drm_test_framebuffer_lookup
[06:52:42] [PASSED] drm_test_framebuffer_lookup_inexistent
[06:52:42] [PASSED] drm_test_framebuffer_modifiers_not_supported
[06:52:42] ================= [PASSED] drm_framebuffer =================
[06:52:42] ================ drm_gem_shmem (8 subtests) ================
[06:52:42] [PASSED] drm_gem_shmem_test_obj_create
[06:52:42] [PASSED] drm_gem_shmem_test_obj_create_private
[06:52:42] [PASSED] drm_gem_shmem_test_pin_pages
[06:52:42] [PASSED] drm_gem_shmem_test_vmap
[06:52:42] [PASSED] drm_gem_shmem_test_get_sg_table
[06:52:42] [PASSED] drm_gem_shmem_test_get_pages_sgt
[06:52:42] [PASSED] drm_gem_shmem_test_madvise
[06:52:42] [PASSED] drm_gem_shmem_test_purge
[06:52:42] ================== [PASSED] drm_gem_shmem ==================
[06:52:42] === drm_atomic_helper_connector_hdmi_check (29 subtests) ===
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[06:52:42] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[06:52:42] [PASSED] Automatic
[06:52:42] [PASSED] Full
[06:52:42] [PASSED] Limited 16:235
[06:52:42] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[06:52:42] [PASSED] drm_test_check_disable_connector
[06:52:42] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[06:52:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[06:52:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[06:52:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[06:52:42] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[06:52:42] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[06:52:42] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[06:52:42] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[06:52:42] [PASSED] drm_test_check_output_bpc_dvi
[06:52:42] [PASSED] drm_test_check_output_bpc_format_vic_1
[06:52:42] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[06:52:42] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[06:52:42] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[06:52:42] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[06:52:42] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[06:52:42] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[06:52:42] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[06:52:42] ============ drm_test_check_hdmi_color_format =============
[06:52:42] [PASSED] AUTO -> RGB
[06:52:42] [PASSED] YCBCR422 -> YUV422
[06:52:42] [PASSED] YCBCR420 -> YUV420
[06:52:42] [PASSED] YCBCR444 -> YUV444
[06:52:42] [PASSED] RGB -> RGB
[06:52:42] ======== [PASSED] drm_test_check_hdmi_color_format =========
[06:52:42] ======== drm_test_check_hdmi_color_format_420_only ========
[06:52:42] [PASSED] RGB should fail
[06:52:42] [PASSED] YUV444 should fail
[06:52:42] [PASSED] YUV422 should fail
[06:52:42] [PASSED] YUV420 should work
[06:52:42] ==== [PASSED] drm_test_check_hdmi_color_format_420_only ====
[06:52:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[06:52:42] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[06:52:42] [PASSED] drm_test_check_broadcast_rgb_value
[06:52:42] [PASSED] drm_test_check_bpc_8_value
[06:52:42] [PASSED] drm_test_check_bpc_10_value
[06:52:42] [PASSED] drm_test_check_bpc_12_value
[06:52:42] [PASSED] drm_test_check_format_value
[06:52:42] [PASSED] drm_test_check_tmds_char_value
[06:52:42] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[06:52:42] = drm_atomic_helper_connector_hdmi_mode_valid (7 subtests) =
[06:52:42] [PASSED] drm_test_check_mode_valid
[06:52:42] [PASSED] drm_test_check_mode_valid_reject
[06:52:42] [PASSED] drm_test_check_mode_valid_reject_rate
[06:52:42] [PASSED] drm_test_check_mode_valid_reject_max_clock
[06:52:42] [PASSED] drm_test_check_mode_valid_yuv420_only_max_clock
[06:52:42] [PASSED] drm_test_check_mode_valid_reject_yuv420_only_connector
[06:52:42] [PASSED] drm_test_check_mode_valid_accept_yuv420_also_connector_rgb
[06:52:42] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[06:52:42] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[06:52:42] [PASSED] drm_test_check_infoframes
[06:52:42] [PASSED] drm_test_check_reject_avi_infoframe
[06:52:42] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[06:52:42] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[06:52:42] [PASSED] drm_test_check_reject_audio_infoframe
[06:52:42] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[06:52:42] ================= drm_managed (2 subtests) =================
[06:52:42] [PASSED] drm_test_managed_release_action
[06:52:42] [PASSED] drm_test_managed_run_action
[06:52:42] =================== [PASSED] drm_managed ===================
[06:52:42] =================== drm_mm (6 subtests) ====================
[06:52:42] [PASSED] drm_test_mm_init
[06:52:42] [PASSED] drm_test_mm_debug
[06:52:42] [PASSED] drm_test_mm_align32
[06:52:42] [PASSED] drm_test_mm_align64
[06:52:42] [PASSED] drm_test_mm_lowest
[06:52:42] [PASSED] drm_test_mm_highest
[06:52:42] ===================== [PASSED] drm_mm ======================
[06:52:42] ============= drm_modes_analog_tv (5 subtests) =============
[06:52:42] [PASSED] drm_test_modes_analog_tv_mono_576i
[06:52:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[06:52:42] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[06:52:42] [PASSED] drm_test_modes_analog_tv_pal_576i
[06:52:42] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[06:52:42] =============== [PASSED] drm_modes_analog_tv ===============
[06:52:42] ============== drm_panic_helper (3 subtests) ===============
[06:52:42] ============= drm_test_panic_screen_user_map ==============
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[06:52:42] ========= [PASSED] drm_test_panic_screen_user_map ==========
[06:52:42] ============= drm_test_panic_screen_user_page =============
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[06:52:42] ========= [PASSED] drm_test_panic_screen_user_page =========
[06:52:42] ========== drm_test_panic_screen_user_set_pixel ===========
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 494 x 494 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 RG16 little-endian (0x36314752)
[06:52:42] [PASSED] Panic screen user, mode: 1024 x 768 RG24 little-endian (0x34324752)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 494 x 494 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1920 x 1080 XR24 little-endian (0x34325258)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG16 little-endian (0x36314752)
[06:52:42] [PASSED] Panic screen kmsg, mode: 1024 x 768 RG24 little-endian (0x34324752)
[06:52:42] ====== [PASSED] drm_test_panic_screen_user_set_pixel =======
[06:52:42] ================ [PASSED] drm_panic_helper =================
[06:52:42] ============== drm_plane_helper (2 subtests) ===============
[06:52:42] =============== drm_test_check_plane_state ================
[06:52:42] [PASSED] clipping_simple
[06:52:42] [PASSED] clipping_rotate_reflect
[06:52:42] [PASSED] positioning_simple
[06:52:42] [PASSED] upscaling
[06:52:42] [PASSED] downscaling
[06:52:42] [PASSED] rounding1
[06:52:42] [PASSED] rounding2
[06:52:42] [PASSED] rounding3
[06:52:42] [PASSED] rounding4
[06:52:42] =========== [PASSED] drm_test_check_plane_state ============
[06:52:42] =========== drm_test_check_invalid_plane_state ============
[06:52:42] [PASSED] positioning_invalid
[06:52:42] [PASSED] upscaling_invalid
[06:52:42] [PASSED] downscaling_invalid
[06:52:42] ======= [PASSED] drm_test_check_invalid_plane_state ========
[06:52:42] ================ [PASSED] drm_plane_helper =================
[06:52:42] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[06:52:42] ====== drm_test_connector_helper_tv_get_modes_check =======
[06:52:42] [PASSED] None
[06:52:42] [PASSED] PAL
[06:52:42] [PASSED] NTSC
[06:52:42] [PASSED] Both, NTSC Default
[06:52:42] [PASSED] Both, PAL Default
[06:52:42] [PASSED] Both, NTSC Default, with PAL on command-line
[06:52:42] [PASSED] Both, PAL Default, with NTSC on command-line
[06:52:42] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[06:52:42] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[06:52:42] ================== drm_rect (9 subtests) ===================
[06:52:42] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[06:52:42] [PASSED] drm_test_rect_clip_scaled_not_clipped
[06:52:42] [PASSED] drm_test_rect_clip_scaled_clipped
[06:52:42] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[06:52:42] ================= drm_test_rect_intersect =================
[06:52:42] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[06:52:42] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[06:52:42] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[06:52:42] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[06:52:42] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[06:52:42] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[06:52:42] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[06:52:42] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[06:52:42] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[06:52:42] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[06:52:42] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[06:52:42] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[06:52:42] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[06:52:42] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[06:52:42] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[06:52:42] ============= [PASSED] drm_test_rect_intersect =============
[06:52:42] ================ drm_test_rect_calc_hscale ================
[06:52:42] [PASSED] normal use
[06:52:42] [PASSED] out of max range
[06:52:42] [PASSED] out of min range
[06:52:42] [PASSED] zero dst
[06:52:42] [PASSED] negative src
[06:52:42] [PASSED] negative dst
[06:52:42] ============ [PASSED] drm_test_rect_calc_hscale ============
[06:52:42] ================ drm_test_rect_calc_vscale ================
[06:52:42] [PASSED] normal use
[06:52:42] [PASSED] out of max range
[06:52:42] [PASSED] out of min range
[06:52:42] [PASSED] zero dst
[06:52:42] [PASSED] negative src
[06:52:42] [PASSED] negative dst
[06:52:42] ============ [PASSED] drm_test_rect_calc_vscale ============
[06:52:42] ================== drm_test_rect_rotate ===================
[06:52:42] [PASSED] reflect-x
[06:52:42] [PASSED] reflect-y
[06:52:42] [PASSED] rotate-0
[06:52:42] [PASSED] rotate-90
[06:52:42] [PASSED] rotate-180
[06:52:42] [PASSED] rotate-270
[06:52:42] ============== [PASSED] drm_test_rect_rotate ===============
[06:52:42] ================ drm_test_rect_rotate_inv =================
[06:52:42] [PASSED] reflect-x
[06:52:42] [PASSED] reflect-y
[06:52:42] [PASSED] rotate-0
[06:52:42] [PASSED] rotate-90
[06:52:42] [PASSED] rotate-180
[06:52:42] [PASSED] rotate-270
[06:52:42] ============ [PASSED] drm_test_rect_rotate_inv =============
[06:52:42] ==================== [PASSED] drm_rect =====================
[06:52:42] ============ drm_sysfb_modeset_test (1 subtest) ============
[06:52:42] ============ drm_test_sysfb_build_fourcc_list =============
[06:52:42] [PASSED] no native formats
[06:52:42] [PASSED] XRGB8888 as native format
[06:52:42] [PASSED] remove duplicates
[06:52:42] [PASSED] convert alpha formats
[06:52:42] [PASSED] random formats
[06:52:42] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[06:52:42] ============= [PASSED] drm_sysfb_modeset_test ==============
[06:52:42] ================== drm_fixp (2 subtests) ===================
[06:52:42] [PASSED] drm_test_int2fixp
[06:52:42] [PASSED] drm_test_sm2fixp
[06:52:42] ==================== [PASSED] drm_fixp =====================
[06:52:42] ============================================================
[06:52:42] Testing complete. Ran 667 tests: passed: 667
[06:52:42] Elapsed time: 27.967s total, 2.420s configuring, 25.131s building, 0.407s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[06:52:42] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:52:45] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:52:55] Starting KUnit Kernel (1/1)...
[06:52:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:52:55] ================= ttm_device (5 subtests) ==================
[06:52:55] [PASSED] ttm_device_init_basic
[06:52:55] [PASSED] ttm_device_init_multiple
[06:52:55] [PASSED] ttm_device_fini_basic
[06:52:55] [PASSED] ttm_device_init_no_vma_man
[06:52:55] ================== ttm_device_init_pools ==================
[06:52:55] [PASSED] No DMA allocations, no DMA32 required
[06:52:55] [PASSED] DMA allocations, DMA32 required
[06:52:55] [PASSED] No DMA allocations, DMA32 required
[06:52:55] [PASSED] DMA allocations, no DMA32 required
[06:52:55] ============== [PASSED] ttm_device_init_pools ==============
[06:52:55] =================== [PASSED] ttm_device ====================
[06:52:55] ================== ttm_pool (8 subtests) ===================
[06:52:55] ================== ttm_pool_alloc_basic ===================
[06:52:55] [PASSED] One page
[06:52:55] [PASSED] More than one page
[06:52:55] [PASSED] Above the allocation limit
[06:52:55] [PASSED] One page, with coherent DMA mappings enabled
[06:52:55] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:52:55] ============== [PASSED] ttm_pool_alloc_basic ===============
[06:52:55] ============== ttm_pool_alloc_basic_dma_addr ==============
[06:52:55] [PASSED] One page
[06:52:55] [PASSED] More than one page
[06:52:55] [PASSED] Above the allocation limit
[06:52:55] [PASSED] One page, with coherent DMA mappings enabled
[06:52:55] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[06:52:55] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[06:52:55] [PASSED] ttm_pool_alloc_order_caching_match
[06:52:55] [PASSED] ttm_pool_alloc_caching_mismatch
[06:52:55] [PASSED] ttm_pool_alloc_order_mismatch
[06:52:55] [PASSED] ttm_pool_free_dma_alloc
[06:52:55] [PASSED] ttm_pool_free_no_dma_alloc
[06:52:55] [PASSED] ttm_pool_fini_basic
[06:52:55] ==================== [PASSED] ttm_pool =====================
[06:52:55] ================ ttm_resource (8 subtests) =================
[06:52:55] ================= ttm_resource_init_basic =================
[06:52:55] [PASSED] Init resource in TTM_PL_SYSTEM
[06:52:55] [PASSED] Init resource in TTM_PL_VRAM
[06:52:55] [PASSED] Init resource in a private placement
[06:52:55] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[06:52:55] ============= [PASSED] ttm_resource_init_basic =============
[06:52:55] [PASSED] ttm_resource_init_pinned
[06:52:55] [PASSED] ttm_resource_fini_basic
[06:52:55] [PASSED] ttm_resource_manager_init_basic
[06:52:55] [PASSED] ttm_resource_manager_usage_basic
[06:52:55] [PASSED] ttm_resource_manager_set_used_basic
[06:52:55] [PASSED] ttm_sys_man_alloc_basic
[06:52:55] [PASSED] ttm_sys_man_free_basic
[06:52:55] ================== [PASSED] ttm_resource ===================
[06:52:55] =================== ttm_tt (15 subtests) ===================
[06:52:55] ==================== ttm_tt_init_basic ====================
[06:52:55] [PASSED] Page-aligned size
[06:52:55] [PASSED] Extra pages requested
[06:52:55] ================ [PASSED] ttm_tt_init_basic ================
[06:52:55] [PASSED] ttm_tt_init_misaligned
[06:52:55] [PASSED] ttm_tt_fini_basic
[06:52:55] [PASSED] ttm_tt_fini_sg
[06:52:55] [PASSED] ttm_tt_fini_shmem
[06:52:55] [PASSED] ttm_tt_create_basic
[06:52:55] [PASSED] ttm_tt_create_invalid_bo_type
[06:52:55] [PASSED] ttm_tt_create_ttm_exists
[06:52:55] [PASSED] ttm_tt_create_failed
[06:52:55] [PASSED] ttm_tt_destroy_basic
[06:52:55] [PASSED] ttm_tt_populate_null_ttm
[06:52:55] [PASSED] ttm_tt_populate_populated_ttm
[06:52:55] [PASSED] ttm_tt_unpopulate_basic
[06:52:55] [PASSED] ttm_tt_unpopulate_empty_ttm
[06:52:55] [PASSED] ttm_tt_swapin_basic
[06:52:55] ===================== [PASSED] ttm_tt ======================
[06:52:55] =================== ttm_bo (14 subtests) ===================
[06:52:55] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[06:52:55] [PASSED] Cannot be interrupted and sleeps
[06:52:55] [PASSED] Cannot be interrupted, locks straight away
[06:52:55] [PASSED] Can be interrupted, sleeps
[06:52:55] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[06:52:55] [PASSED] ttm_bo_reserve_locked_no_sleep
[06:52:55] [PASSED] ttm_bo_reserve_no_wait_ticket
[06:52:55] [PASSED] ttm_bo_reserve_double_resv
[06:52:55] [PASSED] ttm_bo_reserve_interrupted
[06:52:55] [PASSED] ttm_bo_reserve_deadlock
[06:52:55] [PASSED] ttm_bo_unreserve_basic
[06:52:55] [PASSED] ttm_bo_unreserve_pinned
[06:52:55] [PASSED] ttm_bo_unreserve_bulk
[06:52:55] [PASSED] ttm_bo_fini_basic
[06:52:55] [PASSED] ttm_bo_fini_shared_resv
[06:52:55] [PASSED] ttm_bo_pin_basic
[06:52:55] [PASSED] ttm_bo_pin_unpin_resource
[06:52:55] [PASSED] ttm_bo_multiple_pin_one_unpin
[06:52:55] ===================== [PASSED] ttm_bo ======================
[06:52:55] ============== ttm_bo_validate (22 subtests) ===============
[06:52:55] ============== ttm_bo_init_reserved_sys_man ===============
[06:52:55] [PASSED] Buffer object for userspace
[06:52:55] [PASSED] Kernel buffer object
[06:52:55] [PASSED] Shared buffer object
[06:52:55] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[06:52:55] ============== ttm_bo_init_reserved_mock_man ==============
[06:52:55] [PASSED] Buffer object for userspace
[06:52:55] [PASSED] Kernel buffer object
[06:52:55] [PASSED] Shared buffer object
[06:52:55] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[06:52:55] [PASSED] ttm_bo_init_reserved_resv
[06:52:55] ================== ttm_bo_validate_basic ==================
[06:52:55] [PASSED] Buffer object for userspace
[06:52:55] [PASSED] Kernel buffer object
[06:52:55] [PASSED] Shared buffer object
[06:52:55] ============== [PASSED] ttm_bo_validate_basic ==============
[06:52:55] [PASSED] ttm_bo_validate_invalid_placement
[06:52:55] ============= ttm_bo_validate_same_placement ==============
[06:52:55] [PASSED] System manager
[06:52:55] [PASSED] VRAM manager
[06:52:55] ========= [PASSED] ttm_bo_validate_same_placement ==========
[06:52:55] [PASSED] ttm_bo_validate_failed_alloc
[06:52:55] [PASSED] ttm_bo_validate_pinned
[06:52:55] [PASSED] ttm_bo_validate_busy_placement
[06:52:55] ================ ttm_bo_validate_multihop =================
[06:52:55] [PASSED] Buffer object for userspace
[06:52:55] [PASSED] Kernel buffer object
[06:52:55] [PASSED] Shared buffer object
[06:52:55] ============ [PASSED] ttm_bo_validate_multihop =============
[06:52:55] ========== ttm_bo_validate_no_placement_signaled ==========
[06:52:55] [PASSED] Buffer object in system domain, no page vector
[06:52:55] [PASSED] Buffer object in system domain with an existing page vector
[06:52:55] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[06:52:55] ======== ttm_bo_validate_no_placement_not_signaled ========
[06:52:55] [PASSED] Buffer object for userspace
[06:52:55] [PASSED] Kernel buffer object
[06:52:55] [PASSED] Shared buffer object
[06:52:55] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[06:52:55] [PASSED] ttm_bo_validate_move_fence_signaled
[06:52:55] ========= ttm_bo_validate_move_fence_not_signaled =========
[06:52:55] [PASSED] Waits for GPU
[06:52:55] [PASSED] Tries to lock straight away
[06:52:55] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[06:52:55] [PASSED] ttm_bo_validate_swapout
[06:52:55] [PASSED] ttm_bo_validate_happy_evict
[06:52:55] [PASSED] ttm_bo_validate_all_pinned_evict
[06:52:55] [PASSED] ttm_bo_validate_allowed_only_evict
[06:52:55] [PASSED] ttm_bo_validate_deleted_evict
[06:52:55] [PASSED] ttm_bo_validate_busy_domain_evict
[06:52:55] [PASSED] ttm_bo_validate_evict_gutting
[06:52:55] [PASSED] ttm_bo_validate_recrusive_evict
[06:52:55] ================= [PASSED] ttm_bo_validate =================
[06:52:55] ============================================================
[06:52:55] Testing complete. Ran 102 tests: passed: 102
[06:52:55] Elapsed time: 12.950s total, 2.497s configuring, 10.188s building, 0.228s running
+ for kcfg in "${kunitconfigs[@]}"
+ [[ ! -f /kernel/drivers/dma-buf/.kunitconfig ]]
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/dma-buf/.kunitconfig
[06:52:56] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[06:52:58] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[06:53:07] Starting KUnit Kernel (1/1)...
[06:53:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[06:53:07] =============== dma-buf-fence (12 subtests) ================
[06:53:07] [PASSED] test_sanitycheck
[06:53:07] [PASSED] test_signaling
[06:53:07] [PASSED] test_add_callback
[06:53:07] [PASSED] test_late_add_callback
[06:53:07] [PASSED] test_rm_callback
[06:53:07] [PASSED] test_late_rm_callback
[06:53:07] [PASSED] test_status
[06:53:07] [PASSED] test_error
[06:53:07] [PASSED] test_wait
[06:53:07] [PASSED] test_wait_timeout
[06:53:07] [PASSED] test_stub
[06:53:07] [SKIPPED] test_race_signal_callback (requires at least 2 CPUs)
[06:53:07] ================== [PASSED] dma-buf-fence ==================
[06:53:07] ============ dma-buf-fence-chain (11 subtests) =============
[06:53:07] [PASSED] test_sanitycheck
[06:53:07] [PASSED] test_find_seqno
[06:53:07] [PASSED] test_find_signaled
[06:53:07] [PASSED] test_find_out_of_order
[06:53:12] [PASSED] test_find_gap
[06:53:12] [PASSED] test_find_race
[06:53:12] [PASSED] test_signal_forward
[06:53:12] [PASSED] test_signal_backward
[06:53:12] [PASSED] test_wait_forward
[06:53:12] [PASSED] test_wait_backward
[06:53:12] [PASSED] test_wait_random
[06:53:12] =============== [PASSED] dma-buf-fence-chain ===============
[06:53:12] ============ dma-buf-fence-unwrap (11 subtests) ============
[06:53:12] [PASSED] test_sanitycheck
[06:53:12] [PASSED] test_unwrap_array
[06:53:12] [PASSED] test_unwrap_chain
[06:53:12] [PASSED] test_unwrap_chain_array
[06:53:12] [PASSED] test_unwrap_merge
[06:53:12] [PASSED] test_unwrap_merge_duplicate
[06:53:12] [PASSED] test_unwrap_merge_seqno
[06:53:12] [PASSED] test_unwrap_merge_order
[06:53:12] [PASSED] test_unwrap_merge_complex
[06:53:12] [PASSED] test_unwrap_merge_complex_seqno
[06:53:12] [PASSED] test_dedup_empty
[06:53:12] ============== [PASSED] dma-buf-fence-unwrap ===============
[06:53:12] ================ dma-buf-resv (5 subtests) =================
[06:53:12] [PASSED] test_sanitycheck
[06:53:12] ===================== test_signaling ======================
[06:53:12] [PASSED] kernel
[06:53:12] [PASSED] write
[06:53:12] [PASSED] read
[06:53:12] [PASSED] bookkeep
[06:53:12] ================= [PASSED] test_signaling ==================
[06:53:12] ====================== test_for_each ======================
[06:53:12] [PASSED] kernel
[06:53:12] [PASSED] write
[06:53:12] [PASSED] read
[06:53:12] [PASSED] bookkeep
[06:53:12] ================== [PASSED] test_for_each ==================
[06:53:12] ================= test_for_each_unlocked ==================
[06:53:12] [PASSED] kernel
[06:53:12] [PASSED] write
[06:53:12] [PASSED] read
[06:53:12] [PASSED] bookkeep
[06:53:12] ============= [PASSED] test_for_each_unlocked ==============
[06:53:12] ===================== test_get_fences =====================
[06:53:12] [PASSED] kernel
[06:53:12] [PASSED] write
[06:53:12] [PASSED] read
[06:53:12] [PASSED] bookkeep
[06:53:12] ================= [PASSED] test_get_fences =================
[06:53:12] ================== [PASSED] dma-buf-resv ===================
[06:53:12] ============================================================
[06:53:12] Testing complete. Ran 51 tests: passed: 50, skipped: 1
[06:53:12] Elapsed time: 16.824s total, 2.553s configuring, 8.899s building, 5.356s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.BAT: success for Introduce Xe PCIe FLR (rev12)
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (11 preceding siblings ...)
2026-11-03 6:53 ` ✓ CI.KUnit: success " Patchwork
@ 2026-11-03 7:29 ` Patchwork
2026-11-03 12:43 ` ✓ Xe.CI.FULL: " Patchwork
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-11-03 7:29 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 4839 bytes --]
== Series Details ==
Series: Introduce Xe PCIe FLR (rev12)
URL : https://patchwork.freedesktop.org/series/162055/
State : success
== Summary ==
CI Bug Log - changes from xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779_BAT -> xe-pw-162055v12_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (14 -> 15)
------------------------------
Additional (1): bat-bmg-2
Known issues
------------
Here are the changes found in xe-pw-162055v12_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@write:
- bat-bmg-2: NOTRUN -> [SKIP][1] ([Intel XE#2134]) +4 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@fbdev@write.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][2] ([Intel XE#2233])
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-legacy:
- bat-bmg-2: NOTRUN -> [SKIP][3] ([Intel XE#2489] / [Intel XE#3419]) +13 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@kms_cursor_legacy@basic-flip-after-cursor-legacy.html
* igt@kms_flip@basic-flip-vs-modeset:
- bat-bmg-2: NOTRUN -> [SKIP][4] ([Intel XE#2482]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@kms_flip@basic-flip-vs-modeset.html
* igt@kms_frontbuffer_tracking@basic:
- bat-bmg-2: NOTRUN -> [SKIP][5] ([Intel XE#2434] / [Intel XE#2548] / [Intel XE#6314])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-bmg-2: NOTRUN -> [SKIP][6] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@xe_exec_multi_queue@priority:
- bat-bmg-2: NOTRUN -> [SKIP][7] ([Intel XE#8364]) +13 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@xe_exec_multi_queue@priority.html
* igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit:
- bat-bmg-2: NOTRUN -> [SKIP][8] ([Intel XE#2229])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@xe_live_ktest@xe_bo@xe_ccs_migrate_kunit.html
* igt@xe_pat@pat-index-xehpc:
- bat-bmg-2: NOTRUN -> [SKIP][9] ([Intel XE#1420] / [Intel XE#7590])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelp:
- bat-bmg-2: NOTRUN -> [SKIP][10] ([Intel XE#2245] / [Intel XE#7590])
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@xe_pat@pat-index-xelp.html
* igt@xe_pat@pat-index-xelpg:
- bat-bmg-2: NOTRUN -> [SKIP][11] ([Intel XE#2236] / [Intel XE#7590])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/bat-bmg-2/igt@xe_pat@pat-index-xelpg.html
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2236]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2236
[Intel XE#2245]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2245
[Intel XE#2434]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2434
[Intel XE#2482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2482
[Intel XE#2489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2489
[Intel XE#2548]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2548
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#3419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3419
[Intel XE#6314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6314
[Intel XE#7590]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7590
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
Build changes
-------------
* Linux: xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779 -> xe-pw-162055v12
IGT_9175: 9175
xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779: 0f5e7199aaceed05aa49dad4c97df2677e32f779
xe-pw-162055v12: 162055v12
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/index.html
[-- Attachment #2: Type: text/html, Size: 5752 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread* ✓ Xe.CI.FULL: success for Introduce Xe PCIe FLR (rev12)
2026-11-03 6:06 [PATCH v12 00/10] Introduce Xe PCIe FLR Raag Jadav
` (12 preceding siblings ...)
2026-11-03 7:29 ` ✓ Xe.CI.BAT: " Patchwork
@ 2026-11-03 12:43 ` Patchwork
13 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2026-11-03 12:43 UTC (permalink / raw)
To: Raag Jadav; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 34512 bytes --]
== Series Details ==
Series: Introduce Xe PCIe FLR (rev12)
URL : https://patchwork.freedesktop.org/series/162055/
State : success
== Summary ==
CI Bug Log - changes from xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779_FULL -> xe-pw-162055v12_FULL
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (3 -> 3)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in xe-pw-162055v12_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-bmg: [PASS][1] -> [FAIL][2] ([Intel XE#3718] / [Intel XE#6078]) +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-8/igt@kms_async_flips@alternate-sync-async-flip.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-3/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-ptl: NOTRUN -> [SKIP][3] ([Intel XE#5901])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_big_fb@linear-8bpp-rotate-270.html
- shard-lnl: NOTRUN -> [SKIP][4] ([Intel XE#1407])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-ptl: NOTRUN -> [SKIP][5] ([Intel XE#5808]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
- shard-lnl: NOTRUN -> [SKIP][6] ([Intel XE#1124]) +2 other tests skip
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p:
- shard-ptl: NOTRUN -> [SKIP][7] ([Intel XE#7679])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
- shard-lnl: NOTRUN -> [SKIP][8] ([Intel XE#8365])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_bw@connected-linear-tiling-4-displays-target-2160x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#2887]) +2 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs:
- shard-ptl: NOTRUN -> [SKIP][10] ([Intel XE#5822]) +6 other tests skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_ccs@bad-rotation-90-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][11] ([Intel XE#3432])
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-ptl: NOTRUN -> [SKIP][12] ([Intel XE#5824])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- shard-lnl: NOTRUN -> [SKIP][13] ([Intel XE#373])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
- shard-ptl: NOTRUN -> [SKIP][14] ([Intel XE#2252]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
* igt@kms_chamelium_sharpness_filter@filter-basic:
- shard-ptl: NOTRUN -> [SKIP][15] ([Intel XE#6507])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_chamelium_sharpness_filter@filter-basic.html
- shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#6507] / [Intel XE#7358])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_chamelium_sharpness_filter@filter-basic.html
* igt@kms_content_protection@mei-interface:
- shard-ptl: NOTRUN -> [SKIP][17] ([Intel XE#5845])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_content_protection@mei-interface.html
* igt@kms_cursor_crc@cursor-random-32x10:
- shard-ptl: NOTRUN -> [SKIP][18] ([Intel XE#5900]) +1 other test skip
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_cursor_crc@cursor-random-32x10.html
- shard-lnl: NOTRUN -> [SKIP][19] ([Intel XE#1424])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_cursor_crc@cursor-random-32x10.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-bmg: [PASS][20] -> [FAIL][21] ([Intel XE#7809])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_dp_link_training@non-uhbr-sst-direct-train:
- shard-ptl: NOTRUN -> [SKIP][22] ([Intel XE#9534])
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_dp_link_training@non-uhbr-sst-direct-train.html
* igt@kms_dp_link_training@non-uhbr-sst-tbtalt-train:
- shard-ptl: NOTRUN -> [SKIP][23] ([Intel XE#9539])
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_dp_link_training@non-uhbr-sst-tbtalt-train.html
* igt@kms_dsc@dsc-basic-ultrajoiner:
- shard-ptl: NOTRUN -> [SKIP][24] ([Intel XE#5907])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_dsc@dsc-basic-ultrajoiner.html
- shard-lnl: NOTRUN -> [SKIP][25] ([Intel XE#8265])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_dsc@dsc-basic-ultrajoiner.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank:
- shard-ptl: NOTRUN -> [SKIP][26] ([Intel XE#2316])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
- shard-lnl: NOTRUN -> [SKIP][27] ([Intel XE#1421])
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-ptl: [PASS][28] -> [FAIL][29] ([Intel XE#3321]) +1 other test fail
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-7/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [PASS][30] -> [FAIL][31] ([Intel XE#301] / [Intel XE#3149]) +1 other test fail
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-lnl-7/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@modeset-vs-vblank-race@a-edp1:
- shard-ptl: [PASS][32] -> [FAIL][33] ([Intel XE#3098]) +1 other test fail
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-6/igt@kms_flip@modeset-vs-vblank-race@a-edp1.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-6/igt@kms_flip@modeset-vs-vblank-race@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-lnl: NOTRUN -> [SKIP][34] ([Intel XE#7178] / [Intel XE#7349])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-ptl: NOTRUN -> [SKIP][35] ([Intel XE#7178]) +3 other tests skip
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling:
- shard-ptl: NOTRUN -> [SKIP][36] ([Intel XE#5828]) +1 other test skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1397] / [Intel XE#1745] / [Intel XE#7385] / [Intel XE#9144])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][38] ([Intel XE#1397] / [Intel XE#7385] / [Intel XE#9144])
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-32bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_force_connector_basic@force-connector-state:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#352])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
- shard-ptl: NOTRUN -> [SKIP][40] ([Intel XE#5812]) +25 other tests skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#656] / [Intel XE#7905]) +5 other tests skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc:
- shard-ptl: NOTRUN -> [SKIP][42] ([Intel XE#5800] / [Intel XE#6312]) +3 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-render:
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#6312] / [Intel XE#651]) +1 other test skip
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt:
- shard-ptl: NOTRUN -> [SKIP][44] ([Intel XE#6312])
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt.html
- shard-lnl: NOTRUN -> [SKIP][45] ([Intel XE#6312])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-spr-indfb-draw-blt:
- shard-lnl: NOTRUN -> [SKIP][46] ([Intel XE#7905]) +4 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_frontbuffer_tracking@fbcdrrshdr-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][47] ([Intel XE#2313])
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4:
- shard-ptl: NOTRUN -> [SKIP][48] ([Intel XE#7865]) +3 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_frontbuffer_tracking@fbcpsrhdr-tiling-4.html
* igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][49] ([Intel XE#7865])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_frontbuffer_tracking@hdr-1p-offscreen-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-render:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#7061])
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-5/igt@kms_frontbuffer_tracking@hdr-abgr161616f-draw-render.html
* igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render:
- shard-ptl: NOTRUN -> [SKIP][51] ([Intel XE#7061]) +2 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#7061])
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_frontbuffer_tracking@psrhdr-argb161616f-draw-render.html
* igt@kms_mst@mst-suspend-read-crc:
- shard-bmg: NOTRUN -> [SKIP][53] ([Intel XE#8348])
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-5/igt@kms_mst@mst-suspend-read-crc.html
* igt@kms_plane@pixel-format-x-tiled-modifier:
- shard-ptl: NOTRUN -> [SKIP][54] ([Intel XE#7283]) +2 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_plane@pixel-format-x-tiled-modifier.html
* igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#8303]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_plane@pixel-format-x-tiled-modifier@pipe-b-plane-5.html
* igt@kms_plane@pixel-format-y-tiled-ccs-modifier:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#7283])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_plane@pixel-format-y-tiled-ccs-modifier.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-ptl: NOTRUN -> [SKIP][57] ([Intel XE#7304]) +1 other test skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#2893] / [Intel XE#4608] / [Intel XE#7304])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][59] ([Intel XE#4608])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][60] ([Intel XE#4608] / [Intel XE#7304])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_psr2_sf@fbc-psr2-cursor-plane-update-sf@pipe-b-edp-1.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
- shard-ptl: NOTRUN -> [SKIP][61] ([Intel XE#5858] / [Intel XE#7304]) +3 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-a-edp-1:
- shard-ptl: NOTRUN -> [SKIP][62] ([Intel XE#5858]) +1 other test skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area@pipe-a-edp-1.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-ptl: NOTRUN -> [SKIP][63] ([Intel XE#7413])
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_psr2_su@frontbuffer-xrgb8888.html
- shard-lnl: NOTRUN -> [SKIP][64] ([Intel XE#1128] / [Intel XE#7413])
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_vrr@lobf:
- shard-ptl: NOTRUN -> [SKIP][65] ([Intel XE#5950] / [Intel XE#9277])
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_vrr@lobf.html
* igt@kms_vrr@lobf@pipe-a-edp-1:
- shard-ptl: NOTRUN -> [SKIP][66] ([Intel XE#7638] / [Intel XE#9277])
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_vrr@lobf@pipe-a-edp-1.html
* igt@xe_evict@evict-mixed-threads-small-multi-vm:
- shard-ptl: NOTRUN -> [SKIP][67] ([Intel XE#5764])
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_evict@evict-mixed-threads-small-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd:
- shard-ptl: NOTRUN -> [SKIP][68] ([Intel XE#6144])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd.html
- shard-lnl: NOTRUN -> [SKIP][69] ([Intel XE#6540] / [Intel XE#688])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd.html
* igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr:
- shard-lnl: NOTRUN -> [SKIP][70] ([Intel XE#7482]) +2 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_exec_balancer@many-execqueues-cm-parallel-userptr.html
* igt@xe_exec_balancer@once-cm-virtual-userptr-invalidate-race:
- shard-ptl: NOTRUN -> [SKIP][71] ([Intel XE#7482]) +2 other tests skip
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_exec_balancer@once-cm-virtual-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#1392])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_exec_basic@multigpu-no-exec-bindexecqueue-rebind.html
* igt@xe_exec_basic@multigpu-once-null:
- shard-ptl: NOTRUN -> [SKIP][73] ([Intel XE#5575] / [Intel XE#7484]) +3 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@xe_exec_basic@multigpu-once-null.html
* igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind:
- shard-ptl: NOTRUN -> [SKIP][74] ([Intel XE#8374]) +3 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind.html
- shard-lnl: NOTRUN -> [SKIP][75] ([Intel XE#8374]) +1 other test skip
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_exec_fault_mode@many-multi-queue-userptr-rebind.html
* igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem:
- shard-lnl: NOTRUN -> [SKIP][76] ([Intel XE#8364]) +7 other tests skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_exec_multi_queue@many-queues-preempt-mode-close-fd-smem.html
* igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority:
- shard-ptl: NOTRUN -> [SKIP][77] ([Intel XE#8364]) +12 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_exec_multi_queue@two-queues-preempt-mode-fault-dyn-priority.html
* igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate:
- shard-bmg: NOTRUN -> [INCOMPLETE][78] ([Intel XE#9480])
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-5/igt@xe_exec_threads@threads-mixed-fd-userptr-invalidate.html
* igt@xe_exec_threads@threads-multi-queue-shared-vm-basic:
- shard-ptl: NOTRUN -> [SKIP][79] ([Intel XE#8378]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_exec_threads@threads-multi-queue-shared-vm-basic.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-ptl: NOTRUN -> [SKIP][80] ([Intel XE#6069])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_oa@oa-tlb-invalidate.html
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#2248] / [Intel XE#7325] / [Intel XE#7393])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_pm@d3hot-i2c:
- shard-ptl: NOTRUN -> [SKIP][82] ([Intel XE#5742] / [Intel XE#7400])
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-1/igt@xe_pm@d3hot-i2c.html
* igt@xe_pm@s4-basic-exec:
- shard-ptl: [PASS][83] -> [ABORT][84] ([Intel XE#9362])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-2/igt@xe_pm@s4-basic-exec.html
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-8/igt@xe_pm@s4-basic-exec.html
- shard-lnl: [PASS][85] -> [ABORT][86] ([Intel XE#9362])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-lnl-2/igt@xe_pm@s4-basic-exec.html
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_pm@s4-basic-exec.html
* igt@xe_pm_residency@gt-c6-freeze@gt0:
- shard-bmg: [PASS][87] -> [FAIL][88] ([Intel XE#9254]) +1 other test fail
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-10/igt@xe_pm_residency@gt-c6-freeze@gt0.html
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-2/igt@xe_pm_residency@gt-c6-freeze@gt0.html
* igt@xe_query@multigpu-query-pxp-status:
- shard-bmg: NOTRUN -> [SKIP][89] ([Intel XE#944])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-5/igt@xe_query@multigpu-query-pxp-status.html
* igt@xe_query@multigpu-query-topology:
- shard-ptl: NOTRUN -> [SKIP][90] ([Intel XE#6019])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_query@multigpu-query-topology.html
- shard-lnl: NOTRUN -> [SKIP][91] ([Intel XE#944])
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_query@multigpu-query-topology.html
* igt@xe_sriov_auto_provisioning@exclusive-ranges:
- shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#4130] / [Intel XE#7366])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
#### Possible fixes ####
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-ptl: [FAIL][93] ([Intel XE#8628]) -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-bmg: [INCOMPLETE][95] ([Intel XE#7084] / [Intel XE#8150]) -> [PASS][96] +1 other test pass
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1:
- shard-ptl: [DMESG-WARN][97] ([Intel XE#9391]) -> [PASS][98] +1 other test pass
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1.html
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-c-edp-1.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [SKIP][99] ([Intel XE#1503]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-8/igt@kms_hdr@invalid-hdr.html
* igt@kms_vrr@flipline:
- shard-lnl: [FAIL][101] ([Intel XE#4227] / [Intel XE#7397]) -> [PASS][102] +1 other test pass
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-lnl-5/igt@kms_vrr@flipline.html
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-5/igt@kms_vrr@flipline.html
* igt@xe_pm@s4-multiple-execs:
- shard-ptl: [ABORT][103] ([Intel XE#9362]) -> [PASS][104] +1 other test pass
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-ptl-4/igt@xe_pm@s4-multiple-execs.html
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-ptl-3/igt@xe_pm@s4-multiple-execs.html
- shard-lnl: [ABORT][105] ([Intel XE#9362]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-lnl-2/igt@xe_pm@s4-multiple-execs.html
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-lnl-8/igt@xe_pm@s4-multiple-execs.html
#### Warnings ####
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][107] ([Intel XE#1729] / [Intel XE#7424]) -> [SKIP][108] ([Intel XE#2426] / [Intel XE#5848])
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779/shard-bmg-10/igt@kms_tiled_display@basic-test-pattern.html
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3098]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3098
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
[Intel XE#3718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3718
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4227]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4227
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5742]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5742
[Intel XE#5764]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5764
[Intel XE#5800]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5800
[Intel XE#5808]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5808
[Intel XE#5812]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5812
[Intel XE#5822]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5822
[Intel XE#5824]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5824
[Intel XE#5828]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5828
[Intel XE#5845]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5845
[Intel XE#5848]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5848
[Intel XE#5858]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5858
[Intel XE#5900]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5900
[Intel XE#5901]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5901
[Intel XE#5907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5907
[Intel XE#5950]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5950
[Intel XE#6019]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6019
[Intel XE#6069]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6069
[Intel XE#6078]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6078
[Intel XE#6144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6144
[Intel XE#6312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6312
[Intel XE#6507]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6507
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#6540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/6540
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#7061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7061
[Intel XE#7084]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7084
[Intel XE#7178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7178
[Intel XE#7283]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7283
[Intel XE#7304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7304
[Intel XE#7325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7325
[Intel XE#7349]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7349
[Intel XE#7358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7358
[Intel XE#7366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7366
[Intel XE#7385]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7385
[Intel XE#7393]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7393
[Intel XE#7397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7397
[Intel XE#7400]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7400
[Intel XE#7413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7413
[Intel XE#7424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7424
[Intel XE#7482]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7482
[Intel XE#7484]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7484
[Intel XE#7638]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7638
[Intel XE#7679]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7679
[Intel XE#7809]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7809
[Intel XE#7865]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7865
[Intel XE#7905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/7905
[Intel XE#8150]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8150
[Intel XE#8265]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8265
[Intel XE#8303]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8303
[Intel XE#8348]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8348
[Intel XE#8364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8364
[Intel XE#8365]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8365
[Intel XE#8374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8374
[Intel XE#8378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8378
[Intel XE#8628]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/8628
[Intel XE#9144]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9144
[Intel XE#9254]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9254
[Intel XE#9277]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9277
[Intel XE#9362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9362
[Intel XE#9391]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9391
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#9480]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9480
[Intel XE#9534]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9534
[Intel XE#9539]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/9539
Build changes
-------------
* Linux: xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779 -> xe-pw-162055v12
IGT_9175: 9175
xe-6049-0f5e7199aaceed05aa49dad4c97df2677e32f779: 0f5e7199aaceed05aa49dad4c97df2677e32f779
xe-pw-162055v12: 162055v12
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-162055v12/index.html
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