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From: Yang Weijiang <weijiang.yang@intel.com>
To: pbonzini@redhat.com, jmattson@google.com, seanjc@google.com,
	like.xu.linux@gmail.com, vkuznets@redhat.com,
	wei.w.wang@intel.com, kvm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Cc: Yang Weijiang <weijiang.yang@intel.com>
Subject: [PATCH v9 14/17] KVM: x86/vmx: Clear Arch LBREn bit before inject #DB to guest
Date: Tue, 15 Feb 2022 16:25:41 -0500	[thread overview]
Message-ID: <20220215212544.51666-15-weijiang.yang@intel.com> (raw)
In-Reply-To: <20220215212544.51666-1-weijiang.yang@intel.com>

On a debug breakpoint event (#DB), IA32_LBR_CTL.LBREn is cleared.
So need to clear the bit manually before inject #DB.

Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
---
 arch/x86/kvm/vmx/vmx.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index d1eb1e149fea..e7969884d90e 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1617,6 +1617,27 @@ static void vmx_clear_hlt(struct kvm_vcpu *vcpu)
 		vmcs_write32(GUEST_ACTIVITY_STATE, GUEST_ACTIVITY_ACTIVE);
 }
 
+static void flip_arch_lbr_ctl(struct kvm_vcpu *vcpu, bool on)
+{
+	struct lbr_desc *lbr_desc = vcpu_to_lbr_desc(vcpu);
+	struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
+
+	if (kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR) &&
+	    test_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use) &&
+	    lbr_desc->event) {
+		u64 old = vmcs_read64(GUEST_IA32_LBR_CTL);
+		u64 new;
+
+		if (on)
+			new = old | ARCH_LBR_CTL_LBREN;
+		else
+			new = old & ~ARCH_LBR_CTL_LBREN;
+
+		if (old != new)
+			vmcs_write64(GUEST_IA32_LBR_CTL, new);
+	}
+}
+
 static void vmx_queue_exception(struct kvm_vcpu *vcpu)
 {
 	struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -1652,6 +1673,9 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu)
 	vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
 
 	vmx_clear_hlt(vcpu);
+
+	if (nr == DB_VECTOR)
+		flip_arch_lbr_ctl(vcpu, false);
 }
 
 static void vmx_setup_uret_msr(struct vcpu_vmx *vmx, unsigned int msr,
@@ -4655,6 +4679,9 @@ static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
 			INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR);
 
 	vmx_clear_hlt(vcpu);
+
+	if (vcpu->arch.exception.nr == DB_VECTOR)
+		flip_arch_lbr_ctl(vcpu, false);
 }
 
 bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu)
-- 
2.27.0


  parent reply	other threads:[~2022-02-16 10:27 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-15 21:25 [PATCH v9 00/17] Introduce Architectural LBR for vPMU Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 01/17] KVM: x86: Report XSS as an MSR to be saved if there are supported features Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 02/17] KVM: x86: Refresh CPUID on writes to MSR_IA32_XSS Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 03/17] KVM: x86: Load guest fpu state when accessing MSRs managed by XSAVES Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 04/17] perf/x86/intel: Fix the comment about guest LBR support on KVM Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 05/17] perf/x86/lbr: Simplify the exposure check for the LBR_INFO registers Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 06/17] KVM: x86: Add Arch LBR MSRs to msrs_to_save_all list Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 07/17] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_DEPTH for guest Arch LBR Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 08/17] KVM: vmx/pmu: Emulate MSR_ARCH_LBR_CTL " Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 09/17] KVM: x86/pmu: Refactor code to support " Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 10/17] KVM: x86: Refine the matching and clearing logic for supported_xss Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 11/17] KVM: x86: Add XSAVE Support for Architectural LBR Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 12/17] KVM: x86/vmx: Check Arch LBR config when return perf capabilities Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 13/17] KVM: nVMX: Add necessary Arch LBR settings for nested VM Yang Weijiang
2022-02-15 21:25 ` Yang Weijiang [this message]
2022-02-15 21:25 ` [PATCH v9 15/17] KVM: x86/vmx: Flip Arch LBREn bit on guest state change Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 16/17] KVM: x86: Add Arch LBR MSR access interface Yang Weijiang
2022-02-15 21:25 ` [PATCH v9 17/17] KVM: x86/cpuid: Advertise Arch LBR feature in CPUID Yang Weijiang
2022-02-21  6:11 ` [PATCH v9 00/17] Introduce Architectural LBR for vPMU Yang, Weijiang

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