From: Atish Patra <atishp@rivosinc.com>
To: linux-kernel@vger.kernel.org
Cc: Atish Patra <atishp@rivosinc.com>,
Anup Patel <anup@brainfault.org>,
Andrew Jones <ajones@ventanamicro.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Atish Patra <atishp@atishpatra.org>, Guo Ren <guoren@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
kvm-riscv@lists.infradead.org, kvm@vger.kernel.org,
linux-riscv@lists.infradead.org,
Mark Rutland <mark.rutland@arm.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Will Deacon <will@kernel.org>
Subject: [PATCH v5 05/14] RISC-V: KVM: Return correct code for hsm stop function
Date: Sat, 4 Feb 2023 17:15:06 -0800 [thread overview]
Message-ID: <20230205011515.1284674-6-atishp@rivosinc.com> (raw)
In-Reply-To: <20230205011515.1284674-1-atishp@rivosinc.com>
According to the SBI specification, the stop function can only
return error code SBI_ERR_FAILED. However, currently it returns
-EINVAL which will be mapped SBI_ERR_INVALID_PARAM.
Return an linux error code that maps to SBI_ERR_FAILED i.e doesn't map
to any other SBI error code. While EACCES is not the best error code
to describe the situation, it is close enough and will be replaced
with SBI error codes directly anyways.
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
arch/riscv/kvm/vcpu_sbi_hsm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/riscv/kvm/vcpu_sbi_hsm.c b/arch/riscv/kvm/vcpu_sbi_hsm.c
index 2e915ca..619ac0f 100644
--- a/arch/riscv/kvm/vcpu_sbi_hsm.c
+++ b/arch/riscv/kvm/vcpu_sbi_hsm.c
@@ -42,7 +42,7 @@ static int kvm_sbi_hsm_vcpu_start(struct kvm_vcpu *vcpu)
static int kvm_sbi_hsm_vcpu_stop(struct kvm_vcpu *vcpu)
{
if (vcpu->arch.power_off)
- return -EINVAL;
+ return -EACCES;
kvm_riscv_vcpu_power_off(vcpu);
--
2.25.1
next prev parent reply other threads:[~2023-02-05 1:15 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-05 1:15 [PATCH v5 00/14] KVM perf support Atish Patra
2023-02-05 1:15 ` [PATCH v5 01/14] perf: RISC-V: Define helper functions expose hpm counter width and count Atish Patra
2023-02-05 1:15 ` [PATCH v5 02/14] perf: RISC-V: Improve privilege mode filtering for perf Atish Patra
2023-02-05 1:15 ` [PATCH v5 03/14] RISC-V: Improve SBI PMU extension related definitions Atish Patra
2023-02-05 1:15 ` [PATCH v5 04/14] RISC-V: KVM: Define a probe function for SBI extension data structures Atish Patra
2023-02-05 1:15 ` Atish Patra [this message]
2023-02-05 1:15 ` [PATCH v5 06/14] RISC-V: KVM: Modify SBI extension handler to return SBI error code Atish Patra
2023-02-06 10:27 ` Andrew Jones
2023-02-06 17:08 ` Anup Patel
2023-02-05 1:15 ` [PATCH v5 07/14] RISC-V: KVM: Add skeleton support for perf Atish Patra
2023-02-06 11:45 ` Andrew Jones
2023-02-05 1:15 ` [PATCH v5 08/14] RISC-V: KVM: Add SBI PMU extension support Atish Patra
2023-02-05 10:30 ` Conor Dooley
2023-02-07 6:10 ` Atish Patra
2023-02-07 6:24 ` Conor Dooley
2023-02-06 11:50 ` Andrew Jones
2023-02-05 1:15 ` [PATCH v5 09/14] RISC-V: KVM: Make PMU functionality depend on Sscofpmf Atish Patra
2023-02-05 1:15 ` [PATCH v5 10/14] RISC-V: KVM: Disable all hpmcounter access for VS/VU mode Atish Patra
2023-02-05 1:15 ` [PATCH v5 11/14] RISC-V: KVM: Implement trap & emulate for hpmcounters Atish Patra
2023-02-06 11:54 ` Andrew Jones
2023-02-05 1:15 ` [PATCH v5 12/14] RISC-V: KVM: Implement perf support without sampling Atish Patra
2023-02-05 1:15 ` [PATCH v5 13/14] RISC-V: KVM: Support firmware events Atish Patra
2023-02-06 12:04 ` Andrew Jones
2023-02-05 1:15 ` [PATCH v5 14/14] RISC-V: KVM: Increment firmware pmu events Atish Patra
2023-02-06 17:10 ` [PATCH v5 00/14] KVM perf support Anup Patel
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