From: Sean Christopherson <seanjc@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, Dapeng Mi <dapeng1.mi@linux.intel.com>,
Sean Christopherson <seanjc@google.com>,
Liam Merwick <liam.merwick@oracle.com>
Subject: [kvm-unit-tests PATCH v2 05/14] x86: Add and use X86_PROPERTY_INTEL_PT_NR_RANGES
Date: Tue, 10 Jun 2025 12:54:06 -0700 [thread overview]
Message-ID: <20250610195415.115404-6-seanjc@google.com> (raw)
In-Reply-To: <20250610195415.115404-1-seanjc@google.com>
Add a definition for X86_PROPERTY_INTEL_PT_NR_RANGES, and use it instead
of open coding equivalent logic in the LA57 testcase that verifies the
canonical address behavior of PT MSRs.
No functional change intended.
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
lib/x86/processor.h | 3 +++
x86/la57.c | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/lib/x86/processor.h b/lib/x86/processor.h
index b3ea6881..e3b3df89 100644
--- a/lib/x86/processor.h
+++ b/lib/x86/processor.h
@@ -370,6 +370,9 @@ struct x86_cpu_property {
#define X86_PROPERTY_XSTATE_TILE_SIZE X86_CPU_PROPERTY(0xd, 18, EAX, 0, 31)
#define X86_PROPERTY_XSTATE_TILE_OFFSET X86_CPU_PROPERTY(0xd, 18, EBX, 0, 31)
+
+#define X86_PROPERTY_INTEL_PT_NR_RANGES X86_CPU_PROPERTY(0x14, 1, EAX, 0, 2)
+
#define X86_PROPERTY_AMX_MAX_PALETTE_TABLES X86_CPU_PROPERTY(0x1d, 0, EAX, 0, 31)
#define X86_PROPERTY_AMX_TOTAL_TILE_BYTES X86_CPU_PROPERTY(0x1d, 1, EAX, 0, 15)
#define X86_PROPERTY_AMX_BYTES_PER_TILE X86_CPU_PROPERTY(0x1d, 1, EAX, 16, 31)
diff --git a/x86/la57.c b/x86/la57.c
index d93e286c..aaf9d974 100644
--- a/x86/la57.c
+++ b/x86/la57.c
@@ -288,7 +288,7 @@ static void __test_canonical_checks(bool force_emulation)
/* PT filter ranges */
if (this_cpu_has(X86_FEATURE_INTEL_PT)) {
- int n_ranges = cpuid_indexed(0x14, 0x1).a & 0x7;
+ int n_ranges = this_cpu_property(X86_PROPERTY_INTEL_PT_NR_RANGES);
int i;
for (i = 0 ; i < n_ranges ; i++) {
--
2.50.0.rc0.642.g800a2b2222-goog
next prev parent reply other threads:[~2025-06-10 19:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-10 19:54 [kvm-unit-tests PATCH v2 00/14] x86: Add CPUID properties, clean up related code Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 01/14] x86: Encode X86_FEATURE_* definitions using a structure Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 02/14] x86: Add X86_PROPERTY_* framework to retrieve CPUID values Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 03/14] x86: Use X86_PROPERTY_MAX_VIRT_ADDR in is_canonical() Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 04/14] x86: Implement get_supported_xcr0() using X86_PROPERTY_SUPPORTED_XCR0_{LO,HI} Sean Christopherson
2025-06-10 19:54 ` Sean Christopherson [this message]
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 06/14] x86/pmu: Mark all arch events as available on AMD, and rename fields Sean Christopherson
2025-06-11 1:32 ` Mi, Dapeng
2025-06-11 12:02 ` Liam Merwick
2025-06-13 6:24 ` Sandipan Das
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 07/14] x86/pmu: Mark Intel architectural event available iff X <= CPUID.0xA.EAX[31:24] Sean Christopherson
2025-06-11 1:35 ` Mi, Dapeng
2025-06-11 12:10 ` Liam Merwick
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 08/14] x86/pmu: Use X86_PROPERTY_PMU_* macros to retrieve PMU information Sean Christopherson
2025-06-13 6:25 ` Sandipan Das
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 09/14] x86/sev: Use VC_VECTOR from processor.h Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 10/14] x86/sev: Skip the AMD SEV test if SEV is unsupported/disabled Sean Christopherson
2025-06-11 12:28 ` Liam Merwick
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 11/14] x86/sev: Define and use X86_FEATURE_* flags for CPUID 0x8000001F Sean Christopherson
2025-06-11 12:38 ` Liam Merwick
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 12/14] x86/sev: Use X86_PROPERTY_SEV_C_BIT to get the AMD SEV C-bit location Sean Christopherson
2025-06-11 12:58 ` Liam Merwick
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 13/14] x86/sev: Use amd_sev_es_enabled() to detect if SEV-ES is enabled Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 14/14] x86: Move SEV MSR definitions to msr.h Sean Christopherson
2025-06-11 15:41 ` Liam Merwick
2025-06-25 22:25 ` [kvm-unit-tests PATCH v2 00/14] x86: Add CPUID properties, clean up related code Sean Christopherson
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