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From: Liam Merwick <liam.merwick@oracle.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, Dapeng Mi <dapeng1.mi@linux.intel.com>,
	liam.merwick@oracle.com
Subject: Re: [kvm-unit-tests PATCH v2 11/14] x86/sev: Define and use X86_FEATURE_* flags for CPUID 0x8000001F
Date: Wed, 11 Jun 2025 13:38:38 +0100	[thread overview]
Message-ID: <f7fd4197-2a9d-42f1-97b6-af4710f8ff41@oracle.com> (raw)
In-Reply-To: <20250610195415.115404-12-seanjc@google.com>



On 10/06/2025 20:54, Sean Christopherson wrote:
> Define proper X86_FEATURE_* flags for CPUID 0x8000001F, and use them
> instead of open coding equivalent checks in amd_sev_{,es_}enabled().
> 
> Signed-off-by: Sean Christopherson <seanjc@google.com>

Reviewed-by: Liam Merwick <liam.merwick@oracle.com>


> ---
>   lib/x86/amd_sev.c   | 32 +++++---------------------------
>   lib/x86/amd_sev.h   |  3 ---
>   lib/x86/processor.h |  9 +++++++++
>   3 files changed, 14 insertions(+), 30 deletions(-)
> 
> diff --git a/lib/x86/amd_sev.c b/lib/x86/amd_sev.c
> index 6c0a66ac..b7cefd0f 100644
> --- a/lib/x86/amd_sev.c
> +++ b/lib/x86/amd_sev.c
> @@ -17,31 +17,15 @@ static unsigned short amd_sev_c_bit_pos;
>   
>   bool amd_sev_enabled(void)
>   {
> -	struct cpuid cpuid_out;
>   	static bool sev_enabled;
>   	static bool initialized = false;
>   
>   	/* Check CPUID and MSR for SEV status and store it for future function calls. */
>   	if (!initialized) {
> -		sev_enabled = false;
>   		initialized = true;
>   
> -		/* Test if we can query SEV features */
> -		cpuid_out = cpuid(CPUID_FN_LARGEST_EXT_FUNC_NUM);
> -		if (cpuid_out.a < CPUID_FN_ENCRYPT_MEM_CAPAB) {
> -			return sev_enabled;
> -		}
> -
> -		/* Test if SEV is supported */
> -		cpuid_out = cpuid(CPUID_FN_ENCRYPT_MEM_CAPAB);
> -		if (!(cpuid_out.a & SEV_SUPPORT_MASK)) {
> -			return sev_enabled;
> -		}
> -
> -		/* Test if SEV is enabled */
> -		if (rdmsr(MSR_SEV_STATUS) & SEV_ENABLED_MASK) {
> -			sev_enabled = true;
> -		}
> +		sev_enabled = this_cpu_has(X86_FEATURE_SEV) &&
> +			      rdmsr(MSR_SEV_STATUS) & SEV_ENABLED_MASK;
>   	}
>   
>   	return sev_enabled;
> @@ -72,17 +56,11 @@ bool amd_sev_es_enabled(void)
>   	static bool initialized = false;
>   
>   	if (!initialized) {
> -		sev_es_enabled = false;
>   		initialized = true;
>   
> -		if (!amd_sev_enabled()) {
> -			return sev_es_enabled;
> -		}
> -
> -		/* Test if SEV-ES is enabled */
> -		if (rdmsr(MSR_SEV_STATUS) & SEV_ES_ENABLED_MASK) {
> -			sev_es_enabled = true;
> -		}
> +		sev_es_enabled = amd_sev_enabled() &&
> +				 this_cpu_has(X86_FEATURE_SEV_ES) &&
> +				 rdmsr(MSR_SEV_STATUS) & SEV_ES_ENABLED_MASK;
>   	}
>   
>   	return sev_es_enabled;
> diff --git a/lib/x86/amd_sev.h b/lib/x86/amd_sev.h
> index ca7216d4..defcda75 100644
> --- a/lib/x86/amd_sev.h
> +++ b/lib/x86/amd_sev.h
> @@ -21,12 +21,9 @@
>   
>   /*
>    * AMD Programmer's Manual Volume 3
> - *   - Section "Function 8000_0000h - Maximum Extended Function Number and Vendor String"
>    *   - Section "Function 8000_001Fh - Encrypted Memory Capabilities"
>    */
> -#define CPUID_FN_LARGEST_EXT_FUNC_NUM 0x80000000
>   #define CPUID_FN_ENCRYPT_MEM_CAPAB    0x8000001f
> -#define SEV_SUPPORT_MASK              0b10
>   
>   /*
>    * AMD Programmer's Manual Volume 2
> diff --git a/lib/x86/processor.h b/lib/x86/processor.h
> index e3b3df89..1adfd027 100644
> --- a/lib/x86/processor.h
> +++ b/lib/x86/processor.h
> @@ -320,6 +320,15 @@ struct x86_cpu_feature {
>   #define X86_FEATURE_PFTHRESHOLD		X86_CPU_FEATURE(0x8000000A, 0, EDX, 12)
>   #define X86_FEATURE_VGIF		X86_CPU_FEATURE(0x8000000A, 0, EDX, 16)
>   #define X86_FEATURE_VNMI		X86_CPU_FEATURE(0x8000000A, 0, EDX, 25)
> +#define X86_FEATURE_SME			X86_CPU_FEATURE(0x8000001F, 0, EAX,  0)
> +#define X86_FEATURE_SEV			X86_CPU_FEATURE(0x8000001F, 0, EAX,  1)
> +#define X86_FEATURE_VM_PAGE_FLUSH	X86_CPU_FEATURE(0x8000001F, 0, EAX,  2)
> +#define X86_FEATURE_SEV_ES		X86_CPU_FEATURE(0x8000001F, 0, EAX,  3)
> +#define X86_FEATURE_SEV_SNP		X86_CPU_FEATURE(0x8000001F, 0, EAX,  4)
> +#define X86_FEATURE_V_TSC_AUX		X86_CPU_FEATURE(0x8000001F, 0, EAX,  9)
> +#define X86_FEATURE_SME_COHERENT	X86_CPU_FEATURE(0x8000001F, 0, EAX, 10)
> +#define X86_FEATURE_DEBUG_SWAP		X86_CPU_FEATURE(0x8000001F, 0, EAX, 14)
> +#define X86_FEATURE_SVSM		X86_CPU_FEATURE(0x8000001F, 0, EAX, 28)
>   #define X86_FEATURE_AMD_PMU_V2		X86_CPU_FEATURE(0x80000022, 0, EAX, 0)
>   
>   /*


  reply	other threads:[~2025-06-11 12:38 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-10 19:54 [kvm-unit-tests PATCH v2 00/14] x86: Add CPUID properties, clean up related code Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 01/14] x86: Encode X86_FEATURE_* definitions using a structure Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 02/14] x86: Add X86_PROPERTY_* framework to retrieve CPUID values Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 03/14] x86: Use X86_PROPERTY_MAX_VIRT_ADDR in is_canonical() Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 04/14] x86: Implement get_supported_xcr0() using X86_PROPERTY_SUPPORTED_XCR0_{LO,HI} Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 05/14] x86: Add and use X86_PROPERTY_INTEL_PT_NR_RANGES Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 06/14] x86/pmu: Mark all arch events as available on AMD, and rename fields Sean Christopherson
2025-06-11  1:32   ` Mi, Dapeng
2025-06-11 12:02   ` Liam Merwick
2025-06-13  6:24   ` Sandipan Das
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 07/14] x86/pmu: Mark Intel architectural event available iff X <= CPUID.0xA.EAX[31:24] Sean Christopherson
2025-06-11  1:35   ` Mi, Dapeng
2025-06-11 12:10   ` Liam Merwick
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 08/14] x86/pmu: Use X86_PROPERTY_PMU_* macros to retrieve PMU information Sean Christopherson
2025-06-13  6:25   ` Sandipan Das
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 09/14] x86/sev: Use VC_VECTOR from processor.h Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 10/14] x86/sev: Skip the AMD SEV test if SEV is unsupported/disabled Sean Christopherson
2025-06-11 12:28   ` Liam Merwick
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 11/14] x86/sev: Define and use X86_FEATURE_* flags for CPUID 0x8000001F Sean Christopherson
2025-06-11 12:38   ` Liam Merwick [this message]
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 12/14] x86/sev: Use X86_PROPERTY_SEV_C_BIT to get the AMD SEV C-bit location Sean Christopherson
2025-06-11 12:58   ` Liam Merwick
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 13/14] x86/sev: Use amd_sev_es_enabled() to detect if SEV-ES is enabled Sean Christopherson
2025-06-10 19:54 ` [kvm-unit-tests PATCH v2 14/14] x86: Move SEV MSR definitions to msr.h Sean Christopherson
2025-06-11 15:41   ` Liam Merwick
2025-06-25 22:25 ` [kvm-unit-tests PATCH v2 00/14] x86: Add CPUID properties, clean up related code Sean Christopherson

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