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From: sashiko-bot@kernel.org
To: "Marc Zyngier" <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, "Marc Zyngier" <maz@kernel.org>,
	"Oliver Upton" <oupton@kernel.org>,
	kvm@vger.kernel.org
Subject: Re: [PATCH v2 10/28] KVM: arm64: Relax CNTHCTL_EL2 handling when FEAT_NV2p1 is present
Date: Tue, 14 Jul 2026 09:53:49 +0000	[thread overview]
Message-ID: <20260714095350.20AE91F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260714091641.1970822-11-maz@kernel.org>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Removing the split-state preservation for `CNTHCTL_EL2` on FEAT_NV2p1 systems permanently corrupts the guest's in-memory ECV bit and leaks host-specific trap overrides to userspace.
--

--- Patch [10]: [PATCH v2 10/28] KVM: arm64: Relax CNTHCTL_EL2 handling when FEAT_NV2p1 is present ---
commit e272e43dc6ce85d3337902d78430aad6bf5b83fc
Author: Marc Zyngier <maz@kernel.org>

KVM: arm64: Relax CNTHCTL_EL2 handling when FEAT_NV2p1 is present
    
With NV2p1, it is no longer necessary to use the split approach
where bits of CNTHCTL_EL2 cannot be accessed via CNTKCTL_EL1,
and we can treat the CNTKCTL_EL1 accessor as if it was "normal".

> diff --git a/arch/arm64/kvm/arch_timer.c b/arch/arm64/kvm/arch_timer.c
> index 4155fe89b58a1..db60facad9f3c 100644
> --- a/arch/arm64/kvm/arch_timer.c
> +++ b/arch/arm64/kvm/arch_timer.c

[ ... ]

> @@ -876,8 +876,14 @@ static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)
>  	assign_clear_set_bit(tvt02, CNTHCTL_EL1NVVCT, clr, set);
>  	assign_clear_set_bit(tpt02, CNTHCTL_EL1NVPCT, clr, set);
>  
> -	/* This only happens on VHE, so use the CNTHCTL_EL2 accessor. */
> -	sysreg_clear_set(cnthctl_el2, clr, set);
> +	/*
> +	 * This only happens on VHE, so use the CNTHCTL_EL2 accessor, unless
> +	 * we are sure CNTKCTL_EL1 is completely stateful with FEAT_NV2p1.
> +	 */
> +	if (!cpus_have_final_cap(ARM64_HAS_NV2P1))
> +		sysreg_clear_set(cnthctl_el2, clr, set);
> +	else
> +		sysreg_clear_set(cntkctl_el1, clr, set);
>  }

[ ... ]

> diff --git a/arch/arm64/kvm/hyp/vhe/sysreg-sr.c b/arch/arm64/kvm/hyp/vhe/sysreg-sr.c
> index 6f0f046e4ca4e..0c4ef1ce32ae7 100644
> --- a/arch/arm64/kvm/hyp/vhe/sysreg-sr.c
> +++ b/arch/arm64/kvm/hyp/vhe/sysreg-sr.c

[ ... ]

> @@ -69,11 +69,18 @@ static void __sysreg_save_vel2_state(struct kvm_vcpu *vcpu)
>  		 * The EL1 view of CNTKCTL_EL1 has a bunch of RES0 bits where
>  		 * the interesting CNTHCTL_EL2 bits live. So preserve these
>  		 * bits when reading back the guest-visible value.
> +		 *
> +		 * While NV2p1 fixes some of that, it makes CNTHCTL_EL2.ECV
> +		 * even more broken than it already was with NV2.
>  		 */
>  		val = read_sysreg_el1(SYS_CNTKCTL);
> -		val &= CNTKCTL_VALID_BITS;
> -		__vcpu_rmw_sys_reg(vcpu, CNTHCTL_EL2, &=, ~CNTKCTL_VALID_BITS);
> -		__vcpu_rmw_sys_reg(vcpu, CNTHCTL_EL2, |=, val);
> +		if (!cpus_have_final_cap(ARM64_HAS_NV2P1)) {
> +			val &= CNTKCTL_VALID_BITS;
> +			__vcpu_rmw_sys_reg(vcpu, CNTHCTL_EL2, &=, ~CNTKCTL_VALID_BITS);
> +			__vcpu_rmw_sys_reg(vcpu, CNTHCTL_EL2, |=, val);
> +		} else {
> +			__vcpu_assign_sys_reg(vcpu, CNTHCTL_EL2, val);
> +		}

[Severity: High]
Does removing the split-state preservation for CNTHCTL_EL2 unconditionally
overwrite the guest's in-memory register state?

Since timer_set_traps() applies host-specific overrides to CNTKCTL_EL1 on the
host side, calling __vcpu_assign_sys_reg() here appears to blindly copy those
host-specific traps directly into the guest's architectural state on exit.

Furthermore, as the comment above notes that NV2p1 makes the ECV bit even more
broken, won't this assignment corrupt the guest's ECV state as well?

>  	}
>  
>  	__vcpu_assign_sys_reg(vcpu, SP_EL2,	 read_sysreg(sp_el1));

[ ... ]

> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 1dfc1f88bec82..9439c5b2b1fe8 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c

[ ... ]

> @@ -322,8 +322,10 @@ u64 vcpu_read_sys_reg(const struct kvm_vcpu *vcpu, enum vcpu_sysreg reg)
>  		switch (reg) {
>  		case CNTHCTL_EL2:
>  			val = read_sysreg_el1(SYS_CNTKCTL);
> -			val &= CNTKCTL_VALID_BITS;
> -			val |= __vcpu_sys_reg(vcpu, reg) & ~CNTKCTL_VALID_BITS;
> +			if (!cpus_have_final_cap(ARM64_HAS_NV2P1)) {
> +				val &= CNTKCTL_VALID_BITS;
> +				val |= __vcpu_sys_reg(vcpu, reg) & ~CNTKCTL_VALID_BITS;
> +			}
>  			return val;

[Severity: High]
Does this directly return the host-polluted physical register to userspace
during KVM_GET_ONE_REG?

Because the host-specific overrides from timer_set_traps() are present in
CNTKCTL_EL1, skipping the bitmasking on ARM64_HAS_NV2P1 systems seems to leak
these hypervisor-specific configurations to userspace. This could break live
migration by restoring an altered execution environment.

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260714091641.1970822-1-maz@kernel.org?part=10

  reply	other threads:[~2026-07-14  9:53 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-14  9:16 [PATCH v2 00/28] KVM: arm64: Add support for FEAT_NV2p1 and FEAT_NV3 Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 01/28] arm64: sysreg: Emit RESx/UNKN values for Mapping/Fields definitions Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 02/28] arm64: Update ID_AA64MMFR4_EL1 description to 2026-03 JSON release Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 03/28] KVM: arm64: Merge guest's HCRX_EL2 using NV_HCRX_GUEST_EXCLUDE Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 04/28] KVM: arm64: Drop __HCRX_EL2_* masks Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 05/28] KVM: arm64: Plumb HCRX_EL2.SRMASKEn in HCRX_EL2 sanitisation Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 06/28] KVM: arm64: Classify CPTR_EL2 as a SR_LOC_SPECIAL register Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 07/28] KVM: arm64: Don't evaluate HCR_EL2.NV nor HFGITR_EL2.ERET on ERET fast path Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 08/28] arm64: Add ARM64_HAS_NV2P1 capability Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 09/28] KVM: arm64: Relax CPTR_EL2 handling when FEAT_NV2p1 is present Marc Zyngier
2026-07-14 10:12   ` sashiko-bot
2026-07-14 14:12     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 10/28] KVM: arm64: Relax CNTHCTL_EL2 " Marc Zyngier
2026-07-14  9:53   ` sashiko-bot [this message]
2026-07-14 14:22     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 11/28] KVM: arm64: Expose FEAT_NV2p1 to NV guests Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 12/28] arm64: Add FEAT_NV2p1 detection Marc Zyngier
2026-07-14  9:46   ` sashiko-bot
2026-07-14 11:45     ` Marc Zyngier
2026-07-14 13:18       ` Fuad Tabba
2026-07-14  9:16 ` [PATCH v2 13/28] arm64: sysreg: Add NVHCR_EL2 description as a mirror of HCR_EL2 Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 14/28] arm64: sysreg: Add HCRX_EL2 bits related to FEAT_NV3 Marc Zyngier
2026-07-14  9:45   ` sashiko-bot
2026-07-14 13:04     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 15/28] arm64: Add ARM64_HAS_NV3 capability Marc Zyngier
2026-07-14  9:40   ` sashiko-bot
2026-07-14 11:42     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 16/28] KVM: arm64: Split NV-specific exit fixups from the non-NV handling Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 17/28] KVM: arm64: Add NV3 control bits to HCRX_EL2 sanitisation Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 18/28] KVM: arm64: Add kvm_has_nv{2,3}() predicates Marc Zyngier
2026-07-14  9:48   ` sashiko-bot
2026-07-14 14:23     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 19/28] KVM: arm64: Make HCR_EL2 a non-VNCR register Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 20/28] KVM: arm64: Add sanitisation for NVHCR_EL2 Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 21/28] KVM: arm64: Add NVHCR_EL2 handling to the sysreg array Marc Zyngier
2026-07-14 10:24   ` sashiko-bot
2026-07-14 12:56     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 22/28] KVM: arm64: Add routing for NVHCR_EL2 trap Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 23/28] KVM: arm64: Add NVHCR_EL2 context switching Marc Zyngier
2026-07-14 10:03   ` sashiko-bot
2026-07-14 14:44     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 24/28] KVM: arm64: Engage NV3 ERET trap elision Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 25/28] KVM: arm64: Engage NV3 TLBI " Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 26/28] KVM: arm64: Add FEAT_NV3 detection Marc Zyngier
2026-07-14 10:07   ` sashiko-bot
2026-07-14 14:42     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 27/28] KVM: arm64: Expose FEAT_NV3 to guests Marc Zyngier
2026-07-14 10:15   ` sashiko-bot
2026-07-14 14:41     ` Marc Zyngier
2026-07-14  9:16 ` [PATCH v2 28/28] arm64: Add override for ID_AA64MMFR4_EL1.NV_frac Marc Zyngier

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