Re: [PATCH v2 12/16] KVM: x86/pmu: Populate CPUID.0AH:ECX fixed-counter bitmap

["Mi, Dapeng" <dapeng1.mi@linux.intel.com>]

Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>


On 8/28/2026 6:37 AM, Zide Chen wrote:
> PerfMon v5 adds a fixed-counter support bitmap in CPUID.0AH:ECX.
> This is the superset of EDX[4:0] which indicates the contiguous
> counters starting from 0. For backward compatibility, it's recommended
> to use the following to determine if a fixed counter is supported:
>
> FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i);
>
> Originally-by: Yang Weijiang <weijiang.yang@intel.com>
> Signed-off-by: Zide Chen <zide.chen@intel.com>
> ---
>  arch/x86/kvm/cpuid.c         | 5 ++++-
>  arch/x86/kvm/vmx/pmu_intel.c | 3 +++
>  2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 106e719e7aee..63201d4ea4a1 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -1547,7 +1547,10 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>  
>  		entry->eax = eax.full;
>  		entry->ebx = kvm_pmu_cap.events_mask;
> -		entry->ecx = 0;
> +		if (kvm_pmu_cap.version >= 5)
> +			entry->ecx &= (u32)kvm_pmu_cap.fixed_cntr_mask64;
> +		else
> +			entry->ecx = 0;
>  		entry->edx = edx.full;
>  		break;
>  	}
> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> index a6d2ebff7cc9..1ce69e764ae1 100644
> --- a/arch/x86/kvm/vmx/pmu_intel.c
> +++ b/arch/x86/kvm/vmx/pmu_intel.c
> @@ -585,7 +585,10 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
>  				      kvm_pmu_cap.events_mask_len);
>  	pmu->available_event_types = ~entry->ebx & (BIT_ULL(eax.split.mask_length) - 1);
>  
> +	/* FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i) */
>  	fixed_cntr_mask = BIT_ULL(edx.split.num_counters_fixed) - 1;
> +	if (pmu->version >= 5)
> +		fixed_cntr_mask |= entry->ecx;
>  	fixed_cntr_mask &= kvm_pmu_cap.fixed_cntr_mask64;
>  
>  	/*