From: Thomas Huth <thuth@redhat.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: "Clément MATHIEU--DRIF" <clement.mathieu--drif@bull.com>,
"Peter Xu" <peterx@redhat.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"Yi Liu" <yi.l.liu@intel.com>
Subject: Re: intel_iommu unit test is also failing
Date: Tue, 5 May 2026 13:38:26 +0200 [thread overview]
Message-ID: <48384da2-7eb5-4044-bc3a-201b09d9cf81@redhat.com> (raw)
In-Reply-To: <20260505065122-mutt-send-email-mst@kernel.org>
On 05/05/2026 12.53, Michael S. Tsirkin wrote:
> On Tue, May 05, 2026 at 12:34:41PM +0200, Thomas Huth wrote:
>> On 05/05/2026 12.23, Michael S. Tsirkin wrote:
>>> On Tue, May 05, 2026 at 11:45:17AM +0200, Thomas Huth wrote:
>>>> On 05/05/2026 11.27, Clément MATHIEU--DRIF wrote:
>>>>> I had a bit more time to hook into qemu to check the root cause.
>>>>>
>>>>> It seems that testb issues a single byte read (out of the valid size range), as we can see on the following breakpoint:
>>>>>
>>>>> ```
>>>>> Thread 6 "CPU 0/TCG" hit Breakpoint 2, memory_region_dispatch_read (mr=0x55d72883cb30, addr=152, pval=0x7f62d25f4590, op=MO_BSWAP, attrs=...) at ../system/memory.c:1473
>>>>> 1473 unsigned size = memop_size(op);
>>>>> (gdb) n
>>>>> 1474 MemTxResult r;
>>>>> (gdb) p size
>>>>> $1 = 1
>>>>> (gdb)
>>>>> ```
>>>>
>>>> Ouch! That's an excellent finding, Clément ... so GCC 16 is "smart" enough
>>>> to see that we only want to test the lowest bit here, so it optimizes the
>>>> code to access only one byte of memory instead of 4 bytes... which would be
>>>> ok for normal memory, but not for an MMIO register :-/
>>>>
>>>> Ugly work-around, to force GCC to read 32 bits:
>>>>
>>>> diff --git a/lib/asm-generic/io.h b/lib/asm-generic/io.h
>>>> --- a/lib/asm-generic/io.h
>>>> +++ b/lib/asm-generic/io.h
>>>> @@ -38,7 +38,9 @@ static inline u16 __raw_readw(const volatile void *addr)
>>>> #ifndef __raw_readl
>>>> static inline u32 __raw_readl(const volatile void *addr)
>>>> {
>>>> - return *(const volatile u32 *)addr;
>>>> + u32 val = *(const volatile u32 *)addr;
>>>> + asm volatile ("\n" : : "r"(addr));
>>>> + return val;
>>>> }
>>>> #endif
>>>>
>>>> ... but I wonder whether this should rather be treated as a bug in GCC
>>>> instead, since it should IMHO really not change the access size for a
>>>> volatile memory access?
>>>>
>>>> Thomas
>>>
>>> Wouldn't this break linux generally?
>>>
>>> #ifndef __READ_ONCE
>>> #define __READ_ONCE(x) (*(const volatile __unqual_scalar_typeof(x) *)&(x))
>>> #endif
>>
>> I asked myself the very same question, but after googling for "GCC 16 linux
>> kernel" issues, I did not find anything related... there is likely something
>> specific to kvm-unit-tests in here...
>>
>> Thomas
>
>
> This seems to be pertinent:
> https://gcc.gnu.org/onlinedocs/gcc/Optimize-Options.html
>
> -ffuse-ops-with-volatile-access
> Allow limited optimization of operations with volatile memory access when doing so does not change the semantics outlined in See When is a Volatile Object Accessed?.
>
> The default is -ffuse-ops-with-volatile-access
>
> implemented here:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122343
>
> Try disabling? -fno-fuse-ops-with-volatile-access
Thanks, this seems to fix the issue, indeed!
Would you like to send a patch for it?
Thomas
next prev parent reply other threads:[~2026-05-05 11:38 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240604143507.1041901-1-pbonzini@redhat.com>
2026-05-04 7:58 ` [PATCH kvm-unit-tests] realmode: load above stack Thomas Huth
2026-05-04 8:07 ` intel_iommu unit test is also failing (was: Re: [PATCH kvm-unit-tests] realmode: load above stack) Thomas Huth
2026-05-04 15:45 ` Peter Xu
2026-05-05 5:49 ` Clément MATHIEU--DRIF
2026-05-05 6:37 ` Clément MATHIEU--DRIF
2026-05-05 7:36 ` Clément MATHIEU--DRIF
2026-05-05 9:27 ` Clément MATHIEU--DRIF
2026-05-05 9:45 ` intel_iommu unit test is also failing Thomas Huth
2026-05-05 9:53 ` Clément MATHIEU--DRIF
2026-05-05 10:15 ` Thomas Huth
2026-05-05 10:23 ` Michael S. Tsirkin
2026-05-05 10:34 ` Thomas Huth
2026-05-05 10:53 ` Michael S. Tsirkin
2026-05-05 11:38 ` Thomas Huth [this message]
2026-05-05 12:33 ` Michael S. Tsirkin
2026-05-05 17:08 ` Thomas Huth
2026-05-05 11:39 ` Clément MATHIEU--DRIF
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