Re: [PATCH v6 04/49] KVM: arm64: gic-v5: Define remaining IRS MMIO registers

[Sascha Bischoff <Sascha.Bischoff@arm.com>]

On Fri, 2026-09-04 at 12:07 +0000, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential
> issue(s) to consider:
> - [Low] GICV5_IRS_SETLPIR is incorrectly defined at offset 0x0000,
> colliding with GICV5_IRS_IDR0.
> --
> 
> commit 9b3628d351292c770b6fc2a902ed50e62d907d8f
> Author: Sascha Bischoff <Sascha.Bischoff@arm.com>
> 
> KVM: arm64: gic-v5: Define remaining IRS MMIO registers
> 
> This commit completes the set of defined IRS MMIO registers in the
> GICv5
> header file to support full emulation of the IRS MMIO interface in
> KVM.
> 
> > diff --git a/include/linux/irqchip/arm-gic-v5.h
> > b/include/linux/irqchip/arm-gic-v5.h
> > index 59a5875854319..8dc5847a646eb 100644
> > --- a/include/linux/irqchip/arm-gic-v5.h
> > +++ b/include/linux/irqchip/arm-gic-v5.h
> > @@ -63,20 +63,34 @@
> 
> [ ... ]
> 
> >  /*
> >   * IRS registers and tables structures
> >   */
> >  #define GICV5_IRS_IDR0			0x0000
> >  #define GICV5_IRS_IDR1			0x0004
> 
> [ ... ]
> 
> > @@ -167,15 +256,111 @@
> 
> [ ... ]
> 
> > +#define GICV5_IRS_SWERR_SYNDROMER1_ADDR	GENMASK_ULL(55, 3)
> > +
> >  #define GICV5_ISTL1E_VALID		BIT_ULL(0)
> > +#define GICV5_IRS_ISTL1E_SIZE		8UL
> >  
> >  #define GICV5_ISTL1E_L2_ADDR_MASK	GENMASK_ULL(55, 12)
> >  
> > +#define GICV5_IRS_SETLPIR		0x0000
> > +#define GICV5_IRS_SETLPIR_ID		GENMASK(23, 0)
> 
> [Severity: Low]
> Does this new macro incorrectly overlap with GICV5_IRS_IDR0?
> 
> Both GICV5_IRS_SETLPIR and GICV5_IRS_IDR0 are defined at the exact
> same
> register offset (0x0000). While GICV5_IRS_SETLPIR currently appears
> to be
> unused in the codebase, defining it at 0x0000 rather than its proper
> architectural doorbell offset creates a conflict with GICV5_IRS_IDR0.
> 

As discussed last time, the offset applies to the SETLPI_FRAME and not
to the CONFIG_FRAME. Therefore, this offset is perfectly correct and is
not an issue.

Thanks,
Sascha