From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>
Cc: Luwei Kang <luwei.kang@intel.com>,
kvm@vger.kernel.org, x86@kernel.org, mingo@redhat.com,
bp@alien8.de, hpa@zytor.com, rkrcmar@redhat.com, joro@8bytes.org,
songliubraving@fb.com, peterz@infradead.org,
kstewart@linuxfoundation.org, gregkh@linuxfoundation.org,
thomas.lendacky@amd.com, konrad.wilk@oracle.com,
mattst88@gmail.com, Janakarajan.Natarajan@amd.com,
dwmw@amazon.co.uk, jpoimboe@redhat.com, marcorr@google.com,
ubizjak@gmail.com, sean.j.christopherson@intel.com,
jmattson@google.com, linux-kernel@vger.kernel.org,
Chao Peng <chao.p.peng@linux.intel.com>
Subject: Re: [PATCH v13 08/12] KVM: x86: Add Intel PT context switch for each vcpu
Date: Wed, 31 Oct 2018 13:46:24 +0200 [thread overview]
Message-ID: <87o9ba5ofj.fsf@ashishki-desk.ger.corp.intel.com> (raw)
In-Reply-To: <b694312e-b668-3546-f9e8-dc740f330f14@redhat.com>
Paolo Bonzini <pbonzini@redhat.com> writes:
> On 30/10/2018 11:00, Thomas Gleixner wrote:
>> So at least we need a way for perf on the host to programmatically detect,
>> that 'guest traces itself' is enabled, so it can inject that information
>> into the host data and post processing can tell that. W/o something like
>> that it's going to be a FAQ.
>
> In guest-tracing mode there will be already a TIP.PGD and TIP.PGE packet
> respectively before vmentry and after vmexit, caused by the RTIT_CTL
> WRMSRs in pt_guest_enter and pt_guest_exit. The target IP of the
> packets will come from kvm-intel.ko.
Most people aren't tracing the kernel, so they'd just get a PGD with no
address and a PGE after the kvm is done without any indication of what
happened in between.
> In system mode instead you get a Paging Information Packet on
> vmentry/vmexit, with bit 0 set in the third byte. You won't get it if
> guest-side tracing is on (because tracing has been disabled by
> pt_guest_enter and won't be re-enabled until pt_guest_exit). I don't
> think it's correct to "fake" the PIP in guest-tracing mode, because
> TIP.PGD should be followed immediately by TIP.PGE.
Indeed, we should most definitely not fake PIP. Perf has RECORD_AUX,
which already has PARTIAL flag that was introduced specifically because
of kvm.
Regards,
--
Alex
next prev parent reply other threads:[~2018-10-31 11:46 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-24 8:05 [PATCH v13 00/12] Intel Processor Trace virtualization enabling Luwei Kang
2018-10-24 8:05 ` [PATCH v13 01/12] perf/x86/intel/pt: Move Intel PT MSRs bit defines to global header Luwei Kang
2018-10-24 8:05 ` [PATCH v13 02/12] perf/x86/intel/pt: Export pt_cap_get() Luwei Kang
2018-10-24 8:05 ` [PATCH v13 03/12] perf/x86/intel/pt: Introduce intel_pt_validate_cap() Luwei Kang
2018-10-24 8:05 ` [PATCH v13 04/12] perf/x86/intel/pt: Add new bit definitions for PT MSRs Luwei Kang
2018-10-24 8:05 ` [PATCH v13 05/12] perf/x86/intel/pt: add new capability for Intel PT Luwei Kang
2018-10-30 9:57 ` Thomas Gleixner
2018-10-24 8:05 ` [PATCH v13 06/12] KVM: x86: Add Intel PT virtualization work mode Luwei Kang
2018-10-24 16:18 ` Jim Mattson
2018-10-25 0:35 ` Kang, Luwei
2018-10-30 9:30 ` Thomas Gleixner
2018-10-30 9:49 ` Paolo Bonzini
2018-10-30 10:13 ` Kang, Luwei
2018-10-30 10:23 ` Thomas Gleixner
2018-10-31 0:36 ` Kang, Luwei
2018-10-24 8:05 ` [PATCH v13 07/12] KVM: x86: Add Intel Processor Trace cpuid emulation Luwei Kang
2018-10-24 8:05 ` [PATCH v13 08/12] KVM: x86: Add Intel PT context switch for each vcpu Luwei Kang
2018-10-24 10:13 ` Alexander Shishkin
2018-10-25 0:06 ` Kang, Luwei
2018-10-29 17:48 ` Paolo Bonzini
2018-10-30 10:00 ` Thomas Gleixner
2018-10-31 10:43 ` Paolo Bonzini
2018-10-31 11:46 ` Alexander Shishkin [this message]
2018-10-30 11:26 ` Alexander Shishkin
2018-10-31 10:49 ` Paolo Bonzini
2018-10-31 11:38 ` Alexander Shishkin
2018-10-31 12:07 ` Paolo Bonzini
2018-10-31 14:21 ` Alexander Shishkin
2018-10-31 14:43 ` Paolo Bonzini
2018-10-24 8:05 ` [PATCH v13 09/12] KVM: x86: Introduce a function to initialize the PT configuration Luwei Kang
2018-10-24 8:05 ` [PATCH v13 10/12] KVM: x86: Implement Intel PT MSRs read/write emulation Luwei Kang
2018-10-24 8:05 ` [PATCH v13 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write Luwei Kang
2018-10-24 8:05 ` [PATCH v13 12/12] KVM: x86: Disable Intel PT when VMXON in L1 guest Luwei Kang
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