Re: [PATCH v1 0/9] KVM: x86: Add support for AMD Extended APIC registers

["Shukla, Manali" <manali.shukla@amd.com>]

On 3/10/2026 11:47 AM, Manali Shukla wrote:
> On 2/4/2026 1:14 PM, Manali Shukla wrote:
>> Add support for AMD's Extended APIC registers, which reside in a 4KB
>> APIC page instead of the legacy 1KB APIC register space.  Extended LVT
>> registers (offsets 0x500-0x530) provide additional interrupt vectors
>> for features like Instruction Based Sampling (IBS).
>>
>> Introduce KVM_CAP_LAPIC2 to allow userspace to opt into the full 4KB
>> APIC register space. The capability uses a bitmask to support different
>> APIC extensions:
>>
>>   KVM_LAPIC2_DEFAULT: 4KB APIC register space (common foundation)
>>   KVM_LAPIC2_AMD_DEFAULT: Extended LVT registers (AMD-specific)
>>
>> Add KVM_GET/SET_LAPIC2 ioctls that operate on a 4KB APIC register space
>> accommodate extended registers.  Legacy KVM_GET/SET_LAPIC continue to
>> work for backward compatibility.
>>
>> Emulate extended APIC registers (APIC_EFEAT, APIC_ECTRL, APIC_EILVTn)
>> when the guest has X86_FEATURE_EXTAPIC and userspace enables
>> KVM_CAP_LAPIC2.  Current AMD processors support four extended LVT
>> entries, future processors may support up to 255.
>>
>> Integrate with AVIC to accelerate extended LVT MSR access when
>> AVIC_EXTLVT is supported.  Reads are accelerated without VM-exits;
>> writes trigger trap-style VM-exits.
>>
>> Tested on AMD hardware with Extapic support:
>> - Extended APIC register read/write emulation and AVIC acceleration
>>   with IBS driver running on the guest
>> - VM migration with extended APIC state and without extended APIC state
>> - Backward compatibility check:
>>   Fallback to legacy IOCTLs when KVM_CAP_LAPIC2 capability is not enabled
>>
>> Equivalent Qemu changes can be found at:
>> https://github.com/AMDESE/qemu/tree/extlvt_v1
>>
>> Patches are prepared on kvm-x86/next (003f68c79227).
>>
>> Manali Shukla (7):
>>   KVM: x86: Refactor APIC register mask handling to support extended
>>     APIC registers
>>   x86/apic: Add helper to get maximum number of Extended LVT registers
>>   KVM: SVM: Set kvm_caps.has_extapic when CPU supports Extended APIC
>>   KVM: x86: Introduce KVM_CAP_LAPIC2 for 4KB APIC register space support
>>   KVM: x86: Refactor APIC state get/set to accept variable-sized buffers
>>   KVM: Add KVM_GET_LAPIC2 and KVM_SET_LAPIC2 for extended APIC
>>   KVM: SVM: Add AVIC support for extended LVT MSRs
>>
>> Santosh Shukla (2):
>>   KVM: x86: Emulate Extended LVT registers for AMD guests
>>   x86/cpufeatures: Add CPUID feature bit for Extended LVT AVIC
>>     acceleration
>>
>>  Documentation/virt/kvm/api.rst     |  75 +++++++++++++
>>  arch/x86/include/asm/apic.h        |   1 +
>>  arch/x86/include/asm/apicdef.h     |  18 +++
>>  arch/x86/include/asm/cpufeatures.h |   1 +
>>  arch/x86/include/asm/kvm_host.h    |  12 ++
>>  arch/x86/include/uapi/asm/kvm.h    |   5 +
>>  arch/x86/kernel/apic/apic.c        |  17 +++
>>  arch/x86/kvm/cpuid.c               |  10 +-
>>  arch/x86/kvm/lapic.c               | 169 ++++++++++++++++++++---------
>>  arch/x86/kvm/lapic.h               |  14 ++-
>>  arch/x86/kvm/svm/avic.c            |  14 +++
>>  arch/x86/kvm/svm/svm.c             |   3 +
>>  arch/x86/kvm/vmx/vmx.c             |  10 +-
>>  arch/x86/kvm/x86.c                 |  93 +++++++++++++++-
>>  arch/x86/kvm/x86.h                 |   2 +
>>  include/uapi/linux/kvm.h           |   7 ++
>>  16 files changed, 390 insertions(+), 61 deletions(-)
>>
> 
> A Gentle reminder to review.
> 
> -Manali
> 

A Gentle reminder to review.

-Manali