From: Sean Christopherson <seanjc@google.com>
To: Jerry Lyu <jerry.lyu@open-hieco.net>
Cc: pbonzini@redhat.com, joerg.roedel@amd.com, kvm@vger.kernel.org
Subject: Re: [PATCH] KVM: SVM: Do not warn on IGNNE MSR write
Date: Wed, 8 Jul 2026 06:50:50 -0700 [thread overview]
Message-ID: <ak5VuvKjr8JqFOPf@google.com> (raw)
In-Reply-To: <20260708134101.1073574-1-jerry.lyu@open-hieco.net>
On Wed, Jul 08, 2026, Jerry Lyu wrote:
> Booting windows server 2025 on top of Linux KVM results in host kernel
> warning logs of "Unhandled WRMSR(0xc0010115) = 0x0", which is due to
> "IGNNE MSR" write in guest hyper-v. According to AMD APM volume 2,
> section 15.30.2, the MSR is "only useful if IGNNE emulation has been
> enabled in the HW_CR MSR", while currently KVM has prevented guests from
> enabling it. So change the warning to a stronger check.
Except the APM doesn't say anything about the ordering, and in typical APM
fashion, nor does it actually say what happens if IGNNE emulation is disabled.
> IGNNE is used in the legacy MS-DOS compatibility sub-mode of X87 FPU
> exception handling. Intel SDM volume 1, section 8,7.2 describes the
> details of this mode which applies to AMD CPU as well. The CPU selects
> this mode when CR0.NE bit is 0, and will rely on two pins (FERR# and
> IGNNE#) for exception handling. AMD later introduced IGNNE MSR to "set
> the state of the processor-internal IGNNE signal directly" in order to
> support the legacy mode without the dependency on IGNNE# pin.
>
> The current KVM implementation does not emulate this feature, not sound
> necessary as well. The commit 82494028dff648c29e3a ("KVM: SVM: Ignore
> write of hwcr.ignne") clears the bit-8 value in the guest HWCR MSR
> write, making such field always zero, then the write to guest IGNNE MSR
> can always be safely ignored.
Well, yeah, that's what KVM is doing, ignoring the write. But KVM is also logging
that the guest attempted to write an MSR that KVM doesn't support, i.e. this is
more or less working as intended.
That said, KVM does effectively support the case where #IGGNE is not asserted, so
I think we can simply do this to avoid the useless logging?
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index e755f43f4376..a7efac3241c2 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -3205,7 +3205,8 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
case MSR_VM_CR:
return svm_set_vm_cr(vcpu, data);
case MSR_VM_IGNNE:
- kvm_pr_unimpl_wrmsr(vcpu, ecx, data);
+ if (data)
+ kvm_pr_unimpl_wrmsr(vcpu, ecx, data);
break;
case MSR_AMD64_DE_CFG: {
u64 supported_de_cfg;
next prev parent reply other threads:[~2026-07-08 13:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-08 13:41 [PATCH] KVM: SVM: Do not warn on IGNNE MSR write Jerry Lyu
2026-07-08 13:50 ` Sean Christopherson [this message]
2026-07-09 1:41 ` Jerry Lyu
2026-07-09 7:26 ` Jerry Lyu
2026-07-09 13:32 ` Sean Christopherson
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