Re: [PATCH v2 1/9] target/i386: Sync AMD CPUID aliases for Hygon

[Zhao Liu <zhao1.liu@intel.com>]

On Mon, Aug 10, 2026 at 04:29:48PM +0800, Tina Zhang wrote:
> Date: Mon, 10 Aug 2026 16:29:48 +0800
> From: Tina Zhang <zhang_wei@open-hieco.net>
> Subject: [PATCH v2 1/9] target/i386: Sync AMD CPUID aliases for Hygon
> X-Mailer: git-send-email 2.43.7
> 
> AMD defines CPUID[0x80000001].EDX bits as aliases for a subset of
> CPUID[1].EDX.  QEMU currently synchronizes those aliases only when the
> guest CPU vendor is AuthenticAMD.
> 
> Hygon Dhyana uses the HygonGenuine vendor string, but implements the
> same AMD-compatible extended CPUID feature aliases.  This can leave QEMU
> advertising a feature in CPUID[1].EDX while the matching extended alias
> in CPUID[0x80000001].EDX stays clear.  This inconsistent CPUID state can
> confuse guest OS feature detection.
> 
> Apply the alias synchronization to Hygon CPUs as well.  Gate the new
> behavior with x-hygon-vendor-abi-fixes and disable it for pc-11.0 and
                                                            ^^^^^^^
nit: pc-11.1 ?

> older machine types, because the CPUID result is guest-visible ABI and
> must remain migration-compatible.
> 
> Add qtest coverage for the Dhyana model, including the compat property.
> 
> Signed-off-by: Tina Zhang <zhang_wei@open-hieco.net>
> Tested-by: Yongwei Xu <xuyongwei@open-hieco.net>
> ---
>  hw/i386/pc.c                        |  5 ++
>  hw/i386/pc_piix.c                   |  1 +
>  hw/i386/pc_q35.c                    |  1 +
>  include/hw/i386/pc.h                |  3 ++
>  target/i386/cpu.c                   | 10 ++--
>  target/i386/cpu.h                   | 13 +++++
>  tests/qtest/test-x86-cpuid-compat.c | 76 +++++++++++++++++++++++++++++
>  7 files changed, 106 insertions(+), 3 deletions(-)
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index f064aa2b3e..2b4e322b2f 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -74,6 +74,11 @@
>  #include "hw/xen/xen-bus.h"
>  #endif
>  
> +GlobalProperty pc_compat_11_1[] = {
> +    { TYPE_X86_CPU, "x-hygon-vendor-abi-fixes", "false" },
> +};
> +const size_t pc_compat_11_1_len = G_N_ELEMENTS(pc_compat_11_1);
> +

compat machine property is already on the master branch, so this
patch need to be rebased.

>  GlobalProperty pc_compat_11_0[] = {};
>  const size_t pc_compat_11_0_len = G_N_ELEMENTS(pc_compat_11_0);
> diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
> index 82457bdb16..8e58f2a7ee 100644
> --- a/hw/i386/pc_piix.c
> +++ b/hw/i386/pc_piix.c
> @@ -438,6 +438,7 @@ DEFINE_I440FX_MACHINE_AS_LATEST(11, 1);
>  static void pc_i440fx_machine_11_0_options(MachineClass *m)
>  {
>      pc_i440fx_machine_11_1_options(m);

pc_i440fx_machine_11_1_options() has added pc_compat_11_1...

> +    compat_props_add(m->compat_props, pc_compat_11_1, pc_compat_11_1_len);

...so taht now we don't need ao do this again.

>      compat_props_add(m->compat_props, hw_compat_11_0, hw_compat_11_0_len);
>      compat_props_add(m->compat_props, pc_compat_11_0, pc_compat_11_0_len);
>  }
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index 6c1e4eff5f..fd4366f51f 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -393,6 +393,7 @@ DEFINE_Q35_MACHINE_AS_LATEST(11, 1);
>  static void pc_q35_machine_11_0_options(MachineClass *m)
>  {
>      pc_q35_machine_11_1_options(m);
> +    compat_props_add(m->compat_props, pc_compat_11_1, pc_compat_11_1_len);

ditto.

>      compat_props_add(m->compat_props, hw_compat_11_0, hw_compat_11_0_len);
>      compat_props_add(m->compat_props, pc_compat_11_0, pc_compat_11_0_len);
>  }

Overall, LGTM except rebasing :).

Regards,
Zhao