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From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Zijlstra <peterz@infradead.org>, "H. Peter Anvin" <hpa@zytor.com>
Cc: Sean Christopherson <seanjc@google.com>,
	"Li, Xin3" <xin3.li@intel.com>,
	"linux-kernel@vger.kernnel.org" <linux-kernel@vger.kernnel.org>,
	"x86@kernel.org" <x86@kernel.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"tglx@linutronix.de" <tglx@linutronix.de>,
	"mingo@redhat.com" <mingo@redhat.com>,
	"bp@alien8.de" <bp@alien8.de>,
	"dave.hansen@linux.intel.com" <dave.hansen@linux.intel.com>,
	"Tian, Kevin" <kevin.tian@intel.com>
Subject: Re: [PATCH 5/6] KVM: x86/VMX: add kvm_vmx_reinject_nmi_irq() for NMI/IRQ reinjection
Date: Fri, 11 Nov 2022 12:57:58 +0100	[thread overview]
Message-ID: <ef2c54f7-14b9-dcbb-c3c4-1533455e7a18@redhat.com> (raw)
In-Reply-To: <Y24n4bHoFBuHVid5@hirez.programming.kicks-ass.net>

On 11/11/22 11:45, Peter Zijlstra wrote:
>> What is "correct" in this context?
>
> I don't know since I don't really speak virt, but I could image the
> regset that would match the vmrun (or whatever intel decided to call
> that again) instruction.

Right now it is not exactly that but close.  The RIP is somewhere in 
vmx_do_interrupt_nmi_irqoff; CS/SS are correct (i.e. it's not like they 
point to guest values!) and other registers including RSP and RFLAGS are 
consistent with the RIP.

>> Currently KVM basically stuff random data into pt_regs; this at least
>> makes it explicitly zero.
>
> 🙁 Both is broken. Once again proving to me that virt is a bunch of
> duck-tape at best.

Except currently it is not random.  At least I'm not alone in sometimes 
thinking I understand stuff when I actually don't.

Zero is just wrong, I agree.  Xin, if you don't want to poke at the IDT 
you need to build the pt_regs and pass them to the function you add in 
patch 5.  In order to make it like Peter wants it, then:

1) for the flags just use X86_EFLAGS_FIXED

2) for CS/SS segment selectors use __KERNEL_CS and __KERNEL_DS

3) the RIP/RSP can be found respectively in (unsigned long)vmx_vmexit 
vmx->loaded_vmcs->host_state.rsp

4) the other registers can be taken from vcpu->arch.regs

But I am not sure it's an improvement.  It may be okay to zero the 
registers, but setting CS/RIP/SS/RSP/RFLAGS to the actual processor 
values in vmx_do_interrupt_nmi_irqoff is safer.

I'm not sure who would set orig_rax, but I haven't looked too closely. 
Perhaps that's not a problem, but if so it has to be documented in the 
commit message.

Paolo


  reply	other threads:[~2022-11-11 11:59 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-10  5:53 [PATCH 0/6] x86/traps,VMX: implement software based NMI/IRQ dispatch for VMX NMI/IRQ reinjection Xin Li
2022-11-10  5:53 ` [PATCH 1/6] x86/traps: let common_interrupt() handle IRQ_MOVE_CLEANUP_VECTOR Xin Li
2022-11-10  5:53 ` [PATCH 2/6] x86/traps: add a system interrupt table for system interrupt dispatch Xin Li
2022-11-10  5:53 ` [PATCH 3/6] x86/traps: add install_system_interrupt_handler() Xin Li
2022-11-10  5:53 ` [PATCH 4/6] x86/traps: add external_interrupt() to dispatch external interrupts Xin Li
2022-11-10  5:53 ` [PATCH 5/6] KVM: x86/VMX: add kvm_vmx_reinject_nmi_irq() for NMI/IRQ reinjection Xin Li
2022-11-10 15:59   ` Sean Christopherson
2022-11-10 20:40     ` Li, Xin3
2022-11-10 20:53       ` Sean Christopherson
2022-11-11  9:19         ` Peter Zijlstra
2022-11-11  9:29           ` H. Peter Anvin
2022-11-11 10:45             ` Peter Zijlstra
2022-11-11 11:57               ` Paolo Bonzini [this message]
2022-11-11 12:10                 ` Peter Zijlstra
2022-11-11 12:17                   ` Paolo Bonzini
2022-11-14  4:10                 ` Li, Xin3
2022-11-14  2:18         ` Li, Xin3
2022-11-10  5:53 ` [PATCH 6/6] x86/traps: remove unused NMI entry exc_nmi_noist() Xin Li

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