From: James Morse <james.morse@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Julien Thierry <julien.thierry@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
wangxiongfeng2@huawei.com, kvmarm@lists.cs.columbia.edu
Subject: [RESEND PATCH v4 6/9] arm64: entry.S: convert el1_sync
Date: Thu, 2 Nov 2017 12:12:39 +0000 [thread overview]
Message-ID: <20171102121242.8925-7-james.morse@arm.com> (raw)
In-Reply-To: <20171102121242.8925-1-james.morse@arm.com>
el1_sync unmasks exceptions on a case-by-case basis, debug exceptions
are unmasked, unless this was a debug exception. IRQs are unmasked
for instruction and data aborts only if the interupted context had
irqs unmasked.
Following our 'dai' order, el1_dbg should run with everything masked.
For the other cases we can inherit whatever we interrupted.
Add a macro inherit_daif to set daif based on the interrupted pstate.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
---
arch/arm64/include/asm/assembler.h | 6 ++++++
arch/arm64/kernel/entry.S | 12 ++++--------
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 1b0972046a72..abb5abd61ddb 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -48,6 +48,12 @@
msr daif, \flags
.endm
+ /* Only on aarch64 pstate, PSR_D_BIT is different for aarch32 */
+ .macro inherit_daif, pstate:req, tmp:req
+ and \tmp, \pstate, #(PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)
+ msr daif, \tmp
+ .endm
+
/*
* Enable and disable interrupts.
*/
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index f7d7bf9d76e7..bd54115972a4 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -510,11 +510,7 @@ el1_da:
* Data abort handling
*/
mrs x3, far_el1
- enable_dbg
- // re-enable interrupts if they were enabled in the aborted context
- tbnz x23, #7, 1f // PSR_I_BIT
- enable_irq
-1:
+ inherit_daif pstate=x23, tmp=x2
clear_address_tag x0, x3
mov x2, sp // struct pt_regs
bl do_mem_abort
@@ -525,7 +521,7 @@ el1_sp_pc:
* Stack or PC alignment exception handling
*/
mrs x0, far_el1
- enable_dbg
+ inherit_daif pstate=x23, tmp=x2
mov x2, sp
bl do_sp_pc_abort
ASM_BUG()
@@ -533,7 +529,7 @@ el1_undef:
/*
* Undefined instruction
*/
- enable_dbg
+ inherit_daif pstate=x23, tmp=x2
mov x0, sp
bl do_undefinstr
ASM_BUG()
@@ -550,7 +546,7 @@ el1_dbg:
kernel_exit 1
el1_inv:
// TODO: add support for undefined instructions in kernel mode
- enable_dbg
+ inherit_daif pstate=x23, tmp=x2
mov x0, sp
mov x2, x1
mov x1, #BAD_SYNC
--
2.15.0.rc2
next prev parent reply other threads:[~2017-11-02 12:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-02 12:12 [RESEND PATCH v4 0/9] SError rework (- RAS & IESB for firmware first support) James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 1/9] arm64: explicitly mask all exceptions James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 2/9] arm64: introduce an order for exceptions James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 3/9] arm64: Move the async/fiq helpers to explicitly set process context flags James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 4/9] arm64: Mask all exceptions during kernel_exit James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 5/9] arm64: entry.S: Remove disable_dbg James Morse
2017-11-02 12:12 ` James Morse [this message]
2017-11-02 12:12 ` [RESEND PATCH v4 7/9] arm64: entry.S convert el0_sync James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 8/9] arm64: entry.S: convert elX_irq James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 9/9] arm64: entry.S: move SError handling into a C function for future expansion James Morse
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