From: James Morse <james.morse@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Julien Thierry <julien.thierry@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
wangxiongfeng2@huawei.com, kvmarm@lists.cs.columbia.edu
Subject: [RESEND PATCH v4 7/9] arm64: entry.S convert el0_sync
Date: Thu, 2 Nov 2017 12:12:40 +0000 [thread overview]
Message-ID: <20171102121242.8925-8-james.morse@arm.com> (raw)
In-Reply-To: <20171102121242.8925-1-james.morse@arm.com>
el0_sync also unmasks exceptions on a case-by-case basis, debug exceptions
are enabled, unless this was a debug exception. Irqs are unmasked for
some exception types but not for others.
el0_dbg should run with everything masked to prevent us taking a debug
exception from do_debug_exception. For the other cases we can unmask
everything. This changes the behaviour of fpsimd_{acc,exc} and el0_inv
which previously ran with irqs masked.
This patch removed the last user of enable_dbg_and_irq, remove it.
Signed-off-by: James Morse <james.morse@arm.com>
Reviewed-by: Julien Thierry <julien.thierry@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
---
arch/arm64/include/asm/assembler.h | 9 ---------
arch/arm64/kernel/entry.S | 24 ++++++++++--------------
2 files changed, 10 insertions(+), 23 deletions(-)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index abb5abd61ddb..c2a37e2f733c 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -96,15 +96,6 @@
9990:
.endm
-/*
- * Enable both debug exceptions and interrupts. This is likely to be
- * faster than two daifclr operations, since writes to this register
- * are self-synchronising.
- */
- .macro enable_dbg_and_irq
- msr daifclr, #(8 | 2)
- .endm
-
/*
* SMP data memory barrier
*/
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index bd54115972a4..f7dfe5d2b1fb 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -670,8 +670,7 @@ el0_da:
* Data abort handling
*/
mrs x26, far_el1
- // enable interrupts before calling the main handler
- enable_dbg_and_irq
+ enable_daif
ct_user_exit
clear_address_tag x0, x26
mov x1, x25
@@ -683,8 +682,7 @@ el0_ia:
* Instruction abort handling
*/
mrs x26, far_el1
- // enable interrupts before calling the main handler
- enable_dbg_and_irq
+ enable_daif
ct_user_exit
mov x0, x26
mov x1, x25
@@ -695,7 +693,7 @@ el0_fpsimd_acc:
/*
* Floating Point or Advanced SIMD access
*/
- enable_dbg
+ enable_daif
ct_user_exit
mov x0, x25
mov x1, sp
@@ -705,7 +703,7 @@ el0_fpsimd_exc:
/*
* Floating Point or Advanced SIMD exception
*/
- enable_dbg
+ enable_daif
ct_user_exit
mov x0, x25
mov x1, sp
@@ -716,8 +714,7 @@ el0_sp_pc:
* Stack or PC alignment exception handling
*/
mrs x26, far_el1
- // enable interrupts before calling the main handler
- enable_dbg_and_irq
+ enable_daif
ct_user_exit
mov x0, x26
mov x1, x25
@@ -728,8 +725,7 @@ el0_undef:
/*
* Undefined instruction
*/
- // enable interrupts before calling the main handler
- enable_dbg_and_irq
+ enable_daif
ct_user_exit
mov x0, sp
bl do_undefinstr
@@ -738,7 +734,7 @@ el0_sys:
/*
* System instructions, for trapped cache maintenance instructions
*/
- enable_dbg_and_irq
+ enable_daif
ct_user_exit
mov x0, x25
mov x1, sp
@@ -753,11 +749,11 @@ el0_dbg:
mov x1, x25
mov x2, sp
bl do_debug_exception
- enable_dbg
+ enable_daif
ct_user_exit
b ret_to_user
el0_inv:
- enable_dbg
+ enable_daif
ct_user_exit
mov x0, sp
mov x1, #BAD_SYNC
@@ -836,7 +832,7 @@ el0_svc:
mov wsc_nr, #__NR_syscalls
el0_svc_naked: // compat entry point
stp x0, xscno, [sp, #S_ORIG_X0] // save the original x0 and syscall number
- enable_dbg_and_irq
+ enable_daif
ct_user_exit 1
ldr x16, [tsk, #TSK_TI_FLAGS] // check for syscall hooks
--
2.15.0.rc2
next prev parent reply other threads:[~2017-11-02 12:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-02 12:12 [RESEND PATCH v4 0/9] SError rework (- RAS & IESB for firmware first support) James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 1/9] arm64: explicitly mask all exceptions James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 2/9] arm64: introduce an order for exceptions James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 3/9] arm64: Move the async/fiq helpers to explicitly set process context flags James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 4/9] arm64: Mask all exceptions during kernel_exit James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 5/9] arm64: entry.S: Remove disable_dbg James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 6/9] arm64: entry.S: convert el1_sync James Morse
2017-11-02 12:12 ` James Morse [this message]
2017-11-02 12:12 ` [RESEND PATCH v4 8/9] arm64: entry.S: convert elX_irq James Morse
2017-11-02 12:12 ` [RESEND PATCH v4 9/9] arm64: entry.S: move SError handling into a C function for future expansion James Morse
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