From: Dave Martin <Dave.Martin@arm.com>
To: Christoffer Dall <christoffer.dall@arm.com>
Cc: Okamoto Takayuki <tokamoto@jp.fujitsu.com>,
Christoffer Dall <cdall@kernel.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>,
Marc Zyngier <marc.zyngier@arm.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH 09/16] KVM: arm64: Allow ID registers to by dynamically read-as-zero
Date: Tue, 7 Aug 2018 12:09:58 +0100 [thread overview]
Message-ID: <20180807110958.GC9097@e103592.cambridge.arm.com> (raw)
In-Reply-To: <20180806130324.GA5985@e113682-lin.lund.arm.com>
On Mon, Aug 06, 2018 at 03:03:24PM +0200, Christoffer Dall wrote:
> Hi Dave,
>
> I think there's a typo in the subject "to be" rather than "to by".
>
> On Thu, Jun 21, 2018 at 03:57:33PM +0100, Dave Martin wrote:
> > When a feature-dependent ID register is hidden from the guest, it
> > needs to exhibit read-as-zero behaviour as defined by the Arm
> > architecture, rather than appearing to be entirely absent.
> >
> > This patch updates the ID register emulation logic to make use of
> > the new check_present() method to determine whether the register
> > should read as zero instead of yielding the host's sanitised
> > value. Because currently a false result from this method truncates
> > the trap call chain before the sysreg's emulate method() is called,
> > a flag is added to distinguish this special case, and helpers are
> > refactored appropriately.
>
> I don't understand this last sentence.
>
> And I'm not really sure I understand the code either.
>
> I can't seem to see any registers which are defined as !present && !raz,
> which is what I thought this feature was all about.
!present and !raz is the default behaviour for everything that is not
ID-register-like. This patch is adding the !present && raz case (though
that may not be a helpful way to descibe it ... see below).
> In other words, what is the benefit of this more generic method as
> opposed to having a wrapper around read_id_reg() for read_sve_id_reg()
> which sets RAZ if there is no support for SVE in this context?
There may be other ways to factor this. I can't now remember whay I
went with this particular approach, except that I vaguely recall
hitting some obstacles when doing things another way.
Can you take a look at my attempted explanation below and then we
can reconsider this?
[...]
>
> >
> > This invloves some trivial updates to pass the vcpu pointer down
> > into the ID register emulation/access functions.
> >
> > A new ID_SANITISED_IF() macro is defined for declaring
> > conditionally visible ID registers.
> >
> > Signed-off-by: Dave Martin <Dave.Martin@arm.com>
> > ---
> > arch/arm64/kvm/sys_regs.c | 51 ++++++++++++++++++++++++++++++-----------------
> > arch/arm64/kvm/sys_regs.h | 11 ++++++++++
> > 2 files changed, 44 insertions(+), 18 deletions(-)
> >
[...]
> > @@ -1840,7 +1855,7 @@ static int emulate_cp(struct kvm_vcpu *vcpu,
> >
> > r = find_reg(params, table, num);
> >
> > - if (likely(r) && sys_reg_present(vcpu, r)) {
> > + if (likely(r) && sys_reg_present_or_raz(vcpu, r)) {
> > perform_access(vcpu, params, r);
> > return 0;
> > }
> > @@ -2016,7 +2031,7 @@ static int emulate_sys_reg(struct kvm_vcpu *vcpu,
> > if (!r)
> > r = find_reg(params, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
> >
> > - if (likely(r) && sys_reg_present(vcpu, r)) {
> > + if (likely(r) && sys_reg_present_or_raz(vcpu, r)) {
> > perform_access(vcpu, params, r);
> > } else {
> > kvm_err("Unsupported guest sys_reg access at: %lx\n",
> > @@ -2313,7 +2328,7 @@ int kvm_arm_sys_reg_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg
> > if (!r)
> > return get_invariant_sys_reg(reg->id, uaddr);
> >
> > - if (!sys_reg_present(vcpu, r))
> > + if (!sys_reg_present_or_raz(vcpu, r))
> > return -ENOENT;
> >
> > if (r->get_user)
> > @@ -2337,7 +2352,7 @@ int kvm_arm_sys_reg_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg
> > if (!r)
> > return set_invariant_sys_reg(reg->id, uaddr);
> >
> > - if (!sys_reg_present(vcpu, r))
> > + if (!sys_reg_present_or_raz(vcpu, r))
> > return -ENOENT;
On Wed, Jul 25, 2018 at 04:46:55PM +0100, Alex Bennée wrote:
> It's all very well being raz, but shouldn't you catch this further down
> and not attempt to write the register that doesn't exist?
To be clear, is this a question about factoring, or do you think there's
a bug here?
In response to both sets of comments, I think the way the code is
factored is causing some confusion.
The idea in my head was something like this:
System register encodings fall into two classes:
a) encodings that we emulate in some way
b) encodings that we unconditionally reflect back to the guest as an
Undef.
Architecturally defined system registers fall into two classes:
i) registers whose removal turns all accesses into an Undef
ii) registers whose removal exhibits some other behaviour.
These two classifications overlap somwehat.
>From an emulation perspective, (b), and (i) in the "register not
present" case, look the same: we trap the register and reflect an Undef
directly back to the guest with no further action required.
>From an emulation perspective, (a) and (ii) are also somewhat the
same: we need to emulate something, although precisely what we need
to do depends on which register it is and on whether the register is
deemed present or not.
sys_reg_check_present_or_raz() thus means "falls under (a) or (ii)",
i.e., some emulation is required and we need to call sysreg-specific
methods to figure out precisely what we need to do.
Conversely !sys_reg_check_present_or_raz() means that we can just
Undef the guest with no further logic required.
Does this rationale make things clearer? The naming is perhaps
unfortunate.
Cheers,
---Dave
next prev parent reply other threads:[~2018-08-07 11:10 UTC|newest]
Thread overview: 89+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-21 14:57 [RFC PATCH 00/16] KVM: arm64: Initial support for SVE guests Dave Martin
2018-06-21 14:57 ` [RFC PATCH 01/16] arm64: fpsimd: Always set TIF_FOREIGN_FPSTATE on task state flush Dave Martin
2018-07-06 9:07 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 02/16] KVM: arm64: Delete orphaned declaration for __fpsimd_enabled() Dave Martin
2018-07-06 9:08 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 03/16] KVM: arm64: Refactor kvm_arm_num_regs() for easier maintenance Dave Martin
2018-07-06 9:20 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 04/16] KVM: arm64: Add missing #include of <linux/bitmap.h> to kvm_host.h Dave Martin
2018-07-06 9:21 ` Alex Bennée
2018-06-21 14:57 ` [RFC PATCH 05/16] KVM: arm: Add arch init/uninit hooks Dave Martin
2018-07-06 10:02 ` Alex Bennée
2018-07-09 15:15 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 06/16] arm64/sve: Determine virtualisation-friendly vector lengths Dave Martin
2018-07-06 13:20 ` Marc Zyngier
2018-06-21 14:57 ` [RFC PATCH 07/16] arm64/sve: Enable SVE state tracking for non-task contexts Dave Martin
2018-07-25 13:58 ` Alex Bennée
2018-07-25 14:39 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 08/16] KVM: arm64: Support dynamically hideable system registers Dave Martin
2018-07-25 14:12 ` Alex Bennée
2018-07-25 14:36 ` Dave Martin
2018-07-25 15:41 ` Alex Bennée
2018-07-26 12:53 ` Dave Martin
2018-08-07 19:20 ` Christoffer Dall
2018-08-08 8:33 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 09/16] KVM: arm64: Allow ID registers to by dynamically read-as-zero Dave Martin
2018-07-25 15:46 ` Alex Bennée
2018-08-06 13:03 ` Christoffer Dall
2018-08-07 11:09 ` Dave Martin [this message]
2018-08-07 19:35 ` Christoffer Dall
2018-08-08 9:11 ` Dave Martin
2018-08-08 9:58 ` Christoffer Dall
2018-08-08 14:03 ` Peter Maydell
2018-08-09 10:19 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 10/16] KVM: arm64: Add a vcpu flag to control SVE visibility for the guest Dave Martin
2018-07-19 11:08 ` Andrew Jones
2018-07-25 11:41 ` Dave Martin
2018-07-25 13:43 ` Andrew Jones
2018-07-25 14:41 ` Dave Martin
2018-07-19 15:02 ` Andrew Jones
2018-07-25 11:48 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 11/16] KVM: arm64/sve: System register context switch and access support Dave Martin
2018-07-19 11:11 ` Andrew Jones
2018-07-25 11:45 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 12/16] KVM: arm64/sve: Context switch the SVE registers Dave Martin
2018-07-19 13:13 ` Andrew Jones
2018-07-25 11:50 ` Dave Martin
2018-07-25 13:57 ` Andrew Jones
2018-07-25 14:12 ` Dave Martin
2018-08-06 13:19 ` Christoffer Dall
2018-08-07 11:15 ` Dave Martin
2018-08-07 19:43 ` Christoffer Dall
2018-08-08 8:23 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 13/16] KVM: Allow 2048-bit register access via KVM_{GET, SET}_ONE_REG Dave Martin
2018-07-25 15:58 ` Alex Bennée
2018-07-26 12:58 ` Dave Martin
2018-07-26 13:55 ` Alex Bennée
2018-07-27 9:26 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 14/16] KVM: arm64/sve: Add SVE support to register access ioctl interface Dave Martin
2018-07-19 13:04 ` Andrew Jones
2018-07-25 14:06 ` Dave Martin
2018-07-25 17:20 ` Andrew Jones
2018-07-26 13:10 ` Dave Martin
2018-08-03 14:57 ` Dave Martin
2018-08-03 15:11 ` Andrew Jones
2018-08-03 15:38 ` Dave Martin
2018-08-06 13:25 ` Christoffer Dall
2018-08-07 11:17 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 15/16] KVM: arm64: Enumerate SVE register indices for KVM_GET_REG_LIST Dave Martin
2018-07-19 14:12 ` Andrew Jones
2018-07-25 14:50 ` Dave Martin
2018-06-21 14:57 ` [RFC PATCH 16/16] KVM: arm64/sve: Report and enable SVE API extensions for userspace Dave Martin
2018-07-19 14:59 ` Andrew Jones
2018-07-25 15:27 ` Dave Martin
2018-07-25 16:52 ` Andrew Jones
2018-07-26 13:18 ` Dave Martin
2018-08-06 13:41 ` Christoffer Dall
2018-08-07 11:23 ` Dave Martin
2018-08-07 20:08 ` Christoffer Dall
2018-08-08 8:30 ` Dave Martin
2018-07-19 15:24 ` Andrew Jones
2018-07-26 13:23 ` Dave Martin
2018-07-06 8:22 ` [RFC PATCH 00/16] KVM: arm64: Initial support for SVE guests Alex Bennée
2018-07-06 9:05 ` Dave Martin
2018-07-06 9:20 ` Alex Bennée
2018-07-06 9:23 ` Peter Maydell
2018-07-06 10:11 ` Alex Bennée
2018-07-06 10:14 ` Peter Maydell
2018-08-06 13:05 ` Christoffer Dall
2018-08-07 11:18 ` Dave Martin
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