From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Eric Auger <eric.auger@redhat.com>,
Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH 01/11] KVM: arm64: Make RVBAR_EL2 accesses UNDEF
Date: Mon, 14 Jul 2025 13:26:24 +0100 [thread overview]
Message-ID: <20250714122634.3334816-2-maz@kernel.org> (raw)
In-Reply-To: <20250714122634.3334816-1-maz@kernel.org>
We always expose a virtual CPU that has EL3 when NV is enabled,
irrespective of EL3 being actually implemented in HW.
Therefore, as per the architecture, RVBAR_EL2 must UNDEF, since
EL2 is not the highest implemented exception level. This is
consistent with RMR_EL2 also triggering an UNDEF.
Adjust the handling of RVBAR_EL2 accordingly.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kvm/sys_regs.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 76c2f0da821f8..3f226cd5b502e 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -108,7 +108,6 @@ static bool get_el2_to_el1_mapping(unsigned int reg,
PURE_EL2_SYSREG( HACR_EL2 );
PURE_EL2_SYSREG( VTTBR_EL2 );
PURE_EL2_SYSREG( VTCR_EL2 );
- PURE_EL2_SYSREG( RVBAR_EL2 );
PURE_EL2_SYSREG( TPIDR_EL2 );
PURE_EL2_SYSREG( HPFAR_EL2 );
PURE_EL2_SYSREG( HCRX_EL2 );
@@ -3370,7 +3369,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
{ SYS_DESC(SYS_MPAMVPM7_EL2), undef_access },
EL2_REG(VBAR_EL2, access_rw, reset_val, 0),
- EL2_REG(RVBAR_EL2, access_rw, reset_val, 0),
+ { SYS_DESC(SYS_RVBAR_EL2), undef_access },
{ SYS_DESC(SYS_RMR_EL2), undef_access },
EL2_REG_VNCR(ICH_AP0R0_EL2, reset_val, 0),
--
2.39.2
next prev parent reply other threads:[~2025-07-14 12:26 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-14 12:26 [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Marc Zyngier
2025-07-14 12:26 ` Marc Zyngier [this message]
2025-07-14 12:26 ` [PATCH 02/11] KVM: arm64: Don't advertise ICH_*_EL2 registers through GET_ONE_REG Marc Zyngier
2025-07-14 12:26 ` [PATCH 03/11] KVM: arm64: Define constant value for ICC_SRE_EL2 Marc Zyngier
2025-07-14 12:26 ` [PATCH 04/11] KVM: arm64: Define helper for ICH_VTR_EL2 Marc Zyngier
2025-07-14 12:26 ` [PATCH 05/11] KVM: arm64: Let GICv3 save/restore honor visibility attribute Marc Zyngier
2025-07-14 12:26 ` [PATCH 06/11] KVM: arm64: Expose GICv3 EL2 registers via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-14 12:26 ` [PATCH 07/11] KVM: arm64: Condition FGT registers on feature availability Marc Zyngier
2025-07-14 12:26 ` [PATCH 08/11] KVM: arm64: Advertise FGT2 registers to userspace Marc Zyngier
2025-07-14 12:26 ` [PATCH 09/11] KVM: arm64: selftests: get-reg-list: Simplify feature dependency Marc Zyngier
2025-07-14 22:49 ` Itaru Kitayama
2025-07-14 12:26 ` [PATCH 10/11] KVM: arm64: selftests: get-reg-list: Add base EL2 registers Marc Zyngier
2025-07-14 12:26 ` [PATCH 11/11] KVM: arm64: Document registers exposed via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-16 16:47 ` [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Oliver Upton
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