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From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Eric Auger <eric.auger@redhat.com>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: [PATCH 08/11] KVM: arm64: Advertise FGT2 registers to userspace
Date: Mon, 14 Jul 2025 13:26:31 +0100	[thread overview]
Message-ID: <20250714122634.3334816-9-maz@kernel.org> (raw)
In-Reply-To: <20250714122634.3334816-1-maz@kernel.org>

While a guest is able to use the FEAT_FGT2 registers, we're missing
them being exposed to userspace. Add them to the (very long) list.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 arch/arm64/kvm/sys_regs.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index b441049368c7e..554c7145ec1cd 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -2592,6 +2592,16 @@ static unsigned int tcr2_el2_visibility(const struct kvm_vcpu *vcpu,
 	return __el2_visibility(vcpu, rd, tcr2_visibility);
 }
 
+static unsigned int fgt2_visibility(const struct kvm_vcpu *vcpu,
+				    const struct sys_reg_desc *rd)
+{
+	if (el2_visibility(vcpu, rd) == 0 &&
+	    kvm_has_feat(vcpu->kvm, ID_AA64MMFR0_EL1, FGT, FGT2))
+		return 0;
+
+	return REG_HIDDEN;
+}
+
 static unsigned int fgt_visibility(const struct kvm_vcpu *vcpu,
 				   const struct sys_reg_desc *rd)
 {
@@ -3341,9 +3351,14 @@ static const struct sys_reg_desc sys_reg_descs[] = {
 			 vncr_el2_visibility),
 
 	{ SYS_DESC(SYS_DACR32_EL2), undef_access, reset_unknown, DACR32_EL2 },
+	EL2_REG_VNCR_FILT(HDFGRTR2_EL2, fgt2_visibility),
+	EL2_REG_VNCR_FILT(HDFGWTR2_EL2, fgt2_visibility),
+	EL2_REG_VNCR_FILT(HFGRTR2_EL2, fgt2_visibility),
+	EL2_REG_VNCR_FILT(HFGWTR2_EL2, fgt2_visibility),
 	EL2_REG_VNCR_FILT(HDFGRTR_EL2, fgt_visibility),
 	EL2_REG_VNCR_FILT(HDFGWTR_EL2, fgt_visibility),
 	EL2_REG_VNCR_FILT(HAFGRTR_EL2, fgt_visibility),
+	EL2_REG_VNCR_FILT(HFGITR2_EL2, fgt2_visibility),
 	EL2_REG_REDIR(SPSR_EL2, reset_val, 0),
 	EL2_REG_REDIR(ELR_EL2, reset_val, 0),
 	{ SYS_DESC(SYS_SP_EL1), access_sp_el1},
-- 
2.39.2


  parent reply	other threads:[~2025-07-14 12:26 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-14 12:26 [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Marc Zyngier
2025-07-14 12:26 ` [PATCH 01/11] KVM: arm64: Make RVBAR_EL2 accesses UNDEF Marc Zyngier
2025-07-14 12:26 ` [PATCH 02/11] KVM: arm64: Don't advertise ICH_*_EL2 registers through GET_ONE_REG Marc Zyngier
2025-07-14 12:26 ` [PATCH 03/11] KVM: arm64: Define constant value for ICC_SRE_EL2 Marc Zyngier
2025-07-14 12:26 ` [PATCH 04/11] KVM: arm64: Define helper for ICH_VTR_EL2 Marc Zyngier
2025-07-14 12:26 ` [PATCH 05/11] KVM: arm64: Let GICv3 save/restore honor visibility attribute Marc Zyngier
2025-07-14 12:26 ` [PATCH 06/11] KVM: arm64: Expose GICv3 EL2 registers via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-14 12:26 ` [PATCH 07/11] KVM: arm64: Condition FGT registers on feature availability Marc Zyngier
2025-07-14 12:26 ` Marc Zyngier [this message]
2025-07-14 12:26 ` [PATCH 09/11] KVM: arm64: selftests: get-reg-list: Simplify feature dependency Marc Zyngier
2025-07-14 22:49   ` Itaru Kitayama
2025-07-14 12:26 ` [PATCH 10/11] KVM: arm64: selftests: get-reg-list: Add base EL2 registers Marc Zyngier
2025-07-14 12:26 ` [PATCH 11/11] KVM: arm64: Document registers exposed via KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS Marc Zyngier
2025-07-16 16:47 ` [PATCH 00/11] KVM: arm64: nv: Userspace register visibility fixes Oliver Upton

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