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From: Marc Zyngier <maz@kernel.org>
To: Ben Horgan <ben.horgan@arm.com>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
	Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Jinqian Yang <yangjinqian1@huawei.com>
Subject: Re: [PATCH v2 10/10] KVM: arm64: Convert MDCR_EL2 RES0 handling to compute_reg_res0_bits()
Date: Fri, 19 Sep 2025 13:10:23 +0100	[thread overview]
Message-ID: <874isyzlqo.wl-maz@kernel.org> (raw)
In-Reply-To: <64c0b9fc-c970-4f17-8c3b-6a5078257f83@arm.com>

Hi Ben,

On Fri, 19 Sep 2025 11:53:54 +0100,
Ben Horgan <ben.horgan@arm.com> wrote:
> 
> Hi Marc,
> 
> On 9/18/25 16:14, Marc Zyngier wrote:
> > While MDCR_EL2 cannot be RES0, convert it to the same infrastructure
> > anyway, as it make things cleaner.
> > 
> > Signed-off-by: Marc Zyngier <maz@kernel.org>
> > ---
> >  arch/arm64/kvm/config.c | 9 +++++----
> >  1 file changed, 5 insertions(+), 4 deletions(-)
> > 
> > diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c
> > index 7b5c5044d4f64..109d1edcd83d4 100644
> > --- a/arch/arm64/kvm/config.c
> > +++ b/arch/arm64/kvm/config.c
> [...]
> > @@ -1417,8 +1419,7 @@ void get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg, u64 *res0, u64 *r
> >  		*res1 = SCTLR_EL1_RES1;
> >  		break;
> >  	case MDCR_EL2:
> > -		*res0 = compute_res0_bits(kvm, mdcr_el2_feat_map,
> > -					  ARRAY_SIZE(mdcr_el2_feat_map), 0, 0);
> > +		*res0 = compute_reg_res0_bits(kvm, &mdcr_el2_desc, 0, 0);
> >  		*res0 |= MDCR_EL2_RES0;
> >  		*res1 = MDCR_EL2_RES1;
> >  		break;
> 
> The patch itself looks fine to me but I am confused as to why MDCR_EL2
> is the only switch case where we have:
> 
> *res0 |= <reg>_RES0;
> 
> Should this not be present in the other cases?

No, the RES0 bits should already be factored in from
compute_reg_res0_bits(), and this line is only a benign leftover. I'll
fix this before merging the series.

Thanks for the heads up,

	M.

-- 
Jazz isn't dead. It just smells funny.

  reply	other threads:[~2025-09-19 12:10 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-18 15:13 [PATCH v2 00/10] KVM: arm64: Handle effective RES0 behaviour of undefined registers Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 01/10] KVM: arm64: Remove duplicate FEAT_{SYSREG128,MTE2} descriptions Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 02/10] KVM: arm64: Add reg_feat_map_desc to describe full register dependency Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 03/10] KVM: arm64: Enforce absence of FEAT_FGT on FGT registers Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 04/10] KVM: arm64: Enforce absence of FEAT_FGT2 on FGT2 registers Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 05/10] KVM: arm64: Enforce absence of FEAT_HCX on HCRX_EL2 Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 06/10] KVM: arm64: Convert HCR_EL2 RES0 handling to compute_reg_res0_bits() Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 07/10] KVM: arm64: Enforce absence of FEAT_SCTLR2 on SCTLR2_EL{1,2} Marc Zyngier
2025-09-18 15:14 ` [PATCH v2 08/10] KVM: arm64: Enforce absence of FEAT_TCR2 on TCR2_EL2 Marc Zyngier
2025-09-18 15:14 ` [PATCH v2 09/10] KVM: arm64: Convert SCTLR_EL1 RES0 handling to compute_reg_res0_bits() Marc Zyngier
2025-09-18 15:14 ` [PATCH v2 10/10] KVM: arm64: Convert MDCR_EL2 " Marc Zyngier
2025-09-19 10:53   ` Ben Horgan
2025-09-19 12:10     ` Marc Zyngier [this message]
2025-09-19  7:04 ` [PATCH v2 00/10] KVM: arm64: Handle effective RES0 behaviour of undefined registers Oliver Upton
2025-09-19 13:15 ` Marc Zyngier

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