From: Oliver Upton <oliver.upton@linux.dev>
To: Marc Zyngier <maz@kernel.org>
Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Jinqian Yang <yangjinqian1@huawei.com>
Subject: Re: [PATCH v2 00/10] KVM: arm64: Handle effective RES0 behaviour of undefined registers
Date: Fri, 19 Sep 2025 00:04:00 -0700 [thread overview]
Message-ID: <aM0AYEjk2vgzVzND@linux.dev> (raw)
In-Reply-To: <20250918151402.1665315-1-maz@kernel.org>
On Thu, Sep 18, 2025 at 04:13:52PM +0100, Marc Zyngier wrote:
> [After yesterday's blunder, I'm reposting this, with proper commit
> messages, and having taken Oliver's feedback into account.]
>
> When a feature is removed from a guest, we ensure that the trap and
> control bits for that particular feature are made RES0.
>
> For example, SCTLR2_EL2 contains a large number of bits. For any
> feature FEAT_FOO that is controlled by a bit FOO in SCTLR2_EL2, we
> make sure that SCTLR2_EL2.FOO is RES0 if FEAT_FOO is not visible to
> the guest.
>
> However, nothing makes SCTLR2_EL2 RES0 if FEAT_SCTLR2 is not visible.
>
> This series aims at solving this sort of situations. It is still quite
> incomplete, but aims at bridging a couple of other series:
>
> - 20250911114621.3724469-1-yangjinqian1@huawei.com which wants to
> make EL2-related fields writable to allow migration
>
> - 20250912212258.407350-1-oliver.upton@linux.dev which wants to align
> the NV support with the rest of the kernel
>
> Hopefully this helps getting to a point where we everything is
> sanitised according to the architecture, EL2 on the same footing as
> EL1, and everything migrating in every possible case.
Looks good, let it rip!
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Thanks,
Oliver
next prev parent reply other threads:[~2025-09-19 7:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-18 15:13 [PATCH v2 00/10] KVM: arm64: Handle effective RES0 behaviour of undefined registers Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 01/10] KVM: arm64: Remove duplicate FEAT_{SYSREG128,MTE2} descriptions Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 02/10] KVM: arm64: Add reg_feat_map_desc to describe full register dependency Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 03/10] KVM: arm64: Enforce absence of FEAT_FGT on FGT registers Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 04/10] KVM: arm64: Enforce absence of FEAT_FGT2 on FGT2 registers Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 05/10] KVM: arm64: Enforce absence of FEAT_HCX on HCRX_EL2 Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 06/10] KVM: arm64: Convert HCR_EL2 RES0 handling to compute_reg_res0_bits() Marc Zyngier
2025-09-18 15:13 ` [PATCH v2 07/10] KVM: arm64: Enforce absence of FEAT_SCTLR2 on SCTLR2_EL{1,2} Marc Zyngier
2025-09-18 15:14 ` [PATCH v2 08/10] KVM: arm64: Enforce absence of FEAT_TCR2 on TCR2_EL2 Marc Zyngier
2025-09-18 15:14 ` [PATCH v2 09/10] KVM: arm64: Convert SCTLR_EL1 RES0 handling to compute_reg_res0_bits() Marc Zyngier
2025-09-18 15:14 ` [PATCH v2 10/10] KVM: arm64: Convert MDCR_EL2 " Marc Zyngier
2025-09-19 10:53 ` Ben Horgan
2025-09-19 12:10 ` Marc Zyngier
2025-09-19 7:04 ` Oliver Upton [this message]
2025-09-19 13:15 ` [PATCH v2 00/10] KVM: arm64: Handle effective RES0 behaviour of undefined registers Marc Zyngier
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