From: Marc Zyngier <maz@kernel.org>
To: Jianmin Lv <lvjianmin@loongson.cn>
Cc: Thomas Gleixner <tglx@linutronix.de>,
linux-kernel@vger.kernel.org, loongarch@lists.linux.dev,
Jiaxun Yang <jiaxun.yang@flygoat.com>,
Huacai Chen <chenhuacai@loongson.cn>,
Bjorn Helgaas <bhelgaas@google.com>, Len Brown <lenb@kernel.org>,
rafael@kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org
Subject: Re: [PATCH V2 1/2] irqchip/loongson-pch-pic: Support to set irq type for ACPI path
Date: Sun, 09 Oct 2022 02:08:44 +0100 [thread overview]
Message-ID: <87v8othkgz.wl-maz@kernel.org> (raw)
In-Reply-To: <20221008025150.10734-2-lvjianmin@loongson.cn>
On Sat, 08 Oct 2022 03:51:49 +0100,
Jianmin Lv <lvjianmin@loongson.cn> wrote:
>
> For ACPI path, the translate callback used IRQ_TYPE_NONE and ignored
> the irq type in fwspec->param[1]. For supporting to set type for
> irqs of the irqdomain, fwspec->param[1] should be used to get irq
> type.
>
> On Loongson platform, the irq trigger type of PCI devices is
> high level, so high level triggered type is inputed to acpi_register_gsi
> when create irq mapping for PCI devices.
>
> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
> ---
> drivers/acpi/pci_irq.c | 6 ++++--
> drivers/irqchip/irq-loongson-pch-pic.c | 9 ++++++++-
> 2 files changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
> index 08e15774fb9f..ff30ceca2203 100644
> --- a/drivers/acpi/pci_irq.c
> +++ b/drivers/acpi/pci_irq.c
> @@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
> u8 pin;
> int triggering = ACPI_LEVEL_SENSITIVE;
> /*
> - * On ARM systems with the GIC interrupt model, level interrupts
> + * On ARM systems with the GIC interrupt model, or LoongArch
> + * systems with the LPIC interrupt model, level interrupts
> * are always polarity high by specification; PCI legacy
> * IRQs lines are inverted before reaching the interrupt
> * controller and must therefore be considered active high
> * as default.
> */
> - int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
> + int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
> + acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
> ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
> char *link = NULL;
> char link_desc[16];
This is one patch adding support for the LPIC model.
> diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
> index c01b9c257005..5576c97fec85 100644
> --- a/drivers/irqchip/irq-loongson-pch-pic.c
> +++ b/drivers/irqchip/irq-loongson-pch-pic.c
> @@ -159,11 +159,18 @@ static int pch_pic_domain_translate(struct irq_domain *d,
> return -EINVAL;
>
> if (of_node) {
> + if (fwspec->param_count < 2)
> + return -EINVAL;
> +
This is another patch fixing a regression introduced by bcdd75c596c8.
> *hwirq = fwspec->param[0] + priv->ht_vec_base;
> *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
> } else {
> *hwirq = fwspec->param[0] - priv->gsi_base;
> - *type = IRQ_TYPE_NONE;
> +
> + if (fwspec->param_count > 1)
> + *type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
> + else
> + *type = IRQ_TYPE_NONE;
This is yet another patch fixing PCI INTx handling. You can also move
the check against 'param_count < 1' in this block.
> }
>
> return 0;
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2022-10-09 1:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-08 2:51 [PATCH V2 0/2] irqchip: Support to set irq type for ACPI path Jianmin Lv
2022-10-08 2:51 ` [PATCH V2 1/2] irqchip/loongson-pch-pic: " Jianmin Lv
2022-10-09 1:08 ` Marc Zyngier [this message]
2022-10-09 2:26 ` Jianmin Lv
2022-10-09 2:31 ` Marc Zyngier
2022-10-09 2:36 ` Jianmin Lv
2022-10-08 2:51 ` [PATCH V2 2/2] irqchip/loongson-liointc: " Jianmin Lv
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