* [PATCH 04/12] drm: Nuke mode->vrefresh [not found] <20200219203544.31013-1-ville.syrjala@linux.intel.com> @ 2020-02-19 20:35 ` Ville Syrjala 2020-02-20 12:00 ` Emil Velikov ` (2 more replies) 0 siblings, 3 replies; 9+ messages in thread From: Ville Syrjala @ 2020-02-19 20:35 UTC (permalink / raw) To: dri-devel Cc: Neil Armstrong, nouveau, Guido Günther, Andrzej Hajda, Thierry Reding, Laurent Pinchart, Benjamin Gaignard, Sam Ravnborg, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, Ben Skeggs, VMware Graphics, Jagan Teki, Robert Chiras, Linus Walleij, Icenowy Zheng, Jonas Karlman, intel-gfx, Inki Dae, CK Hu, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park, Philipp Zabel From: Ville Syrjälä <ville.syrjala@linux.intel.com> Get rid of mode->vrefresh and just calculate it on demand. Saves a bit of space and avoids the cached value getting out of sync with reality. Mostly done with cocci, with the following manual fixups: - Remove the now empty loop in drm_helper_probe_single_connector_modes() - Fix __MODE() macro in ch7006_mode.c - Fix DRM_MODE_ARG() macro in drm_modes.h - Remove leftover comment from samsung_s6d16d0_mode @@ @@ struct drm_display_mode { ... - int vrefresh; ... }; @@ identifier N; expression E; @@ struct drm_display_mode N = { - .vrefresh = E }; @@ identifier N; expression E; @@ struct drm_display_mode N[...] = { ..., { - .vrefresh = E } ,... }; @@ expression E; @@ { DRM_MODE(...), - .vrefresh = E, } @@ identifier M, R; @@ int drm_mode_vrefresh(const struct drm_display_mode *M) { ... - if (M->vrefresh > 0) - R = M->vrefresh; - else if (...) { ... } ... } @@ struct drm_display_mode *p; expression E; @@ ( - p->vrefresh = E; | - p->vrefresh + drm_mode_vrefresh(p) ) @@ struct drm_display_mode s; expression E; @@ ( - s.vrefresh = E; | - s.vrefresh + drm_mode_vrefresh(&s) ) @@ expression E; @@ - drm_mode_vrefresh(E) ? drm_mode_vrefresh(E) : drm_mode_vrefresh(E) + drm_mode_vrefresh(E) @find_substruct@ identifier X; identifier S; @@ struct X { ... struct drm_display_mode S; ... }; @@ identifier find_substruct.S; expression E; identifier I; @@ { .S = { - .vrefresh = E } } @@ identifier find_substruct.S; identifier find_substruct.X; expression E; identifier I; @@ struct X I[...] = { ..., .S = { - .vrefresh = E } ,... }; Cc: Andrzej Hajda <a.hajda@samsung.com> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com> Cc: Jonas Karlman <jonas@kwiboo.se> Cc: Jernej Skrabec <jernej.skrabec@siol.net> Cc: Inki Dae <inki.dae@samsung.com> Cc: Joonyoung Shim <jy0922.shim@samsung.com> Cc: Seung-Woo Kim <sw0312.kim@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: CK Hu <ck.hu@mediatek.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Jerry Han <hanxu5@huaqin.corp-partner.google.com> Cc: Icenowy Zheng <icenowy@aosc.io> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefan Mavrodiev <stefan@olimex.com> Cc: Robert Chiras <robert.chiras@nxp.com> Cc: "Guido Günther" <agx@sigxcpu.org> Cc: Purism Kernel Team <kernel@puri.sm> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Cc: VMware Graphics <linux-graphics-maintainer@vmware.com> Cc: Thomas Hellstrom <thellstrom@vmware.com> Cc: linux-amlogic@lists.infradead.org Cc: nouveau@lists.freedesktop.org Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> --- drivers/gpu/drm/bridge/sii902x.c | 2 +- drivers/gpu/drm/drm_client_modeset.c | 2 +- drivers/gpu/drm/drm_edid.c | 328 +++++++++--------- drivers/gpu/drm/drm_modes.c | 9 +- drivers/gpu/drm/drm_probe_helper.c | 3 - drivers/gpu/drm/exynos/exynos_hdmi.c | 5 +- drivers/gpu/drm/exynos/exynos_mixer.c | 2 +- drivers/gpu/drm/i2c/ch7006_mode.c | 1 - drivers/gpu/drm/i915/display/intel_display.c | 1 - .../drm/i915/display/intel_display_debugfs.c | 4 +- drivers/gpu/drm/i915/display/intel_dp.c | 10 +- drivers/gpu/drm/i915/display/intel_tv.c | 3 - drivers/gpu/drm/mcde/mcde_dsi.c | 6 +- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 4 +- drivers/gpu/drm/mediatek/mtk_hdmi.c | 2 +- drivers/gpu/drm/meson/meson_venc_cvbs.c | 2 - drivers/gpu/drm/nouveau/nouveau_connector.c | 5 +- drivers/gpu/drm/panel/panel-arm-versatile.c | 4 - drivers/gpu/drm/panel/panel-boe-himax8279d.c | 3 +- .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 6 +- .../gpu/drm/panel/panel-feixin-k101-im2ba02.c | 3 +- .../drm/panel/panel-feiyang-fy07024di26a30d.c | 3 +- drivers/gpu/drm/panel/panel-ilitek-ili9322.c | 7 - drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 3 +- drivers/gpu/drm/panel/panel-innolux-p079zca.c | 4 +- .../gpu/drm/panel/panel-jdi-lt070me05000.c | 3 +- .../drm/panel/panel-kingdisplay-kd097d04.c | 3 +- .../drm/panel/panel-leadtek-ltk500hd1829.c | 3 +- drivers/gpu/drm/panel/panel-lg-lb035q02.c | 1 - drivers/gpu/drm/panel/panel-lg-lg4573.c | 3 +- drivers/gpu/drm/panel/panel-nec-nl8048hl11.c | 1 - drivers/gpu/drm/panel/panel-novatek-nt39016.c | 1 - .../drm/panel/panel-olimex-lcd-olinuxino.c | 1 - .../gpu/drm/panel/panel-orisetech-otm8009a.c | 3 +- .../drm/panel/panel-osd-osd101t2587-53ts.c | 3 +- .../drm/panel/panel-panasonic-vvx10f034n00.c | 3 +- .../drm/panel/panel-raspberrypi-touchscreen.c | 4 +- drivers/gpu/drm/panel/panel-raydium-rm67191.c | 3 +- drivers/gpu/drm/panel/panel-raydium-rm68200.c | 3 +- .../drm/panel/panel-rocktech-jh057n00900.c | 5 +- drivers/gpu/drm/panel/panel-ronbo-rb070d30.c | 1 - drivers/gpu/drm/panel/panel-samsung-s6d16d0.c | 6 - drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c | 4 +- .../gpu/drm/panel/panel-samsung-s6e63j0x03.c | 3 +- drivers/gpu/drm/panel/panel-samsung-s6e63m0.c | 3 +- .../panel/panel-samsung-s6e88a0-ams452ef01.c | 1 - drivers/gpu/drm/panel/panel-seiko-43wvf1g.c | 3 +- .../gpu/drm/panel/panel-sharp-lq101r1sx01.c | 3 +- .../gpu/drm/panel/panel-sharp-ls037v7dw01.c | 1 - .../gpu/drm/panel/panel-sharp-ls043t1le01.c | 3 +- drivers/gpu/drm/panel/panel-simple.c | 85 +---- drivers/gpu/drm/panel/panel-sitronix-st7701.c | 2 +- .../gpu/drm/panel/panel-sitronix-st7789v.c | 3 +- drivers/gpu/drm/panel/panel-sony-acx424akp.c | 2 - drivers/gpu/drm/panel/panel-sony-acx565akm.c | 1 - drivers/gpu/drm/panel/panel-tpo-td028ttec1.c | 1 - drivers/gpu/drm/panel/panel-tpo-td043mtea1.c | 1 - drivers/gpu/drm/panel/panel-tpo-tpg110.c | 5 - drivers/gpu/drm/panel/panel-truly-nt35597.c | 1 - .../gpu/drm/panel/panel-xinpeng-xpp055c272.c | 3 +- drivers/gpu/drm/sti/sti_hda.c | 1 - drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 2 - include/drm/drm_modes.h | 12 +- 63 files changed, 217 insertions(+), 392 deletions(-) diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c index b70e8c5cf2e1..e3fb2aed53d9 100644 --- a/drivers/gpu/drm/bridge/sii902x.c +++ b/drivers/gpu/drm/bridge/sii902x.c @@ -360,7 +360,7 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge, buf[0] = pixel_clock_10kHz & 0xff; buf[1] = pixel_clock_10kHz >> 8; - buf[2] = adj->vrefresh; + buf[2] = drm_mode_vrefresh(adj); buf[3] = 0x00; buf[4] = adj->hdisplay; buf[5] = adj->hdisplay >> 8; diff --git a/drivers/gpu/drm/drm_client_modeset.c b/drivers/gpu/drm/drm_client_modeset.c index 7443114bd713..daca8dd7874e 100644 --- a/drivers/gpu/drm/drm_client_modeset.c +++ b/drivers/gpu/drm/drm_client_modeset.c @@ -186,7 +186,7 @@ drm_connector_pick_cmdline_mode(struct drm_connector *connector) continue; if (cmdline_mode->refresh_specified) { - if (mode->vrefresh != cmdline_mode->refresh) + if (drm_mode_vrefresh(mode) != cmdline_mode->refresh) continue; } diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index ec10dc3e859c..0adf0115df81 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -719,662 +719,662 @@ static const struct drm_display_mode edid_cea_modes_1[] = { { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 2 - 720x480@60Hz 4:3 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 3 - 720x480@60Hz 16:9 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 4 - 1280x720@60Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 5 - 1920x1080i@60Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 6 - 720(1440)x480i@60Hz 4:3 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 7 - 720(1440)x480i@60Hz 16:9 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 8 - 720(1440)x240@60Hz 4:3 */ { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 9 - 720(1440)x240@60Hz 16:9 */ { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 10 - 2880x480i@60Hz 4:3 */ { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 11 - 2880x480i@60Hz 16:9 */ { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 12 - 2880x240@60Hz 4:3 */ { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 13 - 2880x240@60Hz 16:9 */ { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 3204, 3432, 0, 240, 244, 247, 262, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 14 - 1440x480@60Hz 4:3 */ { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 15 - 1440x480@60Hz 16:9 */ { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 1596, 1716, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 16 - 1920x1080@60Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 17 - 720x576@50Hz 4:3 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 18 - 720x576@50Hz 16:9 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 19 - 1280x720@50Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 20 - 1920x1080i@50Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 21 - 720(1440)x576i@50Hz 4:3 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 22 - 720(1440)x576i@50Hz 16:9 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 23 - 720(1440)x288@50Hz 4:3 */ { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 24 - 720(1440)x288@50Hz 16:9 */ { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 25 - 2880x576i@50Hz 4:3 */ { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 26 - 2880x576i@50Hz 16:9 */ { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 27 - 2880x288@50Hz 4:3 */ { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 28 - 2880x288@50Hz 16:9 */ { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 3180, 3456, 0, 288, 290, 293, 312, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 29 - 1440x576@50Hz 4:3 */ { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 30 - 1440x576@50Hz 16:9 */ { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 1592, 1728, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 31 - 1920x1080@50Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 32 - 1920x1080@24Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 33 - 1920x1080@25Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 34 - 1920x1080@30Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 35 - 2880x480@60Hz 4:3 */ { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 36 - 2880x480@60Hz 16:9 */ { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 3192, 3432, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 37 - 2880x576@50Hz 4:3 */ { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 38 - 2880x576@50Hz 16:9 */ { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 3184, 3456, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 39 - 1920x1080i@50Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 40 - 1920x1080i@100Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 41 - 1280x720@100Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 42 - 720x576@100Hz 4:3 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 43 - 720x576@100Hz 16:9 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 44 - 720(1440)x576i@100Hz 4:3 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 45 - 720(1440)x576i@100Hz 16:9 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 46 - 1920x1080i@120Hz 16:9 */ { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 47 - 1280x720@120Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 48 - 720x480@120Hz 4:3 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 49 - 720x480@120Hz 16:9 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 50 - 720(1440)x480i@120Hz 4:3 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 51 - 720(1440)x480i@120Hz 16:9 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 52 - 720x576@200Hz 4:3 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 53 - 720x576@200Hz 16:9 */ { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 796, 864, 0, 576, 581, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 54 - 720(1440)x576i@200Hz 4:3 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 55 - 720(1440)x576i@200Hz 16:9 */ { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 56 - 720x480@240Hz 4:3 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 57 - 720x480@240Hz 16:9 */ { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 798, 858, 0, 480, 489, 495, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 58 - 720(1440)x480i@240Hz 4:3 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, /* 59 - 720(1440)x480i@240Hz 16:9 */ { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), - .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 60 - 1280x720@24Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 61 - 1280x720@25Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 3740, 3960, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 62 - 1280x720@30Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 63 - 1920x1080@120Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 64 - 1920x1080@100Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 65 - 1280x720@24Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 66 - 1280x720@25Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 3740, 3960, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 67 - 1280x720@30Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 68 - 1280x720@50Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 69 - 1280x720@60Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 70 - 1280x720@100Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 1760, 1980, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 71 - 1280x720@120Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 1430, 1650, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 72 - 1920x1080@24Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 73 - 1920x1080@25Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 74 - 1920x1080@30Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 75 - 1920x1080@50Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 76 - 1920x1080@60Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 77 - 1920x1080@100Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 78 - 1920x1080@120Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 79 - 1680x720@24Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040, 3080, 3300, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 80 - 1680x720@25Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908, 2948, 3168, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 81 - 1680x720@30Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380, 2420, 2640, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 82 - 1680x720@50Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940, 1980, 2200, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 83 - 1680x720@60Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940, 1980, 2200, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 84 - 1680x720@100Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740, 1780, 2000, 0, 720, 725, 730, 825, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 85 - 1680x720@120Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740, 1780, 2000, 0, 720, 725, 730, 825, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 86 - 2560x1080@24Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558, 3602, 3750, 0, 1080, 1084, 1089, 1100, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 87 - 2560x1080@25Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008, 3052, 3200, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 88 - 2560x1080@30Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328, 3372, 3520, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 89 - 2560x1080@50Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108, 3152, 3300, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 90 - 2560x1080@60Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808, 2852, 3000, 0, 1080, 1084, 1089, 1100, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 91 - 2560x1080@100Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778, 2822, 2970, 0, 1080, 1084, 1089, 1250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 92 - 2560x1080@120Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108, 3152, 3300, 0, 1080, 1084, 1089, 1250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 93 - 3840x2160@24Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 94 - 3840x2160@25Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 95 - 3840x2160@30Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 96 - 3840x2160@50Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 97 - 3840x2160@60Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 98 - 4096x2160@24Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 99 - 4096x2160@25Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064, 5152, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 100 - 4096x2160@30Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184, 4272, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 101 - 4096x2160@50Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064, 5152, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 102 - 4096x2160@60Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184, 4272, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 103 - 3840x2160@24Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 104 - 3840x2160@25Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 105 - 3840x2160@30Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 106 - 3840x2160@50Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 107 - 3840x2160@60Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 108 - 1280x720@48Hz 16:9 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240, 2280, 2500, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 109 - 1280x720@48Hz 64:27 */ { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240, 2280, 2500, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 110 - 1680x720@48Hz 64:27 */ { DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 2490, 2530, 2750, 0, 720, 725, 730, 750, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 111 - 1920x1080@48Hz 16:9 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 112 - 1920x1080@48Hz 64:27 */ { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558, 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 113 - 2560x1080@48Hz 64:27 */ { DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 3558, 3602, 3750, 0, 1080, 1084, 1089, 1100, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 114 - 3840x2160@48Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 115 - 4096x2160@48Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 116 - 3840x2160@48Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 117 - 3840x2160@100Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 118 - 3840x2160@120Hz 16:9 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 119 - 3840x2160@100Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 120 - 3840x2160@120Hz 64:27 */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 121 - 5120x2160@24Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 7116, 7204, 7500, 0, 2160, 2168, 2178, 2200, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 122 - 5120x2160@25Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 6816, 6904, 7200, 0, 2160, 2168, 2178, 2200, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 123 - 5120x2160@30Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 5784, 5872, 6000, 0, 2160, 2168, 2178, 2200, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 124 - 5120x2160@48Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5866, 5954, 6250, 0, 2160, 2168, 2178, 2475, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 125 - 5120x2160@50Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 6216, 6304, 6600, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 126 - 5120x2160@60Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5284, 5372, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 127 - 5120x2160@100Hz 64:27 */ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 6216, 6304, 6600, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, }; /* @@ -1387,137 +1387,137 @@ static const struct drm_display_mode edid_cea_modes_193[] = { { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284, 5372, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 194 - 7680x4320@24Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 195 - 7680x4320@25Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 196 - 7680x4320@30Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 197 - 7680x4320@48Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 198 - 7680x4320@50Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 199 - 7680x4320@60Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 200 - 7680x4320@100Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792, 9968, 10560, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 201 - 7680x4320@120Hz 16:9 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032, 8208, 8800, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 202 - 7680x4320@24Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 203 - 7680x4320@25Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 204 - 7680x4320@30Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 205 - 7680x4320@48Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232, 10408, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 206 - 7680x4320@50Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032, 10208, 10800, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 207 - 7680x4320@60Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232, 8408, 9000, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 208 - 7680x4320@100Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792, 9968, 10560, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 209 - 7680x4320@120Hz 64:27 */ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032, 8208, 8800, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 210 - 10240x4320@24Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732, 11908, 12500, 0, 4320, 4336, 4356, 4950, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 211 - 10240x4320@25Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732, 12908, 13500, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 212 - 10240x4320@30Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528, 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 213 - 10240x4320@48Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732, 11908, 12500, 0, 4320, 4336, 4356, 4950, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 214 - 10240x4320@50Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732, 12908, 13500, 0, 4320, 4336, 4356, 4400, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 215 - 10240x4320@60Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528, 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 216 - 10240x4320@100Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432, 12608, 13200, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 217 - 10240x4320@120Hz 64:27 */ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528, 10704, 11000, 0, 4320, 4336, 4356, 4500, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, }, /* 218 - 4096x2160@100Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, /* 219 - 4096x2160@120Hz 256:135 */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184, 4272, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, }; /* @@ -1531,25 +1531,25 @@ static const struct drm_display_mode edid_4k_modes[] = { 3840, 4016, 4104, 4400, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 2 - 3840x2160@25Hz */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896, 4984, 5280, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 3 - 3840x2160@24Hz */ { DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, /* 4 - 4096x2160@24Hz (SMPTE) */ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116, 5204, 5500, 0, 2160, 2168, 2178, 2250, 0, DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), - .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, + .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, }, }; /*** DDC fetch and block validation ***/ @@ -2152,10 +2152,8 @@ static void edid_fixup_preferred(struct drm_connector *connector, if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) preferred_mode = cur_mode; - cur_vrefresh = cur_mode->vrefresh ? - cur_mode->vrefresh : drm_mode_vrefresh(cur_mode); - preferred_vrefresh = preferred_mode->vrefresh ? - preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode); + cur_vrefresh = drm_mode_vrefresh(cur_mode); + preferred_vrefresh = drm_mode_vrefresh(preferred_mode); /* At a given size, try to get closest to target refresh */ if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) < @@ -2652,7 +2650,6 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, } mode->type = DRM_MODE_TYPE_DRIVER; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_set_name(mode); return mode; @@ -3284,7 +3281,7 @@ cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) { unsigned int clock = cea_mode->clock; - if (cea_mode->vrefresh % 6 != 0) + if (drm_mode_vrefresh(cea_mode) % 6 != 0) return clock; /* @@ -3611,8 +3608,6 @@ drm_display_mode_from_vic_index(struct drm_connector *connector, if (!newmode) return NULL; - newmode->vrefresh = 0; - return newmode; } @@ -5095,7 +5090,6 @@ static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *d if (timings->flags & 0x80) mode->type |= DRM_MODE_TYPE_PREFERRED; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_set_name(mode); return mode; diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c index fe7e872a6239..0e7c9ba241c4 100644 --- a/drivers/gpu/drm/drm_modes.c +++ b/drivers/gpu/drm/drm_modes.c @@ -775,9 +775,7 @@ int drm_mode_vrefresh(const struct drm_display_mode *mode) { int refresh = 0; - if (mode->vrefresh > 0) - refresh = mode->vrefresh; - else if (mode->htotal > 0 && mode->vtotal > 0) { + if (mode->htotal > 0 && mode->vtotal > 0) { unsigned int num, den; num = mode->clock * 1000; @@ -1324,7 +1322,7 @@ static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head if (diff) return diff; - diff = b->vrefresh - a->vrefresh; + diff = drm_mode_vrefresh(b) - drm_mode_vrefresh(a); if (diff) return diff; @@ -1937,7 +1935,7 @@ void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out, out->vsync_end = in->vsync_end; out->vtotal = in->vtotal; out->vscan = in->vscan; - out->vrefresh = in->vrefresh; + out->vrefresh = drm_mode_vrefresh(in); out->flags = in->flags; out->type = in->type; @@ -1997,7 +1995,6 @@ int drm_mode_convert_umode(struct drm_device *dev, out->vsync_end = in->vsync_end; out->vtotal = in->vtotal; out->vscan = in->vscan; - out->vrefresh = in->vrefresh; out->flags = in->flags; /* * Old xf86-video-vmware (possibly others too) used to diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c index 576b4b7dcd89..f4ae2752b652 100644 --- a/drivers/gpu/drm/drm_probe_helper.c +++ b/drivers/gpu/drm/drm_probe_helper.c @@ -532,9 +532,6 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, if (list_empty(&connector->modes)) return 0; - list_for_each_entry(mode, &connector->modes, head) - mode->vrefresh = drm_mode_vrefresh(mode); - drm_mode_sort(&connector->modes); DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id, diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 9ff921f43a93..95f083f662cb 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c @@ -920,7 +920,8 @@ static int hdmi_mode_valid(struct drm_connector *connector, DRM_DEV_DEBUG_KMS(hdata->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n", - mode->hdisplay, mode->vdisplay, mode->vrefresh, + mode->hdisplay, mode->vdisplay, + drm_mode_vrefresh(mode), (mode->flags & DRM_MODE_FLAG_INTERLACE) ? true : false, mode->clock * 1000); @@ -1019,7 +1020,7 @@ static bool hdmi_mode_fixup(struct drm_encoder *encoder, DRM_DEV_DEBUG_KMS(dev->dev, "Adjusted Mode: [%d]x[%d] [%d]Hz\n", m->hdisplay, m->vdisplay, - m->vrefresh); + drm_mode_vrefresh(m)); drm_mode_copy(adjusted_mode, m); break; diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 38ae9c32feef..adc14e9cd34f 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c @@ -1043,7 +1043,7 @@ static int mixer_mode_valid(struct exynos_drm_crtc *crtc, u32 w = mode->hdisplay, h = mode->vdisplay; DRM_DEV_DEBUG_KMS(ctx->dev, "xres=%d, yres=%d, refresh=%d, intl=%d\n", - w, h, mode->vrefresh, + w, h, drm_mode_vrefresh(mode), !!(mode->flags & DRM_MODE_FLAG_INTERLACE)); if (ctx->mxr_ver == MXR_VER_128_0_0_184) diff --git a/drivers/gpu/drm/i2c/ch7006_mode.c b/drivers/gpu/drm/i2c/ch7006_mode.c index bb5f67f10edb..6afe6d0ee630 100644 --- a/drivers/gpu/drm/i2c/ch7006_mode.c +++ b/drivers/gpu/drm/i2c/ch7006_mode.c @@ -121,7 +121,6 @@ const struct ch7006_tv_norm_info ch7006_tv_norms[] = { .vscan = 0, \ .flags = DRM_MODE_FLAG_##hsynp##HSYNC | \ DRM_MODE_FLAG_##vsynp##VSYNC, \ - .vrefresh = 0, \ }, \ .enc_hdisp = e_hd, \ .enc_vdisp = e_vd, \ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index fab914819489..916623636c47 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -8867,7 +8867,6 @@ void intel_mode_from_pipe_config(struct drm_display_mode *mode, mode->clock = pipe_config->hw.adjusted_mode.crtc_clock; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_set_name(mode); } diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 46954cc7b6c0..3238a73d2402 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -1099,10 +1099,10 @@ static void drrs_status_per_crtc(struct seq_file *m, seq_puts(m, "\n\t\t"); if (drrs->refresh_rate_type == DRRS_HIGH_RR) { seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n"); - vrefresh = panel->fixed_mode->vrefresh; + vrefresh = drm_mode_vrefresh(panel->fixed_mode); } else if (drrs->refresh_rate_type == DRRS_LOW_RR) { seq_puts(m, "DRRS_State: DRRS_LOW_RR\n"); - vrefresh = panel->downclock_mode->vrefresh; + vrefresh = drm_mode_vrefresh(panel->downclock_mode); } else { seq_printf(m, "DRRS_State: Unknown(%d)\n", drrs->refresh_rate_type); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f9e1361460d8..02cad9941427 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -7030,7 +7030,7 @@ static void intel_dp_set_drrs_state(struct drm_i915_private *dev_priv, return; } - if (intel_dp->attached_connector->panel.downclock_mode->vrefresh == + if (drm_mode_vrefresh(intel_dp->attached_connector->panel.downclock_mode) == refresh_rate) index = DRRS_LOW_RR; @@ -7143,7 +7143,7 @@ void intel_edp_drrs_disable(struct intel_dp *intel_dp, if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) intel_dp_set_drrs_state(dev_priv, old_crtc_state, - intel_dp->attached_connector->panel.fixed_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode)); dev_priv->drrs.dp = NULL; mutex_unlock(&dev_priv->drrs.mutex); @@ -7176,7 +7176,7 @@ static void intel_edp_drrs_downclock_work(struct work_struct *work) struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc; intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, - intel_dp->attached_connector->panel.downclock_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.downclock_mode)); } unlock: @@ -7222,7 +7222,7 @@ void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv, /* invalidate means busy screen hence upclock */ if (frontbuffer_bits && dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, - intel_dp->attached_connector->panel.fixed_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode)); mutex_unlock(&dev_priv->drrs.mutex); } @@ -7268,7 +7268,7 @@ void intel_edp_drrs_flush(struct drm_i915_private *dev_priv, /* flush means busy screen hence upclock */ if (frontbuffer_bits && dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) intel_dp_set_drrs_state(dev_priv, to_intel_crtc(crtc)->config, - intel_dp->attached_connector->panel.fixed_mode->vrefresh); + drm_mode_vrefresh(intel_dp->attached_connector->panel.fixed_mode)); /* * flush also means no more activity hence schedule downclock, if all diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c index 4f81ee26b7ab..067ff1f61f30 100644 --- a/drivers/gpu/drm/i915/display/intel_tv.c +++ b/drivers/gpu/drm/i915/display/intel_tv.c @@ -1037,9 +1037,6 @@ intel_tv_mode_to_mode(struct drm_display_mode *mode, /* TV has it's own notion of sync and other mode flags, so clear them. */ mode->flags = 0; - mode->vrefresh = 0; - mode->vrefresh = drm_mode_vrefresh(mode); - snprintf(mode->name, sizeof(mode->name), "%dx%d%c (%s)", mode->hdisplay, mode->vdisplay, diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c index bb6528b01cd0..6dca5344c0b3 100644 --- a/drivers/gpu/drm/mcde/mcde_dsi.c +++ b/drivers/gpu/drm/mcde/mcde_dsi.c @@ -538,7 +538,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, */ /* (ps/s) / (pixels/s) = ps/pixels */ pclk = DIV_ROUND_UP_ULL(1000000000000, - (mode->vrefresh * mode->htotal * mode->vtotal)); + (drm_mode_vrefresh(mode) * mode->htotal * mode->vtotal)); dev_dbg(d->dev, "picoseconds between two pixels: %llu\n", pclk); @@ -568,7 +568,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, bpl *= d->mdsi->lanes; dev_dbg(d->dev, "calculated bytes per line: %llu @ %d Hz with HS %lu Hz\n", - bpl, mode->vrefresh, d->mdsi->hs_rate); + bpl, drm_mode_vrefresh(mode), d->mdsi->hs_rate); /* * 6 is header + checksum, header = 4 bytes, checksum = 2 bytes @@ -644,7 +644,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, dev_err(d->dev, "video block does not fit on line!\n"); dev_err(d->dev, "calculated bytes per line: %llu @ %d Hz\n", - bpl, mode->vrefresh); + bpl, drm_mode_vrefresh(mode)); dev_err(d->dev, "bytes per line (blkline_pck) %u bytes\n", blkline_pck); diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c index 0dfcd1787e65..acf5ff40baf9 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c @@ -164,7 +164,7 @@ static void mtk_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) state->pending_width = crtc->mode.hdisplay; state->pending_height = crtc->mode.vdisplay; - state->pending_vrefresh = crtc->mode.vrefresh; + state->pending_vrefresh = drm_mode_vrefresh(&crtc->mode); wmb(); /* Make sure the above parameters are set before update */ state->pending_config = true; } @@ -263,7 +263,7 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) width = crtc->state->adjusted_mode.hdisplay; height = crtc->state->adjusted_mode.vdisplay; - vrefresh = crtc->state->adjusted_mode.vrefresh; + vrefresh = drm_mode_vrefresh(&crtc->state->adjusted_mode); drm_for_each_encoder(encoder, crtc->dev) { if (encoder->crtc != crtc) diff --git a/drivers/gpu/drm/mediatek/mtk_hdmi.c b/drivers/gpu/drm/mediatek/mtk_hdmi.c index 5e4a4dbda443..e8f52a769e2f 100644 --- a/drivers/gpu/drm/mediatek/mtk_hdmi.c +++ b/drivers/gpu/drm/mediatek/mtk_hdmi.c @@ -1241,7 +1241,7 @@ static int mtk_hdmi_conn_mode_valid(struct drm_connector *conn, struct drm_bridge *next_bridge; dev_dbg(hdmi->dev, "xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n", - mode->hdisplay, mode->vdisplay, mode->vrefresh, + mode->hdisplay, mode->vdisplay, drm_mode_vrefresh(mode), !!(mode->flags & DRM_MODE_FLAG_INTERLACE), mode->clock * 1000); next_bridge = drm_bridge_get_next_bridge(&hdmi->bridge); diff --git a/drivers/gpu/drm/meson/meson_venc_cvbs.c b/drivers/gpu/drm/meson/meson_venc_cvbs.c index 1bd6b6d15ffb..911ed1b35561 100644 --- a/drivers/gpu/drm/meson/meson_venc_cvbs.c +++ b/drivers/gpu/drm/meson/meson_venc_cvbs.c @@ -48,7 +48,6 @@ struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, DRM_MODE_FLAG_INTERLACE), - .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, }, @@ -58,7 +57,6 @@ struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, DRM_MODE_FLAG_INTERLACE), - .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, }, diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 9a9a7f5003d3..ac80b1ac459c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c @@ -59,7 +59,6 @@ nouveau_conn_native_mode(struct drm_connector *connector) int high_w = 0, high_h = 0, high_v = 0; list_for_each_entry(mode, &connector->probed_modes, head) { - mode->vrefresh = drm_mode_vrefresh(mode); if (helper->mode_valid(connector, mode) != MODE_OK || (mode->flags & DRM_MODE_FLAG_INTERLACE)) continue; @@ -80,12 +79,12 @@ nouveau_conn_native_mode(struct drm_connector *connector) continue; if (mode->hdisplay == high_w && mode->vdisplay == high_h && - mode->vrefresh < high_v) + drm_mode_vrefresh(mode) < high_v) continue; high_w = mode->hdisplay; high_h = mode->vdisplay; - high_v = mode->vrefresh; + high_v = drm_mode_vrefresh(mode); largest = mode; } diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c index 41444a73c980..47b37fef7ee8 100644 --- a/drivers/gpu/drm/panel/panel-arm-versatile.c +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c @@ -143,7 +143,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 240 + 5, .vsync_end = 240 + 5 + 6, .vtotal = 240 + 5 + 6 + 5, - .vrefresh = 116, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, }, @@ -167,7 +166,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 480 + 11, .vsync_end = 480 + 11 + 2, .vtotal = 480 + 11 + 2 + 32, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, }, @@ -190,7 +188,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 220 + 0, .vsync_end = 220 + 0 + 2, .vtotal = 220 + 0 + 2 + 1, - .vrefresh = 390, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, @@ -214,7 +211,6 @@ static const struct versatile_panel_type versatile_panels[] = { .vsync_start = 320 + 2, .vsync_end = 320 + 2 + 2, .vtotal = 320 + 2 + 2 + 2, - .vrefresh = 116, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, diff --git a/drivers/gpu/drm/panel/panel-boe-himax8279d.c b/drivers/gpu/drm/panel/panel-boe-himax8279d.c index 74d58ee7d04c..7c27bd5e3486 100644 --- a/drivers/gpu/drm/panel/panel-boe-himax8279d.c +++ b/drivers/gpu/drm/panel/panel-boe-himax8279d.c @@ -229,7 +229,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { DRM_DEV_ERROR(pinfo->base.dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); return -ENOMEM; } @@ -262,7 +262,6 @@ static const struct drm_display_mode default_display_mode = { .vsync_start = 1920 + 10, .vsync_end = 1920 + 10 + 14, .vtotal = 1920 + 10 + 14 + 4, - .vrefresh = 60, }; /* 8 inch */ diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 48a164257d18..c580bd1e121c 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -594,7 +594,6 @@ static const struct drm_display_mode boe_tv101wum_nl6_default_mode = { .vsync_start = 1920 + 10, .vsync_end = 1920 + 10 + 14, .vtotal = 1920 + 10 + 14 + 4, - .vrefresh = 60, }; static const struct panel_desc boe_tv101wum_nl6_desc = { @@ -622,7 +621,6 @@ static const struct drm_display_mode auo_kd101n80_45na_default_mode = { .vsync_start = 1920 + 16, .vsync_end = 1920 + 16 + 4, .vtotal = 1920 + 16 + 4 + 16, - .vrefresh = 60, }; static const struct panel_desc auo_kd101n80_45na_desc = { @@ -650,7 +648,6 @@ static const struct drm_display_mode boe_tv101wum_n53_default_mode = { .vsync_start = 1920 + 20, .vsync_end = 1920 + 20 + 4, .vtotal = 1920 + 20 + 4 + 10, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; @@ -678,7 +675,6 @@ static const struct drm_display_mode auo_b101uan08_3_default_mode = { .vsync_start = 1920 + 34, .vsync_end = 1920 + 34 + 2, .vtotal = 1920 + 34 + 2 + 24, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; @@ -706,7 +702,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c index fddbfddf6566..54610651ecdb 100644 --- a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c +++ b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c @@ -392,7 +392,6 @@ static int k101_im2ba02_unprepare(struct drm_panel *panel) static const struct drm_display_mode k101_im2ba02_default_mode = { .clock = 70000, - .vrefresh = 60, .hdisplay = 800, .hsync_start = 800 + 20, @@ -420,7 +419,7 @@ static int k101_im2ba02_get_modes(struct drm_panel *panel, DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", k101_im2ba02_default_mode.hdisplay, k101_im2ba02_default_mode.vdisplay, - k101_im2ba02_default_mode.vrefresh); + drm_mode_vrefresh(&k101_im2ba02_default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c index 95b789ab9d29..19a6274b10f5 100644 --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c @@ -153,7 +153,6 @@ static const struct drm_display_mode feiyang_default_mode = { .vsync_start = 600 + 12, .vsync_end = 600 + 12 + 2, .vtotal = 600 + 12 + 2 + 21, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, }; @@ -169,7 +168,7 @@ static int feiyang_get_modes(struct drm_panel *panel, DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", feiyang_default_mode.hdisplay, feiyang_default_mode.vdisplay, - feiyang_default_mode.vrefresh); + drm_mode_vrefresh(&feiyang_default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c index f394d53a7da4..d2c98d381bef 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c @@ -549,7 +549,6 @@ static const struct drm_display_mode srgb_320x240_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 1, .vtotal = 262, - .vrefresh = 60, .flags = 0, }; @@ -563,7 +562,6 @@ static const struct drm_display_mode srgb_360x240_mode = { .vsync_start = 240 + 21, .vsync_end = 240 + 21 + 1, .vtotal = 262, - .vrefresh = 60, .flags = 0, }; @@ -578,7 +576,6 @@ static const struct drm_display_mode prgb_320x240_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 1, .vtotal = 262, - .vrefresh = 60, .flags = 0, }; @@ -593,7 +590,6 @@ static const struct drm_display_mode yuv_640x320_mode = { .vsync_start = 320 + 4, .vsync_end = 320 + 4 + 1, .vtotal = 320 + 4 + 1 + 18, - .vrefresh = 60, .flags = 0, }; @@ -607,7 +603,6 @@ static const struct drm_display_mode yuv_720x360_mode = { .vsync_start = 360 + 4, .vsync_end = 360 + 4 + 1, .vtotal = 360 + 4 + 1 + 18, - .vrefresh = 60, .flags = 0, }; @@ -622,7 +617,6 @@ static const struct drm_display_mode itu_r_bt_656_640_mode = { .vsync_start = 480 + 4, .vsync_end = 480 + 4 + 1, .vtotal = 500, - .vrefresh = 60, .flags = 0, }; @@ -637,7 +631,6 @@ static const struct drm_display_mode itu_r_bt_656_720_mode = { .vsync_start = 480 + 4, .vsync_end = 480 + 4 + 1, .vtotal = 500, - .vrefresh = 60, .flags = 0, }; diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c index f54077c216a3..3ed8635a6fbd 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -370,7 +370,6 @@ static int ili9881c_unprepare(struct drm_panel *panel) static const struct drm_display_mode bananapi_default_mode = { .clock = 62000, - .vrefresh = 60, .hdisplay = 720, .hsync_start = 720 + 10, @@ -394,7 +393,7 @@ static int ili9881c_get_modes(struct drm_panel *panel, dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", bananapi_default_mode.hdisplay, bananapi_default_mode.vdisplay, - bananapi_default_mode.vrefresh); + drm_mode_vrefresh(&bananapi_default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c b/drivers/gpu/drm/panel/panel-innolux-p079zca.c index 7419f1f0acee..fdf030f4cf92 100644 --- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c +++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c @@ -223,7 +223,6 @@ static const struct drm_display_mode innolux_p079zca_mode = { .vsync_start = 1024 + 20, .vsync_end = 1024 + 20 + 4, .vtotal = 1024 + 20 + 4 + 20, - .vrefresh = 60, }; static const struct panel_desc innolux_p079zca_panel_desc = { @@ -257,7 +256,6 @@ static const struct drm_display_mode innolux_p097pfg_mode = { .vsync_start = 2048 + 100, .vsync_end = 2048 + 100 + 2, .vtotal = 2048 + 100 + 2 + 18, - .vrefresh = 60, }; /* @@ -401,7 +399,7 @@ static int innolux_panel_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c index 4bfd8c877c8e..1e3fd6633981 100644 --- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c +++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c @@ -296,7 +296,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1920 + 3, .vsync_end = 1920 + 3 + 5, .vtotal = 1920 + 3 + 5 + 6, - .vrefresh = 60, .flags = 0, }; @@ -311,7 +310,7 @@ static int jdi_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c index bac1a2a06c92..0d397af23afe 100644 --- a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c +++ b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c @@ -318,7 +318,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 2048 + 95, .vsync_end = 2048 + 95 + 2, .vtotal = 2048 + 95 + 2 + 23, - .vrefresh = 60, }; static int kingdisplay_panel_get_modes(struct drm_panel *panel, @@ -330,7 +329,7 @@ static int kingdisplay_panel_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c index 76ecf2de9c44..c39e7f6f5c2d 100644 --- a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c +++ b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c @@ -376,7 +376,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1280 + 30, .vsync_end = 1280 + 30 + 4, .vtotal = 1280 + 30 + 4 + 12, - .vrefresh = 60, .clock = 41600, .width_mm = 62, .height_mm = 110, @@ -392,7 +391,7 @@ static int ltk500hd1829_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(ctx->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-lg-lb035q02.c b/drivers/gpu/drm/panel/panel-lg-lb035q02.c index e90efeaba4ad..14456b9cd5c0 100644 --- a/drivers/gpu/drm/panel/panel-lg-lb035q02.c +++ b/drivers/gpu/drm/panel/panel-lg-lb035q02.c @@ -134,7 +134,6 @@ static const struct drm_display_mode lb035q02_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 2, .vtotal = 240 + 4 + 2 + 18, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 70, diff --git a/drivers/gpu/drm/panel/panel-lg-lg4573.c b/drivers/gpu/drm/panel/panel-lg-lg4573.c index b262b53dbd85..497f3b888a1d 100644 --- a/drivers/gpu/drm/panel/panel-lg-lg4573.c +++ b/drivers/gpu/drm/panel/panel-lg-lg4573.c @@ -206,7 +206,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 800 + 15, .vsync_end = 800 + 15 + 15, .vtotal = 800 + 15 + 15 + 15, - .vrefresh = 60, }; static int lg4573_get_modes(struct drm_panel *panel, @@ -218,7 +217,7 @@ static int lg4573_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c index c4f83f6384e1..f894971c1c7c 100644 --- a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c +++ b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c @@ -116,7 +116,6 @@ static const struct drm_display_mode nl8048_mode = { .vsync_start = 480 + 3, .vsync_end = 480 + 3 + 1, .vtotal = 480 + 3 + 1 + 4, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 89, diff --git a/drivers/gpu/drm/panel/panel-novatek-nt39016.c b/drivers/gpu/drm/panel/panel-novatek-nt39016.c index a470810f7dbe..4b545e081b1e 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt39016.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt39016.c @@ -327,7 +327,6 @@ static const struct nt39016_panel_info kd035g6_info = { .vsync_start = 240 + 5, .vsync_end = 240 + 5 + 1, .vtotal = 240 + 5 + 1 + 4, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }, .width_mm = 71, diff --git a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c index 09deb99981a4..ecd76b5391d3 100644 --- a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c +++ b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c @@ -170,7 +170,6 @@ static int lcd_olinuxino_get_modes(struct drm_panel *panel, lcd_mode->vpw; mode->vtotal = lcd_mode->vactive + lcd_mode->vfp + lcd_mode->vpw + lcd_mode->vbp; - mode->vrefresh = lcd_mode->refresh; /* Always make the first mode preferred */ if (i == 0) diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c index bb0c992171e8..895ee3d1371e 100644 --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c @@ -81,7 +81,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 800 + 15, .vsync_end = 800 + 15 + 10, .vtotal = 800 + 15 + 10 + 14, - .vrefresh = 50, .flags = 0, .width_mm = 52, .height_mm = 86, @@ -358,7 +357,7 @@ static int otm8009a_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c index 3a0229d60095..11b3d01aca56 100644 --- a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c +++ b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c @@ -102,7 +102,6 @@ static const struct drm_display_mode default_mode_osd101t2587 = { .vsync_start = 1200 + 24, .vsync_end = 1200 + 24 + 6, .vtotal = 1200 + 24 + 6 + 48, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -117,7 +116,7 @@ static int osd101t2587_panel_get_modes(struct drm_panel *panel, dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", osd101t2587->default_mode->hdisplay, osd101t2587->default_mode->vdisplay, - osd101t2587->default_mode->vrefresh); + drm_mode_vrefresh(osd101t2587->default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c index 69693451462e..627dfcf8adb4 100644 --- a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c +++ b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c @@ -149,7 +149,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1200 + 24, .vsync_end = 1200 + 24 + 6, .vtotal = 1200 + 24 + 6 + 48, - .vrefresh = 60, }; static int wuxga_nt_panel_get_modes(struct drm_panel *panel, @@ -161,7 +160,7 @@ static int wuxga_nt_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c index 8f078b7dd89e..e50ee26474cf 100644 --- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c +++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c @@ -209,7 +209,6 @@ static const struct drm_display_mode rpi_touchscreen_modes[] = { .vsync_start = 480 + 7, .vsync_end = 480 + 7 + 2, .vtotal = 480 + 7 + 2 + 21, - .vrefresh = 60, }, }; @@ -322,7 +321,8 @@ static int rpi_touchscreen_get_modes(struct drm_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, + drm_mode_vrefresh(m)); continue; } diff --git a/drivers/gpu/drm/panel/panel-raydium-rm67191.c b/drivers/gpu/drm/panel/panel-raydium-rm67191.c index 313637d53d28..d001c52e0ca9 100644 --- a/drivers/gpu/drm/panel/panel-raydium-rm67191.c +++ b/drivers/gpu/drm/panel/panel-raydium-rm67191.c @@ -218,7 +218,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1920 + 10, .vsync_end = 1920 + 10 + 2, .vtotal = 1920 + 10 + 2 + 4, - .vrefresh = 60, .width_mm = 68, .height_mm = 121, .flags = DRM_MODE_FLAG_NHSYNC | @@ -445,7 +444,7 @@ static int rad_panel_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c index e8982948e0ea..81ae8be62d15 100644 --- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c +++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c @@ -92,7 +92,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1280 + 12, .vsync_end = 1280 + 12 + 4, .vtotal = 1280 + 12 + 4 + 12, - .vrefresh = 50, .flags = 0, .width_mm = 68, .height_mm = 122, @@ -339,7 +338,7 @@ static int rm68200_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c index 38ff742bc120..da4e373291f9 100644 --- a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c +++ b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c @@ -223,7 +223,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1440 + 20, .vsync_end = 1440 + 20 + 4, .vtotal = 1440 + 20 + 4 + 12, - .vrefresh = 60, .clock = 75276, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 65, @@ -240,7 +239,7 @@ static int jh057n_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } @@ -360,7 +359,7 @@ static int jh057n_probe(struct mipi_dsi_device *dsi) DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh, + drm_mode_vrefresh(&default_mode), mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); jh057n_debugfs_init(ctx); diff --git a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c index ef18559e237e..a7b0b3e39e1a 100644 --- a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c +++ b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c @@ -103,7 +103,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 600 + 12, .vsync_end = 600 + 12 + 10, .vtotal = 600 + 12 + 10 + 13, - .vrefresh = 60, .width_mm = 154, .height_mm = 85, diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c index 2150043dcf6b..f02645d396ac 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c @@ -37,12 +37,6 @@ static const struct drm_display_mode samsung_s6d16d0_mode = { .vsync_start = 480 + 1, .vsync_end = 480 + 1 + 1, .vtotal = 480 + 1 + 1 + 1, - /* - * This depends on the clocking HS vs LP rate, this value - * is calculated as: - * vrefresh = (clock * 1000) / (htotal*vtotal) - */ - .vrefresh = 816, .width_mm = 84, .height_mm = 48, }; diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c index 36ebd5a4ac7b..80ef122e7466 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c @@ -617,7 +617,6 @@ static const struct drm_display_mode s6e3ha2_mode = { .vsync_start = 2560 + 1, .vsync_end = 2560 + 1 + 1, .vtotal = 2560 + 1 + 1 + 15, - .vrefresh = 60, .flags = 0, }; @@ -636,7 +635,6 @@ static const struct drm_display_mode s6e3hf2_mode = { .vsync_start = 2560 + 1, .vsync_end = 2560 + 1 + 1, .vtotal = 2560 + 1 + 1 + 15, - .vrefresh = 60, .flags = 0, }; @@ -655,7 +653,7 @@ static int s6e3ha2_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, - ctx->desc->mode->vrefresh); + drm_mode_vrefresh(ctx->desc->mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c index a3570e0a90a8..1247656d73bf 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c @@ -52,7 +52,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 320 + 150, .vsync_end = 320 + 150 + 1, .vtotal = 320 + 150 + 1 + 2, - .vrefresh = 30, .flags = 0, }; @@ -409,7 +408,7 @@ static int s6e63j0x03_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c index a5f76eb4fa25..64421347bfd4 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c @@ -117,7 +117,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 800 + 28, .vsync_end = 800 + 28 + 2, .vtotal = 800 + 28 + 2 + 1, - .vrefresh = 60, .width_mm = 53, .height_mm = 89, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, @@ -371,7 +370,7 @@ static int s6e63m0_get_modes(struct drm_panel *panel, if (!mode) { DRM_ERROR("failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c index 9d843fcc3a22..485eabecfcc9 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c @@ -177,7 +177,6 @@ static const struct drm_display_mode s6e88a0_ams452ef01_mode = { .vsync_start = 960 + 14, .vsync_end = 960 + 14 + 2, .vtotal = 960 + 14 + 2 + 8, - .vrefresh = 60, .width_mm = 56, .height_mm = 100, }; diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c index 40fcbbbacb2c..e417dc4921c2 100644 --- a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c +++ b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c @@ -92,7 +92,8 @@ static int seiko_panel_get_fixed_modes(struct seiko_panel *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, + drm_mode_vrefresh(m)); continue; } diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c index b5d1977221a7..f07324b705b3 100644 --- a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c +++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c @@ -269,7 +269,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1600 + 4, .vsync_end = 1600 + 4 + 8, .vtotal = 1600 + 4 + 8 + 32, - .vrefresh = 60, }; static int sharp_panel_get_modes(struct drm_panel *panel, @@ -281,7 +280,7 @@ static int sharp_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c index 1cf3f02435c1..d7bf13b9e1d6 100644 --- a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c +++ b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c @@ -93,7 +93,6 @@ static const struct drm_display_mode ls037v7dw01_mode = { .vsync_start = 640 + 1, .vsync_end = 640 + 1 + 1, .vtotal = 640 + 1 + 1 + 1, - .vrefresh = 58, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 56, diff --git a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c index ce586c6d70c7..b2e58935529c 100644 --- a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c +++ b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c @@ -201,7 +201,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 960 + 3, .vsync_end = 960 + 3 + 15, .vtotal = 960 + 3 + 15 + 1, - .vrefresh = 60, }; static int sharp_nt_panel_get_modes(struct drm_panel *panel, @@ -213,7 +212,7 @@ static int sharp_nt_panel_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 82363d05bad4..9ba9d69df41b 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -161,7 +161,8 @@ static unsigned int panel_simple_get_display_modes(struct panel_simple *panel, mode = drm_mode_duplicate(connector->dev, m); if (!mode) { dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", - m->hdisplay, m->vdisplay, m->vrefresh); + m->hdisplay, m->vdisplay, + drm_mode_vrefresh(m)); continue; } @@ -494,7 +495,6 @@ static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -519,7 +519,6 @@ static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = { .vsync_start = 480 + 2, .vsync_end = 480 + 2 + 45, .vtotal = 480 + 2 + 45 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -570,7 +569,6 @@ static const struct drm_display_mode auo_b101aw03_mode = { .vsync_start = 600 + 16, .vsync_end = 600 + 16 + 6, .vtotal = 600 + 16 + 6 + 16, - .vrefresh = 60, }; static const struct panel_desc auo_b101aw03 = { @@ -615,7 +613,6 @@ static const struct drm_display_mode auo_b101xtn01_mode = { .vsync_start = 768 + 14, .vsync_end = 768 + 14 + 42, .vtotal = 768 + 14 + 42, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -639,7 +636,6 @@ static const struct drm_display_mode auo_b116xak01_mode = { .vsync_start = 768 + 4, .vsync_end = 768 + 4 + 6, .vtotal = 768 + 4 + 6 + 15, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -668,7 +664,6 @@ static const struct drm_display_mode auo_b116xw03_mode = { .vsync_start = 768 + 10, .vsync_end = 768 + 10 + 12, .vtotal = 768 + 10 + 12 + 6, - .vrefresh = 60, }; static const struct panel_desc auo_b116xw03 = { @@ -691,7 +686,6 @@ static const struct drm_display_mode auo_b133xtn01_mode = { .vsync_start = 768 + 3, .vsync_end = 768 + 3 + 6, .vtotal = 768 + 3 + 6 + 13, - .vrefresh = 60, }; static const struct panel_desc auo_b133xtn01 = { @@ -714,7 +708,6 @@ static const struct drm_display_mode auo_b133htn01_mode = { .vsync_start = 1080 + 25, .vsync_end = 1080 + 25 + 10, .vtotal = 1080 + 25 + 10 + 10, - .vrefresh = 60, }; static const struct panel_desc auo_b133htn01 = { @@ -770,7 +763,6 @@ static const struct drm_display_mode auo_g101evn010_mode = { .vsync_start = 800 + 8, .vsync_end = 800 + 8 + 2, .vtotal = 800 + 8 + 2 + 6, - .vrefresh = 60, }; static const struct panel_desc auo_g101evn010 = { @@ -794,7 +786,6 @@ static const struct drm_display_mode auo_g104sn02_mode = { .vsync_start = 600 + 10, .vsync_end = 600 + 10 + 35, .vtotal = 600 + 10 + 35 + 2, - .vrefresh = 60, }; static const struct panel_desc auo_g104sn02 = { @@ -906,7 +897,6 @@ static const struct drm_display_mode auo_t215hvn01_mode = { .vsync_start = 1080 + 4, .vsync_end = 1080 + 4 + 5, .vtotal = 1080 + 4 + 5 + 36, - .vrefresh = 60, }; static const struct panel_desc auo_t215hvn01 = { @@ -933,7 +923,6 @@ static const struct drm_display_mode avic_tm070ddh03_mode = { .vsync_start = 600 + 17, .vsync_end = 600 + 17 + 1, .vtotal = 600 + 17 + 1 + 17, - .vrefresh = 60, }; static const struct panel_desc avic_tm070ddh03 = { @@ -983,7 +972,6 @@ static const struct drm_display_mode boe_hv070wsa_mode = { .vsync_start = 600 + 10, .vsync_end = 600 + 10 + 10, .vtotal = 600 + 10 + 10 + 10, - .vrefresh = 60, }; static const struct panel_desc boe_hv070wsa = { @@ -1006,7 +994,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { .vsync_start = 800 + 3, .vsync_end = 800 + 3 + 5, .vtotal = 800 + 3 + 5 + 24, - .vrefresh = 60, }, { .clock = 57500, @@ -1018,7 +1005,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { .vsync_start = 800 + 3, .vsync_end = 800 + 3 + 5, .vtotal = 800 + 3 + 5 + 24, - .vrefresh = 48, }, }; @@ -1048,7 +1034,6 @@ static const struct drm_display_mode boe_nv140fhmn49_modes[] = { .vsync_start = 1080 + 3, .vsync_end = 1080 + 3 + 5, .vtotal = 1125, - .vrefresh = 60, }, }; @@ -1079,7 +1064,6 @@ static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { .vsync_start = 272 + 8, .vsync_end = 272 + 8 + 8, .vtotal = 272 + 8 + 8 + 8, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1104,7 +1088,6 @@ static const struct drm_display_mode cdtech_s070wv95_ct16_mode = { .vsync_start = 480 + 29, .vsync_end = 480 + 29 + 13, .vtotal = 480 + 29 + 13 + 3, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1128,7 +1111,6 @@ static const struct drm_display_mode chunghwa_claa070wp03xg_mode = { .vsync_start = 1280 + 1, .vsync_end = 1280 + 1 + 7, .vtotal = 1280 + 1 + 7 + 15, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1152,7 +1134,6 @@ static const struct drm_display_mode chunghwa_claa101wa01a_mode = { .vsync_start = 768 + 4, .vsync_end = 768 + 4 + 4, .vtotal = 768 + 4 + 4 + 4, - .vrefresh = 60, }; static const struct panel_desc chunghwa_claa101wa01a = { @@ -1175,7 +1156,6 @@ static const struct drm_display_mode chunghwa_claa101wb01_mode = { .vsync_start = 768 + 16, .vsync_end = 768 + 16 + 8, .vtotal = 768 + 16 + 8 + 16, - .vrefresh = 60, }; static const struct panel_desc chunghwa_claa101wb01 = { @@ -1198,7 +1178,6 @@ static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 2, .vtotal = 480 + 10 + 2 + 33, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1285,7 +1264,6 @@ static const struct drm_display_mode edt_et035012dm6_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 4, .vtotal = 240 + 4 + 4 + 14, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1317,7 +1295,6 @@ static const struct drm_display_mode edt_etm043080dh6gp_mode = { .vsync_start = 288 + 2, .vsync_end = 288 + 2 + 4, .vtotal = 288 + 2 + 4 + 10, - .vrefresh = 60, }; static const struct panel_desc edt_etm043080dh6gp = { @@ -1342,7 +1319,6 @@ static const struct drm_display_mode edt_etm0430g0dh6_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1366,7 +1342,6 @@ static const struct drm_display_mode edt_et057090dhu_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 3, .vtotal = 480 + 10 + 3 + 32, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1392,7 +1367,6 @@ static const struct drm_display_mode edt_etm0700g0dh6_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 2, .vtotal = 480 + 10 + 2 + 33, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1457,7 +1431,6 @@ static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = { .vsync_start = 480 + 37, .vsync_end = 480 + 37 + 2, .vtotal = 480 + 37 + 2 + 8, - .vrefresh = 60, }; static const struct panel_desc foxlink_fl500wvr00_a0t = { @@ -1481,7 +1454,6 @@ static const struct drm_display_mode frida_frd350h54004_mode = { .vsync_start = 240 + 2, .vsync_end = 240 + 2 + 6, .vtotal = 240 + 2 + 6 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -1508,7 +1480,6 @@ static const struct drm_display_mode friendlyarm_hd702e_mode = { .vsync_start = 1280 + 4, .vsync_end = 1280 + 4 + 8, .vtotal = 1280 + 4 + 8 + 4, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -1531,7 +1502,6 @@ static const struct drm_display_mode giantplus_gpg482739qs5_mode = { .vsync_start = 272 + 8, .vsync_end = 272 + 8 + 1, .vtotal = 272 + 8 + 1 + 8, - .vrefresh = 60, }; static const struct panel_desc giantplus_gpg482739qs5 = { @@ -1635,7 +1605,6 @@ static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = { .vsync_start = 480 + 16, .vsync_end = 480 + 16 + 13, .vtotal = 480 + 16 + 13 + 16, - .vrefresh = 60, }; static const struct panel_desc hitachi_tx23d38vm0caa = { @@ -1662,7 +1631,6 @@ static const struct drm_display_mode innolux_at043tn24_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1688,7 +1656,6 @@ static const struct drm_display_mode innolux_at070tn92_mode = { .vsync_start = 480 + 22, .vsync_end = 480 + 22 + 10, .vtotal = 480 + 22 + 23 + 10, - .vrefresh = 60, }; static const struct panel_desc innolux_at070tn92 = { @@ -1799,7 +1766,6 @@ static const struct drm_display_mode innolux_g121x1_l03_mode = { .vsync_start = 768 + 38, .vsync_end = 768 + 38 + 1, .vtotal = 768 + 38 + 1 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -1861,7 +1827,6 @@ static const struct drm_display_mode innolux_n156bge_l21_mode = { .vsync_start = 768 + 2, .vsync_end = 768 + 2 + 6, .vtotal = 768 + 2 + 6 + 12, - .vrefresh = 60, }; static const struct panel_desc innolux_n156bge_l21 = { @@ -1884,7 +1849,6 @@ static const struct drm_display_mode innolux_p120zdg_bf1_mode = { .vsync_start = 1440 + 3, .vsync_end = 1440 + 3 + 10, .vtotal = 1440 + 3 + 10 + 27, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -1912,7 +1876,6 @@ static const struct drm_display_mode innolux_zj070na_01p_mode = { .vsync_start = 600 + 16, .vsync_end = 600 + 16 + 4, .vtotal = 600 + 16 + 4 + 16, - .vrefresh = 60, }; static const struct panel_desc innolux_zj070na_01p = { @@ -2008,7 +1971,6 @@ static const struct drm_display_mode lemaker_bl035_rgb_002_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 3, .vtotal = 240 + 4 + 3 + 15, - .vrefresh = 60, }; static const struct panel_desc lemaker_bl035_rgb_002 = { @@ -2032,7 +1994,6 @@ static const struct drm_display_mode lg_lb070wv8_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 25, .vtotal = 480 + 10 + 25 + 10, - .vrefresh = 60, }; static const struct panel_desc lg_lb070wv8 = { @@ -2057,7 +2018,6 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { .vsync_start = 2048 + 8, .vsync_end = 2048 + 8 + 4, .vtotal = 2048 + 8 + 4 + 8, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2080,7 +2040,6 @@ static const struct drm_display_mode lg_lp097qx1_spa1_mode = { .vsync_start = 1536 + 3, .vsync_end = 1536 + 3 + 1, .vtotal = 1536 + 3 + 1 + 9, - .vrefresh = 60, }; static const struct panel_desc lg_lp097qx1_spa1 = { @@ -2102,7 +2061,6 @@ static const struct drm_display_mode lg_lp120up1_mode = { .vsync_start = 1280 + 4, .vsync_end = 1280 + 4 + 4, .vtotal = 1280 + 4 + 4 + 12, - .vrefresh = 60, }; static const struct panel_desc lg_lp120up1 = { @@ -2125,7 +2083,6 @@ static const struct drm_display_mode lg_lp129qe_mode = { .vsync_start = 1700 + 3, .vsync_end = 1700 + 3 + 10, .vtotal = 1700 + 3 + 10 + 36, - .vrefresh = 60, }; static const struct panel_desc lg_lp129qe = { @@ -2206,7 +2163,6 @@ static const struct drm_display_mode mitsubishi_aa070mc01_mode = { .vsync_start = 480 + 0, .vsync_end = 480 + 48 + 1, .vtotal = 480 + 48 + 1 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -2221,7 +2177,6 @@ static const struct drm_display_mode logicpd_type_28_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 11, .vtotal = 272 + 2 + 11 + 3, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -2301,7 +2256,6 @@ static const struct drm_display_mode nec_nl4827hc19_05b_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 4, .vtotal = 272 + 2 + 4 + 2, - .vrefresh = 74, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2327,7 +2281,6 @@ static const struct drm_display_mode netron_dy_e231732_mode = { .vsync_start = 600 + 127, .vsync_end = 600 + 127 + 20, .vtotal = 600 + 127 + 20 + 3, - .vrefresh = 60, }; static const struct panel_desc netron_dy_e231732 = { @@ -2350,7 +2303,6 @@ static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 10, .vtotal = 272 + 2 + 10 + 2, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2458,7 +2410,6 @@ static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = { .vsync_start = 272 + 8, .vsync_end = 272 + 8 + 5, .vtotal = 272 + 8 + 5 + 3, - .vrefresh = 60, }; static const struct panel_desc olimex_lcd_olinuxino_43ts = { @@ -2486,7 +2437,6 @@ static const struct drm_display_mode ontat_yx700wv03_mode = { .vsync_start = 483, .vsync_end = 493, .vtotal = 500, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2515,7 +2465,6 @@ static const struct drm_display_mode ortustech_com37h3m_mode = { .vsync_start = 640 + 4, .vsync_end = 640 + 4 + 3, .vtotal = 640 + 4 + 3 + 4, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2542,7 +2491,6 @@ static const struct drm_display_mode ortustech_com43h4m85ulc_mode = { .vsync_start = 800 + 3, .vsync_end = 800 + 3 + 3, .vtotal = 800 + 3 + 3 + 3, - .vrefresh = 60, }; static const struct panel_desc ortustech_com43h4m85ulc = { @@ -2567,7 +2515,6 @@ static const struct drm_display_mode osddisplays_osd070t1718_19ts_mode = { .vsync_start = 480 + 22, .vsync_end = 480 + 22 + 13, .vtotal = 480 + 22 + 13 + 10, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -2594,7 +2541,6 @@ static const struct drm_display_mode pda_91_00156_a0_mode = { .vsync_start = 480 + 1, .vsync_end = 480 + 1 + 23, .vtotal = 480 + 1 + 23 + 22, - .vrefresh = 60, }; static const struct panel_desc pda_91_00156_a0 = { @@ -2618,7 +2564,6 @@ static const struct drm_display_mode qd43003c0_40_mode = { .vsync_start = 272 + 4, .vsync_end = 272 + 4 + 10, .vtotal = 272 + 4 + 10 + 2, - .vrefresh = 60, }; static const struct panel_desc qd43003c0_40 = { @@ -2672,7 +2617,6 @@ static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = { .vsync_start = 800 + 2, .vsync_end = 800 + 2 + 5, .vtotal = 800 + 2 + 5 + 16, - .vrefresh = 60, }; static const struct panel_desc rocktech_rk101ii01d_ct = { @@ -2701,7 +2645,6 @@ static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { .vsync_start = 1600 + 2, .vsync_end = 1600 + 2 + 5, .vtotal = 1600 + 2 + 5 + 57, - .vrefresh = 60, }; static const struct panel_desc samsung_lsn122dl01_c01 = { @@ -2723,7 +2666,6 @@ static const struct drm_display_mode samsung_ltn101nt05_mode = { .vsync_start = 600 + 3, .vsync_end = 600 + 3 + 6, .vtotal = 600 + 3 + 6 + 61, - .vrefresh = 60, }; static const struct panel_desc samsung_ltn101nt05 = { @@ -2746,7 +2688,6 @@ static const struct drm_display_mode samsung_ltn140at29_301_mode = { .vsync_start = 768 + 2, .vsync_end = 768 + 2 + 5, .vtotal = 768 + 2 + 5 + 17, - .vrefresh = 60, }; static const struct panel_desc samsung_ltn140at29_301 = { @@ -2793,7 +2734,6 @@ static const struct drm_display_mode sharp_ld_d5116z01b_mode = { .vsync_start = 1280 + 3, .vsync_end = 1280 + 3 + 10, .vtotal = 1280 + 3 + 10 + 57, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }; @@ -2819,7 +2759,6 @@ static const struct drm_display_mode sharp_lq070y3dg3b_mode = { .vsync_start = 480 + 8, .vsync_end = 480 + 8 + 2, .vtotal = 480 + 8 + 2 + 35, - .vrefresh = 60, .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE, }; @@ -2846,7 +2785,6 @@ static const struct drm_display_mode sharp_lq035q7db03_mode = { .vsync_start = 320 + 9, .vsync_end = 320 + 9 + 1, .vtotal = 320 + 9 + 1 + 7, - .vrefresh = 60, }; static const struct panel_desc sharp_lq035q7db03 = { @@ -2923,7 +2861,6 @@ static const struct drm_display_mode sharp_lq150x1lg11_mode = { .vsync_start = 768 + 37, .vsync_end = 768 + 37 + 2, .vtotal = 768 + 37 + 2 + 8, - .vrefresh = 60, }; static const struct panel_desc sharp_lq150x1lg11 = { @@ -2974,7 +2911,6 @@ static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = { .vsync_start = 480 + 1, .vsync_end = 480 + 1 + 23, .vtotal = 480 + 1 + 23 + 22, - .vrefresh = 60, }; static const struct panel_desc shelly_sca07010_bfn_lnn = { @@ -2997,7 +2933,6 @@ static const struct drm_display_mode starry_kr122ea0sra_mode = { .vsync_start = 1200 + 15, .vsync_end = 1200 + 15 + 2, .vtotal = 1200 + 15 + 2 + 18, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -3025,7 +2960,6 @@ static const struct drm_display_mode tfc_s9700rtwv43tr_01b_mode = { .vsync_start = 480 + 13, .vsync_end = 480 + 13 + 2, .vtotal = 480 + 13 + 2 + 29, - .vrefresh = 62, }; static const struct panel_desc tfc_s9700rtwv43tr_01b = { @@ -3101,7 +3035,6 @@ static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = { .vsync_start = 240 + 3, .vsync_end = 240 + 3 + 1, .vtotal = 240 + 3 + 1 + 17, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }, }; @@ -3129,7 +3062,6 @@ static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = { .vsync_start = 240 + 0, .vsync_end = 240 + 0 + 1, .vtotal = 240 + 0 + 1 + 0, - .vrefresh = 60, .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, }, }; @@ -3158,7 +3090,6 @@ static const struct drm_display_mode toshiba_lt089ac29000_mode = { .vsync_start = 768 + 20, .vsync_end = 768 + 20 + 7, .vtotal = 768 + 20 + 7 + 3, - .vrefresh = 60, }; static const struct panel_desc toshiba_lt089ac29000 = { @@ -3183,7 +3114,6 @@ static const struct drm_display_mode tpk_f07a_0102_mode = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 2, .vtotal = 480 + 10 + 2 + 33, - .vrefresh = 60, }; static const struct panel_desc tpk_f07a_0102 = { @@ -3206,7 +3136,6 @@ static const struct drm_display_mode tpk_f10a_0102_mode = { .vsync_start = 600 + 20, .vsync_end = 600 + 20 + 5, .vtotal = 600 + 20 + 5 + 25, - .vrefresh = 60, }; static const struct panel_desc tpk_f10a_0102 = { @@ -3265,7 +3194,6 @@ static const struct drm_display_mode vl050_8048nt_c01_mode = { .vsync_start = 480 + 22, .vsync_end = 480 + 22 + 10, .vtotal = 480 + 22 + 10 + 23, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; @@ -3291,7 +3219,6 @@ static const struct drm_display_mode winstar_wf35ltiacd_mode = { .vsync_start = 240 + 4, .vsync_end = 240 + 4 + 3, .vtotal = 240 + 4 + 3 + 15, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -3317,7 +3244,6 @@ static const struct drm_display_mode arm_rtsm_mode[] = { .vsync_start = 768 + 3, .vsync_end = 768 + 3 + 6, .vtotal = 768 + 3 + 6 + 29, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }, }; @@ -3743,7 +3669,6 @@ static const struct drm_display_mode auo_b080uan01_mode = { .vsync_start = 1920 + 9, .vsync_end = 1920 + 9 + 2, .vtotal = 1920 + 9 + 2 + 8, - .vrefresh = 60, }; static const struct panel_desc_dsi auo_b080uan01 = { @@ -3771,7 +3696,6 @@ static const struct drm_display_mode boe_tv080wum_nl0_mode = { .vsync_start = 1920 + 21, .vsync_end = 1920 + 21 + 3, .vtotal = 1920 + 21 + 3 + 18, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, }; @@ -3801,7 +3725,6 @@ static const struct drm_display_mode lg_ld070wx3_sl01_mode = { .vsync_start = 1280 + 28, .vsync_end = 1280 + 28 + 1, .vtotal = 1280 + 28 + 1 + 14, - .vrefresh = 60, }; static const struct panel_desc_dsi lg_ld070wx3_sl01 = { @@ -3829,7 +3752,6 @@ static const struct drm_display_mode lg_lh500wx1_sd03_mode = { .vsync_start = 1280 + 8, .vsync_end = 1280 + 8 + 4, .vtotal = 1280 + 8 + 4 + 12, - .vrefresh = 60, }; static const struct panel_desc_dsi lg_lh500wx1_sd03 = { @@ -3857,7 +3779,6 @@ static const struct drm_display_mode panasonic_vvx10f004b00_mode = { .vsync_start = 1200 + 17, .vsync_end = 1200 + 17 + 2, .vtotal = 1200 + 17 + 2 + 16, - .vrefresh = 60, }; static const struct panel_desc_dsi panasonic_vvx10f004b00 = { @@ -3886,7 +3807,6 @@ static const struct drm_display_mode lg_acx467akm_7_mode = { .vsync_start = 1920 + 2, .vsync_end = 1920 + 2 + 2, .vtotal = 1920 + 2 + 2 + 2, - .vrefresh = 60, }; static const struct panel_desc_dsi lg_acx467akm_7 = { @@ -3914,7 +3834,6 @@ static const struct drm_display_mode osd101t2045_53ts_mode = { .vsync_start = 1200 + 16, .vsync_end = 1200 + 16 + 2, .vtotal = 1200 + 16 + 2 + 16, - .vrefresh = 60, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, }; diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c index 4b4f2558e3b4..692041ae4eb6 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c @@ -272,7 +272,7 @@ static int st7701_get_modes(struct drm_panel *panel, DRM_DEV_ERROR(&st7701->dsi->dev, "failed to add mode %ux%ux@%u\n", desc_mode->hdisplay, desc_mode->vdisplay, - desc_mode->vrefresh); + drm_mode_vrefresh(desc_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c index cc02c54c1b2e..3513ae40efa8 100644 --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c @@ -165,7 +165,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 320 + 8, .vsync_end = 320 + 8 + 4, .vtotal = 320 + 8 + 4 + 4, - .vrefresh = 60, }; static int st7789v_get_modes(struct drm_panel *panel, @@ -177,7 +176,7 @@ static int st7789v_get_modes(struct drm_panel *panel, if (!mode) { dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/panel/panel-sony-acx424akp.c b/drivers/gpu/drm/panel/panel-sony-acx424akp.c index de0abf76ae6f..eba05bd6ec9a 100644 --- a/drivers/gpu/drm/panel/panel-sony-acx424akp.c +++ b/drivers/gpu/drm/panel/panel-sony-acx424akp.c @@ -57,7 +57,6 @@ static const struct drm_display_mode sony_acx424akp_vid_mode = { .vsync_start = 864 + 14, .vsync_end = 864 + 14 + 1, .vtotal = 864 + 14 + 1 + 11, - .vrefresh = 60, .width_mm = 48, .height_mm = 84, .flags = DRM_MODE_FLAG_PVSYNC, @@ -81,7 +80,6 @@ static const struct drm_display_mode sony_acx424akp_cmd_mode = { * Some desired refresh rate, experiments at the maximum "pixel" * clock speed (HS clock 420 MHz) yields around 117Hz. */ - .vrefresh = 60, .width_mm = 48, .height_mm = 84, }; diff --git a/drivers/gpu/drm/panel/panel-sony-acx565akm.c b/drivers/gpu/drm/panel/panel-sony-acx565akm.c index 5c4b6f6e5c2d..fc6a7e451abe 100644 --- a/drivers/gpu/drm/panel/panel-sony-acx565akm.c +++ b/drivers/gpu/drm/panel/panel-sony-acx565akm.c @@ -514,7 +514,6 @@ static const struct drm_display_mode acx565akm_mode = { .vsync_start = 480 + 3, .vsync_end = 480 + 3 + 3, .vtotal = 480 + 3 + 3 + 4, - .vrefresh = 57, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 77, diff --git a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c index aeca15dfeb3c..58d683cc5215 100644 --- a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c +++ b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c @@ -281,7 +281,6 @@ static const struct drm_display_mode td028ttec1_mode = { .vsync_start = 640 + 4, .vsync_end = 640 + 4 + 2, .vtotal = 640 + 4 + 2 + 2, - .vrefresh = 66, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 43, diff --git a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c index 75f1f1f1b6de..9b2a356c4d9a 100644 --- a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c +++ b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c @@ -339,7 +339,6 @@ static const struct drm_display_mode td043mtea1_mode = { .vsync_start = 480 + 39, .vsync_end = 480 + 39 + 1, .vtotal = 480 + 39 + 1 + 34, - .vrefresh = 60, .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, .width_mm = 94, diff --git a/drivers/gpu/drm/panel/panel-tpo-tpg110.c b/drivers/gpu/drm/panel/panel-tpo-tpg110.c index 8472d018c16f..c7a2f0ae5ba5 100644 --- a/drivers/gpu/drm/panel/panel-tpo-tpg110.c +++ b/drivers/gpu/drm/panel/panel-tpo-tpg110.c @@ -112,7 +112,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 480 + 10, .vsync_end = 480 + 10 + 1, .vtotal = 480 + 10 + 1 + 35, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -129,7 +128,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 480 + 18, .vsync_end = 480 + 18 + 1, .vtotal = 480 + 18 + 1 + 27, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -146,7 +144,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 272 + 2, .vsync_end = 272 + 2 + 1, .vtotal = 272 + 2 + 1 + 12, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -163,7 +160,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 640 + 4, .vsync_end = 640 + 4 + 1, .vtotal = 640 + 4 + 1 + 8, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, @@ -180,7 +176,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { .vsync_start = 240 + 2, .vsync_end = 240 + 2 + 1, .vtotal = 240 + 2 + 1 + 20, - .vrefresh = 60, }, .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, }, diff --git a/drivers/gpu/drm/panel/panel-truly-nt35597.c b/drivers/gpu/drm/panel/panel-truly-nt35597.c index 012ca62bf30e..9d669088cffc 100644 --- a/drivers/gpu/drm/panel/panel-truly-nt35597.c +++ b/drivers/gpu/drm/panel/panel-truly-nt35597.c @@ -536,7 +536,6 @@ static const struct drm_display_mode qcom_sdm845_mtp_2k_mode = { .vsync_start = 2560 + 8, .vsync_end = 2560 + 8 + 1, .vtotal = 2560 + 8 + 1 + 7, - .vrefresh = 60, .flags = 0, }; diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c index 1645aceab597..8a3b2f906e63 100644 --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c @@ -243,7 +243,6 @@ static const struct drm_display_mode default_mode = { .vsync_start = 1280 + 22, .vsync_end = 1280 + 22 + 4, .vtotal = 1280 + 22 + 4 + 11, - .vrefresh = 60, .clock = 64000, .width_mm = 68, .height_mm = 121, @@ -259,7 +258,7 @@ static int xpp055c272_get_modes(struct drm_panel *panel, if (!mode) { DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", default_mode.hdisplay, default_mode.vdisplay, - default_mode.vrefresh); + drm_mode_vrefresh(&default_mode)); return -ENOMEM; } diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c index 2bb32009d117..3dc6e2e96541 100644 --- a/drivers/gpu/drm/sti/sti_hda.c +++ b/drivers/gpu/drm/sti/sti_hda.c @@ -586,7 +586,6 @@ static int sti_hda_connector_get_modes(struct drm_connector *connector) &hda_supported_modes[i].mode); if (!mode) continue; - mode->vrefresh = drm_mode_vrefresh(mode); /* the first mode is the preferred mode */ if (i == 0) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index eb6e23e8d8ef..0b07f7b5ece4 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c @@ -2226,7 +2226,6 @@ void vmw_guess_mode_timing(struct drm_display_mode *mode) mode->vtotal = mode->vsync_end + 50; mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; - mode->vrefresh = drm_mode_vrefresh(mode); } @@ -2300,7 +2299,6 @@ int vmw_du_connector_fill_modes(struct drm_connector *connector, mode = drm_mode_duplicate(dev, bmode); if (!mode) return 0; - mode->vrefresh = drm_mode_vrefresh(mode); drm_mode_probed_add(connector, mode); } diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h index 7dab7f172431..52e8ca613e4b 100644 --- a/include/drm/drm_modes.h +++ b/include/drm/drm_modes.h @@ -380,16 +380,6 @@ struct drm_display_mode { */ int private_flags; - /** - * @vrefresh: - * - * Vertical refresh rate, for debug output in human readable form. Not - * used in a functional way. - * - * This value is in Hz. - */ - int vrefresh; - /** * @picture_aspect_ratio: * @@ -421,7 +411,7 @@ struct drm_display_mode { * @m: display mode */ #define DRM_MODE_ARG(m) \ - (m)->name, (m)->vrefresh, (m)->clock, \ + (m)->name, drm_mode_vrefresh(m), (m)->clock, \ (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \ (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \ (m)->type, (m)->flags -- 2.24.1 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh 2020-02-19 20:35 ` [PATCH 04/12] drm: Nuke mode->vrefresh Ville Syrjala @ 2020-02-20 12:00 ` Emil Velikov 2020-02-22 12:32 ` Sam Ravnborg 2020-02-24 14:14 ` Andrzej Hajda 2 siblings, 0 replies; 9+ messages in thread From: Emil Velikov @ 2020-02-20 12:00 UTC (permalink / raw) To: Ville Syrjala Cc: Neil Armstrong, ML nouveau, Guido Günther, ML dri-devel, Andrzej Hajda, Thierry Reding, Laurent Pinchart, Sam Ravnborg, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, VMware Graphics, Jagan Teki, Robert Chiras, Icenowy Zheng, Jonas Karlman, Intel Graphics Development, Ben Skeggs, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park On Wed, 19 Feb 2020 at 20:36, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Get rid of mode->vrefresh and just calculate it on demand. Saves > a bit of space and avoids the cached value getting out of sync > with reality. > > Mostly done with cocci, with the following manual fixups: > - Remove the now empty loop in drm_helper_probe_single_connector_modes() > - Fix __MODE() macro in ch7006_mode.c Speaking of ch7006_mode.c, it has its own "fixed vrefresh", which doesn't seem to be used anywhere. One could potentially nuke it, although it can be a completely separate patch. This patch is: Reviewed-by: Emil Velikov <emil.velikov@collabora.com> -Emil _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh 2020-02-19 20:35 ` [PATCH 04/12] drm: Nuke mode->vrefresh Ville Syrjala 2020-02-20 12:00 ` Emil Velikov @ 2020-02-22 12:32 ` Sam Ravnborg 2020-02-24 13:14 ` Ville Syrjälä 2020-02-24 14:14 ` Andrzej Hajda 2 siblings, 1 reply; 9+ messages in thread From: Sam Ravnborg @ 2020-02-22 12:32 UTC (permalink / raw) To: Ville Syrjala Cc: Neil Armstrong, nouveau, Guido Günther, dri-devel, Andrzej Hajda, Thierry Reding, Laurent Pinchart, Benjamin Gaignard, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, Ben Skeggs, VMware Graphics, Jagan Teki, Robert Chiras, Linus Walleij, Icenowy Zheng, Jonas Karlman, intel-gfx, Inki Dae, CK Hu, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park, Philipp Zabel Hi Ville. Nice patch - and diffstat looks good: > 63 files changed, 217 insertions(+), 392 deletions(-) There is an item in the Documentation/gpu/todo.rst that describes this. Could you drop this from todo.rst in this patch too. > diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c > index bb6528b01cd0..6dca5344c0b3 100644 > --- a/drivers/gpu/drm/mcde/mcde_dsi.c > +++ b/drivers/gpu/drm/mcde/mcde_dsi.c > @@ -538,7 +538,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, > */ > /* (ps/s) / (pixels/s) = ps/pixels */ > pclk = DIV_ROUND_UP_ULL(1000000000000, > - (mode->vrefresh * mode->htotal * mode->vtotal)); > + (drm_mode_vrefresh(mode) * mode->htotal * mode->vtotal)); > dev_dbg(d->dev, "picoseconds between two pixels: %llu\n", > pclk); > This just caught my eye while browsing the patch. It looks like a backward way to get the clock. But patch is fine, it was just a drive-by comment. Whole patch is: Reviewed-by: Sam Ravnborg <sam@ravnborg.org> (with or without removal of todo item added) Sam _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh 2020-02-22 12:32 ` Sam Ravnborg @ 2020-02-24 13:14 ` Ville Syrjälä 0 siblings, 0 replies; 9+ messages in thread From: Ville Syrjälä @ 2020-02-24 13:14 UTC (permalink / raw) To: Sam Ravnborg Cc: Neil Armstrong, nouveau, Guido Günther, dri-devel, Andrzej Hajda, Thierry Reding, Laurent Pinchart, Benjamin Gaignard, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, Ben Skeggs, VMware Graphics, Jagan Teki, Robert Chiras, Linus Walleij, Icenowy Zheng, Jonas Karlman, intel-gfx, Inki Dae, CK Hu, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park, Philipp Zabel On Sat, Feb 22, 2020 at 01:32:40PM +0100, Sam Ravnborg wrote: > Hi Ville. > > Nice patch - and diffstat looks good: > > 63 files changed, 217 insertions(+), 392 deletions(-) > > There is an item in the Documentation/gpu/todo.rst that > describes this. > Could you drop this from todo.rst in this patch too. Yeah, missed the TODO. Looks like there's one for hsync removal as well. > > > diff --git a/drivers/gpu/drm/mcde/mcde_dsi.c b/drivers/gpu/drm/mcde/mcde_dsi.c > > index bb6528b01cd0..6dca5344c0b3 100644 > > --- a/drivers/gpu/drm/mcde/mcde_dsi.c > > +++ b/drivers/gpu/drm/mcde/mcde_dsi.c > > @@ -538,7 +538,7 @@ static void mcde_dsi_setup_video_mode(struct mcde_dsi *d, > > */ > > /* (ps/s) / (pixels/s) = ps/pixels */ > > pclk = DIV_ROUND_UP_ULL(1000000000000, > > - (mode->vrefresh * mode->htotal * mode->vtotal)); > > + (drm_mode_vrefresh(mode) * mode->htotal * mode->vtotal)); > > dev_dbg(d->dev, "picoseconds between two pixels: %llu\n", > > pclk); > > > > This just caught my eye while browsing the patch. > It looks like a backward way to get the clock. Yep. I'll cook up a patch to switch this to ->clock. > > But patch is fine, it was just a drive-by comment. > > Whole patch is: > Reviewed-by: Sam Ravnborg <sam@ravnborg.org> > (with or without removal of todo item added) > > Sam -- Ville Syrjälä Intel _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh 2020-02-19 20:35 ` [PATCH 04/12] drm: Nuke mode->vrefresh Ville Syrjala 2020-02-20 12:00 ` Emil Velikov 2020-02-22 12:32 ` Sam Ravnborg @ 2020-02-24 14:14 ` Andrzej Hajda 2020-02-25 11:21 ` Ville Syrjälä 2 siblings, 1 reply; 9+ messages in thread From: Andrzej Hajda @ 2020-02-24 14:14 UTC (permalink / raw) To: Ville Syrjala, dri-devel Cc: Neil Armstrong, nouveau, Guido Günther, Thierry Reding, Laurent Pinchart, Sam Ravnborg, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, VMware Graphics, Jagan Teki, Robert Chiras, Icenowy Zheng, Jonas Karlman, intel-gfx, Ben Skeggs, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park On 19.02.2020 21:35, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Get rid of mode->vrefresh and just calculate it on demand. Saves > a bit of space and avoids the cached value getting out of sync > with reality. > > Mostly done with cocci, with the following manual fixups: > - Remove the now empty loop in drm_helper_probe_single_connector_modes() > - Fix __MODE() macro in ch7006_mode.c > - Fix DRM_MODE_ARG() macro in drm_modes.h > - Remove leftover comment from samsung_s6d16d0_mode ... > diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c > index 41444a73c980..47b37fef7ee8 100644 > --- a/drivers/gpu/drm/panel/panel-arm-versatile.c > +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c > @@ -143,7 +143,6 @@ static const struct versatile_panel_type versatile_panels[] = { > .vsync_start = 240 + 5, > .vsync_end = 240 + 5 + 6, > .vtotal = 240 + 5 + 6 + 5, > - .vrefresh = 116, Are you sure vrefresh calculated (from totals and clock) is different than this field? If not, we risk regressions. This case is OK, but there is plenty other cases. Regards Andrzej > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }, > }, > @@ -167,7 +166,6 @@ static const struct versatile_panel_type versatile_panels[] = { > .vsync_start = 480 + 11, > .vsync_end = 480 + 11 + 2, > .vtotal = 480 + 11 + 2 + 32, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }, > }, > @@ -190,7 +188,6 @@ static const struct versatile_panel_type versatile_panels[] = { > .vsync_start = 220 + 0, > .vsync_end = 220 + 0 + 2, > .vtotal = 220 + 0 + 2 + 1, > - .vrefresh = 390, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }, > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, > @@ -214,7 +211,6 @@ static const struct versatile_panel_type versatile_panels[] = { > .vsync_start = 320 + 2, > .vsync_end = 320 + 2 + 2, > .vtotal = 320 + 2 + 2 + 2, > - .vrefresh = 116, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }, > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, > diff --git a/drivers/gpu/drm/panel/panel-boe-himax8279d.c b/drivers/gpu/drm/panel/panel-boe-himax8279d.c > index 74d58ee7d04c..7c27bd5e3486 100644 > --- a/drivers/gpu/drm/panel/panel-boe-himax8279d.c > +++ b/drivers/gpu/drm/panel/panel-boe-himax8279d.c > @@ -229,7 +229,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, > mode = drm_mode_duplicate(connector->dev, m); > if (!mode) { > DRM_DEV_ERROR(pinfo->base.dev, "failed to add mode %ux%u@%u\n", > - m->hdisplay, m->vdisplay, m->vrefresh); > + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); > return -ENOMEM; > } > > @@ -262,7 +262,6 @@ static const struct drm_display_mode default_display_mode = { > .vsync_start = 1920 + 10, > .vsync_end = 1920 + 10 + 14, > .vtotal = 1920 + 10 + 14 + 4, > - .vrefresh = 60, > }; > > /* 8 inch */ > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > index 48a164257d18..c580bd1e121c 100644 > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > @@ -594,7 +594,6 @@ static const struct drm_display_mode boe_tv101wum_nl6_default_mode = { > .vsync_start = 1920 + 10, > .vsync_end = 1920 + 10 + 14, > .vtotal = 1920 + 10 + 14 + 4, > - .vrefresh = 60, > }; > > static const struct panel_desc boe_tv101wum_nl6_desc = { > @@ -622,7 +621,6 @@ static const struct drm_display_mode auo_kd101n80_45na_default_mode = { > .vsync_start = 1920 + 16, > .vsync_end = 1920 + 16 + 4, > .vtotal = 1920 + 16 + 4 + 16, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_kd101n80_45na_desc = { > @@ -650,7 +648,6 @@ static const struct drm_display_mode boe_tv101wum_n53_default_mode = { > .vsync_start = 1920 + 20, > .vsync_end = 1920 + 20 + 4, > .vtotal = 1920 + 20 + 4 + 10, > - .vrefresh = 60, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > }; > > @@ -678,7 +675,6 @@ static const struct drm_display_mode auo_b101uan08_3_default_mode = { > .vsync_start = 1920 + 34, > .vsync_end = 1920 + 34 + 2, > .vtotal = 1920 + 34 + 2 + 24, > - .vrefresh = 60, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > }; > > @@ -706,7 +702,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, > mode = drm_mode_duplicate(connector->dev, m); > if (!mode) { > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > - m->hdisplay, m->vdisplay, m->vrefresh); > + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c > index fddbfddf6566..54610651ecdb 100644 > --- a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c > +++ b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c > @@ -392,7 +392,6 @@ static int k101_im2ba02_unprepare(struct drm_panel *panel) > > static const struct drm_display_mode k101_im2ba02_default_mode = { > .clock = 70000, > - .vrefresh = 60, > > .hdisplay = 800, > .hsync_start = 800 + 20, > @@ -420,7 +419,7 @@ static int k101_im2ba02_get_modes(struct drm_panel *panel, > DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", > k101_im2ba02_default_mode.hdisplay, > k101_im2ba02_default_mode.vdisplay, > - k101_im2ba02_default_mode.vrefresh); > + drm_mode_vrefresh(&k101_im2ba02_default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c > index 95b789ab9d29..19a6274b10f5 100644 > --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c > +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c > @@ -153,7 +153,6 @@ static const struct drm_display_mode feiyang_default_mode = { > .vsync_start = 600 + 12, > .vsync_end = 600 + 12 + 2, > .vtotal = 600 + 12 + 2 + 21, > - .vrefresh = 60, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > }; > @@ -169,7 +168,7 @@ static int feiyang_get_modes(struct drm_panel *panel, > DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", > feiyang_default_mode.hdisplay, > feiyang_default_mode.vdisplay, > - feiyang_default_mode.vrefresh); > + drm_mode_vrefresh(&feiyang_default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c > index f394d53a7da4..d2c98d381bef 100644 > --- a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c > @@ -549,7 +549,6 @@ static const struct drm_display_mode srgb_320x240_mode = { > .vsync_start = 240 + 4, > .vsync_end = 240 + 4 + 1, > .vtotal = 262, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -563,7 +562,6 @@ static const struct drm_display_mode srgb_360x240_mode = { > .vsync_start = 240 + 21, > .vsync_end = 240 + 21 + 1, > .vtotal = 262, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -578,7 +576,6 @@ static const struct drm_display_mode prgb_320x240_mode = { > .vsync_start = 240 + 4, > .vsync_end = 240 + 4 + 1, > .vtotal = 262, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -593,7 +590,6 @@ static const struct drm_display_mode yuv_640x320_mode = { > .vsync_start = 320 + 4, > .vsync_end = 320 + 4 + 1, > .vtotal = 320 + 4 + 1 + 18, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -607,7 +603,6 @@ static const struct drm_display_mode yuv_720x360_mode = { > .vsync_start = 360 + 4, > .vsync_end = 360 + 4 + 1, > .vtotal = 360 + 4 + 1 + 18, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -622,7 +617,6 @@ static const struct drm_display_mode itu_r_bt_656_640_mode = { > .vsync_start = 480 + 4, > .vsync_end = 480 + 4 + 1, > .vtotal = 500, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -637,7 +631,6 @@ static const struct drm_display_mode itu_r_bt_656_720_mode = { > .vsync_start = 480 + 4, > .vsync_end = 480 + 4 + 1, > .vtotal = 500, > - .vrefresh = 60, > .flags = 0, > }; > > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c > index f54077c216a3..3ed8635a6fbd 100644 > --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c > @@ -370,7 +370,6 @@ static int ili9881c_unprepare(struct drm_panel *panel) > > static const struct drm_display_mode bananapi_default_mode = { > .clock = 62000, > - .vrefresh = 60, > > .hdisplay = 720, > .hsync_start = 720 + 10, > @@ -394,7 +393,7 @@ static int ili9881c_get_modes(struct drm_panel *panel, > dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", > bananapi_default_mode.hdisplay, > bananapi_default_mode.vdisplay, > - bananapi_default_mode.vrefresh); > + drm_mode_vrefresh(&bananapi_default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c b/drivers/gpu/drm/panel/panel-innolux-p079zca.c > index 7419f1f0acee..fdf030f4cf92 100644 > --- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c > +++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c > @@ -223,7 +223,6 @@ static const struct drm_display_mode innolux_p079zca_mode = { > .vsync_start = 1024 + 20, > .vsync_end = 1024 + 20 + 4, > .vtotal = 1024 + 20 + 4 + 20, > - .vrefresh = 60, > }; > > static const struct panel_desc innolux_p079zca_panel_desc = { > @@ -257,7 +256,6 @@ static const struct drm_display_mode innolux_p097pfg_mode = { > .vsync_start = 2048 + 100, > .vsync_end = 2048 + 100 + 2, > .vtotal = 2048 + 100 + 2 + 18, > - .vrefresh = 60, > }; > > /* > @@ -401,7 +399,7 @@ static int innolux_panel_get_modes(struct drm_panel *panel, > mode = drm_mode_duplicate(connector->dev, m); > if (!mode) { > DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", > - m->hdisplay, m->vdisplay, m->vrefresh); > + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c > index 4bfd8c877c8e..1e3fd6633981 100644 > --- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c > +++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c > @@ -296,7 +296,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1920 + 3, > .vsync_end = 1920 + 3 + 5, > .vtotal = 1920 + 3 + 5 + 6, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -311,7 +310,7 @@ static int jdi_panel_get_modes(struct drm_panel *panel, > if (!mode) { > dev_err(dev, "failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c > index bac1a2a06c92..0d397af23afe 100644 > --- a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c > +++ b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c > @@ -318,7 +318,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 2048 + 95, > .vsync_end = 2048 + 95 + 2, > .vtotal = 2048 + 95 + 2 + 23, > - .vrefresh = 60, > }; > > static int kingdisplay_panel_get_modes(struct drm_panel *panel, > @@ -330,7 +329,7 @@ static int kingdisplay_panel_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c > index 76ecf2de9c44..c39e7f6f5c2d 100644 > --- a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c > +++ b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c > @@ -376,7 +376,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1280 + 30, > .vsync_end = 1280 + 30 + 4, > .vtotal = 1280 + 30 + 4 + 12, > - .vrefresh = 60, > .clock = 41600, > .width_mm = 62, > .height_mm = 110, > @@ -392,7 +391,7 @@ static int ltk500hd1829_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_DEV_ERROR(ctx->dev, "failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-lg-lb035q02.c b/drivers/gpu/drm/panel/panel-lg-lb035q02.c > index e90efeaba4ad..14456b9cd5c0 100644 > --- a/drivers/gpu/drm/panel/panel-lg-lb035q02.c > +++ b/drivers/gpu/drm/panel/panel-lg-lb035q02.c > @@ -134,7 +134,6 @@ static const struct drm_display_mode lb035q02_mode = { > .vsync_start = 240 + 4, > .vsync_end = 240 + 4 + 2, > .vtotal = 240 + 4 + 2 + 18, > - .vrefresh = 60, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > .width_mm = 70, > diff --git a/drivers/gpu/drm/panel/panel-lg-lg4573.c b/drivers/gpu/drm/panel/panel-lg-lg4573.c > index b262b53dbd85..497f3b888a1d 100644 > --- a/drivers/gpu/drm/panel/panel-lg-lg4573.c > +++ b/drivers/gpu/drm/panel/panel-lg-lg4573.c > @@ -206,7 +206,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 800 + 15, > .vsync_end = 800 + 15 + 15, > .vtotal = 800 + 15 + 15 + 15, > - .vrefresh = 60, > }; > > static int lg4573_get_modes(struct drm_panel *panel, > @@ -218,7 +217,7 @@ static int lg4573_get_modes(struct drm_panel *panel, > if (!mode) { > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c > index c4f83f6384e1..f894971c1c7c 100644 > --- a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c > +++ b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c > @@ -116,7 +116,6 @@ static const struct drm_display_mode nl8048_mode = { > .vsync_start = 480 + 3, > .vsync_end = 480 + 3 + 1, > .vtotal = 480 + 3 + 1 + 4, > - .vrefresh = 60, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > .width_mm = 89, > diff --git a/drivers/gpu/drm/panel/panel-novatek-nt39016.c b/drivers/gpu/drm/panel/panel-novatek-nt39016.c > index a470810f7dbe..4b545e081b1e 100644 > --- a/drivers/gpu/drm/panel/panel-novatek-nt39016.c > +++ b/drivers/gpu/drm/panel/panel-novatek-nt39016.c > @@ -327,7 +327,6 @@ static const struct nt39016_panel_info kd035g6_info = { > .vsync_start = 240 + 5, > .vsync_end = 240 + 5 + 1, > .vtotal = 240 + 5 + 1 + 4, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }, > .width_mm = 71, > diff --git a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c > index 09deb99981a4..ecd76b5391d3 100644 > --- a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c > +++ b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c > @@ -170,7 +170,6 @@ static int lcd_olinuxino_get_modes(struct drm_panel *panel, > lcd_mode->vpw; > mode->vtotal = lcd_mode->vactive + lcd_mode->vfp + > lcd_mode->vpw + lcd_mode->vbp; > - mode->vrefresh = lcd_mode->refresh; > > /* Always make the first mode preferred */ > if (i == 0) > diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c > index bb0c992171e8..895ee3d1371e 100644 > --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c > +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c > @@ -81,7 +81,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 800 + 15, > .vsync_end = 800 + 15 + 10, > .vtotal = 800 + 15 + 10 + 14, > - .vrefresh = 50, > .flags = 0, > .width_mm = 52, > .height_mm = 86, > @@ -358,7 +357,7 @@ static int otm8009a_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_ERROR("failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c > index 3a0229d60095..11b3d01aca56 100644 > --- a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c > +++ b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c > @@ -102,7 +102,6 @@ static const struct drm_display_mode default_mode_osd101t2587 = { > .vsync_start = 1200 + 24, > .vsync_end = 1200 + 24 + 6, > .vtotal = 1200 + 24 + 6 + 48, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -117,7 +116,7 @@ static int osd101t2587_panel_get_modes(struct drm_panel *panel, > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > osd101t2587->default_mode->hdisplay, > osd101t2587->default_mode->vdisplay, > - osd101t2587->default_mode->vrefresh); > + drm_mode_vrefresh(osd101t2587->default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c > index 69693451462e..627dfcf8adb4 100644 > --- a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c > +++ b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c > @@ -149,7 +149,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1200 + 24, > .vsync_end = 1200 + 24 + 6, > .vtotal = 1200 + 24 + 6 + 48, > - .vrefresh = 60, > }; > > static int wuxga_nt_panel_get_modes(struct drm_panel *panel, > @@ -161,7 +160,7 @@ static int wuxga_nt_panel_get_modes(struct drm_panel *panel, > if (!mode) { > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c > index 8f078b7dd89e..e50ee26474cf 100644 > --- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c > +++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c > @@ -209,7 +209,6 @@ static const struct drm_display_mode rpi_touchscreen_modes[] = { > .vsync_start = 480 + 7, > .vsync_end = 480 + 7 + 2, > .vtotal = 480 + 7 + 2 + 21, > - .vrefresh = 60, > }, > }; > > @@ -322,7 +321,8 @@ static int rpi_touchscreen_get_modes(struct drm_panel *panel, > mode = drm_mode_duplicate(connector->dev, m); > if (!mode) { > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > - m->hdisplay, m->vdisplay, m->vrefresh); > + m->hdisplay, m->vdisplay, > + drm_mode_vrefresh(m)); > continue; > } > > diff --git a/drivers/gpu/drm/panel/panel-raydium-rm67191.c b/drivers/gpu/drm/panel/panel-raydium-rm67191.c > index 313637d53d28..d001c52e0ca9 100644 > --- a/drivers/gpu/drm/panel/panel-raydium-rm67191.c > +++ b/drivers/gpu/drm/panel/panel-raydium-rm67191.c > @@ -218,7 +218,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1920 + 10, > .vsync_end = 1920 + 10 + 2, > .vtotal = 1920 + 10 + 2 + 4, > - .vrefresh = 60, > .width_mm = 68, > .height_mm = 121, > .flags = DRM_MODE_FLAG_NHSYNC | > @@ -445,7 +444,7 @@ static int rad_panel_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c > index e8982948e0ea..81ae8be62d15 100644 > --- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c > +++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c > @@ -92,7 +92,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1280 + 12, > .vsync_end = 1280 + 12 + 4, > .vtotal = 1280 + 12 + 4 + 12, > - .vrefresh = 50, > .flags = 0, > .width_mm = 68, > .height_mm = 122, > @@ -339,7 +338,7 @@ static int rm68200_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_ERROR("failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > index 38ff742bc120..da4e373291f9 100644 > --- a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > +++ b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > @@ -223,7 +223,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1440 + 20, > .vsync_end = 1440 + 20 + 4, > .vtotal = 1440 + 20 + 4 + 12, > - .vrefresh = 60, > .clock = 75276, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > .width_mm = 65, > @@ -240,7 +239,7 @@ static int jh057n_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > @@ -360,7 +359,7 @@ static int jh057n_probe(struct mipi_dsi_device *dsi) > > DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh, > + drm_mode_vrefresh(&default_mode), > mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); > > jh057n_debugfs_init(ctx); > diff --git a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c > index ef18559e237e..a7b0b3e39e1a 100644 > --- a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c > +++ b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c > @@ -103,7 +103,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 600 + 12, > .vsync_end = 600 + 12 + 10, > .vtotal = 600 + 12 + 10 + 13, > - .vrefresh = 60, > > .width_mm = 154, > .height_mm = 85, > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c > index 2150043dcf6b..f02645d396ac 100644 > --- a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c > +++ b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c > @@ -37,12 +37,6 @@ static const struct drm_display_mode samsung_s6d16d0_mode = { > .vsync_start = 480 + 1, > .vsync_end = 480 + 1 + 1, > .vtotal = 480 + 1 + 1 + 1, > - /* > - * This depends on the clocking HS vs LP rate, this value > - * is calculated as: > - * vrefresh = (clock * 1000) / (htotal*vtotal) > - */ > - .vrefresh = 816, > .width_mm = 84, > .height_mm = 48, > }; > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c > index 36ebd5a4ac7b..80ef122e7466 100644 > --- a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c > @@ -617,7 +617,6 @@ static const struct drm_display_mode s6e3ha2_mode = { > .vsync_start = 2560 + 1, > .vsync_end = 2560 + 1 + 1, > .vtotal = 2560 + 1 + 1 + 15, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -636,7 +635,6 @@ static const struct drm_display_mode s6e3hf2_mode = { > .vsync_start = 2560 + 1, > .vsync_end = 2560 + 1 + 1, > .vtotal = 2560 + 1 + 1 + 15, > - .vrefresh = 60, > .flags = 0, > }; > > @@ -655,7 +653,7 @@ static int s6e3ha2_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_ERROR("failed to add mode %ux%ux@%u\n", > ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, > - ctx->desc->mode->vrefresh); > + drm_mode_vrefresh(ctx->desc->mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c > index a3570e0a90a8..1247656d73bf 100644 > --- a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c > @@ -52,7 +52,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 320 + 150, > .vsync_end = 320 + 150 + 1, > .vtotal = 320 + 150 + 1 + 2, > - .vrefresh = 30, > .flags = 0, > }; > > @@ -409,7 +408,7 @@ static int s6e63j0x03_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_ERROR("failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c > index a5f76eb4fa25..64421347bfd4 100644 > --- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c > @@ -117,7 +117,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 800 + 28, > .vsync_end = 800 + 28 + 2, > .vtotal = 800 + 28 + 2 + 1, > - .vrefresh = 60, > .width_mm = 53, > .height_mm = 89, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > @@ -371,7 +370,7 @@ static int s6e63m0_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_ERROR("failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c > index 9d843fcc3a22..485eabecfcc9 100644 > --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c > @@ -177,7 +177,6 @@ static const struct drm_display_mode s6e88a0_ams452ef01_mode = { > .vsync_start = 960 + 14, > .vsync_end = 960 + 14 + 2, > .vtotal = 960 + 14 + 2 + 8, > - .vrefresh = 60, > .width_mm = 56, > .height_mm = 100, > }; > diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c > index 40fcbbbacb2c..e417dc4921c2 100644 > --- a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c > +++ b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c > @@ -92,7 +92,8 @@ static int seiko_panel_get_fixed_modes(struct seiko_panel *panel, > mode = drm_mode_duplicate(connector->dev, m); > if (!mode) { > dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", > - m->hdisplay, m->vdisplay, m->vrefresh); > + m->hdisplay, m->vdisplay, > + drm_mode_vrefresh(m)); > continue; > } > > diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c > index b5d1977221a7..f07324b705b3 100644 > --- a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c > +++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c > @@ -269,7 +269,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1600 + 4, > .vsync_end = 1600 + 4 + 8, > .vtotal = 1600 + 4 + 8 + 32, > - .vrefresh = 60, > }; > > static int sharp_panel_get_modes(struct drm_panel *panel, > @@ -281,7 +280,7 @@ static int sharp_panel_get_modes(struct drm_panel *panel, > if (!mode) { > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c > index 1cf3f02435c1..d7bf13b9e1d6 100644 > --- a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c > +++ b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c > @@ -93,7 +93,6 @@ static const struct drm_display_mode ls037v7dw01_mode = { > .vsync_start = 640 + 1, > .vsync_end = 640 + 1 + 1, > .vtotal = 640 + 1 + 1 + 1, > - .vrefresh = 58, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > .width_mm = 56, > diff --git a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c > index ce586c6d70c7..b2e58935529c 100644 > --- a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c > +++ b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c > @@ -201,7 +201,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 960 + 3, > .vsync_end = 960 + 3 + 15, > .vtotal = 960 + 3 + 15 + 1, > - .vrefresh = 60, > }; > > static int sharp_nt_panel_get_modes(struct drm_panel *panel, > @@ -213,7 +212,7 @@ static int sharp_nt_panel_get_modes(struct drm_panel *panel, > if (!mode) { > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c > index 82363d05bad4..9ba9d69df41b 100644 > --- a/drivers/gpu/drm/panel/panel-simple.c > +++ b/drivers/gpu/drm/panel/panel-simple.c > @@ -161,7 +161,8 @@ static unsigned int panel_simple_get_display_modes(struct panel_simple *panel, > mode = drm_mode_duplicate(connector->dev, m); > if (!mode) { > dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", > - m->hdisplay, m->vdisplay, m->vrefresh); > + m->hdisplay, m->vdisplay, > + drm_mode_vrefresh(m)); > continue; > } > > @@ -494,7 +495,6 @@ static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = { > .vsync_start = 272 + 2, > .vsync_end = 272 + 2 + 10, > .vtotal = 272 + 2 + 10 + 2, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }; > > @@ -519,7 +519,6 @@ static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = { > .vsync_start = 480 + 2, > .vsync_end = 480 + 2 + 45, > .vtotal = 480 + 2 + 45 + 0, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }; > > @@ -570,7 +569,6 @@ static const struct drm_display_mode auo_b101aw03_mode = { > .vsync_start = 600 + 16, > .vsync_end = 600 + 16 + 6, > .vtotal = 600 + 16 + 6 + 16, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_b101aw03 = { > @@ -615,7 +613,6 @@ static const struct drm_display_mode auo_b101xtn01_mode = { > .vsync_start = 768 + 14, > .vsync_end = 768 + 14 + 42, > .vtotal = 768 + 14 + 42, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -639,7 +636,6 @@ static const struct drm_display_mode auo_b116xak01_mode = { > .vsync_start = 768 + 4, > .vsync_end = 768 + 4 + 6, > .vtotal = 768 + 4 + 6 + 15, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -668,7 +664,6 @@ static const struct drm_display_mode auo_b116xw03_mode = { > .vsync_start = 768 + 10, > .vsync_end = 768 + 10 + 12, > .vtotal = 768 + 10 + 12 + 6, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_b116xw03 = { > @@ -691,7 +686,6 @@ static const struct drm_display_mode auo_b133xtn01_mode = { > .vsync_start = 768 + 3, > .vsync_end = 768 + 3 + 6, > .vtotal = 768 + 3 + 6 + 13, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_b133xtn01 = { > @@ -714,7 +708,6 @@ static const struct drm_display_mode auo_b133htn01_mode = { > .vsync_start = 1080 + 25, > .vsync_end = 1080 + 25 + 10, > .vtotal = 1080 + 25 + 10 + 10, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_b133htn01 = { > @@ -770,7 +763,6 @@ static const struct drm_display_mode auo_g101evn010_mode = { > .vsync_start = 800 + 8, > .vsync_end = 800 + 8 + 2, > .vtotal = 800 + 8 + 2 + 6, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_g101evn010 = { > @@ -794,7 +786,6 @@ static const struct drm_display_mode auo_g104sn02_mode = { > .vsync_start = 600 + 10, > .vsync_end = 600 + 10 + 35, > .vtotal = 600 + 10 + 35 + 2, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_g104sn02 = { > @@ -906,7 +897,6 @@ static const struct drm_display_mode auo_t215hvn01_mode = { > .vsync_start = 1080 + 4, > .vsync_end = 1080 + 4 + 5, > .vtotal = 1080 + 4 + 5 + 36, > - .vrefresh = 60, > }; > > static const struct panel_desc auo_t215hvn01 = { > @@ -933,7 +923,6 @@ static const struct drm_display_mode avic_tm070ddh03_mode = { > .vsync_start = 600 + 17, > .vsync_end = 600 + 17 + 1, > .vtotal = 600 + 17 + 1 + 17, > - .vrefresh = 60, > }; > > static const struct panel_desc avic_tm070ddh03 = { > @@ -983,7 +972,6 @@ static const struct drm_display_mode boe_hv070wsa_mode = { > .vsync_start = 600 + 10, > .vsync_end = 600 + 10 + 10, > .vtotal = 600 + 10 + 10 + 10, > - .vrefresh = 60, > }; > > static const struct panel_desc boe_hv070wsa = { > @@ -1006,7 +994,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { > .vsync_start = 800 + 3, > .vsync_end = 800 + 3 + 5, > .vtotal = 800 + 3 + 5 + 24, > - .vrefresh = 60, > }, > { > .clock = 57500, > @@ -1018,7 +1005,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { > .vsync_start = 800 + 3, > .vsync_end = 800 + 3 + 5, > .vtotal = 800 + 3 + 5 + 24, > - .vrefresh = 48, > }, > }; > > @@ -1048,7 +1034,6 @@ static const struct drm_display_mode boe_nv140fhmn49_modes[] = { > .vsync_start = 1080 + 3, > .vsync_end = 1080 + 3 + 5, > .vtotal = 1125, > - .vrefresh = 60, > }, > }; > > @@ -1079,7 +1064,6 @@ static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { > .vsync_start = 272 + 8, > .vsync_end = 272 + 8 + 8, > .vtotal = 272 + 8 + 8 + 8, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -1104,7 +1088,6 @@ static const struct drm_display_mode cdtech_s070wv95_ct16_mode = { > .vsync_start = 480 + 29, > .vsync_end = 480 + 29 + 13, > .vtotal = 480 + 29 + 13 + 3, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -1128,7 +1111,6 @@ static const struct drm_display_mode chunghwa_claa070wp03xg_mode = { > .vsync_start = 1280 + 1, > .vsync_end = 1280 + 1 + 7, > .vtotal = 1280 + 1 + 7 + 15, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -1152,7 +1134,6 @@ static const struct drm_display_mode chunghwa_claa101wa01a_mode = { > .vsync_start = 768 + 4, > .vsync_end = 768 + 4 + 4, > .vtotal = 768 + 4 + 4 + 4, > - .vrefresh = 60, > }; > > static const struct panel_desc chunghwa_claa101wa01a = { > @@ -1175,7 +1156,6 @@ static const struct drm_display_mode chunghwa_claa101wb01_mode = { > .vsync_start = 768 + 16, > .vsync_end = 768 + 16 + 8, > .vtotal = 768 + 16 + 8 + 16, > - .vrefresh = 60, > }; > > static const struct panel_desc chunghwa_claa101wb01 = { > @@ -1198,7 +1178,6 @@ static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = { > .vsync_start = 480 + 10, > .vsync_end = 480 + 10 + 2, > .vtotal = 480 + 10 + 2 + 33, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -1285,7 +1264,6 @@ static const struct drm_display_mode edt_et035012dm6_mode = { > .vsync_start = 240 + 4, > .vsync_end = 240 + 4 + 4, > .vtotal = 240 + 4 + 4 + 14, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -1317,7 +1295,6 @@ static const struct drm_display_mode edt_etm043080dh6gp_mode = { > .vsync_start = 288 + 2, > .vsync_end = 288 + 2 + 4, > .vtotal = 288 + 2 + 4 + 10, > - .vrefresh = 60, > }; > > static const struct panel_desc edt_etm043080dh6gp = { > @@ -1342,7 +1319,6 @@ static const struct drm_display_mode edt_etm0430g0dh6_mode = { > .vsync_start = 272 + 2, > .vsync_end = 272 + 2 + 10, > .vtotal = 272 + 2 + 10 + 2, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -1366,7 +1342,6 @@ static const struct drm_display_mode edt_et057090dhu_mode = { > .vsync_start = 480 + 10, > .vsync_end = 480 + 10 + 3, > .vtotal = 480 + 10 + 3 + 32, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -1392,7 +1367,6 @@ static const struct drm_display_mode edt_etm0700g0dh6_mode = { > .vsync_start = 480 + 10, > .vsync_end = 480 + 10 + 2, > .vtotal = 480 + 10 + 2 + 33, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -1457,7 +1431,6 @@ static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = { > .vsync_start = 480 + 37, > .vsync_end = 480 + 37 + 2, > .vtotal = 480 + 37 + 2 + 8, > - .vrefresh = 60, > }; > > static const struct panel_desc foxlink_fl500wvr00_a0t = { > @@ -1481,7 +1454,6 @@ static const struct drm_display_mode frida_frd350h54004_mode = { > .vsync_start = 240 + 2, > .vsync_end = 240 + 2 + 6, > .vtotal = 240 + 2 + 6 + 2, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }; > > @@ -1508,7 +1480,6 @@ static const struct drm_display_mode friendlyarm_hd702e_mode = { > .vsync_start = 1280 + 4, > .vsync_end = 1280 + 4 + 8, > .vtotal = 1280 + 4 + 8 + 4, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -1531,7 +1502,6 @@ static const struct drm_display_mode giantplus_gpg482739qs5_mode = { > .vsync_start = 272 + 8, > .vsync_end = 272 + 8 + 1, > .vtotal = 272 + 8 + 1 + 8, > - .vrefresh = 60, > }; > > static const struct panel_desc giantplus_gpg482739qs5 = { > @@ -1635,7 +1605,6 @@ static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = { > .vsync_start = 480 + 16, > .vsync_end = 480 + 16 + 13, > .vtotal = 480 + 16 + 13 + 16, > - .vrefresh = 60, > }; > > static const struct panel_desc hitachi_tx23d38vm0caa = { > @@ -1662,7 +1631,6 @@ static const struct drm_display_mode innolux_at043tn24_mode = { > .vsync_start = 272 + 2, > .vsync_end = 272 + 2 + 10, > .vtotal = 272 + 2 + 10 + 2, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -1688,7 +1656,6 @@ static const struct drm_display_mode innolux_at070tn92_mode = { > .vsync_start = 480 + 22, > .vsync_end = 480 + 22 + 10, > .vtotal = 480 + 22 + 23 + 10, > - .vrefresh = 60, > }; > > static const struct panel_desc innolux_at070tn92 = { > @@ -1799,7 +1766,6 @@ static const struct drm_display_mode innolux_g121x1_l03_mode = { > .vsync_start = 768 + 38, > .vsync_end = 768 + 38 + 1, > .vtotal = 768 + 38 + 1 + 0, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -1861,7 +1827,6 @@ static const struct drm_display_mode innolux_n156bge_l21_mode = { > .vsync_start = 768 + 2, > .vsync_end = 768 + 2 + 6, > .vtotal = 768 + 2 + 6 + 12, > - .vrefresh = 60, > }; > > static const struct panel_desc innolux_n156bge_l21 = { > @@ -1884,7 +1849,6 @@ static const struct drm_display_mode innolux_p120zdg_bf1_mode = { > .vsync_start = 1440 + 3, > .vsync_end = 1440 + 3 + 10, > .vtotal = 1440 + 3 + 10 + 27, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }; > > @@ -1912,7 +1876,6 @@ static const struct drm_display_mode innolux_zj070na_01p_mode = { > .vsync_start = 600 + 16, > .vsync_end = 600 + 16 + 4, > .vtotal = 600 + 16 + 4 + 16, > - .vrefresh = 60, > }; > > static const struct panel_desc innolux_zj070na_01p = { > @@ -2008,7 +1971,6 @@ static const struct drm_display_mode lemaker_bl035_rgb_002_mode = { > .vsync_start = 240 + 4, > .vsync_end = 240 + 4 + 3, > .vtotal = 240 + 4 + 3 + 15, > - .vrefresh = 60, > }; > > static const struct panel_desc lemaker_bl035_rgb_002 = { > @@ -2032,7 +1994,6 @@ static const struct drm_display_mode lg_lb070wv8_mode = { > .vsync_start = 480 + 10, > .vsync_end = 480 + 10 + 25, > .vtotal = 480 + 10 + 25 + 10, > - .vrefresh = 60, > }; > > static const struct panel_desc lg_lb070wv8 = { > @@ -2057,7 +2018,6 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { > .vsync_start = 2048 + 8, > .vsync_end = 2048 + 8 + 4, > .vtotal = 2048 + 8 + 4 + 8, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -2080,7 +2040,6 @@ static const struct drm_display_mode lg_lp097qx1_spa1_mode = { > .vsync_start = 1536 + 3, > .vsync_end = 1536 + 3 + 1, > .vtotal = 1536 + 3 + 1 + 9, > - .vrefresh = 60, > }; > > static const struct panel_desc lg_lp097qx1_spa1 = { > @@ -2102,7 +2061,6 @@ static const struct drm_display_mode lg_lp120up1_mode = { > .vsync_start = 1280 + 4, > .vsync_end = 1280 + 4 + 4, > .vtotal = 1280 + 4 + 4 + 12, > - .vrefresh = 60, > }; > > static const struct panel_desc lg_lp120up1 = { > @@ -2125,7 +2083,6 @@ static const struct drm_display_mode lg_lp129qe_mode = { > .vsync_start = 1700 + 3, > .vsync_end = 1700 + 3 + 10, > .vtotal = 1700 + 3 + 10 + 36, > - .vrefresh = 60, > }; > > static const struct panel_desc lg_lp129qe = { > @@ -2206,7 +2163,6 @@ static const struct drm_display_mode mitsubishi_aa070mc01_mode = { > .vsync_start = 480 + 0, > .vsync_end = 480 + 48 + 1, > .vtotal = 480 + 48 + 1 + 0, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -2221,7 +2177,6 @@ static const struct drm_display_mode logicpd_type_28_mode = { > .vsync_start = 272 + 2, > .vsync_end = 272 + 2 + 11, > .vtotal = 272 + 2 + 11 + 3, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }; > > @@ -2301,7 +2256,6 @@ static const struct drm_display_mode nec_nl4827hc19_05b_mode = { > .vsync_start = 272 + 2, > .vsync_end = 272 + 2 + 4, > .vtotal = 272 + 2 + 4 + 2, > - .vrefresh = 74, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -2327,7 +2281,6 @@ static const struct drm_display_mode netron_dy_e231732_mode = { > .vsync_start = 600 + 127, > .vsync_end = 600 + 127 + 20, > .vtotal = 600 + 127 + 20 + 3, > - .vrefresh = 60, > }; > > static const struct panel_desc netron_dy_e231732 = { > @@ -2350,7 +2303,6 @@ static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = { > .vsync_start = 272 + 2, > .vsync_end = 272 + 2 + 10, > .vtotal = 272 + 2 + 10 + 2, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -2458,7 +2410,6 @@ static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = { > .vsync_start = 272 + 8, > .vsync_end = 272 + 8 + 5, > .vtotal = 272 + 8 + 5 + 3, > - .vrefresh = 60, > }; > > static const struct panel_desc olimex_lcd_olinuxino_43ts = { > @@ -2486,7 +2437,6 @@ static const struct drm_display_mode ontat_yx700wv03_mode = { > .vsync_start = 483, > .vsync_end = 493, > .vtotal = 500, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -2515,7 +2465,6 @@ static const struct drm_display_mode ortustech_com37h3m_mode = { > .vsync_start = 640 + 4, > .vsync_end = 640 + 4 + 3, > .vtotal = 640 + 4 + 3 + 4, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -2542,7 +2491,6 @@ static const struct drm_display_mode ortustech_com43h4m85ulc_mode = { > .vsync_start = 800 + 3, > .vsync_end = 800 + 3 + 3, > .vtotal = 800 + 3 + 3 + 3, > - .vrefresh = 60, > }; > > static const struct panel_desc ortustech_com43h4m85ulc = { > @@ -2567,7 +2515,6 @@ static const struct drm_display_mode osddisplays_osd070t1718_19ts_mode = { > .vsync_start = 480 + 22, > .vsync_end = 480 + 22 + 13, > .vtotal = 480 + 22 + 13 + 10, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -2594,7 +2541,6 @@ static const struct drm_display_mode pda_91_00156_a0_mode = { > .vsync_start = 480 + 1, > .vsync_end = 480 + 1 + 23, > .vtotal = 480 + 1 + 23 + 22, > - .vrefresh = 60, > }; > > static const struct panel_desc pda_91_00156_a0 = { > @@ -2618,7 +2564,6 @@ static const struct drm_display_mode qd43003c0_40_mode = { > .vsync_start = 272 + 4, > .vsync_end = 272 + 4 + 10, > .vtotal = 272 + 4 + 10 + 2, > - .vrefresh = 60, > }; > > static const struct panel_desc qd43003c0_40 = { > @@ -2672,7 +2617,6 @@ static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = { > .vsync_start = 800 + 2, > .vsync_end = 800 + 2 + 5, > .vtotal = 800 + 2 + 5 + 16, > - .vrefresh = 60, > }; > > static const struct panel_desc rocktech_rk101ii01d_ct = { > @@ -2701,7 +2645,6 @@ static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { > .vsync_start = 1600 + 2, > .vsync_end = 1600 + 2 + 5, > .vtotal = 1600 + 2 + 5 + 57, > - .vrefresh = 60, > }; > > static const struct panel_desc samsung_lsn122dl01_c01 = { > @@ -2723,7 +2666,6 @@ static const struct drm_display_mode samsung_ltn101nt05_mode = { > .vsync_start = 600 + 3, > .vsync_end = 600 + 3 + 6, > .vtotal = 600 + 3 + 6 + 61, > - .vrefresh = 60, > }; > > static const struct panel_desc samsung_ltn101nt05 = { > @@ -2746,7 +2688,6 @@ static const struct drm_display_mode samsung_ltn140at29_301_mode = { > .vsync_start = 768 + 2, > .vsync_end = 768 + 2 + 5, > .vtotal = 768 + 2 + 5 + 17, > - .vrefresh = 60, > }; > > static const struct panel_desc samsung_ltn140at29_301 = { > @@ -2793,7 +2734,6 @@ static const struct drm_display_mode sharp_ld_d5116z01b_mode = { > .vsync_start = 1280 + 3, > .vsync_end = 1280 + 3 + 10, > .vtotal = 1280 + 3 + 10 + 57, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }; > > @@ -2819,7 +2759,6 @@ static const struct drm_display_mode sharp_lq070y3dg3b_mode = { > .vsync_start = 480 + 8, > .vsync_end = 480 + 8 + 2, > .vtotal = 480 + 8 + 2 + 35, > - .vrefresh = 60, > .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE, > }; > > @@ -2846,7 +2785,6 @@ static const struct drm_display_mode sharp_lq035q7db03_mode = { > .vsync_start = 320 + 9, > .vsync_end = 320 + 9 + 1, > .vtotal = 320 + 9 + 1 + 7, > - .vrefresh = 60, > }; > > static const struct panel_desc sharp_lq035q7db03 = { > @@ -2923,7 +2861,6 @@ static const struct drm_display_mode sharp_lq150x1lg11_mode = { > .vsync_start = 768 + 37, > .vsync_end = 768 + 37 + 2, > .vtotal = 768 + 37 + 2 + 8, > - .vrefresh = 60, > }; > > static const struct panel_desc sharp_lq150x1lg11 = { > @@ -2974,7 +2911,6 @@ static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = { > .vsync_start = 480 + 1, > .vsync_end = 480 + 1 + 23, > .vtotal = 480 + 1 + 23 + 22, > - .vrefresh = 60, > }; > > static const struct panel_desc shelly_sca07010_bfn_lnn = { > @@ -2997,7 +2933,6 @@ static const struct drm_display_mode starry_kr122ea0sra_mode = { > .vsync_start = 1200 + 15, > .vsync_end = 1200 + 15 + 2, > .vtotal = 1200 + 15 + 2 + 18, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -3025,7 +2960,6 @@ static const struct drm_display_mode tfc_s9700rtwv43tr_01b_mode = { > .vsync_start = 480 + 13, > .vsync_end = 480 + 13 + 2, > .vtotal = 480 + 13 + 2 + 29, > - .vrefresh = 62, > }; > > static const struct panel_desc tfc_s9700rtwv43tr_01b = { > @@ -3101,7 +3035,6 @@ static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = { > .vsync_start = 240 + 3, > .vsync_end = 240 + 3 + 1, > .vtotal = 240 + 3 + 1 + 17, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }, > }; > @@ -3129,7 +3062,6 @@ static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = { > .vsync_start = 240 + 0, > .vsync_end = 240 + 0 + 1, > .vtotal = 240 + 0 + 1 + 0, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > }, > }; > @@ -3158,7 +3090,6 @@ static const struct drm_display_mode toshiba_lt089ac29000_mode = { > .vsync_start = 768 + 20, > .vsync_end = 768 + 20 + 7, > .vtotal = 768 + 20 + 7 + 3, > - .vrefresh = 60, > }; > > static const struct panel_desc toshiba_lt089ac29000 = { > @@ -3183,7 +3114,6 @@ static const struct drm_display_mode tpk_f07a_0102_mode = { > .vsync_start = 480 + 10, > .vsync_end = 480 + 10 + 2, > .vtotal = 480 + 10 + 2 + 33, > - .vrefresh = 60, > }; > > static const struct panel_desc tpk_f07a_0102 = { > @@ -3206,7 +3136,6 @@ static const struct drm_display_mode tpk_f10a_0102_mode = { > .vsync_start = 600 + 20, > .vsync_end = 600 + 20 + 5, > .vtotal = 600 + 20 + 5 + 25, > - .vrefresh = 60, > }; > > static const struct panel_desc tpk_f10a_0102 = { > @@ -3265,7 +3194,6 @@ static const struct drm_display_mode vl050_8048nt_c01_mode = { > .vsync_start = 480 + 22, > .vsync_end = 480 + 22 + 10, > .vtotal = 480 + 22 + 10 + 23, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > @@ -3291,7 +3219,6 @@ static const struct drm_display_mode winstar_wf35ltiacd_mode = { > .vsync_start = 240 + 4, > .vsync_end = 240 + 4 + 3, > .vtotal = 240 + 4 + 3 + 15, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -3317,7 +3244,6 @@ static const struct drm_display_mode arm_rtsm_mode[] = { > .vsync_start = 768 + 3, > .vsync_end = 768 + 3 + 6, > .vtotal = 768 + 3 + 6 + 29, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }, > }; > @@ -3743,7 +3669,6 @@ static const struct drm_display_mode auo_b080uan01_mode = { > .vsync_start = 1920 + 9, > .vsync_end = 1920 + 9 + 2, > .vtotal = 1920 + 9 + 2 + 8, > - .vrefresh = 60, > }; > > static const struct panel_desc_dsi auo_b080uan01 = { > @@ -3771,7 +3696,6 @@ static const struct drm_display_mode boe_tv080wum_nl0_mode = { > .vsync_start = 1920 + 21, > .vsync_end = 1920 + 21 + 3, > .vtotal = 1920 + 21 + 3 + 18, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > }; > > @@ -3801,7 +3725,6 @@ static const struct drm_display_mode lg_ld070wx3_sl01_mode = { > .vsync_start = 1280 + 28, > .vsync_end = 1280 + 28 + 1, > .vtotal = 1280 + 28 + 1 + 14, > - .vrefresh = 60, > }; > > static const struct panel_desc_dsi lg_ld070wx3_sl01 = { > @@ -3829,7 +3752,6 @@ static const struct drm_display_mode lg_lh500wx1_sd03_mode = { > .vsync_start = 1280 + 8, > .vsync_end = 1280 + 8 + 4, > .vtotal = 1280 + 8 + 4 + 12, > - .vrefresh = 60, > }; > > static const struct panel_desc_dsi lg_lh500wx1_sd03 = { > @@ -3857,7 +3779,6 @@ static const struct drm_display_mode panasonic_vvx10f004b00_mode = { > .vsync_start = 1200 + 17, > .vsync_end = 1200 + 17 + 2, > .vtotal = 1200 + 17 + 2 + 16, > - .vrefresh = 60, > }; > > static const struct panel_desc_dsi panasonic_vvx10f004b00 = { > @@ -3886,7 +3807,6 @@ static const struct drm_display_mode lg_acx467akm_7_mode = { > .vsync_start = 1920 + 2, > .vsync_end = 1920 + 2 + 2, > .vtotal = 1920 + 2 + 2 + 2, > - .vrefresh = 60, > }; > > static const struct panel_desc_dsi lg_acx467akm_7 = { > @@ -3914,7 +3834,6 @@ static const struct drm_display_mode osd101t2045_53ts_mode = { > .vsync_start = 1200 + 16, > .vsync_end = 1200 + 16 + 2, > .vtotal = 1200 + 16 + 2 + 16, > - .vrefresh = 60, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > }; > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > index 4b4f2558e3b4..692041ae4eb6 100644 > --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > @@ -272,7 +272,7 @@ static int st7701_get_modes(struct drm_panel *panel, > DRM_DEV_ERROR(&st7701->dsi->dev, > "failed to add mode %ux%ux@%u\n", > desc_mode->hdisplay, desc_mode->vdisplay, > - desc_mode->vrefresh); > + drm_mode_vrefresh(desc_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c > index cc02c54c1b2e..3513ae40efa8 100644 > --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c > @@ -165,7 +165,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 320 + 8, > .vsync_end = 320 + 8 + 4, > .vtotal = 320 + 8 + 4 + 4, > - .vrefresh = 60, > }; > > static int st7789v_get_modes(struct drm_panel *panel, > @@ -177,7 +176,7 @@ static int st7789v_get_modes(struct drm_panel *panel, > if (!mode) { > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/panel/panel-sony-acx424akp.c b/drivers/gpu/drm/panel/panel-sony-acx424akp.c > index de0abf76ae6f..eba05bd6ec9a 100644 > --- a/drivers/gpu/drm/panel/panel-sony-acx424akp.c > +++ b/drivers/gpu/drm/panel/panel-sony-acx424akp.c > @@ -57,7 +57,6 @@ static const struct drm_display_mode sony_acx424akp_vid_mode = { > .vsync_start = 864 + 14, > .vsync_end = 864 + 14 + 1, > .vtotal = 864 + 14 + 1 + 11, > - .vrefresh = 60, > .width_mm = 48, > .height_mm = 84, > .flags = DRM_MODE_FLAG_PVSYNC, > @@ -81,7 +80,6 @@ static const struct drm_display_mode sony_acx424akp_cmd_mode = { > * Some desired refresh rate, experiments at the maximum "pixel" > * clock speed (HS clock 420 MHz) yields around 117Hz. > */ > - .vrefresh = 60, > .width_mm = 48, > .height_mm = 84, > }; > diff --git a/drivers/gpu/drm/panel/panel-sony-acx565akm.c b/drivers/gpu/drm/panel/panel-sony-acx565akm.c > index 5c4b6f6e5c2d..fc6a7e451abe 100644 > --- a/drivers/gpu/drm/panel/panel-sony-acx565akm.c > +++ b/drivers/gpu/drm/panel/panel-sony-acx565akm.c > @@ -514,7 +514,6 @@ static const struct drm_display_mode acx565akm_mode = { > .vsync_start = 480 + 3, > .vsync_end = 480 + 3 + 3, > .vtotal = 480 + 3 + 3 + 4, > - .vrefresh = 57, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > .width_mm = 77, > diff --git a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c > index aeca15dfeb3c..58d683cc5215 100644 > --- a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c > +++ b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c > @@ -281,7 +281,6 @@ static const struct drm_display_mode td028ttec1_mode = { > .vsync_start = 640 + 4, > .vsync_end = 640 + 4 + 2, > .vtotal = 640 + 4 + 2 + 2, > - .vrefresh = 66, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > .width_mm = 43, > diff --git a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c > index 75f1f1f1b6de..9b2a356c4d9a 100644 > --- a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c > +++ b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c > @@ -339,7 +339,6 @@ static const struct drm_display_mode td043mtea1_mode = { > .vsync_start = 480 + 39, > .vsync_end = 480 + 39 + 1, > .vtotal = 480 + 39 + 1 + 34, > - .vrefresh = 60, > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > .width_mm = 94, > diff --git a/drivers/gpu/drm/panel/panel-tpo-tpg110.c b/drivers/gpu/drm/panel/panel-tpo-tpg110.c > index 8472d018c16f..c7a2f0ae5ba5 100644 > --- a/drivers/gpu/drm/panel/panel-tpo-tpg110.c > +++ b/drivers/gpu/drm/panel/panel-tpo-tpg110.c > @@ -112,7 +112,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > .vsync_start = 480 + 10, > .vsync_end = 480 + 10 + 1, > .vtotal = 480 + 10 + 1 + 35, > - .vrefresh = 60, > }, > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > }, > @@ -129,7 +128,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > .vsync_start = 480 + 18, > .vsync_end = 480 + 18 + 1, > .vtotal = 480 + 18 + 1 + 27, > - .vrefresh = 60, > }, > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > }, > @@ -146,7 +144,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > .vsync_start = 272 + 2, > .vsync_end = 272 + 2 + 1, > .vtotal = 272 + 2 + 1 + 12, > - .vrefresh = 60, > }, > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > }, > @@ -163,7 +160,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > .vsync_start = 640 + 4, > .vsync_end = 640 + 4 + 1, > .vtotal = 640 + 4 + 1 + 8, > - .vrefresh = 60, > }, > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > }, > @@ -180,7 +176,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > .vsync_start = 240 + 2, > .vsync_end = 240 + 2 + 1, > .vtotal = 240 + 2 + 1 + 20, > - .vrefresh = 60, > }, > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > }, > diff --git a/drivers/gpu/drm/panel/panel-truly-nt35597.c b/drivers/gpu/drm/panel/panel-truly-nt35597.c > index 012ca62bf30e..9d669088cffc 100644 > --- a/drivers/gpu/drm/panel/panel-truly-nt35597.c > +++ b/drivers/gpu/drm/panel/panel-truly-nt35597.c > @@ -536,7 +536,6 @@ static const struct drm_display_mode qcom_sdm845_mtp_2k_mode = { > .vsync_start = 2560 + 8, > .vsync_end = 2560 + 8 + 1, > .vtotal = 2560 + 8 + 1 + 7, > - .vrefresh = 60, > .flags = 0, > }; > > diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c > index 1645aceab597..8a3b2f906e63 100644 > --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c > +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c > @@ -243,7 +243,6 @@ static const struct drm_display_mode default_mode = { > .vsync_start = 1280 + 22, > .vsync_end = 1280 + 22 + 4, > .vtotal = 1280 + 22 + 4 + 11, > - .vrefresh = 60, > .clock = 64000, > .width_mm = 68, > .height_mm = 121, > @@ -259,7 +258,7 @@ static int xpp055c272_get_modes(struct drm_panel *panel, > if (!mode) { > DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", > default_mode.hdisplay, default_mode.vdisplay, > - default_mode.vrefresh); > + drm_mode_vrefresh(&default_mode)); > return -ENOMEM; > } > > diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c > index 2bb32009d117..3dc6e2e96541 100644 > --- a/drivers/gpu/drm/sti/sti_hda.c > +++ b/drivers/gpu/drm/sti/sti_hda.c > @@ -586,7 +586,6 @@ static int sti_hda_connector_get_modes(struct drm_connector *connector) > &hda_supported_modes[i].mode); > if (!mode) > continue; > - mode->vrefresh = drm_mode_vrefresh(mode); > > /* the first mode is the preferred mode */ > if (i == 0) > diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c > index eb6e23e8d8ef..0b07f7b5ece4 100644 > --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c > +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c > @@ -2226,7 +2226,6 @@ void vmw_guess_mode_timing(struct drm_display_mode *mode) > mode->vtotal = mode->vsync_end + 50; > > mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; > - mode->vrefresh = drm_mode_vrefresh(mode); > } > > > @@ -2300,7 +2299,6 @@ int vmw_du_connector_fill_modes(struct drm_connector *connector, > mode = drm_mode_duplicate(dev, bmode); > if (!mode) > return 0; > - mode->vrefresh = drm_mode_vrefresh(mode); > > drm_mode_probed_add(connector, mode); > } > diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h > index 7dab7f172431..52e8ca613e4b 100644 > --- a/include/drm/drm_modes.h > +++ b/include/drm/drm_modes.h > @@ -380,16 +380,6 @@ struct drm_display_mode { > */ > int private_flags; > > - /** > - * @vrefresh: > - * > - * Vertical refresh rate, for debug output in human readable form. Not > - * used in a functional way. > - * > - * This value is in Hz. > - */ > - int vrefresh; > - > /** > * @picture_aspect_ratio: > * > @@ -421,7 +411,7 @@ struct drm_display_mode { > * @m: display mode > */ > #define DRM_MODE_ARG(m) \ > - (m)->name, (m)->vrefresh, (m)->clock, \ > + (m)->name, drm_mode_vrefresh(m), (m)->clock, \ > (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \ > (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \ > (m)->type, (m)->flags _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh 2020-02-24 14:14 ` Andrzej Hajda @ 2020-02-25 11:21 ` Ville Syrjälä 2020-02-25 15:19 ` Andrzej Hajda 0 siblings, 1 reply; 9+ messages in thread From: Ville Syrjälä @ 2020-02-25 11:21 UTC (permalink / raw) To: Andrzej Hajda Cc: Neil Armstrong, nouveau, Guido Günther, dri-devel, Thierry Reding, Laurent Pinchart, Sam Ravnborg, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, VMware Graphics, Jagan Teki, Robert Chiras, Icenowy Zheng, Jonas Karlman, intel-gfx, Ben Skeggs, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park On Mon, Feb 24, 2020 at 03:14:54PM +0100, Andrzej Hajda wrote: > On 19.02.2020 21:35, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > Get rid of mode->vrefresh and just calculate it on demand. Saves > > a bit of space and avoids the cached value getting out of sync > > with reality. > > > > Mostly done with cocci, with the following manual fixups: > > - Remove the now empty loop in drm_helper_probe_single_connector_modes() > > - Fix __MODE() macro in ch7006_mode.c > > - Fix DRM_MODE_ARG() macro in drm_modes.h > > - Remove leftover comment from samsung_s6d16d0_mode > ... > > diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c > > index 41444a73c980..47b37fef7ee8 100644 > > --- a/drivers/gpu/drm/panel/panel-arm-versatile.c > > +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c > > @@ -143,7 +143,6 @@ static const struct versatile_panel_type versatile_panels[] = { > > .vsync_start = 240 + 5, > > .vsync_end = 240 + 5 + 6, > > .vtotal = 240 + 5 + 6 + 5, > > - .vrefresh = 116, > > > Are you sure vrefresh calculated (from totals and clock) is different > than this field? If not, we risk regressions. > > This case is OK, but there is plenty other cases. IIRC I did spot check a few of them. But which code exactly do you think is abusing vrefresh and thus could break? > > > Regards > > Andrzej > > > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }, > > }, > > @@ -167,7 +166,6 @@ static const struct versatile_panel_type versatile_panels[] = { > > .vsync_start = 480 + 11, > > .vsync_end = 480 + 11 + 2, > > .vtotal = 480 + 11 + 2 + 32, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }, > > }, > > @@ -190,7 +188,6 @@ static const struct versatile_panel_type versatile_panels[] = { > > .vsync_start = 220 + 0, > > .vsync_end = 220 + 0 + 2, > > .vtotal = 220 + 0 + 2 + 1, > > - .vrefresh = 390, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }, > > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, > > @@ -214,7 +211,6 @@ static const struct versatile_panel_type versatile_panels[] = { > > .vsync_start = 320 + 2, > > .vsync_end = 320 + 2 + 2, > > .vtotal = 320 + 2 + 2 + 2, > > - .vrefresh = 116, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }, > > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, > > diff --git a/drivers/gpu/drm/panel/panel-boe-himax8279d.c b/drivers/gpu/drm/panel/panel-boe-himax8279d.c > > index 74d58ee7d04c..7c27bd5e3486 100644 > > --- a/drivers/gpu/drm/panel/panel-boe-himax8279d.c > > +++ b/drivers/gpu/drm/panel/panel-boe-himax8279d.c > > @@ -229,7 +229,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, > > mode = drm_mode_duplicate(connector->dev, m); > > if (!mode) { > > DRM_DEV_ERROR(pinfo->base.dev, "failed to add mode %ux%u@%u\n", > > - m->hdisplay, m->vdisplay, m->vrefresh); > > + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); > > return -ENOMEM; > > } > > > > @@ -262,7 +262,6 @@ static const struct drm_display_mode default_display_mode = { > > .vsync_start = 1920 + 10, > > .vsync_end = 1920 + 10 + 14, > > .vtotal = 1920 + 10 + 14 + 4, > > - .vrefresh = 60, > > }; > > > > /* 8 inch */ > > diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > > index 48a164257d18..c580bd1e121c 100644 > > --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > > +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c > > @@ -594,7 +594,6 @@ static const struct drm_display_mode boe_tv101wum_nl6_default_mode = { > > .vsync_start = 1920 + 10, > > .vsync_end = 1920 + 10 + 14, > > .vtotal = 1920 + 10 + 14 + 4, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc boe_tv101wum_nl6_desc = { > > @@ -622,7 +621,6 @@ static const struct drm_display_mode auo_kd101n80_45na_default_mode = { > > .vsync_start = 1920 + 16, > > .vsync_end = 1920 + 16 + 4, > > .vtotal = 1920 + 16 + 4 + 16, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_kd101n80_45na_desc = { > > @@ -650,7 +648,6 @@ static const struct drm_display_mode boe_tv101wum_n53_default_mode = { > > .vsync_start = 1920 + 20, > > .vsync_end = 1920 + 20 + 4, > > .vtotal = 1920 + 20 + 4 + 10, > > - .vrefresh = 60, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > }; > > > > @@ -678,7 +675,6 @@ static const struct drm_display_mode auo_b101uan08_3_default_mode = { > > .vsync_start = 1920 + 34, > > .vsync_end = 1920 + 34 + 2, > > .vtotal = 1920 + 34 + 2 + 24, > > - .vrefresh = 60, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > }; > > > > @@ -706,7 +702,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, > > mode = drm_mode_duplicate(connector->dev, m); > > if (!mode) { > > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > > - m->hdisplay, m->vdisplay, m->vrefresh); > > + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c > > index fddbfddf6566..54610651ecdb 100644 > > --- a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c > > +++ b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c > > @@ -392,7 +392,6 @@ static int k101_im2ba02_unprepare(struct drm_panel *panel) > > > > static const struct drm_display_mode k101_im2ba02_default_mode = { > > .clock = 70000, > > - .vrefresh = 60, > > > > .hdisplay = 800, > > .hsync_start = 800 + 20, > > @@ -420,7 +419,7 @@ static int k101_im2ba02_get_modes(struct drm_panel *panel, > > DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", > > k101_im2ba02_default_mode.hdisplay, > > k101_im2ba02_default_mode.vdisplay, > > - k101_im2ba02_default_mode.vrefresh); > > + drm_mode_vrefresh(&k101_im2ba02_default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c > > index 95b789ab9d29..19a6274b10f5 100644 > > --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c > > +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c > > @@ -153,7 +153,6 @@ static const struct drm_display_mode feiyang_default_mode = { > > .vsync_start = 600 + 12, > > .vsync_end = 600 + 12 + 2, > > .vtotal = 600 + 12 + 2 + 21, > > - .vrefresh = 60, > > > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > }; > > @@ -169,7 +168,7 @@ static int feiyang_get_modes(struct drm_panel *panel, > > DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", > > feiyang_default_mode.hdisplay, > > feiyang_default_mode.vdisplay, > > - feiyang_default_mode.vrefresh); > > + drm_mode_vrefresh(&feiyang_default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c > > index f394d53a7da4..d2c98d381bef 100644 > > --- a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c > > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c > > @@ -549,7 +549,6 @@ static const struct drm_display_mode srgb_320x240_mode = { > > .vsync_start = 240 + 4, > > .vsync_end = 240 + 4 + 1, > > .vtotal = 262, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -563,7 +562,6 @@ static const struct drm_display_mode srgb_360x240_mode = { > > .vsync_start = 240 + 21, > > .vsync_end = 240 + 21 + 1, > > .vtotal = 262, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -578,7 +576,6 @@ static const struct drm_display_mode prgb_320x240_mode = { > > .vsync_start = 240 + 4, > > .vsync_end = 240 + 4 + 1, > > .vtotal = 262, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -593,7 +590,6 @@ static const struct drm_display_mode yuv_640x320_mode = { > > .vsync_start = 320 + 4, > > .vsync_end = 320 + 4 + 1, > > .vtotal = 320 + 4 + 1 + 18, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -607,7 +603,6 @@ static const struct drm_display_mode yuv_720x360_mode = { > > .vsync_start = 360 + 4, > > .vsync_end = 360 + 4 + 1, > > .vtotal = 360 + 4 + 1 + 18, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -622,7 +617,6 @@ static const struct drm_display_mode itu_r_bt_656_640_mode = { > > .vsync_start = 480 + 4, > > .vsync_end = 480 + 4 + 1, > > .vtotal = 500, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -637,7 +631,6 @@ static const struct drm_display_mode itu_r_bt_656_720_mode = { > > .vsync_start = 480 + 4, > > .vsync_end = 480 + 4 + 1, > > .vtotal = 500, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c > > index f54077c216a3..3ed8635a6fbd 100644 > > --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c > > +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c > > @@ -370,7 +370,6 @@ static int ili9881c_unprepare(struct drm_panel *panel) > > > > static const struct drm_display_mode bananapi_default_mode = { > > .clock = 62000, > > - .vrefresh = 60, > > > > .hdisplay = 720, > > .hsync_start = 720 + 10, > > @@ -394,7 +393,7 @@ static int ili9881c_get_modes(struct drm_panel *panel, > > dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", > > bananapi_default_mode.hdisplay, > > bananapi_default_mode.vdisplay, > > - bananapi_default_mode.vrefresh); > > + drm_mode_vrefresh(&bananapi_default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c b/drivers/gpu/drm/panel/panel-innolux-p079zca.c > > index 7419f1f0acee..fdf030f4cf92 100644 > > --- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c > > +++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c > > @@ -223,7 +223,6 @@ static const struct drm_display_mode innolux_p079zca_mode = { > > .vsync_start = 1024 + 20, > > .vsync_end = 1024 + 20 + 4, > > .vtotal = 1024 + 20 + 4 + 20, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc innolux_p079zca_panel_desc = { > > @@ -257,7 +256,6 @@ static const struct drm_display_mode innolux_p097pfg_mode = { > > .vsync_start = 2048 + 100, > > .vsync_end = 2048 + 100 + 2, > > .vtotal = 2048 + 100 + 2 + 18, > > - .vrefresh = 60, > > }; > > > > /* > > @@ -401,7 +399,7 @@ static int innolux_panel_get_modes(struct drm_panel *panel, > > mode = drm_mode_duplicate(connector->dev, m); > > if (!mode) { > > DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", > > - m->hdisplay, m->vdisplay, m->vrefresh); > > + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c > > index 4bfd8c877c8e..1e3fd6633981 100644 > > --- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c > > +++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c > > @@ -296,7 +296,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1920 + 3, > > .vsync_end = 1920 + 3 + 5, > > .vtotal = 1920 + 3 + 5 + 6, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -311,7 +310,7 @@ static int jdi_panel_get_modes(struct drm_panel *panel, > > if (!mode) { > > dev_err(dev, "failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c > > index bac1a2a06c92..0d397af23afe 100644 > > --- a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c > > +++ b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c > > @@ -318,7 +318,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 2048 + 95, > > .vsync_end = 2048 + 95 + 2, > > .vtotal = 2048 + 95 + 2 + 23, > > - .vrefresh = 60, > > }; > > > > static int kingdisplay_panel_get_modes(struct drm_panel *panel, > > @@ -330,7 +329,7 @@ static int kingdisplay_panel_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c > > index 76ecf2de9c44..c39e7f6f5c2d 100644 > > --- a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c > > +++ b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c > > @@ -376,7 +376,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1280 + 30, > > .vsync_end = 1280 + 30 + 4, > > .vtotal = 1280 + 30 + 4 + 12, > > - .vrefresh = 60, > > .clock = 41600, > > .width_mm = 62, > > .height_mm = 110, > > @@ -392,7 +391,7 @@ static int ltk500hd1829_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_DEV_ERROR(ctx->dev, "failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-lg-lb035q02.c b/drivers/gpu/drm/panel/panel-lg-lb035q02.c > > index e90efeaba4ad..14456b9cd5c0 100644 > > --- a/drivers/gpu/drm/panel/panel-lg-lb035q02.c > > +++ b/drivers/gpu/drm/panel/panel-lg-lb035q02.c > > @@ -134,7 +134,6 @@ static const struct drm_display_mode lb035q02_mode = { > > .vsync_start = 240 + 4, > > .vsync_end = 240 + 4 + 2, > > .vtotal = 240 + 4 + 2 + 18, > > - .vrefresh = 60, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > .width_mm = 70, > > diff --git a/drivers/gpu/drm/panel/panel-lg-lg4573.c b/drivers/gpu/drm/panel/panel-lg-lg4573.c > > index b262b53dbd85..497f3b888a1d 100644 > > --- a/drivers/gpu/drm/panel/panel-lg-lg4573.c > > +++ b/drivers/gpu/drm/panel/panel-lg-lg4573.c > > @@ -206,7 +206,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 800 + 15, > > .vsync_end = 800 + 15 + 15, > > .vtotal = 800 + 15 + 15 + 15, > > - .vrefresh = 60, > > }; > > > > static int lg4573_get_modes(struct drm_panel *panel, > > @@ -218,7 +217,7 @@ static int lg4573_get_modes(struct drm_panel *panel, > > if (!mode) { > > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c > > index c4f83f6384e1..f894971c1c7c 100644 > > --- a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c > > +++ b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c > > @@ -116,7 +116,6 @@ static const struct drm_display_mode nl8048_mode = { > > .vsync_start = 480 + 3, > > .vsync_end = 480 + 3 + 1, > > .vtotal = 480 + 3 + 1 + 4, > > - .vrefresh = 60, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > .width_mm = 89, > > diff --git a/drivers/gpu/drm/panel/panel-novatek-nt39016.c b/drivers/gpu/drm/panel/panel-novatek-nt39016.c > > index a470810f7dbe..4b545e081b1e 100644 > > --- a/drivers/gpu/drm/panel/panel-novatek-nt39016.c > > +++ b/drivers/gpu/drm/panel/panel-novatek-nt39016.c > > @@ -327,7 +327,6 @@ static const struct nt39016_panel_info kd035g6_info = { > > .vsync_start = 240 + 5, > > .vsync_end = 240 + 5 + 1, > > .vtotal = 240 + 5 + 1 + 4, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }, > > .width_mm = 71, > > diff --git a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c > > index 09deb99981a4..ecd76b5391d3 100644 > > --- a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c > > +++ b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c > > @@ -170,7 +170,6 @@ static int lcd_olinuxino_get_modes(struct drm_panel *panel, > > lcd_mode->vpw; > > mode->vtotal = lcd_mode->vactive + lcd_mode->vfp + > > lcd_mode->vpw + lcd_mode->vbp; > > - mode->vrefresh = lcd_mode->refresh; > > > > /* Always make the first mode preferred */ > > if (i == 0) > > diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c > > index bb0c992171e8..895ee3d1371e 100644 > > --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c > > +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c > > @@ -81,7 +81,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 800 + 15, > > .vsync_end = 800 + 15 + 10, > > .vtotal = 800 + 15 + 10 + 14, > > - .vrefresh = 50, > > .flags = 0, > > .width_mm = 52, > > .height_mm = 86, > > @@ -358,7 +357,7 @@ static int otm8009a_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_ERROR("failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c > > index 3a0229d60095..11b3d01aca56 100644 > > --- a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c > > +++ b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c > > @@ -102,7 +102,6 @@ static const struct drm_display_mode default_mode_osd101t2587 = { > > .vsync_start = 1200 + 24, > > .vsync_end = 1200 + 24 + 6, > > .vtotal = 1200 + 24 + 6 + 48, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -117,7 +116,7 @@ static int osd101t2587_panel_get_modes(struct drm_panel *panel, > > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > > osd101t2587->default_mode->hdisplay, > > osd101t2587->default_mode->vdisplay, > > - osd101t2587->default_mode->vrefresh); > > + drm_mode_vrefresh(osd101t2587->default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c > > index 69693451462e..627dfcf8adb4 100644 > > --- a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c > > +++ b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c > > @@ -149,7 +149,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1200 + 24, > > .vsync_end = 1200 + 24 + 6, > > .vtotal = 1200 + 24 + 6 + 48, > > - .vrefresh = 60, > > }; > > > > static int wuxga_nt_panel_get_modes(struct drm_panel *panel, > > @@ -161,7 +160,7 @@ static int wuxga_nt_panel_get_modes(struct drm_panel *panel, > > if (!mode) { > > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c > > index 8f078b7dd89e..e50ee26474cf 100644 > > --- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c > > +++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c > > @@ -209,7 +209,6 @@ static const struct drm_display_mode rpi_touchscreen_modes[] = { > > .vsync_start = 480 + 7, > > .vsync_end = 480 + 7 + 2, > > .vtotal = 480 + 7 + 2 + 21, > > - .vrefresh = 60, > > }, > > }; > > > > @@ -322,7 +321,8 @@ static int rpi_touchscreen_get_modes(struct drm_panel *panel, > > mode = drm_mode_duplicate(connector->dev, m); > > if (!mode) { > > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > > - m->hdisplay, m->vdisplay, m->vrefresh); > > + m->hdisplay, m->vdisplay, > > + drm_mode_vrefresh(m)); > > continue; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-raydium-rm67191.c b/drivers/gpu/drm/panel/panel-raydium-rm67191.c > > index 313637d53d28..d001c52e0ca9 100644 > > --- a/drivers/gpu/drm/panel/panel-raydium-rm67191.c > > +++ b/drivers/gpu/drm/panel/panel-raydium-rm67191.c > > @@ -218,7 +218,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1920 + 10, > > .vsync_end = 1920 + 10 + 2, > > .vtotal = 1920 + 10 + 2 + 4, > > - .vrefresh = 60, > > .width_mm = 68, > > .height_mm = 121, > > .flags = DRM_MODE_FLAG_NHSYNC | > > @@ -445,7 +444,7 @@ static int rad_panel_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c > > index e8982948e0ea..81ae8be62d15 100644 > > --- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c > > +++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c > > @@ -92,7 +92,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1280 + 12, > > .vsync_end = 1280 + 12 + 4, > > .vtotal = 1280 + 12 + 4 + 12, > > - .vrefresh = 50, > > .flags = 0, > > .width_mm = 68, > > .height_mm = 122, > > @@ -339,7 +338,7 @@ static int rm68200_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_ERROR("failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > > index 38ff742bc120..da4e373291f9 100644 > > --- a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > > +++ b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c > > @@ -223,7 +223,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1440 + 20, > > .vsync_end = 1440 + 20 + 4, > > .vtotal = 1440 + 20 + 4 + 12, > > - .vrefresh = 60, > > .clock = 75276, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > .width_mm = 65, > > @@ -240,7 +239,7 @@ static int jh057n_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > @@ -360,7 +359,7 @@ static int jh057n_probe(struct mipi_dsi_device *dsi) > > > > DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh, > > + drm_mode_vrefresh(&default_mode), > > mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); > > > > jh057n_debugfs_init(ctx); > > diff --git a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c > > index ef18559e237e..a7b0b3e39e1a 100644 > > --- a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c > > +++ b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c > > @@ -103,7 +103,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 600 + 12, > > .vsync_end = 600 + 12 + 10, > > .vtotal = 600 + 12 + 10 + 13, > > - .vrefresh = 60, > > > > .width_mm = 154, > > .height_mm = 85, > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c > > index 2150043dcf6b..f02645d396ac 100644 > > --- a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c > > +++ b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c > > @@ -37,12 +37,6 @@ static const struct drm_display_mode samsung_s6d16d0_mode = { > > .vsync_start = 480 + 1, > > .vsync_end = 480 + 1 + 1, > > .vtotal = 480 + 1 + 1 + 1, > > - /* > > - * This depends on the clocking HS vs LP rate, this value > > - * is calculated as: > > - * vrefresh = (clock * 1000) / (htotal*vtotal) > > - */ > > - .vrefresh = 816, > > .width_mm = 84, > > .height_mm = 48, > > }; > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c > > index 36ebd5a4ac7b..80ef122e7466 100644 > > --- a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c > > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c > > @@ -617,7 +617,6 @@ static const struct drm_display_mode s6e3ha2_mode = { > > .vsync_start = 2560 + 1, > > .vsync_end = 2560 + 1 + 1, > > .vtotal = 2560 + 1 + 1 + 15, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -636,7 +635,6 @@ static const struct drm_display_mode s6e3hf2_mode = { > > .vsync_start = 2560 + 1, > > .vsync_end = 2560 + 1 + 1, > > .vtotal = 2560 + 1 + 1 + 15, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > @@ -655,7 +653,7 @@ static int s6e3ha2_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_ERROR("failed to add mode %ux%ux@%u\n", > > ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, > > - ctx->desc->mode->vrefresh); > > + drm_mode_vrefresh(ctx->desc->mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c > > index a3570e0a90a8..1247656d73bf 100644 > > --- a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c > > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c > > @@ -52,7 +52,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 320 + 150, > > .vsync_end = 320 + 150 + 1, > > .vtotal = 320 + 150 + 1 + 2, > > - .vrefresh = 30, > > .flags = 0, > > }; > > > > @@ -409,7 +408,7 @@ static int s6e63j0x03_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_ERROR("failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c > > index a5f76eb4fa25..64421347bfd4 100644 > > --- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c > > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c > > @@ -117,7 +117,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 800 + 28, > > .vsync_end = 800 + 28 + 2, > > .vtotal = 800 + 28 + 2 + 1, > > - .vrefresh = 60, > > .width_mm = 53, > > .height_mm = 89, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > @@ -371,7 +370,7 @@ static int s6e63m0_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_ERROR("failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c > > index 9d843fcc3a22..485eabecfcc9 100644 > > --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c > > +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c > > @@ -177,7 +177,6 @@ static const struct drm_display_mode s6e88a0_ams452ef01_mode = { > > .vsync_start = 960 + 14, > > .vsync_end = 960 + 14 + 2, > > .vtotal = 960 + 14 + 2 + 8, > > - .vrefresh = 60, > > .width_mm = 56, > > .height_mm = 100, > > }; > > diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c > > index 40fcbbbacb2c..e417dc4921c2 100644 > > --- a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c > > +++ b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c > > @@ -92,7 +92,8 @@ static int seiko_panel_get_fixed_modes(struct seiko_panel *panel, > > mode = drm_mode_duplicate(connector->dev, m); > > if (!mode) { > > dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", > > - m->hdisplay, m->vdisplay, m->vrefresh); > > + m->hdisplay, m->vdisplay, > > + drm_mode_vrefresh(m)); > > continue; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c > > index b5d1977221a7..f07324b705b3 100644 > > --- a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c > > +++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c > > @@ -269,7 +269,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1600 + 4, > > .vsync_end = 1600 + 4 + 8, > > .vtotal = 1600 + 4 + 8 + 32, > > - .vrefresh = 60, > > }; > > > > static int sharp_panel_get_modes(struct drm_panel *panel, > > @@ -281,7 +280,7 @@ static int sharp_panel_get_modes(struct drm_panel *panel, > > if (!mode) { > > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c > > index 1cf3f02435c1..d7bf13b9e1d6 100644 > > --- a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c > > +++ b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c > > @@ -93,7 +93,6 @@ static const struct drm_display_mode ls037v7dw01_mode = { > > .vsync_start = 640 + 1, > > .vsync_end = 640 + 1 + 1, > > .vtotal = 640 + 1 + 1 + 1, > > - .vrefresh = 58, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > .width_mm = 56, > > diff --git a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c > > index ce586c6d70c7..b2e58935529c 100644 > > --- a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c > > +++ b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c > > @@ -201,7 +201,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 960 + 3, > > .vsync_end = 960 + 3 + 15, > > .vtotal = 960 + 3 + 15 + 1, > > - .vrefresh = 60, > > }; > > > > static int sharp_nt_panel_get_modes(struct drm_panel *panel, > > @@ -213,7 +212,7 @@ static int sharp_nt_panel_get_modes(struct drm_panel *panel, > > if (!mode) { > > dev_err(panel->dev, "failed to add mode %ux%u@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c > > index 82363d05bad4..9ba9d69df41b 100644 > > --- a/drivers/gpu/drm/panel/panel-simple.c > > +++ b/drivers/gpu/drm/panel/panel-simple.c > > @@ -161,7 +161,8 @@ static unsigned int panel_simple_get_display_modes(struct panel_simple *panel, > > mode = drm_mode_duplicate(connector->dev, m); > > if (!mode) { > > dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", > > - m->hdisplay, m->vdisplay, m->vrefresh); > > + m->hdisplay, m->vdisplay, > > + drm_mode_vrefresh(m)); > > continue; > > } > > > > @@ -494,7 +495,6 @@ static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = { > > .vsync_start = 272 + 2, > > .vsync_end = 272 + 2 + 10, > > .vtotal = 272 + 2 + 10 + 2, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }; > > > > @@ -519,7 +519,6 @@ static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = { > > .vsync_start = 480 + 2, > > .vsync_end = 480 + 2 + 45, > > .vtotal = 480 + 2 + 45 + 0, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }; > > > > @@ -570,7 +569,6 @@ static const struct drm_display_mode auo_b101aw03_mode = { > > .vsync_start = 600 + 16, > > .vsync_end = 600 + 16 + 6, > > .vtotal = 600 + 16 + 6 + 16, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_b101aw03 = { > > @@ -615,7 +613,6 @@ static const struct drm_display_mode auo_b101xtn01_mode = { > > .vsync_start = 768 + 14, > > .vsync_end = 768 + 14 + 42, > > .vtotal = 768 + 14 + 42, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -639,7 +636,6 @@ static const struct drm_display_mode auo_b116xak01_mode = { > > .vsync_start = 768 + 4, > > .vsync_end = 768 + 4 + 6, > > .vtotal = 768 + 4 + 6 + 15, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -668,7 +664,6 @@ static const struct drm_display_mode auo_b116xw03_mode = { > > .vsync_start = 768 + 10, > > .vsync_end = 768 + 10 + 12, > > .vtotal = 768 + 10 + 12 + 6, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_b116xw03 = { > > @@ -691,7 +686,6 @@ static const struct drm_display_mode auo_b133xtn01_mode = { > > .vsync_start = 768 + 3, > > .vsync_end = 768 + 3 + 6, > > .vtotal = 768 + 3 + 6 + 13, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_b133xtn01 = { > > @@ -714,7 +708,6 @@ static const struct drm_display_mode auo_b133htn01_mode = { > > .vsync_start = 1080 + 25, > > .vsync_end = 1080 + 25 + 10, > > .vtotal = 1080 + 25 + 10 + 10, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_b133htn01 = { > > @@ -770,7 +763,6 @@ static const struct drm_display_mode auo_g101evn010_mode = { > > .vsync_start = 800 + 8, > > .vsync_end = 800 + 8 + 2, > > .vtotal = 800 + 8 + 2 + 6, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_g101evn010 = { > > @@ -794,7 +786,6 @@ static const struct drm_display_mode auo_g104sn02_mode = { > > .vsync_start = 600 + 10, > > .vsync_end = 600 + 10 + 35, > > .vtotal = 600 + 10 + 35 + 2, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_g104sn02 = { > > @@ -906,7 +897,6 @@ static const struct drm_display_mode auo_t215hvn01_mode = { > > .vsync_start = 1080 + 4, > > .vsync_end = 1080 + 4 + 5, > > .vtotal = 1080 + 4 + 5 + 36, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc auo_t215hvn01 = { > > @@ -933,7 +923,6 @@ static const struct drm_display_mode avic_tm070ddh03_mode = { > > .vsync_start = 600 + 17, > > .vsync_end = 600 + 17 + 1, > > .vtotal = 600 + 17 + 1 + 17, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc avic_tm070ddh03 = { > > @@ -983,7 +972,6 @@ static const struct drm_display_mode boe_hv070wsa_mode = { > > .vsync_start = 600 + 10, > > .vsync_end = 600 + 10 + 10, > > .vtotal = 600 + 10 + 10 + 10, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc boe_hv070wsa = { > > @@ -1006,7 +994,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { > > .vsync_start = 800 + 3, > > .vsync_end = 800 + 3 + 5, > > .vtotal = 800 + 3 + 5 + 24, > > - .vrefresh = 60, > > }, > > { > > .clock = 57500, > > @@ -1018,7 +1005,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { > > .vsync_start = 800 + 3, > > .vsync_end = 800 + 3 + 5, > > .vtotal = 800 + 3 + 5 + 24, > > - .vrefresh = 48, > > }, > > }; > > > > @@ -1048,7 +1034,6 @@ static const struct drm_display_mode boe_nv140fhmn49_modes[] = { > > .vsync_start = 1080 + 3, > > .vsync_end = 1080 + 3 + 5, > > .vtotal = 1125, > > - .vrefresh = 60, > > }, > > }; > > > > @@ -1079,7 +1064,6 @@ static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { > > .vsync_start = 272 + 8, > > .vsync_end = 272 + 8 + 8, > > .vtotal = 272 + 8 + 8 + 8, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -1104,7 +1088,6 @@ static const struct drm_display_mode cdtech_s070wv95_ct16_mode = { > > .vsync_start = 480 + 29, > > .vsync_end = 480 + 29 + 13, > > .vtotal = 480 + 29 + 13 + 3, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -1128,7 +1111,6 @@ static const struct drm_display_mode chunghwa_claa070wp03xg_mode = { > > .vsync_start = 1280 + 1, > > .vsync_end = 1280 + 1 + 7, > > .vtotal = 1280 + 1 + 7 + 15, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -1152,7 +1134,6 @@ static const struct drm_display_mode chunghwa_claa101wa01a_mode = { > > .vsync_start = 768 + 4, > > .vsync_end = 768 + 4 + 4, > > .vtotal = 768 + 4 + 4 + 4, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc chunghwa_claa101wa01a = { > > @@ -1175,7 +1156,6 @@ static const struct drm_display_mode chunghwa_claa101wb01_mode = { > > .vsync_start = 768 + 16, > > .vsync_end = 768 + 16 + 8, > > .vtotal = 768 + 16 + 8 + 16, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc chunghwa_claa101wb01 = { > > @@ -1198,7 +1178,6 @@ static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = { > > .vsync_start = 480 + 10, > > .vsync_end = 480 + 10 + 2, > > .vtotal = 480 + 10 + 2 + 33, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -1285,7 +1264,6 @@ static const struct drm_display_mode edt_et035012dm6_mode = { > > .vsync_start = 240 + 4, > > .vsync_end = 240 + 4 + 4, > > .vtotal = 240 + 4 + 4 + 14, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -1317,7 +1295,6 @@ static const struct drm_display_mode edt_etm043080dh6gp_mode = { > > .vsync_start = 288 + 2, > > .vsync_end = 288 + 2 + 4, > > .vtotal = 288 + 2 + 4 + 10, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc edt_etm043080dh6gp = { > > @@ -1342,7 +1319,6 @@ static const struct drm_display_mode edt_etm0430g0dh6_mode = { > > .vsync_start = 272 + 2, > > .vsync_end = 272 + 2 + 10, > > .vtotal = 272 + 2 + 10 + 2, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -1366,7 +1342,6 @@ static const struct drm_display_mode edt_et057090dhu_mode = { > > .vsync_start = 480 + 10, > > .vsync_end = 480 + 10 + 3, > > .vtotal = 480 + 10 + 3 + 32, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -1392,7 +1367,6 @@ static const struct drm_display_mode edt_etm0700g0dh6_mode = { > > .vsync_start = 480 + 10, > > .vsync_end = 480 + 10 + 2, > > .vtotal = 480 + 10 + 2 + 33, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -1457,7 +1431,6 @@ static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = { > > .vsync_start = 480 + 37, > > .vsync_end = 480 + 37 + 2, > > .vtotal = 480 + 37 + 2 + 8, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc foxlink_fl500wvr00_a0t = { > > @@ -1481,7 +1454,6 @@ static const struct drm_display_mode frida_frd350h54004_mode = { > > .vsync_start = 240 + 2, > > .vsync_end = 240 + 2 + 6, > > .vtotal = 240 + 2 + 6 + 2, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }; > > > > @@ -1508,7 +1480,6 @@ static const struct drm_display_mode friendlyarm_hd702e_mode = { > > .vsync_start = 1280 + 4, > > .vsync_end = 1280 + 4 + 8, > > .vtotal = 1280 + 4 + 8 + 4, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -1531,7 +1502,6 @@ static const struct drm_display_mode giantplus_gpg482739qs5_mode = { > > .vsync_start = 272 + 8, > > .vsync_end = 272 + 8 + 1, > > .vtotal = 272 + 8 + 1 + 8, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc giantplus_gpg482739qs5 = { > > @@ -1635,7 +1605,6 @@ static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = { > > .vsync_start = 480 + 16, > > .vsync_end = 480 + 16 + 13, > > .vtotal = 480 + 16 + 13 + 16, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc hitachi_tx23d38vm0caa = { > > @@ -1662,7 +1631,6 @@ static const struct drm_display_mode innolux_at043tn24_mode = { > > .vsync_start = 272 + 2, > > .vsync_end = 272 + 2 + 10, > > .vtotal = 272 + 2 + 10 + 2, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -1688,7 +1656,6 @@ static const struct drm_display_mode innolux_at070tn92_mode = { > > .vsync_start = 480 + 22, > > .vsync_end = 480 + 22 + 10, > > .vtotal = 480 + 22 + 23 + 10, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc innolux_at070tn92 = { > > @@ -1799,7 +1766,6 @@ static const struct drm_display_mode innolux_g121x1_l03_mode = { > > .vsync_start = 768 + 38, > > .vsync_end = 768 + 38 + 1, > > .vtotal = 768 + 38 + 1 + 0, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -1861,7 +1827,6 @@ static const struct drm_display_mode innolux_n156bge_l21_mode = { > > .vsync_start = 768 + 2, > > .vsync_end = 768 + 2 + 6, > > .vtotal = 768 + 2 + 6 + 12, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc innolux_n156bge_l21 = { > > @@ -1884,7 +1849,6 @@ static const struct drm_display_mode innolux_p120zdg_bf1_mode = { > > .vsync_start = 1440 + 3, > > .vsync_end = 1440 + 3 + 10, > > .vtotal = 1440 + 3 + 10 + 27, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }; > > > > @@ -1912,7 +1876,6 @@ static const struct drm_display_mode innolux_zj070na_01p_mode = { > > .vsync_start = 600 + 16, > > .vsync_end = 600 + 16 + 4, > > .vtotal = 600 + 16 + 4 + 16, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc innolux_zj070na_01p = { > > @@ -2008,7 +1971,6 @@ static const struct drm_display_mode lemaker_bl035_rgb_002_mode = { > > .vsync_start = 240 + 4, > > .vsync_end = 240 + 4 + 3, > > .vtotal = 240 + 4 + 3 + 15, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc lemaker_bl035_rgb_002 = { > > @@ -2032,7 +1994,6 @@ static const struct drm_display_mode lg_lb070wv8_mode = { > > .vsync_start = 480 + 10, > > .vsync_end = 480 + 10 + 25, > > .vtotal = 480 + 10 + 25 + 10, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc lg_lb070wv8 = { > > @@ -2057,7 +2018,6 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { > > .vsync_start = 2048 + 8, > > .vsync_end = 2048 + 8 + 4, > > .vtotal = 2048 + 8 + 4 + 8, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -2080,7 +2040,6 @@ static const struct drm_display_mode lg_lp097qx1_spa1_mode = { > > .vsync_start = 1536 + 3, > > .vsync_end = 1536 + 3 + 1, > > .vtotal = 1536 + 3 + 1 + 9, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc lg_lp097qx1_spa1 = { > > @@ -2102,7 +2061,6 @@ static const struct drm_display_mode lg_lp120up1_mode = { > > .vsync_start = 1280 + 4, > > .vsync_end = 1280 + 4 + 4, > > .vtotal = 1280 + 4 + 4 + 12, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc lg_lp120up1 = { > > @@ -2125,7 +2083,6 @@ static const struct drm_display_mode lg_lp129qe_mode = { > > .vsync_start = 1700 + 3, > > .vsync_end = 1700 + 3 + 10, > > .vtotal = 1700 + 3 + 10 + 36, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc lg_lp129qe = { > > @@ -2206,7 +2163,6 @@ static const struct drm_display_mode mitsubishi_aa070mc01_mode = { > > .vsync_start = 480 + 0, > > .vsync_end = 480 + 48 + 1, > > .vtotal = 480 + 48 + 1 + 0, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -2221,7 +2177,6 @@ static const struct drm_display_mode logicpd_type_28_mode = { > > .vsync_start = 272 + 2, > > .vsync_end = 272 + 2 + 11, > > .vtotal = 272 + 2 + 11 + 3, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }; > > > > @@ -2301,7 +2256,6 @@ static const struct drm_display_mode nec_nl4827hc19_05b_mode = { > > .vsync_start = 272 + 2, > > .vsync_end = 272 + 2 + 4, > > .vtotal = 272 + 2 + 4 + 2, > > - .vrefresh = 74, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -2327,7 +2281,6 @@ static const struct drm_display_mode netron_dy_e231732_mode = { > > .vsync_start = 600 + 127, > > .vsync_end = 600 + 127 + 20, > > .vtotal = 600 + 127 + 20 + 3, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc netron_dy_e231732 = { > > @@ -2350,7 +2303,6 @@ static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = { > > .vsync_start = 272 + 2, > > .vsync_end = 272 + 2 + 10, > > .vtotal = 272 + 2 + 10 + 2, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -2458,7 +2410,6 @@ static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = { > > .vsync_start = 272 + 8, > > .vsync_end = 272 + 8 + 5, > > .vtotal = 272 + 8 + 5 + 3, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc olimex_lcd_olinuxino_43ts = { > > @@ -2486,7 +2437,6 @@ static const struct drm_display_mode ontat_yx700wv03_mode = { > > .vsync_start = 483, > > .vsync_end = 493, > > .vtotal = 500, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -2515,7 +2465,6 @@ static const struct drm_display_mode ortustech_com37h3m_mode = { > > .vsync_start = 640 + 4, > > .vsync_end = 640 + 4 + 3, > > .vtotal = 640 + 4 + 3 + 4, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -2542,7 +2491,6 @@ static const struct drm_display_mode ortustech_com43h4m85ulc_mode = { > > .vsync_start = 800 + 3, > > .vsync_end = 800 + 3 + 3, > > .vtotal = 800 + 3 + 3 + 3, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc ortustech_com43h4m85ulc = { > > @@ -2567,7 +2515,6 @@ static const struct drm_display_mode osddisplays_osd070t1718_19ts_mode = { > > .vsync_start = 480 + 22, > > .vsync_end = 480 + 22 + 13, > > .vtotal = 480 + 22 + 13 + 10, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -2594,7 +2541,6 @@ static const struct drm_display_mode pda_91_00156_a0_mode = { > > .vsync_start = 480 + 1, > > .vsync_end = 480 + 1 + 23, > > .vtotal = 480 + 1 + 23 + 22, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc pda_91_00156_a0 = { > > @@ -2618,7 +2564,6 @@ static const struct drm_display_mode qd43003c0_40_mode = { > > .vsync_start = 272 + 4, > > .vsync_end = 272 + 4 + 10, > > .vtotal = 272 + 4 + 10 + 2, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc qd43003c0_40 = { > > @@ -2672,7 +2617,6 @@ static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = { > > .vsync_start = 800 + 2, > > .vsync_end = 800 + 2 + 5, > > .vtotal = 800 + 2 + 5 + 16, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc rocktech_rk101ii01d_ct = { > > @@ -2701,7 +2645,6 @@ static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { > > .vsync_start = 1600 + 2, > > .vsync_end = 1600 + 2 + 5, > > .vtotal = 1600 + 2 + 5 + 57, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc samsung_lsn122dl01_c01 = { > > @@ -2723,7 +2666,6 @@ static const struct drm_display_mode samsung_ltn101nt05_mode = { > > .vsync_start = 600 + 3, > > .vsync_end = 600 + 3 + 6, > > .vtotal = 600 + 3 + 6 + 61, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc samsung_ltn101nt05 = { > > @@ -2746,7 +2688,6 @@ static const struct drm_display_mode samsung_ltn140at29_301_mode = { > > .vsync_start = 768 + 2, > > .vsync_end = 768 + 2 + 5, > > .vtotal = 768 + 2 + 5 + 17, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc samsung_ltn140at29_301 = { > > @@ -2793,7 +2734,6 @@ static const struct drm_display_mode sharp_ld_d5116z01b_mode = { > > .vsync_start = 1280 + 3, > > .vsync_end = 1280 + 3 + 10, > > .vtotal = 1280 + 3 + 10 + 57, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }; > > > > @@ -2819,7 +2759,6 @@ static const struct drm_display_mode sharp_lq070y3dg3b_mode = { > > .vsync_start = 480 + 8, > > .vsync_end = 480 + 8 + 2, > > .vtotal = 480 + 8 + 2 + 35, > > - .vrefresh = 60, > > .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE, > > }; > > > > @@ -2846,7 +2785,6 @@ static const struct drm_display_mode sharp_lq035q7db03_mode = { > > .vsync_start = 320 + 9, > > .vsync_end = 320 + 9 + 1, > > .vtotal = 320 + 9 + 1 + 7, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc sharp_lq035q7db03 = { > > @@ -2923,7 +2861,6 @@ static const struct drm_display_mode sharp_lq150x1lg11_mode = { > > .vsync_start = 768 + 37, > > .vsync_end = 768 + 37 + 2, > > .vtotal = 768 + 37 + 2 + 8, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc sharp_lq150x1lg11 = { > > @@ -2974,7 +2911,6 @@ static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = { > > .vsync_start = 480 + 1, > > .vsync_end = 480 + 1 + 23, > > .vtotal = 480 + 1 + 23 + 22, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc shelly_sca07010_bfn_lnn = { > > @@ -2997,7 +2933,6 @@ static const struct drm_display_mode starry_kr122ea0sra_mode = { > > .vsync_start = 1200 + 15, > > .vsync_end = 1200 + 15 + 2, > > .vtotal = 1200 + 15 + 2 + 18, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -3025,7 +2960,6 @@ static const struct drm_display_mode tfc_s9700rtwv43tr_01b_mode = { > > .vsync_start = 480 + 13, > > .vsync_end = 480 + 13 + 2, > > .vtotal = 480 + 13 + 2 + 29, > > - .vrefresh = 62, > > }; > > > > static const struct panel_desc tfc_s9700rtwv43tr_01b = { > > @@ -3101,7 +3035,6 @@ static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = { > > .vsync_start = 240 + 3, > > .vsync_end = 240 + 3 + 1, > > .vtotal = 240 + 3 + 1 + 17, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }, > > }; > > @@ -3129,7 +3062,6 @@ static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = { > > .vsync_start = 240 + 0, > > .vsync_end = 240 + 0 + 1, > > .vtotal = 240 + 0 + 1 + 0, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, > > }, > > }; > > @@ -3158,7 +3090,6 @@ static const struct drm_display_mode toshiba_lt089ac29000_mode = { > > .vsync_start = 768 + 20, > > .vsync_end = 768 + 20 + 7, > > .vtotal = 768 + 20 + 7 + 3, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc toshiba_lt089ac29000 = { > > @@ -3183,7 +3114,6 @@ static const struct drm_display_mode tpk_f07a_0102_mode = { > > .vsync_start = 480 + 10, > > .vsync_end = 480 + 10 + 2, > > .vtotal = 480 + 10 + 2 + 33, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc tpk_f07a_0102 = { > > @@ -3206,7 +3136,6 @@ static const struct drm_display_mode tpk_f10a_0102_mode = { > > .vsync_start = 600 + 20, > > .vsync_end = 600 + 20 + 5, > > .vtotal = 600 + 20 + 5 + 25, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc tpk_f10a_0102 = { > > @@ -3265,7 +3194,6 @@ static const struct drm_display_mode vl050_8048nt_c01_mode = { > > .vsync_start = 480 + 22, > > .vsync_end = 480 + 22 + 10, > > .vtotal = 480 + 22 + 10 + 23, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > @@ -3291,7 +3219,6 @@ static const struct drm_display_mode winstar_wf35ltiacd_mode = { > > .vsync_start = 240 + 4, > > .vsync_end = 240 + 4 + 3, > > .vtotal = 240 + 4 + 3 + 15, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -3317,7 +3244,6 @@ static const struct drm_display_mode arm_rtsm_mode[] = { > > .vsync_start = 768 + 3, > > .vsync_end = 768 + 3 + 6, > > .vtotal = 768 + 3 + 6 + 29, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }, > > }; > > @@ -3743,7 +3669,6 @@ static const struct drm_display_mode auo_b080uan01_mode = { > > .vsync_start = 1920 + 9, > > .vsync_end = 1920 + 9 + 2, > > .vtotal = 1920 + 9 + 2 + 8, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc_dsi auo_b080uan01 = { > > @@ -3771,7 +3696,6 @@ static const struct drm_display_mode boe_tv080wum_nl0_mode = { > > .vsync_start = 1920 + 21, > > .vsync_end = 1920 + 21 + 3, > > .vtotal = 1920 + 21 + 3 + 18, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, > > }; > > > > @@ -3801,7 +3725,6 @@ static const struct drm_display_mode lg_ld070wx3_sl01_mode = { > > .vsync_start = 1280 + 28, > > .vsync_end = 1280 + 28 + 1, > > .vtotal = 1280 + 28 + 1 + 14, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc_dsi lg_ld070wx3_sl01 = { > > @@ -3829,7 +3752,6 @@ static const struct drm_display_mode lg_lh500wx1_sd03_mode = { > > .vsync_start = 1280 + 8, > > .vsync_end = 1280 + 8 + 4, > > .vtotal = 1280 + 8 + 4 + 12, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc_dsi lg_lh500wx1_sd03 = { > > @@ -3857,7 +3779,6 @@ static const struct drm_display_mode panasonic_vvx10f004b00_mode = { > > .vsync_start = 1200 + 17, > > .vsync_end = 1200 + 17 + 2, > > .vtotal = 1200 + 17 + 2 + 16, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc_dsi panasonic_vvx10f004b00 = { > > @@ -3886,7 +3807,6 @@ static const struct drm_display_mode lg_acx467akm_7_mode = { > > .vsync_start = 1920 + 2, > > .vsync_end = 1920 + 2 + 2, > > .vtotal = 1920 + 2 + 2 + 2, > > - .vrefresh = 60, > > }; > > > > static const struct panel_desc_dsi lg_acx467akm_7 = { > > @@ -3914,7 +3834,6 @@ static const struct drm_display_mode osd101t2045_53ts_mode = { > > .vsync_start = 1200 + 16, > > .vsync_end = 1200 + 16 + 2, > > .vtotal = 1200 + 16 + 2 + 16, > > - .vrefresh = 60, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > }; > > > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > > index 4b4f2558e3b4..692041ae4eb6 100644 > > --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c > > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c > > @@ -272,7 +272,7 @@ static int st7701_get_modes(struct drm_panel *panel, > > DRM_DEV_ERROR(&st7701->dsi->dev, > > "failed to add mode %ux%ux@%u\n", > > desc_mode->hdisplay, desc_mode->vdisplay, > > - desc_mode->vrefresh); > > + drm_mode_vrefresh(desc_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c > > index cc02c54c1b2e..3513ae40efa8 100644 > > --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c > > +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c > > @@ -165,7 +165,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 320 + 8, > > .vsync_end = 320 + 8 + 4, > > .vtotal = 320 + 8 + 4 + 4, > > - .vrefresh = 60, > > }; > > > > static int st7789v_get_modes(struct drm_panel *panel, > > @@ -177,7 +176,7 @@ static int st7789v_get_modes(struct drm_panel *panel, > > if (!mode) { > > dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/panel/panel-sony-acx424akp.c b/drivers/gpu/drm/panel/panel-sony-acx424akp.c > > index de0abf76ae6f..eba05bd6ec9a 100644 > > --- a/drivers/gpu/drm/panel/panel-sony-acx424akp.c > > +++ b/drivers/gpu/drm/panel/panel-sony-acx424akp.c > > @@ -57,7 +57,6 @@ static const struct drm_display_mode sony_acx424akp_vid_mode = { > > .vsync_start = 864 + 14, > > .vsync_end = 864 + 14 + 1, > > .vtotal = 864 + 14 + 1 + 11, > > - .vrefresh = 60, > > .width_mm = 48, > > .height_mm = 84, > > .flags = DRM_MODE_FLAG_PVSYNC, > > @@ -81,7 +80,6 @@ static const struct drm_display_mode sony_acx424akp_cmd_mode = { > > * Some desired refresh rate, experiments at the maximum "pixel" > > * clock speed (HS clock 420 MHz) yields around 117Hz. > > */ > > - .vrefresh = 60, > > .width_mm = 48, > > .height_mm = 84, > > }; > > diff --git a/drivers/gpu/drm/panel/panel-sony-acx565akm.c b/drivers/gpu/drm/panel/panel-sony-acx565akm.c > > index 5c4b6f6e5c2d..fc6a7e451abe 100644 > > --- a/drivers/gpu/drm/panel/panel-sony-acx565akm.c > > +++ b/drivers/gpu/drm/panel/panel-sony-acx565akm.c > > @@ -514,7 +514,6 @@ static const struct drm_display_mode acx565akm_mode = { > > .vsync_start = 480 + 3, > > .vsync_end = 480 + 3 + 3, > > .vtotal = 480 + 3 + 3 + 4, > > - .vrefresh = 57, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > .width_mm = 77, > > diff --git a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c > > index aeca15dfeb3c..58d683cc5215 100644 > > --- a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c > > +++ b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c > > @@ -281,7 +281,6 @@ static const struct drm_display_mode td028ttec1_mode = { > > .vsync_start = 640 + 4, > > .vsync_end = 640 + 4 + 2, > > .vtotal = 640 + 4 + 2 + 2, > > - .vrefresh = 66, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > .width_mm = 43, > > diff --git a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c > > index 75f1f1f1b6de..9b2a356c4d9a 100644 > > --- a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c > > +++ b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c > > @@ -339,7 +339,6 @@ static const struct drm_display_mode td043mtea1_mode = { > > .vsync_start = 480 + 39, > > .vsync_end = 480 + 39 + 1, > > .vtotal = 480 + 39 + 1 + 34, > > - .vrefresh = 60, > > .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, > > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, > > .width_mm = 94, > > diff --git a/drivers/gpu/drm/panel/panel-tpo-tpg110.c b/drivers/gpu/drm/panel/panel-tpo-tpg110.c > > index 8472d018c16f..c7a2f0ae5ba5 100644 > > --- a/drivers/gpu/drm/panel/panel-tpo-tpg110.c > > +++ b/drivers/gpu/drm/panel/panel-tpo-tpg110.c > > @@ -112,7 +112,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > > .vsync_start = 480 + 10, > > .vsync_end = 480 + 10 + 1, > > .vtotal = 480 + 10 + 1 + 35, > > - .vrefresh = 60, > > }, > > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > > }, > > @@ -129,7 +128,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > > .vsync_start = 480 + 18, > > .vsync_end = 480 + 18 + 1, > > .vtotal = 480 + 18 + 1 + 27, > > - .vrefresh = 60, > > }, > > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > > }, > > @@ -146,7 +144,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > > .vsync_start = 272 + 2, > > .vsync_end = 272 + 2 + 1, > > .vtotal = 272 + 2 + 1 + 12, > > - .vrefresh = 60, > > }, > > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > > }, > > @@ -163,7 +160,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > > .vsync_start = 640 + 4, > > .vsync_end = 640 + 4 + 1, > > .vtotal = 640 + 4 + 1 + 8, > > - .vrefresh = 60, > > }, > > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > > }, > > @@ -180,7 +176,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { > > .vsync_start = 240 + 2, > > .vsync_end = 240 + 2 + 1, > > .vtotal = 240 + 2 + 1 + 20, > > - .vrefresh = 60, > > }, > > .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, > > }, > > diff --git a/drivers/gpu/drm/panel/panel-truly-nt35597.c b/drivers/gpu/drm/panel/panel-truly-nt35597.c > > index 012ca62bf30e..9d669088cffc 100644 > > --- a/drivers/gpu/drm/panel/panel-truly-nt35597.c > > +++ b/drivers/gpu/drm/panel/panel-truly-nt35597.c > > @@ -536,7 +536,6 @@ static const struct drm_display_mode qcom_sdm845_mtp_2k_mode = { > > .vsync_start = 2560 + 8, > > .vsync_end = 2560 + 8 + 1, > > .vtotal = 2560 + 8 + 1 + 7, > > - .vrefresh = 60, > > .flags = 0, > > }; > > > > diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c > > index 1645aceab597..8a3b2f906e63 100644 > > --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c > > +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c > > @@ -243,7 +243,6 @@ static const struct drm_display_mode default_mode = { > > .vsync_start = 1280 + 22, > > .vsync_end = 1280 + 22 + 4, > > .vtotal = 1280 + 22 + 4 + 11, > > - .vrefresh = 60, > > .clock = 64000, > > .width_mm = 68, > > .height_mm = 121, > > @@ -259,7 +258,7 @@ static int xpp055c272_get_modes(struct drm_panel *panel, > > if (!mode) { > > DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", > > default_mode.hdisplay, default_mode.vdisplay, > > - default_mode.vrefresh); > > + drm_mode_vrefresh(&default_mode)); > > return -ENOMEM; > > } > > > > diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c > > index 2bb32009d117..3dc6e2e96541 100644 > > --- a/drivers/gpu/drm/sti/sti_hda.c > > +++ b/drivers/gpu/drm/sti/sti_hda.c > > @@ -586,7 +586,6 @@ static int sti_hda_connector_get_modes(struct drm_connector *connector) > > &hda_supported_modes[i].mode); > > if (!mode) > > continue; > > - mode->vrefresh = drm_mode_vrefresh(mode); > > > > /* the first mode is the preferred mode */ > > if (i == 0) > > diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c > > index eb6e23e8d8ef..0b07f7b5ece4 100644 > > --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c > > +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c > > @@ -2226,7 +2226,6 @@ void vmw_guess_mode_timing(struct drm_display_mode *mode) > > mode->vtotal = mode->vsync_end + 50; > > > > mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; > > - mode->vrefresh = drm_mode_vrefresh(mode); > > } > > > > > > @@ -2300,7 +2299,6 @@ int vmw_du_connector_fill_modes(struct drm_connector *connector, > > mode = drm_mode_duplicate(dev, bmode); > > if (!mode) > > return 0; > > - mode->vrefresh = drm_mode_vrefresh(mode); > > > > drm_mode_probed_add(connector, mode); > > } > > diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h > > index 7dab7f172431..52e8ca613e4b 100644 > > --- a/include/drm/drm_modes.h > > +++ b/include/drm/drm_modes.h > > @@ -380,16 +380,6 @@ struct drm_display_mode { > > */ > > int private_flags; > > > > - /** > > - * @vrefresh: > > - * > > - * Vertical refresh rate, for debug output in human readable form. Not > > - * used in a functional way. > > - * > > - * This value is in Hz. > > - */ > > - int vrefresh; > > - > > /** > > * @picture_aspect_ratio: > > * > > @@ -421,7 +411,7 @@ struct drm_display_mode { > > * @m: display mode > > */ > > #define DRM_MODE_ARG(m) \ > > - (m)->name, (m)->vrefresh, (m)->clock, \ > > + (m)->name, drm_mode_vrefresh(m), (m)->clock, \ > > (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \ > > (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \ > > (m)->type, (m)->flags > -- Ville Syrjälä Intel _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh 2020-02-25 11:21 ` Ville Syrjälä @ 2020-02-25 15:19 ` Andrzej Hajda 2020-02-25 15:45 ` Ville Syrjälä 0 siblings, 1 reply; 9+ messages in thread From: Andrzej Hajda @ 2020-02-25 15:19 UTC (permalink / raw) To: Ville Syrjälä Cc: Neil Armstrong, nouveau, Guido Günther, dri-devel, Thierry Reding, Laurent Pinchart, Sam Ravnborg, Jagan Teki, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, VMware Graphics, Ben Skeggs, Robert Chiras, Icenowy Zheng, Jonas Karlman, intel-gfx, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park On 25.02.2020 12:21, Ville Syrjälä wrote: > On Mon, Feb 24, 2020 at 03:14:54PM +0100, Andrzej Hajda wrote: >> On 19.02.2020 21:35, Ville Syrjala wrote: >>> From: Ville Syrjälä <ville.syrjala@linux.intel.com> >>> >>> Get rid of mode->vrefresh and just calculate it on demand. Saves >>> a bit of space and avoids the cached value getting out of sync >>> with reality. >>> >>> Mostly done with cocci, with the following manual fixups: >>> - Remove the now empty loop in drm_helper_probe_single_connector_modes() >>> - Fix __MODE() macro in ch7006_mode.c >>> - Fix DRM_MODE_ARG() macro in drm_modes.h >>> - Remove leftover comment from samsung_s6d16d0_mode >> ... >>> diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c >>> index 41444a73c980..47b37fef7ee8 100644 >>> --- a/drivers/gpu/drm/panel/panel-arm-versatile.c >>> +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c >>> @@ -143,7 +143,6 @@ static const struct versatile_panel_type versatile_panels[] = { >>> .vsync_start = 240 + 5, >>> .vsync_end = 240 + 5 + 6, >>> .vtotal = 240 + 5 + 6 + 5, >>> - .vrefresh = 116, >> >> Are you sure vrefresh calculated (from totals and clock) is different >> than this field? If not, we risk regressions. >> >> This case is OK, but there is plenty other cases. > IIRC I did spot check a few of them. But which code exactly do you think > is abusing vrefresh and thus could break? I guess suspect/potential victim is every code which uses drm_mode_vrefresh - after this patch the function can return different value(if there are differences between provided and calculated vrefresh). Quick examples where output of this function matters: https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c#L387 https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c#L42 https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/tilcdc/tilcdc_crtc.c#L810 Regards Andrzej > >> >> Regards >> >> Andrzej >> >> >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }, >>> }, >>> @@ -167,7 +166,6 @@ static const struct versatile_panel_type versatile_panels[] = { >>> .vsync_start = 480 + 11, >>> .vsync_end = 480 + 11 + 2, >>> .vtotal = 480 + 11 + 2 + 32, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }, >>> }, >>> @@ -190,7 +188,6 @@ static const struct versatile_panel_type versatile_panels[] = { >>> .vsync_start = 220 + 0, >>> .vsync_end = 220 + 0 + 2, >>> .vtotal = 220 + 0 + 2 + 1, >>> - .vrefresh = 390, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }, >>> .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, >>> @@ -214,7 +211,6 @@ static const struct versatile_panel_type versatile_panels[] = { >>> .vsync_start = 320 + 2, >>> .vsync_end = 320 + 2 + 2, >>> .vtotal = 320 + 2 + 2 + 2, >>> - .vrefresh = 116, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }, >>> .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, >>> diff --git a/drivers/gpu/drm/panel/panel-boe-himax8279d.c b/drivers/gpu/drm/panel/panel-boe-himax8279d.c >>> index 74d58ee7d04c..7c27bd5e3486 100644 >>> --- a/drivers/gpu/drm/panel/panel-boe-himax8279d.c >>> +++ b/drivers/gpu/drm/panel/panel-boe-himax8279d.c >>> @@ -229,7 +229,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, >>> mode = drm_mode_duplicate(connector->dev, m); >>> if (!mode) { >>> DRM_DEV_ERROR(pinfo->base.dev, "failed to add mode %ux%u@%u\n", >>> - m->hdisplay, m->vdisplay, m->vrefresh); >>> + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); >>> return -ENOMEM; >>> } >>> >>> @@ -262,7 +262,6 @@ static const struct drm_display_mode default_display_mode = { >>> .vsync_start = 1920 + 10, >>> .vsync_end = 1920 + 10 + 14, >>> .vtotal = 1920 + 10 + 14 + 4, >>> - .vrefresh = 60, >>> }; >>> >>> /* 8 inch */ >>> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c >>> index 48a164257d18..c580bd1e121c 100644 >>> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c >>> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c >>> @@ -594,7 +594,6 @@ static const struct drm_display_mode boe_tv101wum_nl6_default_mode = { >>> .vsync_start = 1920 + 10, >>> .vsync_end = 1920 + 10 + 14, >>> .vtotal = 1920 + 10 + 14 + 4, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc boe_tv101wum_nl6_desc = { >>> @@ -622,7 +621,6 @@ static const struct drm_display_mode auo_kd101n80_45na_default_mode = { >>> .vsync_start = 1920 + 16, >>> .vsync_end = 1920 + 16 + 4, >>> .vtotal = 1920 + 16 + 4 + 16, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_kd101n80_45na_desc = { >>> @@ -650,7 +648,6 @@ static const struct drm_display_mode boe_tv101wum_n53_default_mode = { >>> .vsync_start = 1920 + 20, >>> .vsync_end = 1920 + 20 + 4, >>> .vtotal = 1920 + 20 + 4 + 10, >>> - .vrefresh = 60, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> }; >>> >>> @@ -678,7 +675,6 @@ static const struct drm_display_mode auo_b101uan08_3_default_mode = { >>> .vsync_start = 1920 + 34, >>> .vsync_end = 1920 + 34 + 2, >>> .vtotal = 1920 + 34 + 2 + 24, >>> - .vrefresh = 60, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> }; >>> >>> @@ -706,7 +702,7 @@ static int boe_panel_get_modes(struct drm_panel *panel, >>> mode = drm_mode_duplicate(connector->dev, m); >>> if (!mode) { >>> dev_err(panel->dev, "failed to add mode %ux%u@%u\n", >>> - m->hdisplay, m->vdisplay, m->vrefresh); >>> + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c >>> index fddbfddf6566..54610651ecdb 100644 >>> --- a/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c >>> +++ b/drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c >>> @@ -392,7 +392,6 @@ static int k101_im2ba02_unprepare(struct drm_panel *panel) >>> >>> static const struct drm_display_mode k101_im2ba02_default_mode = { >>> .clock = 70000, >>> - .vrefresh = 60, >>> >>> .hdisplay = 800, >>> .hsync_start = 800 + 20, >>> @@ -420,7 +419,7 @@ static int k101_im2ba02_get_modes(struct drm_panel *panel, >>> DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", >>> k101_im2ba02_default_mode.hdisplay, >>> k101_im2ba02_default_mode.vdisplay, >>> - k101_im2ba02_default_mode.vrefresh); >>> + drm_mode_vrefresh(&k101_im2ba02_default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c >>> index 95b789ab9d29..19a6274b10f5 100644 >>> --- a/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c >>> +++ b/drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c >>> @@ -153,7 +153,6 @@ static const struct drm_display_mode feiyang_default_mode = { >>> .vsync_start = 600 + 12, >>> .vsync_end = 600 + 12 + 2, >>> .vtotal = 600 + 12 + 2 + 21, >>> - .vrefresh = 60, >>> >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> }; >>> @@ -169,7 +168,7 @@ static int feiyang_get_modes(struct drm_panel *panel, >>> DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", >>> feiyang_default_mode.hdisplay, >>> feiyang_default_mode.vdisplay, >>> - feiyang_default_mode.vrefresh); >>> + drm_mode_vrefresh(&feiyang_default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c >>> index f394d53a7da4..d2c98d381bef 100644 >>> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9322.c >>> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9322.c >>> @@ -549,7 +549,6 @@ static const struct drm_display_mode srgb_320x240_mode = { >>> .vsync_start = 240 + 4, >>> .vsync_end = 240 + 4 + 1, >>> .vtotal = 262, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -563,7 +562,6 @@ static const struct drm_display_mode srgb_360x240_mode = { >>> .vsync_start = 240 + 21, >>> .vsync_end = 240 + 21 + 1, >>> .vtotal = 262, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -578,7 +576,6 @@ static const struct drm_display_mode prgb_320x240_mode = { >>> .vsync_start = 240 + 4, >>> .vsync_end = 240 + 4 + 1, >>> .vtotal = 262, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -593,7 +590,6 @@ static const struct drm_display_mode yuv_640x320_mode = { >>> .vsync_start = 320 + 4, >>> .vsync_end = 320 + 4 + 1, >>> .vtotal = 320 + 4 + 1 + 18, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -607,7 +603,6 @@ static const struct drm_display_mode yuv_720x360_mode = { >>> .vsync_start = 360 + 4, >>> .vsync_end = 360 + 4 + 1, >>> .vtotal = 360 + 4 + 1 + 18, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -622,7 +617,6 @@ static const struct drm_display_mode itu_r_bt_656_640_mode = { >>> .vsync_start = 480 + 4, >>> .vsync_end = 480 + 4 + 1, >>> .vtotal = 500, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -637,7 +631,6 @@ static const struct drm_display_mode itu_r_bt_656_720_mode = { >>> .vsync_start = 480 + 4, >>> .vsync_end = 480 + 4 + 1, >>> .vtotal = 500, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c >>> index f54077c216a3..3ed8635a6fbd 100644 >>> --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c >>> +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c >>> @@ -370,7 +370,6 @@ static int ili9881c_unprepare(struct drm_panel *panel) >>> >>> static const struct drm_display_mode bananapi_default_mode = { >>> .clock = 62000, >>> - .vrefresh = 60, >>> >>> .hdisplay = 720, >>> .hsync_start = 720 + 10, >>> @@ -394,7 +393,7 @@ static int ili9881c_get_modes(struct drm_panel *panel, >>> dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n", >>> bananapi_default_mode.hdisplay, >>> bananapi_default_mode.vdisplay, >>> - bananapi_default_mode.vrefresh); >>> + drm_mode_vrefresh(&bananapi_default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c b/drivers/gpu/drm/panel/panel-innolux-p079zca.c >>> index 7419f1f0acee..fdf030f4cf92 100644 >>> --- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c >>> +++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c >>> @@ -223,7 +223,6 @@ static const struct drm_display_mode innolux_p079zca_mode = { >>> .vsync_start = 1024 + 20, >>> .vsync_end = 1024 + 20 + 4, >>> .vtotal = 1024 + 20 + 4 + 20, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc innolux_p079zca_panel_desc = { >>> @@ -257,7 +256,6 @@ static const struct drm_display_mode innolux_p097pfg_mode = { >>> .vsync_start = 2048 + 100, >>> .vsync_end = 2048 + 100 + 2, >>> .vtotal = 2048 + 100 + 2 + 18, >>> - .vrefresh = 60, >>> }; >>> >>> /* >>> @@ -401,7 +399,7 @@ static int innolux_panel_get_modes(struct drm_panel *panel, >>> mode = drm_mode_duplicate(connector->dev, m); >>> if (!mode) { >>> DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", >>> - m->hdisplay, m->vdisplay, m->vrefresh); >>> + m->hdisplay, m->vdisplay, drm_mode_vrefresh(m)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c >>> index 4bfd8c877c8e..1e3fd6633981 100644 >>> --- a/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c >>> +++ b/drivers/gpu/drm/panel/panel-jdi-lt070me05000.c >>> @@ -296,7 +296,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1920 + 3, >>> .vsync_end = 1920 + 3 + 5, >>> .vtotal = 1920 + 3 + 5 + 6, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -311,7 +310,7 @@ static int jdi_panel_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> dev_err(dev, "failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c >>> index bac1a2a06c92..0d397af23afe 100644 >>> --- a/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c >>> +++ b/drivers/gpu/drm/panel/panel-kingdisplay-kd097d04.c >>> @@ -318,7 +318,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 2048 + 95, >>> .vsync_end = 2048 + 95 + 2, >>> .vtotal = 2048 + 95 + 2 + 23, >>> - .vrefresh = 60, >>> }; >>> >>> static int kingdisplay_panel_get_modes(struct drm_panel *panel, >>> @@ -330,7 +329,7 @@ static int kingdisplay_panel_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c >>> index 76ecf2de9c44..c39e7f6f5c2d 100644 >>> --- a/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c >>> +++ b/drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c >>> @@ -376,7 +376,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1280 + 30, >>> .vsync_end = 1280 + 30 + 4, >>> .vtotal = 1280 + 30 + 4 + 12, >>> - .vrefresh = 60, >>> .clock = 41600, >>> .width_mm = 62, >>> .height_mm = 110, >>> @@ -392,7 +391,7 @@ static int ltk500hd1829_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_DEV_ERROR(ctx->dev, "failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-lg-lb035q02.c b/drivers/gpu/drm/panel/panel-lg-lb035q02.c >>> index e90efeaba4ad..14456b9cd5c0 100644 >>> --- a/drivers/gpu/drm/panel/panel-lg-lb035q02.c >>> +++ b/drivers/gpu/drm/panel/panel-lg-lb035q02.c >>> @@ -134,7 +134,6 @@ static const struct drm_display_mode lb035q02_mode = { >>> .vsync_start = 240 + 4, >>> .vsync_end = 240 + 4 + 2, >>> .vtotal = 240 + 4 + 2 + 18, >>> - .vrefresh = 60, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> .width_mm = 70, >>> diff --git a/drivers/gpu/drm/panel/panel-lg-lg4573.c b/drivers/gpu/drm/panel/panel-lg-lg4573.c >>> index b262b53dbd85..497f3b888a1d 100644 >>> --- a/drivers/gpu/drm/panel/panel-lg-lg4573.c >>> +++ b/drivers/gpu/drm/panel/panel-lg-lg4573.c >>> @@ -206,7 +206,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 800 + 15, >>> .vsync_end = 800 + 15 + 15, >>> .vtotal = 800 + 15 + 15 + 15, >>> - .vrefresh = 60, >>> }; >>> >>> static int lg4573_get_modes(struct drm_panel *panel, >>> @@ -218,7 +217,7 @@ static int lg4573_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c >>> index c4f83f6384e1..f894971c1c7c 100644 >>> --- a/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c >>> +++ b/drivers/gpu/drm/panel/panel-nec-nl8048hl11.c >>> @@ -116,7 +116,6 @@ static const struct drm_display_mode nl8048_mode = { >>> .vsync_start = 480 + 3, >>> .vsync_end = 480 + 3 + 1, >>> .vtotal = 480 + 3 + 1 + 4, >>> - .vrefresh = 60, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> .width_mm = 89, >>> diff --git a/drivers/gpu/drm/panel/panel-novatek-nt39016.c b/drivers/gpu/drm/panel/panel-novatek-nt39016.c >>> index a470810f7dbe..4b545e081b1e 100644 >>> --- a/drivers/gpu/drm/panel/panel-novatek-nt39016.c >>> +++ b/drivers/gpu/drm/panel/panel-novatek-nt39016.c >>> @@ -327,7 +327,6 @@ static const struct nt39016_panel_info kd035g6_info = { >>> .vsync_start = 240 + 5, >>> .vsync_end = 240 + 5 + 1, >>> .vtotal = 240 + 5 + 1 + 4, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }, >>> .width_mm = 71, >>> diff --git a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c >>> index 09deb99981a4..ecd76b5391d3 100644 >>> --- a/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c >>> +++ b/drivers/gpu/drm/panel/panel-olimex-lcd-olinuxino.c >>> @@ -170,7 +170,6 @@ static int lcd_olinuxino_get_modes(struct drm_panel *panel, >>> lcd_mode->vpw; >>> mode->vtotal = lcd_mode->vactive + lcd_mode->vfp + >>> lcd_mode->vpw + lcd_mode->vbp; >>> - mode->vrefresh = lcd_mode->refresh; >>> >>> /* Always make the first mode preferred */ >>> if (i == 0) >>> diff --git a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c >>> index bb0c992171e8..895ee3d1371e 100644 >>> --- a/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c >>> +++ b/drivers/gpu/drm/panel/panel-orisetech-otm8009a.c >>> @@ -81,7 +81,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 800 + 15, >>> .vsync_end = 800 + 15 + 10, >>> .vtotal = 800 + 15 + 10 + 14, >>> - .vrefresh = 50, >>> .flags = 0, >>> .width_mm = 52, >>> .height_mm = 86, >>> @@ -358,7 +357,7 @@ static int otm8009a_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_ERROR("failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c >>> index 3a0229d60095..11b3d01aca56 100644 >>> --- a/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c >>> +++ b/drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c >>> @@ -102,7 +102,6 @@ static const struct drm_display_mode default_mode_osd101t2587 = { >>> .vsync_start = 1200 + 24, >>> .vsync_end = 1200 + 24 + 6, >>> .vtotal = 1200 + 24 + 6 + 48, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -117,7 +116,7 @@ static int osd101t2587_panel_get_modes(struct drm_panel *panel, >>> dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", >>> osd101t2587->default_mode->hdisplay, >>> osd101t2587->default_mode->vdisplay, >>> - osd101t2587->default_mode->vrefresh); >>> + drm_mode_vrefresh(osd101t2587->default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c >>> index 69693451462e..627dfcf8adb4 100644 >>> --- a/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c >>> +++ b/drivers/gpu/drm/panel/panel-panasonic-vvx10f034n00.c >>> @@ -149,7 +149,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1200 + 24, >>> .vsync_end = 1200 + 24 + 6, >>> .vtotal = 1200 + 24 + 6 + 48, >>> - .vrefresh = 60, >>> }; >>> >>> static int wuxga_nt_panel_get_modes(struct drm_panel *panel, >>> @@ -161,7 +160,7 @@ static int wuxga_nt_panel_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> dev_err(panel->dev, "failed to add mode %ux%u@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c >>> index 8f078b7dd89e..e50ee26474cf 100644 >>> --- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c >>> +++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c >>> @@ -209,7 +209,6 @@ static const struct drm_display_mode rpi_touchscreen_modes[] = { >>> .vsync_start = 480 + 7, >>> .vsync_end = 480 + 7 + 2, >>> .vtotal = 480 + 7 + 2 + 21, >>> - .vrefresh = 60, >>> }, >>> }; >>> >>> @@ -322,7 +321,8 @@ static int rpi_touchscreen_get_modes(struct drm_panel *panel, >>> mode = drm_mode_duplicate(connector->dev, m); >>> if (!mode) { >>> dev_err(panel->dev, "failed to add mode %ux%u@%u\n", >>> - m->hdisplay, m->vdisplay, m->vrefresh); >>> + m->hdisplay, m->vdisplay, >>> + drm_mode_vrefresh(m)); >>> continue; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-raydium-rm67191.c b/drivers/gpu/drm/panel/panel-raydium-rm67191.c >>> index 313637d53d28..d001c52e0ca9 100644 >>> --- a/drivers/gpu/drm/panel/panel-raydium-rm67191.c >>> +++ b/drivers/gpu/drm/panel/panel-raydium-rm67191.c >>> @@ -218,7 +218,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1920 + 10, >>> .vsync_end = 1920 + 10 + 2, >>> .vtotal = 1920 + 10 + 2 + 4, >>> - .vrefresh = 60, >>> .width_mm = 68, >>> .height_mm = 121, >>> .flags = DRM_MODE_FLAG_NHSYNC | >>> @@ -445,7 +444,7 @@ static int rad_panel_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_DEV_ERROR(panel->dev, "failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-raydium-rm68200.c b/drivers/gpu/drm/panel/panel-raydium-rm68200.c >>> index e8982948e0ea..81ae8be62d15 100644 >>> --- a/drivers/gpu/drm/panel/panel-raydium-rm68200.c >>> +++ b/drivers/gpu/drm/panel/panel-raydium-rm68200.c >>> @@ -92,7 +92,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1280 + 12, >>> .vsync_end = 1280 + 12 + 4, >>> .vtotal = 1280 + 12 + 4 + 12, >>> - .vrefresh = 50, >>> .flags = 0, >>> .width_mm = 68, >>> .height_mm = 122, >>> @@ -339,7 +338,7 @@ static int rm68200_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_ERROR("failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c >>> index 38ff742bc120..da4e373291f9 100644 >>> --- a/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c >>> +++ b/drivers/gpu/drm/panel/panel-rocktech-jh057n00900.c >>> @@ -223,7 +223,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1440 + 20, >>> .vsync_end = 1440 + 20 + 4, >>> .vtotal = 1440 + 20 + 4 + 12, >>> - .vrefresh = 60, >>> .clock = 75276, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> .width_mm = 65, >>> @@ -240,7 +239,7 @@ static int jh057n_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> @@ -360,7 +359,7 @@ static int jh057n_probe(struct mipi_dsi_device *dsi) >>> >>> DRM_DEV_INFO(dev, "%ux%u@%u %ubpp dsi %udl - ready\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh, >>> + drm_mode_vrefresh(&default_mode), >>> mipi_dsi_pixel_format_to_bpp(dsi->format), dsi->lanes); >>> >>> jh057n_debugfs_init(ctx); >>> diff --git a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c >>> index ef18559e237e..a7b0b3e39e1a 100644 >>> --- a/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c >>> +++ b/drivers/gpu/drm/panel/panel-ronbo-rb070d30.c >>> @@ -103,7 +103,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 600 + 12, >>> .vsync_end = 600 + 12 + 10, >>> .vtotal = 600 + 12 + 10 + 13, >>> - .vrefresh = 60, >>> >>> .width_mm = 154, >>> .height_mm = 85, >>> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c >>> index 2150043dcf6b..f02645d396ac 100644 >>> --- a/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c >>> +++ b/drivers/gpu/drm/panel/panel-samsung-s6d16d0.c >>> @@ -37,12 +37,6 @@ static const struct drm_display_mode samsung_s6d16d0_mode = { >>> .vsync_start = 480 + 1, >>> .vsync_end = 480 + 1 + 1, >>> .vtotal = 480 + 1 + 1 + 1, >>> - /* >>> - * This depends on the clocking HS vs LP rate, this value >>> - * is calculated as: >>> - * vrefresh = (clock * 1000) / (htotal*vtotal) >>> - */ >>> - .vrefresh = 816, >>> .width_mm = 84, >>> .height_mm = 48, >>> }; >>> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c >>> index 36ebd5a4ac7b..80ef122e7466 100644 >>> --- a/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c >>> +++ b/drivers/gpu/drm/panel/panel-samsung-s6e3ha2.c >>> @@ -617,7 +617,6 @@ static const struct drm_display_mode s6e3ha2_mode = { >>> .vsync_start = 2560 + 1, >>> .vsync_end = 2560 + 1 + 1, >>> .vtotal = 2560 + 1 + 1 + 15, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -636,7 +635,6 @@ static const struct drm_display_mode s6e3hf2_mode = { >>> .vsync_start = 2560 + 1, >>> .vsync_end = 2560 + 1 + 1, >>> .vtotal = 2560 + 1 + 1 + 15, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> @@ -655,7 +653,7 @@ static int s6e3ha2_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_ERROR("failed to add mode %ux%ux@%u\n", >>> ctx->desc->mode->hdisplay, ctx->desc->mode->vdisplay, >>> - ctx->desc->mode->vrefresh); >>> + drm_mode_vrefresh(ctx->desc->mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c >>> index a3570e0a90a8..1247656d73bf 100644 >>> --- a/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c >>> +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c >>> @@ -52,7 +52,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 320 + 150, >>> .vsync_end = 320 + 150 + 1, >>> .vtotal = 320 + 150 + 1 + 2, >>> - .vrefresh = 30, >>> .flags = 0, >>> }; >>> >>> @@ -409,7 +408,7 @@ static int s6e63j0x03_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_ERROR("failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c >>> index a5f76eb4fa25..64421347bfd4 100644 >>> --- a/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c >>> +++ b/drivers/gpu/drm/panel/panel-samsung-s6e63m0.c >>> @@ -117,7 +117,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 800 + 28, >>> .vsync_end = 800 + 28 + 2, >>> .vtotal = 800 + 28 + 2 + 1, >>> - .vrefresh = 60, >>> .width_mm = 53, >>> .height_mm = 89, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> @@ -371,7 +370,7 @@ static int s6e63m0_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_ERROR("failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c >>> index 9d843fcc3a22..485eabecfcc9 100644 >>> --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c >>> +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c >>> @@ -177,7 +177,6 @@ static const struct drm_display_mode s6e88a0_ams452ef01_mode = { >>> .vsync_start = 960 + 14, >>> .vsync_end = 960 + 14 + 2, >>> .vtotal = 960 + 14 + 2 + 8, >>> - .vrefresh = 60, >>> .width_mm = 56, >>> .height_mm = 100, >>> }; >>> diff --git a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c >>> index 40fcbbbacb2c..e417dc4921c2 100644 >>> --- a/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c >>> +++ b/drivers/gpu/drm/panel/panel-seiko-43wvf1g.c >>> @@ -92,7 +92,8 @@ static int seiko_panel_get_fixed_modes(struct seiko_panel *panel, >>> mode = drm_mode_duplicate(connector->dev, m); >>> if (!mode) { >>> dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", >>> - m->hdisplay, m->vdisplay, m->vrefresh); >>> + m->hdisplay, m->vdisplay, >>> + drm_mode_vrefresh(m)); >>> continue; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c >>> index b5d1977221a7..f07324b705b3 100644 >>> --- a/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c >>> +++ b/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c >>> @@ -269,7 +269,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1600 + 4, >>> .vsync_end = 1600 + 4 + 8, >>> .vtotal = 1600 + 4 + 8 + 32, >>> - .vrefresh = 60, >>> }; >>> >>> static int sharp_panel_get_modes(struct drm_panel *panel, >>> @@ -281,7 +280,7 @@ static int sharp_panel_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c >>> index 1cf3f02435c1..d7bf13b9e1d6 100644 >>> --- a/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c >>> +++ b/drivers/gpu/drm/panel/panel-sharp-ls037v7dw01.c >>> @@ -93,7 +93,6 @@ static const struct drm_display_mode ls037v7dw01_mode = { >>> .vsync_start = 640 + 1, >>> .vsync_end = 640 + 1 + 1, >>> .vtotal = 640 + 1 + 1 + 1, >>> - .vrefresh = 58, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> .width_mm = 56, >>> diff --git a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c >>> index ce586c6d70c7..b2e58935529c 100644 >>> --- a/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c >>> +++ b/drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c >>> @@ -201,7 +201,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 960 + 3, >>> .vsync_end = 960 + 3 + 15, >>> .vtotal = 960 + 3 + 15 + 1, >>> - .vrefresh = 60, >>> }; >>> >>> static int sharp_nt_panel_get_modes(struct drm_panel *panel, >>> @@ -213,7 +212,7 @@ static int sharp_nt_panel_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> dev_err(panel->dev, "failed to add mode %ux%u@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c >>> index 82363d05bad4..9ba9d69df41b 100644 >>> --- a/drivers/gpu/drm/panel/panel-simple.c >>> +++ b/drivers/gpu/drm/panel/panel-simple.c >>> @@ -161,7 +161,8 @@ static unsigned int panel_simple_get_display_modes(struct panel_simple *panel, >>> mode = drm_mode_duplicate(connector->dev, m); >>> if (!mode) { >>> dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n", >>> - m->hdisplay, m->vdisplay, m->vrefresh); >>> + m->hdisplay, m->vdisplay, >>> + drm_mode_vrefresh(m)); >>> continue; >>> } >>> >>> @@ -494,7 +495,6 @@ static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = { >>> .vsync_start = 272 + 2, >>> .vsync_end = 272 + 2 + 10, >>> .vtotal = 272 + 2 + 10 + 2, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }; >>> >>> @@ -519,7 +519,6 @@ static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = { >>> .vsync_start = 480 + 2, >>> .vsync_end = 480 + 2 + 45, >>> .vtotal = 480 + 2 + 45 + 0, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }; >>> >>> @@ -570,7 +569,6 @@ static const struct drm_display_mode auo_b101aw03_mode = { >>> .vsync_start = 600 + 16, >>> .vsync_end = 600 + 16 + 6, >>> .vtotal = 600 + 16 + 6 + 16, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_b101aw03 = { >>> @@ -615,7 +613,6 @@ static const struct drm_display_mode auo_b101xtn01_mode = { >>> .vsync_start = 768 + 14, >>> .vsync_end = 768 + 14 + 42, >>> .vtotal = 768 + 14 + 42, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -639,7 +636,6 @@ static const struct drm_display_mode auo_b116xak01_mode = { >>> .vsync_start = 768 + 4, >>> .vsync_end = 768 + 4 + 6, >>> .vtotal = 768 + 4 + 6 + 15, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -668,7 +664,6 @@ static const struct drm_display_mode auo_b116xw03_mode = { >>> .vsync_start = 768 + 10, >>> .vsync_end = 768 + 10 + 12, >>> .vtotal = 768 + 10 + 12 + 6, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_b116xw03 = { >>> @@ -691,7 +686,6 @@ static const struct drm_display_mode auo_b133xtn01_mode = { >>> .vsync_start = 768 + 3, >>> .vsync_end = 768 + 3 + 6, >>> .vtotal = 768 + 3 + 6 + 13, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_b133xtn01 = { >>> @@ -714,7 +708,6 @@ static const struct drm_display_mode auo_b133htn01_mode = { >>> .vsync_start = 1080 + 25, >>> .vsync_end = 1080 + 25 + 10, >>> .vtotal = 1080 + 25 + 10 + 10, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_b133htn01 = { >>> @@ -770,7 +763,6 @@ static const struct drm_display_mode auo_g101evn010_mode = { >>> .vsync_start = 800 + 8, >>> .vsync_end = 800 + 8 + 2, >>> .vtotal = 800 + 8 + 2 + 6, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_g101evn010 = { >>> @@ -794,7 +786,6 @@ static const struct drm_display_mode auo_g104sn02_mode = { >>> .vsync_start = 600 + 10, >>> .vsync_end = 600 + 10 + 35, >>> .vtotal = 600 + 10 + 35 + 2, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_g104sn02 = { >>> @@ -906,7 +897,6 @@ static const struct drm_display_mode auo_t215hvn01_mode = { >>> .vsync_start = 1080 + 4, >>> .vsync_end = 1080 + 4 + 5, >>> .vtotal = 1080 + 4 + 5 + 36, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc auo_t215hvn01 = { >>> @@ -933,7 +923,6 @@ static const struct drm_display_mode avic_tm070ddh03_mode = { >>> .vsync_start = 600 + 17, >>> .vsync_end = 600 + 17 + 1, >>> .vtotal = 600 + 17 + 1 + 17, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc avic_tm070ddh03 = { >>> @@ -983,7 +972,6 @@ static const struct drm_display_mode boe_hv070wsa_mode = { >>> .vsync_start = 600 + 10, >>> .vsync_end = 600 + 10 + 10, >>> .vtotal = 600 + 10 + 10 + 10, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc boe_hv070wsa = { >>> @@ -1006,7 +994,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { >>> .vsync_start = 800 + 3, >>> .vsync_end = 800 + 3 + 5, >>> .vtotal = 800 + 3 + 5 + 24, >>> - .vrefresh = 60, >>> }, >>> { >>> .clock = 57500, >>> @@ -1018,7 +1005,6 @@ static const struct drm_display_mode boe_nv101wxmn51_modes[] = { >>> .vsync_start = 800 + 3, >>> .vsync_end = 800 + 3 + 5, >>> .vtotal = 800 + 3 + 5 + 24, >>> - .vrefresh = 48, >>> }, >>> }; >>> >>> @@ -1048,7 +1034,6 @@ static const struct drm_display_mode boe_nv140fhmn49_modes[] = { >>> .vsync_start = 1080 + 3, >>> .vsync_end = 1080 + 3 + 5, >>> .vtotal = 1125, >>> - .vrefresh = 60, >>> }, >>> }; >>> >>> @@ -1079,7 +1064,6 @@ static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = { >>> .vsync_start = 272 + 8, >>> .vsync_end = 272 + 8 + 8, >>> .vtotal = 272 + 8 + 8 + 8, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -1104,7 +1088,6 @@ static const struct drm_display_mode cdtech_s070wv95_ct16_mode = { >>> .vsync_start = 480 + 29, >>> .vsync_end = 480 + 29 + 13, >>> .vtotal = 480 + 29 + 13 + 3, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -1128,7 +1111,6 @@ static const struct drm_display_mode chunghwa_claa070wp03xg_mode = { >>> .vsync_start = 1280 + 1, >>> .vsync_end = 1280 + 1 + 7, >>> .vtotal = 1280 + 1 + 7 + 15, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -1152,7 +1134,6 @@ static const struct drm_display_mode chunghwa_claa101wa01a_mode = { >>> .vsync_start = 768 + 4, >>> .vsync_end = 768 + 4 + 4, >>> .vtotal = 768 + 4 + 4 + 4, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc chunghwa_claa101wa01a = { >>> @@ -1175,7 +1156,6 @@ static const struct drm_display_mode chunghwa_claa101wb01_mode = { >>> .vsync_start = 768 + 16, >>> .vsync_end = 768 + 16 + 8, >>> .vtotal = 768 + 16 + 8 + 16, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc chunghwa_claa101wb01 = { >>> @@ -1198,7 +1178,6 @@ static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = { >>> .vsync_start = 480 + 10, >>> .vsync_end = 480 + 10 + 2, >>> .vtotal = 480 + 10 + 2 + 33, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -1285,7 +1264,6 @@ static const struct drm_display_mode edt_et035012dm6_mode = { >>> .vsync_start = 240 + 4, >>> .vsync_end = 240 + 4 + 4, >>> .vtotal = 240 + 4 + 4 + 14, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -1317,7 +1295,6 @@ static const struct drm_display_mode edt_etm043080dh6gp_mode = { >>> .vsync_start = 288 + 2, >>> .vsync_end = 288 + 2 + 4, >>> .vtotal = 288 + 2 + 4 + 10, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc edt_etm043080dh6gp = { >>> @@ -1342,7 +1319,6 @@ static const struct drm_display_mode edt_etm0430g0dh6_mode = { >>> .vsync_start = 272 + 2, >>> .vsync_end = 272 + 2 + 10, >>> .vtotal = 272 + 2 + 10 + 2, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -1366,7 +1342,6 @@ static const struct drm_display_mode edt_et057090dhu_mode = { >>> .vsync_start = 480 + 10, >>> .vsync_end = 480 + 10 + 3, >>> .vtotal = 480 + 10 + 3 + 32, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -1392,7 +1367,6 @@ static const struct drm_display_mode edt_etm0700g0dh6_mode = { >>> .vsync_start = 480 + 10, >>> .vsync_end = 480 + 10 + 2, >>> .vtotal = 480 + 10 + 2 + 33, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -1457,7 +1431,6 @@ static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = { >>> .vsync_start = 480 + 37, >>> .vsync_end = 480 + 37 + 2, >>> .vtotal = 480 + 37 + 2 + 8, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc foxlink_fl500wvr00_a0t = { >>> @@ -1481,7 +1454,6 @@ static const struct drm_display_mode frida_frd350h54004_mode = { >>> .vsync_start = 240 + 2, >>> .vsync_end = 240 + 2 + 6, >>> .vtotal = 240 + 2 + 6 + 2, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }; >>> >>> @@ -1508,7 +1480,6 @@ static const struct drm_display_mode friendlyarm_hd702e_mode = { >>> .vsync_start = 1280 + 4, >>> .vsync_end = 1280 + 4 + 8, >>> .vtotal = 1280 + 4 + 8 + 4, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -1531,7 +1502,6 @@ static const struct drm_display_mode giantplus_gpg482739qs5_mode = { >>> .vsync_start = 272 + 8, >>> .vsync_end = 272 + 8 + 1, >>> .vtotal = 272 + 8 + 1 + 8, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc giantplus_gpg482739qs5 = { >>> @@ -1635,7 +1605,6 @@ static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = { >>> .vsync_start = 480 + 16, >>> .vsync_end = 480 + 16 + 13, >>> .vtotal = 480 + 16 + 13 + 16, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc hitachi_tx23d38vm0caa = { >>> @@ -1662,7 +1631,6 @@ static const struct drm_display_mode innolux_at043tn24_mode = { >>> .vsync_start = 272 + 2, >>> .vsync_end = 272 + 2 + 10, >>> .vtotal = 272 + 2 + 10 + 2, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -1688,7 +1656,6 @@ static const struct drm_display_mode innolux_at070tn92_mode = { >>> .vsync_start = 480 + 22, >>> .vsync_end = 480 + 22 + 10, >>> .vtotal = 480 + 22 + 23 + 10, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc innolux_at070tn92 = { >>> @@ -1799,7 +1766,6 @@ static const struct drm_display_mode innolux_g121x1_l03_mode = { >>> .vsync_start = 768 + 38, >>> .vsync_end = 768 + 38 + 1, >>> .vtotal = 768 + 38 + 1 + 0, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -1861,7 +1827,6 @@ static const struct drm_display_mode innolux_n156bge_l21_mode = { >>> .vsync_start = 768 + 2, >>> .vsync_end = 768 + 2 + 6, >>> .vtotal = 768 + 2 + 6 + 12, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc innolux_n156bge_l21 = { >>> @@ -1884,7 +1849,6 @@ static const struct drm_display_mode innolux_p120zdg_bf1_mode = { >>> .vsync_start = 1440 + 3, >>> .vsync_end = 1440 + 3 + 10, >>> .vtotal = 1440 + 3 + 10 + 27, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }; >>> >>> @@ -1912,7 +1876,6 @@ static const struct drm_display_mode innolux_zj070na_01p_mode = { >>> .vsync_start = 600 + 16, >>> .vsync_end = 600 + 16 + 4, >>> .vtotal = 600 + 16 + 4 + 16, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc innolux_zj070na_01p = { >>> @@ -2008,7 +1971,6 @@ static const struct drm_display_mode lemaker_bl035_rgb_002_mode = { >>> .vsync_start = 240 + 4, >>> .vsync_end = 240 + 4 + 3, >>> .vtotal = 240 + 4 + 3 + 15, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc lemaker_bl035_rgb_002 = { >>> @@ -2032,7 +1994,6 @@ static const struct drm_display_mode lg_lb070wv8_mode = { >>> .vsync_start = 480 + 10, >>> .vsync_end = 480 + 10 + 25, >>> .vtotal = 480 + 10 + 25 + 10, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc lg_lb070wv8 = { >>> @@ -2057,7 +2018,6 @@ static const struct drm_display_mode lg_lp079qx1_sp0v_mode = { >>> .vsync_start = 2048 + 8, >>> .vsync_end = 2048 + 8 + 4, >>> .vtotal = 2048 + 8 + 4 + 8, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -2080,7 +2040,6 @@ static const struct drm_display_mode lg_lp097qx1_spa1_mode = { >>> .vsync_start = 1536 + 3, >>> .vsync_end = 1536 + 3 + 1, >>> .vtotal = 1536 + 3 + 1 + 9, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc lg_lp097qx1_spa1 = { >>> @@ -2102,7 +2061,6 @@ static const struct drm_display_mode lg_lp120up1_mode = { >>> .vsync_start = 1280 + 4, >>> .vsync_end = 1280 + 4 + 4, >>> .vtotal = 1280 + 4 + 4 + 12, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc lg_lp120up1 = { >>> @@ -2125,7 +2083,6 @@ static const struct drm_display_mode lg_lp129qe_mode = { >>> .vsync_start = 1700 + 3, >>> .vsync_end = 1700 + 3 + 10, >>> .vtotal = 1700 + 3 + 10 + 36, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc lg_lp129qe = { >>> @@ -2206,7 +2163,6 @@ static const struct drm_display_mode mitsubishi_aa070mc01_mode = { >>> .vsync_start = 480 + 0, >>> .vsync_end = 480 + 48 + 1, >>> .vtotal = 480 + 48 + 1 + 0, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -2221,7 +2177,6 @@ static const struct drm_display_mode logicpd_type_28_mode = { >>> .vsync_start = 272 + 2, >>> .vsync_end = 272 + 2 + 11, >>> .vtotal = 272 + 2 + 11 + 3, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }; >>> >>> @@ -2301,7 +2256,6 @@ static const struct drm_display_mode nec_nl4827hc19_05b_mode = { >>> .vsync_start = 272 + 2, >>> .vsync_end = 272 + 2 + 4, >>> .vtotal = 272 + 2 + 4 + 2, >>> - .vrefresh = 74, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -2327,7 +2281,6 @@ static const struct drm_display_mode netron_dy_e231732_mode = { >>> .vsync_start = 600 + 127, >>> .vsync_end = 600 + 127 + 20, >>> .vtotal = 600 + 127 + 20 + 3, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc netron_dy_e231732 = { >>> @@ -2350,7 +2303,6 @@ static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = { >>> .vsync_start = 272 + 2, >>> .vsync_end = 272 + 2 + 10, >>> .vtotal = 272 + 2 + 10 + 2, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -2458,7 +2410,6 @@ static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = { >>> .vsync_start = 272 + 8, >>> .vsync_end = 272 + 8 + 5, >>> .vtotal = 272 + 8 + 5 + 3, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc olimex_lcd_olinuxino_43ts = { >>> @@ -2486,7 +2437,6 @@ static const struct drm_display_mode ontat_yx700wv03_mode = { >>> .vsync_start = 483, >>> .vsync_end = 493, >>> .vtotal = 500, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -2515,7 +2465,6 @@ static const struct drm_display_mode ortustech_com37h3m_mode = { >>> .vsync_start = 640 + 4, >>> .vsync_end = 640 + 4 + 3, >>> .vtotal = 640 + 4 + 3 + 4, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -2542,7 +2491,6 @@ static const struct drm_display_mode ortustech_com43h4m85ulc_mode = { >>> .vsync_start = 800 + 3, >>> .vsync_end = 800 + 3 + 3, >>> .vtotal = 800 + 3 + 3 + 3, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc ortustech_com43h4m85ulc = { >>> @@ -2567,7 +2515,6 @@ static const struct drm_display_mode osddisplays_osd070t1718_19ts_mode = { >>> .vsync_start = 480 + 22, >>> .vsync_end = 480 + 22 + 13, >>> .vtotal = 480 + 22 + 13 + 10, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -2594,7 +2541,6 @@ static const struct drm_display_mode pda_91_00156_a0_mode = { >>> .vsync_start = 480 + 1, >>> .vsync_end = 480 + 1 + 23, >>> .vtotal = 480 + 1 + 23 + 22, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc pda_91_00156_a0 = { >>> @@ -2618,7 +2564,6 @@ static const struct drm_display_mode qd43003c0_40_mode = { >>> .vsync_start = 272 + 4, >>> .vsync_end = 272 + 4 + 10, >>> .vtotal = 272 + 4 + 10 + 2, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc qd43003c0_40 = { >>> @@ -2672,7 +2617,6 @@ static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = { >>> .vsync_start = 800 + 2, >>> .vsync_end = 800 + 2 + 5, >>> .vtotal = 800 + 2 + 5 + 16, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc rocktech_rk101ii01d_ct = { >>> @@ -2701,7 +2645,6 @@ static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { >>> .vsync_start = 1600 + 2, >>> .vsync_end = 1600 + 2 + 5, >>> .vtotal = 1600 + 2 + 5 + 57, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc samsung_lsn122dl01_c01 = { >>> @@ -2723,7 +2666,6 @@ static const struct drm_display_mode samsung_ltn101nt05_mode = { >>> .vsync_start = 600 + 3, >>> .vsync_end = 600 + 3 + 6, >>> .vtotal = 600 + 3 + 6 + 61, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc samsung_ltn101nt05 = { >>> @@ -2746,7 +2688,6 @@ static const struct drm_display_mode samsung_ltn140at29_301_mode = { >>> .vsync_start = 768 + 2, >>> .vsync_end = 768 + 2 + 5, >>> .vtotal = 768 + 2 + 5 + 17, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc samsung_ltn140at29_301 = { >>> @@ -2793,7 +2734,6 @@ static const struct drm_display_mode sharp_ld_d5116z01b_mode = { >>> .vsync_start = 1280 + 3, >>> .vsync_end = 1280 + 3 + 10, >>> .vtotal = 1280 + 3 + 10 + 57, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }; >>> >>> @@ -2819,7 +2759,6 @@ static const struct drm_display_mode sharp_lq070y3dg3b_mode = { >>> .vsync_start = 480 + 8, >>> .vsync_end = 480 + 8 + 2, >>> .vtotal = 480 + 8 + 2 + 35, >>> - .vrefresh = 60, >>> .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE, >>> }; >>> >>> @@ -2846,7 +2785,6 @@ static const struct drm_display_mode sharp_lq035q7db03_mode = { >>> .vsync_start = 320 + 9, >>> .vsync_end = 320 + 9 + 1, >>> .vtotal = 320 + 9 + 1 + 7, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc sharp_lq035q7db03 = { >>> @@ -2923,7 +2861,6 @@ static const struct drm_display_mode sharp_lq150x1lg11_mode = { >>> .vsync_start = 768 + 37, >>> .vsync_end = 768 + 37 + 2, >>> .vtotal = 768 + 37 + 2 + 8, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc sharp_lq150x1lg11 = { >>> @@ -2974,7 +2911,6 @@ static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = { >>> .vsync_start = 480 + 1, >>> .vsync_end = 480 + 1 + 23, >>> .vtotal = 480 + 1 + 23 + 22, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc shelly_sca07010_bfn_lnn = { >>> @@ -2997,7 +2933,6 @@ static const struct drm_display_mode starry_kr122ea0sra_mode = { >>> .vsync_start = 1200 + 15, >>> .vsync_end = 1200 + 15 + 2, >>> .vtotal = 1200 + 15 + 2 + 18, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -3025,7 +2960,6 @@ static const struct drm_display_mode tfc_s9700rtwv43tr_01b_mode = { >>> .vsync_start = 480 + 13, >>> .vsync_end = 480 + 13 + 2, >>> .vtotal = 480 + 13 + 2 + 29, >>> - .vrefresh = 62, >>> }; >>> >>> static const struct panel_desc tfc_s9700rtwv43tr_01b = { >>> @@ -3101,7 +3035,6 @@ static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = { >>> .vsync_start = 240 + 3, >>> .vsync_end = 240 + 3 + 1, >>> .vtotal = 240 + 3 + 1 + 17, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }, >>> }; >>> @@ -3129,7 +3062,6 @@ static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = { >>> .vsync_start = 240 + 0, >>> .vsync_end = 240 + 0 + 1, >>> .vtotal = 240 + 0 + 1 + 0, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC, >>> }, >>> }; >>> @@ -3158,7 +3090,6 @@ static const struct drm_display_mode toshiba_lt089ac29000_mode = { >>> .vsync_start = 768 + 20, >>> .vsync_end = 768 + 20 + 7, >>> .vtotal = 768 + 20 + 7 + 3, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc toshiba_lt089ac29000 = { >>> @@ -3183,7 +3114,6 @@ static const struct drm_display_mode tpk_f07a_0102_mode = { >>> .vsync_start = 480 + 10, >>> .vsync_end = 480 + 10 + 2, >>> .vtotal = 480 + 10 + 2 + 33, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc tpk_f07a_0102 = { >>> @@ -3206,7 +3136,6 @@ static const struct drm_display_mode tpk_f10a_0102_mode = { >>> .vsync_start = 600 + 20, >>> .vsync_end = 600 + 20 + 5, >>> .vtotal = 600 + 20 + 5 + 25, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc tpk_f10a_0102 = { >>> @@ -3265,7 +3194,6 @@ static const struct drm_display_mode vl050_8048nt_c01_mode = { >>> .vsync_start = 480 + 22, >>> .vsync_end = 480 + 22 + 10, >>> .vtotal = 480 + 22 + 10 + 23, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> @@ -3291,7 +3219,6 @@ static const struct drm_display_mode winstar_wf35ltiacd_mode = { >>> .vsync_start = 240 + 4, >>> .vsync_end = 240 + 4 + 3, >>> .vtotal = 240 + 4 + 3 + 15, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -3317,7 +3244,6 @@ static const struct drm_display_mode arm_rtsm_mode[] = { >>> .vsync_start = 768 + 3, >>> .vsync_end = 768 + 3 + 6, >>> .vtotal = 768 + 3 + 6 + 29, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }, >>> }; >>> @@ -3743,7 +3669,6 @@ static const struct drm_display_mode auo_b080uan01_mode = { >>> .vsync_start = 1920 + 9, >>> .vsync_end = 1920 + 9 + 2, >>> .vtotal = 1920 + 9 + 2 + 8, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc_dsi auo_b080uan01 = { >>> @@ -3771,7 +3696,6 @@ static const struct drm_display_mode boe_tv080wum_nl0_mode = { >>> .vsync_start = 1920 + 21, >>> .vsync_end = 1920 + 21 + 3, >>> .vtotal = 1920 + 21 + 3 + 18, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC, >>> }; >>> >>> @@ -3801,7 +3725,6 @@ static const struct drm_display_mode lg_ld070wx3_sl01_mode = { >>> .vsync_start = 1280 + 28, >>> .vsync_end = 1280 + 28 + 1, >>> .vtotal = 1280 + 28 + 1 + 14, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc_dsi lg_ld070wx3_sl01 = { >>> @@ -3829,7 +3752,6 @@ static const struct drm_display_mode lg_lh500wx1_sd03_mode = { >>> .vsync_start = 1280 + 8, >>> .vsync_end = 1280 + 8 + 4, >>> .vtotal = 1280 + 8 + 4 + 12, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc_dsi lg_lh500wx1_sd03 = { >>> @@ -3857,7 +3779,6 @@ static const struct drm_display_mode panasonic_vvx10f004b00_mode = { >>> .vsync_start = 1200 + 17, >>> .vsync_end = 1200 + 17 + 2, >>> .vtotal = 1200 + 17 + 2 + 16, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc_dsi panasonic_vvx10f004b00 = { >>> @@ -3886,7 +3807,6 @@ static const struct drm_display_mode lg_acx467akm_7_mode = { >>> .vsync_start = 1920 + 2, >>> .vsync_end = 1920 + 2 + 2, >>> .vtotal = 1920 + 2 + 2 + 2, >>> - .vrefresh = 60, >>> }; >>> >>> static const struct panel_desc_dsi lg_acx467akm_7 = { >>> @@ -3914,7 +3834,6 @@ static const struct drm_display_mode osd101t2045_53ts_mode = { >>> .vsync_start = 1200 + 16, >>> .vsync_end = 1200 + 16 + 2, >>> .vtotal = 1200 + 16 + 2 + 16, >>> - .vrefresh = 60, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> }; >>> >>> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c >>> index 4b4f2558e3b4..692041ae4eb6 100644 >>> --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c >>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c >>> @@ -272,7 +272,7 @@ static int st7701_get_modes(struct drm_panel *panel, >>> DRM_DEV_ERROR(&st7701->dsi->dev, >>> "failed to add mode %ux%ux@%u\n", >>> desc_mode->hdisplay, desc_mode->vdisplay, >>> - desc_mode->vrefresh); >>> + drm_mode_vrefresh(desc_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c >>> index cc02c54c1b2e..3513ae40efa8 100644 >>> --- a/drivers/gpu/drm/panel/panel-sitronix-st7789v.c >>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7789v.c >>> @@ -165,7 +165,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 320 + 8, >>> .vsync_end = 320 + 8 + 4, >>> .vtotal = 320 + 8 + 4 + 4, >>> - .vrefresh = 60, >>> }; >>> >>> static int st7789v_get_modes(struct drm_panel *panel, >>> @@ -177,7 +176,7 @@ static int st7789v_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> dev_err(panel->dev, "failed to add mode %ux%ux@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/panel/panel-sony-acx424akp.c b/drivers/gpu/drm/panel/panel-sony-acx424akp.c >>> index de0abf76ae6f..eba05bd6ec9a 100644 >>> --- a/drivers/gpu/drm/panel/panel-sony-acx424akp.c >>> +++ b/drivers/gpu/drm/panel/panel-sony-acx424akp.c >>> @@ -57,7 +57,6 @@ static const struct drm_display_mode sony_acx424akp_vid_mode = { >>> .vsync_start = 864 + 14, >>> .vsync_end = 864 + 14 + 1, >>> .vtotal = 864 + 14 + 1 + 11, >>> - .vrefresh = 60, >>> .width_mm = 48, >>> .height_mm = 84, >>> .flags = DRM_MODE_FLAG_PVSYNC, >>> @@ -81,7 +80,6 @@ static const struct drm_display_mode sony_acx424akp_cmd_mode = { >>> * Some desired refresh rate, experiments at the maximum "pixel" >>> * clock speed (HS clock 420 MHz) yields around 117Hz. >>> */ >>> - .vrefresh = 60, >>> .width_mm = 48, >>> .height_mm = 84, >>> }; >>> diff --git a/drivers/gpu/drm/panel/panel-sony-acx565akm.c b/drivers/gpu/drm/panel/panel-sony-acx565akm.c >>> index 5c4b6f6e5c2d..fc6a7e451abe 100644 >>> --- a/drivers/gpu/drm/panel/panel-sony-acx565akm.c >>> +++ b/drivers/gpu/drm/panel/panel-sony-acx565akm.c >>> @@ -514,7 +514,6 @@ static const struct drm_display_mode acx565akm_mode = { >>> .vsync_start = 480 + 3, >>> .vsync_end = 480 + 3 + 3, >>> .vtotal = 480 + 3 + 3 + 4, >>> - .vrefresh = 57, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> .width_mm = 77, >>> diff --git a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c >>> index aeca15dfeb3c..58d683cc5215 100644 >>> --- a/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c >>> +++ b/drivers/gpu/drm/panel/panel-tpo-td028ttec1.c >>> @@ -281,7 +281,6 @@ static const struct drm_display_mode td028ttec1_mode = { >>> .vsync_start = 640 + 4, >>> .vsync_end = 640 + 4 + 2, >>> .vtotal = 640 + 4 + 2 + 2, >>> - .vrefresh = 66, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> .width_mm = 43, >>> diff --git a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c >>> index 75f1f1f1b6de..9b2a356c4d9a 100644 >>> --- a/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c >>> +++ b/drivers/gpu/drm/panel/panel-tpo-td043mtea1.c >>> @@ -339,7 +339,6 @@ static const struct drm_display_mode td043mtea1_mode = { >>> .vsync_start = 480 + 39, >>> .vsync_end = 480 + 39 + 1, >>> .vtotal = 480 + 39 + 1 + 34, >>> - .vrefresh = 60, >>> .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED, >>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >>> .width_mm = 94, >>> diff --git a/drivers/gpu/drm/panel/panel-tpo-tpg110.c b/drivers/gpu/drm/panel/panel-tpo-tpg110.c >>> index 8472d018c16f..c7a2f0ae5ba5 100644 >>> --- a/drivers/gpu/drm/panel/panel-tpo-tpg110.c >>> +++ b/drivers/gpu/drm/panel/panel-tpo-tpg110.c >>> @@ -112,7 +112,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { >>> .vsync_start = 480 + 10, >>> .vsync_end = 480 + 10 + 1, >>> .vtotal = 480 + 10 + 1 + 35, >>> - .vrefresh = 60, >>> }, >>> .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, >>> }, >>> @@ -129,7 +128,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { >>> .vsync_start = 480 + 18, >>> .vsync_end = 480 + 18 + 1, >>> .vtotal = 480 + 18 + 1 + 27, >>> - .vrefresh = 60, >>> }, >>> .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, >>> }, >>> @@ -146,7 +144,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { >>> .vsync_start = 272 + 2, >>> .vsync_end = 272 + 2 + 1, >>> .vtotal = 272 + 2 + 1 + 12, >>> - .vrefresh = 60, >>> }, >>> .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, >>> }, >>> @@ -163,7 +160,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { >>> .vsync_start = 640 + 4, >>> .vsync_end = 640 + 4 + 1, >>> .vtotal = 640 + 4 + 1 + 8, >>> - .vrefresh = 60, >>> }, >>> .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, >>> }, >>> @@ -180,7 +176,6 @@ static const struct tpg110_panel_mode tpg110_modes[] = { >>> .vsync_start = 240 + 2, >>> .vsync_end = 240 + 2 + 1, >>> .vtotal = 240 + 2 + 1 + 20, >>> - .vrefresh = 60, >>> }, >>> .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE, >>> }, >>> diff --git a/drivers/gpu/drm/panel/panel-truly-nt35597.c b/drivers/gpu/drm/panel/panel-truly-nt35597.c >>> index 012ca62bf30e..9d669088cffc 100644 >>> --- a/drivers/gpu/drm/panel/panel-truly-nt35597.c >>> +++ b/drivers/gpu/drm/panel/panel-truly-nt35597.c >>> @@ -536,7 +536,6 @@ static const struct drm_display_mode qcom_sdm845_mtp_2k_mode = { >>> .vsync_start = 2560 + 8, >>> .vsync_end = 2560 + 8 + 1, >>> .vtotal = 2560 + 8 + 1 + 7, >>> - .vrefresh = 60, >>> .flags = 0, >>> }; >>> >>> diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c >>> index 1645aceab597..8a3b2f906e63 100644 >>> --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c >>> +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c >>> @@ -243,7 +243,6 @@ static const struct drm_display_mode default_mode = { >>> .vsync_start = 1280 + 22, >>> .vsync_end = 1280 + 22 + 4, >>> .vtotal = 1280 + 22 + 4 + 11, >>> - .vrefresh = 60, >>> .clock = 64000, >>> .width_mm = 68, >>> .height_mm = 121, >>> @@ -259,7 +258,7 @@ static int xpp055c272_get_modes(struct drm_panel *panel, >>> if (!mode) { >>> DRM_DEV_ERROR(ctx->dev, "Failed to add mode %ux%u@%u\n", >>> default_mode.hdisplay, default_mode.vdisplay, >>> - default_mode.vrefresh); >>> + drm_mode_vrefresh(&default_mode)); >>> return -ENOMEM; >>> } >>> >>> diff --git a/drivers/gpu/drm/sti/sti_hda.c b/drivers/gpu/drm/sti/sti_hda.c >>> index 2bb32009d117..3dc6e2e96541 100644 >>> --- a/drivers/gpu/drm/sti/sti_hda.c >>> +++ b/drivers/gpu/drm/sti/sti_hda.c >>> @@ -586,7 +586,6 @@ static int sti_hda_connector_get_modes(struct drm_connector *connector) >>> &hda_supported_modes[i].mode); >>> if (!mode) >>> continue; >>> - mode->vrefresh = drm_mode_vrefresh(mode); >>> >>> /* the first mode is the preferred mode */ >>> if (i == 0) >>> diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c >>> index eb6e23e8d8ef..0b07f7b5ece4 100644 >>> --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c >>> +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c >>> @@ -2226,7 +2226,6 @@ void vmw_guess_mode_timing(struct drm_display_mode *mode) >>> mode->vtotal = mode->vsync_end + 50; >>> >>> mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6; >>> - mode->vrefresh = drm_mode_vrefresh(mode); >>> } >>> >>> >>> @@ -2300,7 +2299,6 @@ int vmw_du_connector_fill_modes(struct drm_connector *connector, >>> mode = drm_mode_duplicate(dev, bmode); >>> if (!mode) >>> return 0; >>> - mode->vrefresh = drm_mode_vrefresh(mode); >>> >>> drm_mode_probed_add(connector, mode); >>> } >>> diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h >>> index 7dab7f172431..52e8ca613e4b 100644 >>> --- a/include/drm/drm_modes.h >>> +++ b/include/drm/drm_modes.h >>> @@ -380,16 +380,6 @@ struct drm_display_mode { >>> */ >>> int private_flags; >>> >>> - /** >>> - * @vrefresh: >>> - * >>> - * Vertical refresh rate, for debug output in human readable form. Not >>> - * used in a functional way. >>> - * >>> - * This value is in Hz. >>> - */ >>> - int vrefresh; >>> - >>> /** >>> * @picture_aspect_ratio: >>> * >>> @@ -421,7 +411,7 @@ struct drm_display_mode { >>> * @m: display mode >>> */ >>> #define DRM_MODE_ARG(m) \ >>> - (m)->name, (m)->vrefresh, (m)->clock, \ >>> + (m)->name, drm_mode_vrefresh(m), (m)->clock, \ >>> (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \ >>> (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \ >>> (m)->type, (m)->flags _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh 2020-02-25 15:19 ` Andrzej Hajda @ 2020-02-25 15:45 ` Ville Syrjälä [not found] ` <20200225192720.GG13686@intel.com> 0 siblings, 1 reply; 9+ messages in thread From: Ville Syrjälä @ 2020-02-25 15:45 UTC (permalink / raw) To: Andrzej Hajda Cc: Neil Armstrong, nouveau, Guido Günther, dri-devel, Thierry Reding, Laurent Pinchart, Sam Ravnborg, Jagan Teki, Thomas Hellstrom, Joonyoung Shim, Stefan Mavrodiev, Jerry Han, VMware Graphics, Ben Skeggs, Robert Chiras, Icenowy Zheng, Jonas Karlman, intel-gfx, linux-amlogic, Vincent Abriou, Jernej Skrabec, Purism Kernel Team, Seung-Woo Kim, Kyungmin Park On Tue, Feb 25, 2020 at 04:19:27PM +0100, Andrzej Hajda wrote: > On 25.02.2020 12:21, Ville Syrjälä wrote: > > On Mon, Feb 24, 2020 at 03:14:54PM +0100, Andrzej Hajda wrote: > >> On 19.02.2020 21:35, Ville Syrjala wrote: > >>> From: Ville Syrjälä <ville.syrjala@linux.intel.com> > >>> > >>> Get rid of mode->vrefresh and just calculate it on demand. Saves > >>> a bit of space and avoids the cached value getting out of sync > >>> with reality. > >>> > >>> Mostly done with cocci, with the following manual fixups: > >>> - Remove the now empty loop in drm_helper_probe_single_connector_modes() > >>> - Fix __MODE() macro in ch7006_mode.c > >>> - Fix DRM_MODE_ARG() macro in drm_modes.h > >>> - Remove leftover comment from samsung_s6d16d0_mode > >> ... > >>> diff --git a/drivers/gpu/drm/panel/panel-arm-versatile.c b/drivers/gpu/drm/panel/panel-arm-versatile.c > >>> index 41444a73c980..47b37fef7ee8 100644 > >>> --- a/drivers/gpu/drm/panel/panel-arm-versatile.c > >>> +++ b/drivers/gpu/drm/panel/panel-arm-versatile.c > >>> @@ -143,7 +143,6 @@ static const struct versatile_panel_type versatile_panels[] = { > >>> .vsync_start = 240 + 5, > >>> .vsync_end = 240 + 5 + 6, > >>> .vtotal = 240 + 5 + 6 + 5, > >>> - .vrefresh = 116, > >> > >> Are you sure vrefresh calculated (from totals and clock) is different > >> than this field? If not, we risk regressions. > >> > >> This case is OK, but there is plenty other cases. > > IIRC I did spot check a few of them. But which code exactly do you think > > is abusing vrefresh and thus could break? > > > I guess suspect/potential victim is every code which uses > drm_mode_vrefresh - after this patch the function can return different > value(if there are differences between provided and calculated vrefresh). > > Quick examples where output of this function matters: > > https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c#L387 Already looks quite sketchy due to rounding. > > https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/panel/panel-sharp-lq101r1sx01.c#L42 msleep() is in no way accurate so looks rather sketchy as well. > https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/tilcdc/tilcdc_crtc.c#L810 Another thing that suffers from rounding issues. So to me these all look like code that someone should fix regardless. -- Ville Syrjälä Intel _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
[parent not found: <20200225192720.GG13686@intel.com>]
* Re: [PATCH 04/12] drm: Nuke mode->vrefresh [not found] ` <20200225192720.GG13686@intel.com> @ 2020-02-25 21:52 ` Linus Walleij 0 siblings, 0 replies; 9+ messages in thread From: Linus Walleij @ 2020-02-25 21:52 UTC (permalink / raw) To: Ville Syrjälä Cc: Josh Wu, Bhuvanchandra DV, Neil Armstrong, Eric Anholt, nouveau, Guido Günther, Paul Kocialkowski, open list:DRM PANEL DRIVERS, Gustaf Lindström, Andrzej Hajda, Thierry Reding, Laurent Pinchart, Philipp Zabel, Sam Ravnborg, Marian-Cristian Rotariu, Jagan Teki, Thomas Hellstrom, Joonyoung Shim, Jonathan Marek, Stefan Mavrodiev, Adam Ford, Jerry Han, VMware Graphics, Ben Skeggs, H. Nikolaus Schaller, Robert Chiras, Heiko Schocher, Icenowy Zheng, Jonas Karlman, intel-gfx, Randy Li, Maxime Ripard, Alexandre Courbot, Fabio Estevam, open list:ARM/Amlogic Meson..., Vincent Abriou, Andreas Pretzsch, Jernej Skrabec, Alex Gonzalez, Purism Kernel Team, Boris Brezillon, Seung-Woo Kim, Christoph Fritz, Kyungmin Park, Heiko Stuebner, Eugen Hristev, Giulio Benetti On Tue, Feb 25, 2020 at 8:27 PM Ville Syrjälä <ville.syrjala@linux.intel.com> wrote: > OK, so I went ahead a wrote a bit of cocci [1] to find the bad apples. That's impressive :D > Unfortunately it found a lot of strange stuff: I will answer for the weirdness I caused. I have long suspected that a whole bunch of the "simple" displays are not simple but contains a display controller and memory. That means that the speed over the link to the display and actual refresh rate on the actual display is asymmetric because well we are just updating a RAM, the resolution just limits how much data we are sending, the clock limits the speed on the bus over to the RAM on the other side. In most cases I thing the clock is the way to go. > panel-sony-acx424akp.c:51/sony_acx424akp_vid_mode: 60 vs. 727 (.clock=330000 .htotal=480 + 15 + 0 + 15 .vtotal=864 + 14 + 1 + 11) I suspect clock should be adjusted after vfresh = 60 here instead of the other way around. I couldn't quite test the video mode, but the vendor driver (no documentation ....) does state 330 MHz which seems a bit high. Just drop vrefresh for now. > panel-sony-acx424akp.c:71/sony_acx424akp_cmd_mode: 60 vs. 711 (.clock=420160 .htotal=480 + 154 + 16 + 32 .vtotal=864 + 1 + 1 + 1) You can override this ignoring the vrefresh, this is a command-mode only, and in command mode the refresh doesn't come into play, or is very high and limited by a bunch of other overhead than just the resolution. The command mode HS clock is @420+ MHz indeed. Tests showed around 116 Hz for this particular display in practice with continuous updates. > panel-ilitek-ili9322.c:543/srgb_320x240_mode: 60 vs. 10168 (.clock=2453500 .htotal=320 + 359 + 1 + 241 .vtotal=262) > panel-ilitek-ili9322.c:587/yuv_640x320_mode: 60 vs. 7768 (.clock=2454000 .htotal=640 + 252 + 1 + 28 .vtotal=320 + 4 + 1 + 18) > panel-ilitek-ili9322.c:616/itu_r_bt_656_640_mode: 60 vs. 5358 (.clock=2454000 .htotal=640 + 3 + 1 + 272 .vtotal=500) > panel-ilitek-ili9322.c:557/srgb_360x240_mode: 60 vs. 16178 (.clock=2700000 .htotal=360 + 35 + 1 + 241 .vtotal=262) > panel-ilitek-ili9322.c:601/yuv_720x360_mode: 60 vs. 7071 (.clock=2700000 .htotal=720 + 252 + 1 + 24 .vtotal=360 + 4 + 1 + 18) > panel-ilitek-ili9322.c:631/itu_r_bt_656_720_mode: 60 vs. 5422 (.clock=2700000 .htotal=720 + 3 + 1 + 272 .vtotal=500) > panel-ilitek-ili9322.c:572/prgb_320x240_mode: 60 vs. 59725 (.clock=6400000 .htotal=320 + 38 + 1 + 50 .vtotal=262) This is the datasheet if you want to take a look: https://dflund.se/~triad/krad/dlink-dir-685/ILI9322DS_V1.12.pdf The one platform using this is using the 8 bit ITU-R BT.656 640Y 320CbCr mode which (I think) is similar to DSI command mode again: there is a stream of data in a burst and you decide how often you want to send it because the panel always has backing memory and the speed out to the physical display is something completely different. You can safely delete vrefresh from all of these sites. > panel-arm-versatile.c:161/versatile_panels[]: 60 vs. 61 (.clock=25000 .htotal=640 + 24 + 96 + 24 .vtotal=480 + 11 + 2 + 32) > panel-arm-versatile.c:208/versatile_panels[]: 116 vs. 59 (.clock=5400 .htotal=240 + 10 + 10 + 20 .vtotal=320 + 2 + 2 + 2) > panel-arm-versatile.c:184/versatile_panels[]: 390 vs. 1523 (.clock=62500 .htotal=176 + 2 + 3 + 3 .vtotal=220 + 0 + 2 + 1) The only driver drivers/gpu/drm/pl111/pl111_display.c Uses mode->clock so just drop vrefresh. Yours, Linus Walleij _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-02-25 21:52 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
[not found] <20200219203544.31013-1-ville.syrjala@linux.intel.com>
2020-02-19 20:35 ` [PATCH 04/12] drm: Nuke mode->vrefresh Ville Syrjala
2020-02-20 12:00 ` Emil Velikov
2020-02-22 12:32 ` Sam Ravnborg
2020-02-24 13:14 ` Ville Syrjälä
2020-02-24 14:14 ` Andrzej Hajda
2020-02-25 11:21 ` Ville Syrjälä
2020-02-25 15:19 ` Andrzej Hajda
2020-02-25 15:45 ` Ville Syrjälä
[not found] ` <20200225192720.GG13686@intel.com>
2020-02-25 21:52 ` Linus Walleij
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox