From: "Arnd Bergmann" <arnd@arndb.de>
To: "Suravee Suthikulpanit" <suravee.suthikulpanit@amd.com>,
linux-kernel@vger.kernel.org, iommu@lists.linux.dev
Cc: "Joerg Roedel" <joro@8bytes.org>,
"Robin Murphy" <robin.murphy@arm.com>,
vasant.hegde@amd.com, "Uros Bizjak" <ubizjak@gmail.com>,
Linux-Arch <linux-arch@vger.kernel.org>,
"Jason Gunthorpe" <jgg@nvidia.com>,
"Kevin Tian" <kevin.tian@intel.com>,
jon.grimm@amd.com, santosh.shukla@amd.com, pandoh@google.com,
kumaranand@google.com
Subject: Re: [PATCH v10 02/10] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported
Date: Wed, 13 Nov 2024 13:35:10 +0100 [thread overview]
Message-ID: <558bf28e-6cf8-436d-b2ef-382ff421bb00@app.fastmail.com> (raw)
In-Reply-To: <20241113120327.5239-3-suravee.suthikulpanit@amd.com>
On Wed, Nov 13, 2024, at 13:03, Suravee Suthikulpanit wrote:
> According to the AMD IOMMU spec, IOMMU hardware reads the entire DTE
> in a single 256-bit transaction. It is recommended to update DTE using
> 128-bit operation followed by an INVALIDATE_DEVTAB_ENTYRY command when
> the IV=1b or V=1b before the change.
>
> According to the AMD BIOS and Kernel Developer's Guide (BDKG) dated back
> to family 10h Processor [1], which is the first introduction of AMD IOMMU,
> AMD processor always has CPUID Fn0000_0001_ECX[CMPXCHG16B]=1.
> Therefore, it is safe to assume cmpxchg128 is available with all AMD
> processor w/ IOMMU.
Makes sense. More specifically, I'm fairly sure the only x86-64
CPUs without cmpxchg16b are very early NetBurst Xeons, while AMD
had the instruction from the start, and dropping the runtime check
entirely would work just as well.
Arnd
next prev parent reply other threads:[~2024-11-13 12:35 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-13 12:03 [PATCH v10 00/10] iommu/amd: Use 128-bit cmpxchg operation to update DTE Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 01/10] iommu/amd: Misc ACPI IVRS debug info clean up Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 02/10] iommu/amd: Disable AMD IOMMU if CMPXCHG16B feature is not supported Suravee Suthikulpanit
2024-11-13 12:35 ` Arnd Bergmann [this message]
2024-11-13 12:03 ` [PATCH v10 03/10] compiler_types.h: Introduce 128-bit unqualified scalar type support Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 04/10] iommu/amd: Introduce struct ivhd_dte_flags to store persistent DTE flags Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 05/10] iommu/amd: Introduce helper function to update 256-bit DTE Suravee Suthikulpanit
2024-11-13 12:50 ` Arnd Bergmann
2024-11-13 13:20 ` Jason Gunthorpe
2024-11-13 14:06 ` Uros Bizjak
2024-11-13 14:09 ` Jason Gunthorpe
2024-11-13 14:14 ` Uros Bizjak
2024-11-13 14:28 ` Jason Gunthorpe
2024-11-13 14:36 ` Uros Bizjak
2024-11-13 16:34 ` Jason Gunthorpe
2024-11-13 19:50 ` Uros Bizjak
2024-11-13 20:08 ` Uros Bizjak
2024-11-14 16:29 ` Jason Gunthorpe
2024-11-14 20:25 ` Uros Bizjak
2024-11-13 12:03 ` [PATCH v10 06/10] iommu/amd: Modify set_dte_entry() to use 256-bit DTE helpers Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 07/10] iommu/amd: Introduce helper function get_dte256() Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 08/10] iommu/amd: Modify clear_dte_entry() to avoid in-place update Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 09/10] iommu/amd: Lock DTE before updating the entry with WRITE_ONCE() Suravee Suthikulpanit
2024-11-13 12:03 ` [PATCH v10 10/10] iommu/amd: Remove amd_iommu_apply_erratum_63() Suravee Suthikulpanit
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