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From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 5/8] arm64: don't open code page table entry creation
Date: Fri, 22 Dec 2017 15:40:57 +0000	[thread overview]
Message-ID: <04646731-e1e1-06fd-0c53-48cd61407ce6@arm.com> (raw)
In-Reply-To: <20171222152307.11252-6-catalin.marinas@arm.com>

On 22/12/17 15:23, Catalin Marinas wrote:
> From: Kristina Martsenko <kristina.martsenko@arm.com>
> 
> Instead of open coding the generation of page table entries, use the
> macros/functions that exist for this - pfn_p*d and p*d_populate. Most
> code in the kernel already uses these macros, this patch tries to fix
> up the few places that don't. This is useful for the next patch in this
> series, which needs to change the page table entry logic, and it's
> better to have that logic in one place.
> 
> The KVM extended ID map is special, since we're creating a level above
> CONFIG_PGTABLE_LEVELS and the required function isn't available. Leave
> it as is and add a comment to explain it. (The normal kernel ID map code
> doesn't need this change because its page tables are created in assembly
> (__create_page_tables)).
> 
> Tested-by: Bob Picco <bob.picco@oracle.com>
> Reviewed-by: Bob Picco <bob.picco@oracle.com>
> Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>

	M.
-- 
Jazz is not dead. It just smells funny...

  reply	other threads:[~2017-12-22 15:40 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-22 15:22 [PATCH v2 0/8] arm64: 52-bit physical address support Catalin Marinas
2017-12-22 15:23 ` [PATCH v2 1/8] arm64: add kconfig symbol to configure physical address size Catalin Marinas
2017-12-22 15:30   ` Marc Zyngier
2017-12-22 15:23 ` [PATCH v2 2/8] arm64: limit PA size to supported range Catalin Marinas
2018-01-09 19:32   ` Kristina Martsenko
2017-12-22 15:23 ` [PATCH v2 3/8] arm64: handle 52-bit addresses in TTBR Catalin Marinas
2017-12-22 15:44   ` Suzuki K Poulose
2017-12-22 15:23 ` [PATCH v2 4/8] arm64: head.S: handle 52-bit PAs in PTEs in early page table setup Catalin Marinas
2017-12-22 15:34   ` Marc Zyngier
2017-12-22 15:23 ` [PATCH v2 5/8] arm64: don't open code page table entry creation Catalin Marinas
2017-12-22 15:40   ` Marc Zyngier [this message]
2017-12-22 15:58   ` Suzuki K Poulose
2017-12-22 15:23 ` [PATCH v2 6/8] arm64: handle 52-bit physical addresses in page table entries Catalin Marinas
2017-12-22 15:23 ` [PATCH v2 7/8] arm64: allow ID map to be extended to 52 bits Catalin Marinas
2017-12-22 15:42   ` Marc Zyngier
2017-12-22 16:34   ` Suzuki K Poulose
2017-12-22 16:57     ` Suzuki K Poulose
2018-01-09 19:31     ` Kristina Martsenko
2018-01-10 10:58       ` Suzuki K Poulose
2018-01-09 19:29   ` Kristina Martsenko
2018-01-12 11:48     ` Kristina Martsenko
2018-01-13 12:16       ` Marc Zyngier
2017-12-22 15:23 ` [PATCH v2 8/8] arm64: enable 52-bit physical address support Catalin Marinas
2017-12-22 15:43   ` Marc Zyngier
2017-12-22 16:22   ` Suzuki K Poulose
2018-01-09 19:33 ` [PATCH v2 0/8] arm64: " Kristina Martsenko

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